hotspot/src/share/vm/c1/c1_LIR.cpp
author thartmann
Tue, 31 Jan 2017 18:42:45 +0100
changeset 43676 c6eed495a42b
parent 42877 6cbcb55d5232
child 46630 75aa3e39d02c
permissions -rw-r--r--
8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver Summary: Deoptimize if receiver null check of unresolved field access fails to throw NoClassDefFoundError instead of NPE. Reviewed-by: vlivanov
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/*
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 * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "c1/c1_InstructionPrinter.hpp"
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#include "c1/c1_LIR.hpp"
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#include "c1/c1_LIRAssembler.hpp"
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#include "c1/c1_ValueStack.hpp"
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#include "ci/ciInstance.hpp"
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#include "runtime/sharedRuntime.hpp"
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Register LIR_OprDesc::as_register() const {
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  return FrameMap::cpu_rnr2reg(cpu_regnr());
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}
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Register LIR_OprDesc::as_register_lo() const {
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  return FrameMap::cpu_rnr2reg(cpu_regnrLo());
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}
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Register LIR_OprDesc::as_register_hi() const {
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  return FrameMap::cpu_rnr2reg(cpu_regnrHi());
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}
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LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
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LIR_Opr LIR_OprFact::value_type(ValueType* type) {
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  ValueTag tag = type->tag();
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  switch (tag) {
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  case metaDataTag : {
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    ClassConstant* c = type->as_ClassConstant();
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    if (c != NULL && !c->value()->is_loaded()) {
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      return LIR_OprFact::metadataConst(NULL);
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    } else if (c != NULL) {
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      return LIR_OprFact::metadataConst(c->value()->constant_encoding());
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    } else {
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      MethodConstant* m = type->as_MethodConstant();
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      assert (m != NULL, "not a class or a method?");
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      return LIR_OprFact::metadataConst(m->value()->constant_encoding());
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    }
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  }
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  case objectTag : {
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      return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
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    }
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  case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
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  case intTag    : return LIR_OprFact::intConst(type->as_IntConstant()->value());
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  case floatTag  : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
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  case longTag   : return LIR_OprFact::longConst(type->as_LongConstant()->value());
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  case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
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  default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
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  }
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}
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LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
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  switch (type->tag()) {
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    case objectTag: return LIR_OprFact::oopConst(NULL);
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    case addressTag:return LIR_OprFact::addressConst(0);
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    case intTag:    return LIR_OprFact::intConst(0);
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    case floatTag:  return LIR_OprFact::floatConst(0.0);
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    case longTag:   return LIR_OprFact::longConst(0);
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    case doubleTag: return LIR_OprFact::doubleConst(0.0);
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    default:        ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
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  }
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  return illegalOpr;
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}
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//---------------------------------------------------
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LIR_Address::Scale LIR_Address::scale(BasicType type) {
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  int elem_size = type2aelembytes(type);
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  switch (elem_size) {
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  case 1: return LIR_Address::times_1;
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  case 2: return LIR_Address::times_2;
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  case 4: return LIR_Address::times_4;
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  case 8: return LIR_Address::times_8;
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  }
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  ShouldNotReachHere();
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  return LIR_Address::times_1;
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}
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//---------------------------------------------------
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char LIR_OprDesc::type_char(BasicType t) {
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  switch (t) {
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    case T_ARRAY:
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      t = T_OBJECT;
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    case T_BOOLEAN:
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    case T_CHAR:
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    case T_FLOAT:
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    case T_DOUBLE:
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    case T_BYTE:
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    case T_SHORT:
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    case T_INT:
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    case T_LONG:
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    case T_OBJECT:
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    case T_ADDRESS:
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    case T_VOID:
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      return ::type2char(t);
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    case T_METADATA:
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      return 'M';
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    case T_ILLEGAL:
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      return '?';
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    default:
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      ShouldNotReachHere();
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      return '?';
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  }
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}
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#ifndef PRODUCT
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void LIR_OprDesc::validate_type() const {
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#ifdef ASSERT
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  if (!is_pointer() && !is_illegal()) {
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    OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
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    switch (as_BasicType(type_field())) {
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    case T_LONG:
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      assert((kindfield == cpu_register || kindfield == stack_value) &&
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             size_field() == double_size, "must match");
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      break;
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    case T_FLOAT:
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      // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
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      assert((kindfield == fpu_register || kindfield == stack_value
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             ARM_ONLY(|| kindfield == cpu_register)
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             PPC32_ONLY(|| kindfield == cpu_register) ) &&
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             size_field() == single_size, "must match");
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      break;
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    case T_DOUBLE:
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      // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
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      assert((kindfield == fpu_register || kindfield == stack_value
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             ARM_ONLY(|| kindfield == cpu_register)
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             PPC32_ONLY(|| kindfield == cpu_register) ) &&
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             size_field() == double_size, "must match");
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      break;
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    case T_BOOLEAN:
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    case T_CHAR:
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    case T_BYTE:
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    case T_SHORT:
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    case T_INT:
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    case T_ADDRESS:
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    case T_OBJECT:
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    case T_METADATA:
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    case T_ARRAY:
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      assert((kindfield == cpu_register || kindfield == stack_value) &&
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             size_field() == single_size, "must match");
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      break;
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    case T_ILLEGAL:
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      // XXX TKR also means unknown right now
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      // assert(is_illegal(), "must match");
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      break;
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    default:
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      ShouldNotReachHere();
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    }
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  }
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#endif
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}
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#endif // PRODUCT
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bool LIR_OprDesc::is_oop() const {
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  if (is_pointer()) {
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    return pointer()->is_oop_pointer();
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  } else {
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    OprType t= type_field();
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    assert(t != unknown_type, "not set");
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    return t == object_type;
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  }
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}
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void LIR_Op2::verify() const {
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#ifdef ASSERT
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  switch (code()) {
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    case lir_cmove:
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    case lir_xchg:
1
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      break;
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    default:
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      assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
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             "can't produce oops from arith");
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  }
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  if (TwoOperandLIRForm) {
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dca9294d9f59 8166561: [s390] Adaptions needed for s390 port in C1 and C2.
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#ifdef ASSERT
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    bool threeOperandForm = false;
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#ifdef S390
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    // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
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    threeOperandForm =
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      code() == lir_shl ||
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      ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
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#endif
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#endif
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1
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    switch (code()) {
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    case lir_add:
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    case lir_sub:
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    case lir_mul:
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    case lir_mul_strictfp:
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    case lir_div:
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    case lir_div_strictfp:
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    case lir_rem:
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    case lir_logic_and:
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   232
    case lir_logic_or:
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    case lir_logic_xor:
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   234
    case lir_shl:
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   235
    case lir_shr:
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      assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
1
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      assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
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      break;
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   239
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   240
    // special handling for lir_ushr because of write barriers
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   241
    case lir_ushr:
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      assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
1
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      assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
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   244
      break;
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   245
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   246
    }
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   247
  }
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   248
#endif
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   249
}
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LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
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  : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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  , _cond(cond)
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  , _type(type)
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  , _label(block->label())
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  , _block(block)
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  , _ublock(NULL)
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  , _stub(NULL) {
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}
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   261
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LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
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  LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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  , _cond(cond)
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  , _type(type)
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  , _label(stub->entry())
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  , _block(NULL)
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  , _ublock(NULL)
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  , _stub(stub) {
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}
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   271
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LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
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  : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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  , _cond(cond)
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   275
  , _type(type)
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  , _label(block->label())
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  , _block(block)
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  , _ublock(ublock)
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   279
  , _stub(NULL)
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{
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   281
}
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   282
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   283
void LIR_OpBranch::change_block(BlockBegin* b) {
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   284
  assert(_block != NULL, "must have old block");
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   285
  assert(_block->label() == label(), "must be equal");
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   286
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  _block = b;
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  _label = b->label();
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   289
}
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   290
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   291
void LIR_OpBranch::change_ublock(BlockBegin* b) {
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   292
  assert(_ublock != NULL, "must have old block");
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   293
  _ublock = b;
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   294
}
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   295
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   296
void LIR_OpBranch::negate_cond() {
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   297
  switch (_cond) {
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   298
    case lir_cond_equal:        _cond = lir_cond_notEqual;     break;
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   299
    case lir_cond_notEqual:     _cond = lir_cond_equal;        break;
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   300
    case lir_cond_less:         _cond = lir_cond_greaterEqual; break;
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   301
    case lir_cond_lessEqual:    _cond = lir_cond_greater;      break;
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   302
    case lir_cond_greaterEqual: _cond = lir_cond_less;         break;
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   303
    case lir_cond_greater:      _cond = lir_cond_lessEqual;    break;
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   304
    default: ShouldNotReachHere();
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   305
  }
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   306
}
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   307
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   308
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   309
LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
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                                 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
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   311
                                 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
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   312
                                 CodeStub* stub)
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   313
1
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  : LIR_Op(code, result, NULL)
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   315
  , _object(object)
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   316
  , _array(LIR_OprFact::illegalOpr)
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   317
  , _klass(klass)
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   318
  , _tmp1(tmp1)
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   319
  , _tmp2(tmp2)
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   320
  , _tmp3(tmp3)
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   321
  , _fast_check(fast_check)
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   322
  , _stub(stub)
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   323
  , _info_for_patch(info_for_patch)
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   324
  , _info_for_exception(info_for_exception)
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   325
  , _profiled_method(NULL)
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   326
  , _profiled_bci(-1)
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   327
  , _should_profile(false)
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   328
{
1
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   329
  if (code == lir_checkcast) {
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   330
    assert(info_for_exception != NULL, "checkcast throws exceptions");
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   331
  } else if (code == lir_instanceof) {
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   332
    assert(info_for_exception == NULL, "instanceof throws no exceptions");
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   333
  } else {
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   334
    ShouldNotReachHere();
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   335
  }
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   336
}
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   337
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   338
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   339
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   340
LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
1
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  : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
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   342
  , _object(object)
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   343
  , _array(array)
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   344
  , _klass(NULL)
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   345
  , _tmp1(tmp1)
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   346
  , _tmp2(tmp2)
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   347
  , _tmp3(tmp3)
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   348
  , _fast_check(false)
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   349
  , _stub(NULL)
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   350
  , _info_for_patch(NULL)
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   351
  , _info_for_exception(info_for_exception)
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   352
  , _profiled_method(NULL)
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   353
  , _profiled_bci(-1)
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   354
  , _should_profile(false)
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   355
{
1
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   356
  if (code == lir_store_check) {
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   357
    _stub = new ArrayStoreExceptionStub(object, info_for_exception);
1
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   358
    assert(info_for_exception != NULL, "store_check throws exceptions");
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   359
  } else {
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   360
    ShouldNotReachHere();
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   361
  }
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   362
}
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   363
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   364
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   365
LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
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diff changeset
   366
                                 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   367
  : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   368
  , _tmp(tmp)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   369
  , _src(src)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
  , _src_pos(src_pos)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
  , _dst(dst)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   372
  , _dst_pos(dst_pos)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   373
  , _flags(flags)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   374
  , _expected_type(expected_type)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   375
  , _length(length) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   376
  _stub = new ArrayCopyStub(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   377
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   378
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   379
LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   380
  : LIR_Op(lir_updatecrc32, res, NULL)
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   381
  , _crc(crc)
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   382
  , _val(val) {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   383
}
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   384
489c9b5090e2 Initial load
duke
parents:
diff changeset
   385
//-------------------verify--------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   386
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
void LIR_Op1::verify() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
  switch(code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
  case lir_move:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
    assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
  case lir_null_check:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   393
    assert(in_opr()->is_register(), "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   394
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   395
  case lir_return:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
    assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   400
489c9b5090e2 Initial load
duke
parents:
diff changeset
   401
void LIR_OpRTCall::verify() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   402
  assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   403
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
489c9b5090e2 Initial load
duke
parents:
diff changeset
   405
//-------------------visits--------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   406
489c9b5090e2 Initial load
duke
parents:
diff changeset
   407
// complete rework of LIR instruction visitor.
30305
b92a97e1e9cb 8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents: 29474
diff changeset
   408
// The virtual call for each instruction type is replaced by a big
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   409
// switch that adds the operands for each instruction
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
489c9b5090e2 Initial load
duke
parents:
diff changeset
   411
void LIR_OpVisitState::visit(LIR_Op* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   412
  // copy information from the LIR_Op
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
  reset();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
  set_op(op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   415
489c9b5090e2 Initial load
duke
parents:
diff changeset
   416
  switch (op->code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   417
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
// LIR_Op0
489c9b5090e2 Initial load
duke
parents:
diff changeset
   419
    case lir_word_align:               // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   420
    case lir_backwardbranch_target:    // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   421
    case lir_build_frame:              // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   422
    case lir_fpop_raw:                 // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   423
    case lir_24bit_FPU:                // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   424
    case lir_reset_FPU:                // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
    case lir_breakpoint:               // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   426
    case lir_membar:                   // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   427
    case lir_membar_acquire:           // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   428
    case lir_membar_release:           // result and info always invalid
11886
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
   429
    case lir_membar_loadload:          // result and info always invalid
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
   430
    case lir_membar_storestore:        // result and info always invalid
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
   431
    case lir_membar_loadstore:         // result and info always invalid
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
   432
    case lir_membar_storeload:         // result and info always invalid
38017
55047d16f141 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents: 35540
diff changeset
   433
    case lir_on_spin_wait:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   434
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   435
      assert(op->as_Op0() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   436
      assert(op->_info == NULL, "info not used by this instruction");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   437
      assert(op->_result->is_illegal(), "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   438
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   439
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   440
489c9b5090e2 Initial load
duke
parents:
diff changeset
   441
    case lir_nop:                      // may have info, result always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   442
    case lir_std_entry:                // may have result, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   443
    case lir_osr_entry:                // may have result, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   444
    case lir_get_thread:               // may have result, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   445
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   446
      assert(op->as_Op0() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   447
      if (op->_info != NULL)           do_info(op->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   448
      if (op->_result->is_valid())     do_output(op->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   449
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   450
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   451
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
489c9b5090e2 Initial load
duke
parents:
diff changeset
   453
// LIR_OpLabel
489c9b5090e2 Initial load
duke
parents:
diff changeset
   454
    case lir_label:                    // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   455
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   456
      assert(op->as_OpLabel() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
      assert(op->_info == NULL, "info not used by this instruction");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   458
      assert(op->_result->is_illegal(), "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   459
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   460
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   461
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
// LIR_Op1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   464
    case lir_fxch:           // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
    case lir_fld:            // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   466
    case lir_ffree:          // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   467
    case lir_push:           // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   468
    case lir_pop:            // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
    case lir_return:         // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   470
    case lir_leal:           // input and result always valid, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   471
    case lir_neg:            // input and result always valid, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   472
    case lir_monaddr:        // input and result always valid, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   473
    case lir_null_check:     // input and info always valid, result always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   474
    case lir_move:           // input and result always valid, may have info
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
   475
    case lir_pack64:         // input and result always valid
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
   476
    case lir_unpack64:       // input and result always valid
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   477
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   478
      assert(op->as_Op1() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   479
      LIR_Op1* op1 = (LIR_Op1*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   480
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
      if (op1->_info)                  do_info(op1->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   482
      if (op1->_opr->is_valid())       do_input(op1->_opr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
      if (op1->_result->is_valid())    do_output(op1->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   484
489c9b5090e2 Initial load
duke
parents:
diff changeset
   485
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   486
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   487
489c9b5090e2 Initial load
duke
parents:
diff changeset
   488
    case lir_safepoint:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   490
      assert(op->as_Op1() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
      LIR_Op1* op1 = (LIR_Op1*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
      assert(op1->_info != NULL, "");  do_info(op1->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
      if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
      assert(op1->_result->is_illegal(), "safepoint does not produce value");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
489c9b5090e2 Initial load
duke
parents:
diff changeset
   497
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   498
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
489c9b5090e2 Initial load
duke
parents:
diff changeset
   500
// LIR_OpConvert;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   501
    case lir_convert:        // input and result always valid, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   502
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   503
      assert(op->as_OpConvert() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   504
      LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   505
489c9b5090e2 Initial load
duke
parents:
diff changeset
   506
      assert(opConvert->_info == NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   507
      if (opConvert->_opr->is_valid())       do_input(opConvert->_opr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   508
      if (opConvert->_result->is_valid())    do_output(opConvert->_result);
34220
1ba69cb5585c 8138952: C1: Distinguish between PPC32 and PPC64
mdoerr
parents: 34170
diff changeset
   509
#ifdef PPC32
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   510
      if (opConvert->_tmp1->is_valid())      do_temp(opConvert->_tmp1);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   511
      if (opConvert->_tmp2->is_valid())      do_temp(opConvert->_tmp2);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   512
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   513
      do_stub(opConvert->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   514
489c9b5090e2 Initial load
duke
parents:
diff changeset
   515
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   516
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
// LIR_OpBranch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
    case lir_branch:                   // may have info, input and result register always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
    case lir_cond_float_branch:        // may have info, input and result register always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   522
      assert(op->as_OpBranch() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   523
      LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
489c9b5090e2 Initial load
duke
parents:
diff changeset
   525
      if (opBranch->_info != NULL)     do_info(opBranch->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   526
      assert(opBranch->_result->is_illegal(), "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   527
      if (opBranch->_stub != NULL)     opBranch->stub()->visit(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   528
489c9b5090e2 Initial load
duke
parents:
diff changeset
   529
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   530
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   531
489c9b5090e2 Initial load
duke
parents:
diff changeset
   532
489c9b5090e2 Initial load
duke
parents:
diff changeset
   533
// LIR_OpAllocObj
489c9b5090e2 Initial load
duke
parents:
diff changeset
   534
    case lir_alloc_object:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   535
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   536
      assert(op->as_OpAllocObj() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   537
      LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   538
489c9b5090e2 Initial load
duke
parents:
diff changeset
   539
      if (opAllocObj->_info)                     do_info(opAllocObj->_info);
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   540
      if (opAllocObj->_opr->is_valid()) {        do_input(opAllocObj->_opr);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   541
                                                 do_temp(opAllocObj->_opr);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   542
                                        }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   543
      if (opAllocObj->_tmp1->is_valid())         do_temp(opAllocObj->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   544
      if (opAllocObj->_tmp2->is_valid())         do_temp(opAllocObj->_tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   545
      if (opAllocObj->_tmp3->is_valid())         do_temp(opAllocObj->_tmp3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   546
      if (opAllocObj->_tmp4->is_valid())         do_temp(opAllocObj->_tmp4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   547
      if (opAllocObj->_result->is_valid())       do_output(opAllocObj->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   548
                                                 do_stub(opAllocObj->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   549
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   550
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   551
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
489c9b5090e2 Initial load
duke
parents:
diff changeset
   553
// LIR_OpRoundFP;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   554
    case lir_roundfp: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   555
      assert(op->as_OpRoundFP() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   556
      LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   557
489c9b5090e2 Initial load
duke
parents:
diff changeset
   558
      assert(op->_info == NULL, "info not used by this instruction");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   559
      assert(opRoundFP->_tmp->is_illegal(), "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   560
      do_input(opRoundFP->_opr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   561
      do_output(opRoundFP->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   562
489c9b5090e2 Initial load
duke
parents:
diff changeset
   563
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   564
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   565
489c9b5090e2 Initial load
duke
parents:
diff changeset
   566
489c9b5090e2 Initial load
duke
parents:
diff changeset
   567
// LIR_Op2
489c9b5090e2 Initial load
duke
parents:
diff changeset
   568
    case lir_cmp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   569
    case lir_cmp_l2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   570
    case lir_ucmp_fd2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   571
    case lir_cmp_fd2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   572
    case lir_add:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   573
    case lir_sub:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   574
    case lir_mul:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   575
    case lir_div:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   576
    case lir_rem:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   577
    case lir_sqrt:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   578
    case lir_abs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   579
    case lir_logic_and:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   580
    case lir_logic_or:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   581
    case lir_logic_xor:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   582
    case lir_shl:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   583
    case lir_shr:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   584
    case lir_ushr:
13886
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   585
    case lir_xadd:
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   586
    case lir_xchg:
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
   587
    case lir_assert:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   588
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   589
      assert(op->as_Op2() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   590
      LIR_Op2* op2 = (LIR_Op2*)op;
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   591
      assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   592
             op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   593
489c9b5090e2 Initial load
duke
parents:
diff changeset
   594
      if (op2->_info)                     do_info(op2->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   595
      if (op2->_opr1->is_valid())         do_input(op2->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   596
      if (op2->_opr2->is_valid())         do_input(op2->_opr2);
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   597
      if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   598
      if (op2->_result->is_valid())       do_output(op2->_result);
13886
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   599
      if (op->code() == lir_xchg || op->code() == lir_xadd) {
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   600
        // on ARM and PPC, return value is loaded first so could
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   601
        // destroy inputs. On other platforms that implement those
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   602
        // (x86, sparc), the extra constrainsts are harmless.
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   603
        if (op2->_opr1->is_valid())       do_temp(op2->_opr1);
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   604
        if (op2->_opr2->is_valid())       do_temp(op2->_opr2);
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   605
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   606
489c9b5090e2 Initial load
duke
parents:
diff changeset
   607
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   608
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   609
489c9b5090e2 Initial load
duke
parents:
diff changeset
   610
    // special handling for cmove: right input operand must not be equal
489c9b5090e2 Initial load
duke
parents:
diff changeset
   611
    // to the result operand, otherwise the backend fails
489c9b5090e2 Initial load
duke
parents:
diff changeset
   612
    case lir_cmove:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   613
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   614
      assert(op->as_Op2() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   615
      LIR_Op2* op2 = (LIR_Op2*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   616
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   617
      assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   618
             op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   619
      assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   620
489c9b5090e2 Initial load
duke
parents:
diff changeset
   621
      do_input(op2->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   622
      do_input(op2->_opr2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   623
      do_temp(op2->_opr2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   624
      do_output(op2->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   625
489c9b5090e2 Initial load
duke
parents:
diff changeset
   626
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   627
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   628
489c9b5090e2 Initial load
duke
parents:
diff changeset
   629
    // vspecial handling for strict operations: register input operands
489c9b5090e2 Initial load
duke
parents:
diff changeset
   630
    // as temp to guarantee that they do not overlap with other
489c9b5090e2 Initial load
duke
parents:
diff changeset
   631
    // registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
   632
    case lir_mul_strictfp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   633
    case lir_div_strictfp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   634
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   635
      assert(op->as_Op2() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   636
      LIR_Op2* op2 = (LIR_Op2*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   637
489c9b5090e2 Initial load
duke
parents:
diff changeset
   638
      assert(op2->_info == NULL, "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   639
      assert(op2->_opr1->is_valid(), "used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   640
      assert(op2->_opr2->is_valid(), "used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   641
      assert(op2->_result->is_valid(), "used");
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   642
      assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   643
             op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   644
489c9b5090e2 Initial load
duke
parents:
diff changeset
   645
      do_input(op2->_opr1); do_temp(op2->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   646
      do_input(op2->_opr2); do_temp(op2->_opr2);
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   647
      if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   648
      do_output(op2->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   649
489c9b5090e2 Initial load
duke
parents:
diff changeset
   650
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   651
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   652
5334
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   653
    case lir_throw: {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   654
      assert(op->as_Op2() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   655
      LIR_Op2* op2 = (LIR_Op2*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   656
489c9b5090e2 Initial load
duke
parents:
diff changeset
   657
      if (op2->_info)                     do_info(op2->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   658
      if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   659
      if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
489c9b5090e2 Initial load
duke
parents:
diff changeset
   660
      assert(op2->_result->is_illegal(), "no result");
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   661
      assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   662
             op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   663
489c9b5090e2 Initial load
duke
parents:
diff changeset
   664
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   665
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   666
5334
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   667
    case lir_unwind: {
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   668
      assert(op->as_Op1() != NULL, "must be");
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   669
      LIR_Op1* op1 = (LIR_Op1*)op;
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   670
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   671
      assert(op1->_info == NULL, "no info");
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   672
      assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   673
      assert(op1->_result->is_illegal(), "no result");
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   674
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   675
      break;
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   676
    }
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   677
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   678
// LIR_Op3
489c9b5090e2 Initial load
duke
parents:
diff changeset
   679
    case lir_idiv:
42877
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   680
    case lir_irem: {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   681
      assert(op->as_Op3() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   682
      LIR_Op3* op3= (LIR_Op3*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   683
489c9b5090e2 Initial load
duke
parents:
diff changeset
   684
      if (op3->_info)                     do_info(op3->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   685
      if (op3->_opr1->is_valid())         do_input(op3->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   686
489c9b5090e2 Initial load
duke
parents:
diff changeset
   687
      // second operand is input and temp, so ensure that second operand
489c9b5090e2 Initial load
duke
parents:
diff changeset
   688
      // and third operand get not the same register
489c9b5090e2 Initial load
duke
parents:
diff changeset
   689
      if (op3->_opr2->is_valid())         do_input(op3->_opr2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   690
      if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   691
      if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   692
489c9b5090e2 Initial load
duke
parents:
diff changeset
   693
      if (op3->_result->is_valid())       do_output(op3->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   694
489c9b5090e2 Initial load
duke
parents:
diff changeset
   695
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   696
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   697
42877
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   698
    case lir_fmad:
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   699
    case lir_fmaf: {
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   700
      assert(op->as_Op3() != NULL, "must be");
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   701
      LIR_Op3* op3= (LIR_Op3*)op;
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   702
      assert(op3->_info == NULL, "no info");
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   703
      do_input(op3->_opr1);
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   704
      do_input(op3->_opr2);
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   705
      do_input(op3->_opr3);
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   706
      do_output(op3->_result);
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   707
      break;
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   708
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   709
489c9b5090e2 Initial load
duke
parents:
diff changeset
   710
// LIR_OpJavaCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
   711
    case lir_static_call:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   712
    case lir_optvirtual_call:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   713
    case lir_icvirtual_call:
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
   714
    case lir_virtual_call:
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
   715
    case lir_dynamic_call: {
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
   716
      LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
   717
      assert(opJavaCall != NULL, "must be");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   718
489c9b5090e2 Initial load
duke
parents:
diff changeset
   719
      if (opJavaCall->_receiver->is_valid())     do_input(opJavaCall->_receiver);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   720
489c9b5090e2 Initial load
duke
parents:
diff changeset
   721
      // only visit register parameters
489c9b5090e2 Initial load
duke
parents:
diff changeset
   722
      int n = opJavaCall->_arguments->length();
15760
cbb77ea2a3a3 8005722: Assert in c1_LIR.hpp incorrect wrt to number of register operands
bpittore
parents: 15228
diff changeset
   723
      for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   724
        if (!opJavaCall->_arguments->at(i)->is_pointer()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   725
          do_input(*opJavaCall->_arguments->adr_at(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   726
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   727
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   728
489c9b5090e2 Initial load
duke
parents:
diff changeset
   729
      if (opJavaCall->_info)                     do_info(opJavaCall->_info);
30305
b92a97e1e9cb 8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents: 29474
diff changeset
   730
      if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
b92a97e1e9cb 8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents: 29474
diff changeset
   731
          opJavaCall->is_method_handle_invoke()) {
5687
b862d1f189bd 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 5334
diff changeset
   732
        opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
b862d1f189bd 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 5334
diff changeset
   733
        do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
b862d1f189bd 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 5334
diff changeset
   734
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   735
      do_call();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   736
      if (opJavaCall->_result->is_valid())       do_output(opJavaCall->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   737
489c9b5090e2 Initial load
duke
parents:
diff changeset
   738
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   739
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   740
489c9b5090e2 Initial load
duke
parents:
diff changeset
   741
489c9b5090e2 Initial load
duke
parents:
diff changeset
   742
// LIR_OpRTCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
   743
    case lir_rtcall: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   744
      assert(op->as_OpRTCall() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   745
      LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   746
489c9b5090e2 Initial load
duke
parents:
diff changeset
   747
      // only visit register parameters
489c9b5090e2 Initial load
duke
parents:
diff changeset
   748
      int n = opRTCall->_arguments->length();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   749
      for (int i = 0; i < n; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   750
        if (!opRTCall->_arguments->at(i)->is_pointer()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   751
          do_input(*opRTCall->_arguments->adr_at(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   752
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   753
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   754
      if (opRTCall->_info)                     do_info(opRTCall->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   755
      if (opRTCall->_tmp->is_valid())          do_temp(opRTCall->_tmp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   756
      do_call();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   757
      if (opRTCall->_result->is_valid())       do_output(opRTCall->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   758
489c9b5090e2 Initial load
duke
parents:
diff changeset
   759
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   760
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   761
489c9b5090e2 Initial load
duke
parents:
diff changeset
   762
489c9b5090e2 Initial load
duke
parents:
diff changeset
   763
// LIR_OpArrayCopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
   764
    case lir_arraycopy: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   765
      assert(op->as_OpArrayCopy() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   766
      LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
489c9b5090e2 Initial load
duke
parents:
diff changeset
   768
      assert(opArrayCopy->_result->is_illegal(), "unused");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   769
      assert(opArrayCopy->_src->is_valid(), "used");          do_input(opArrayCopy->_src);     do_temp(opArrayCopy->_src);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   770
      assert(opArrayCopy->_src_pos->is_valid(), "used");      do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
      assert(opArrayCopy->_dst->is_valid(), "used");          do_input(opArrayCopy->_dst);     do_temp(opArrayCopy->_dst);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   772
      assert(opArrayCopy->_dst_pos->is_valid(), "used");      do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   773
      assert(opArrayCopy->_length->is_valid(), "used");       do_input(opArrayCopy->_length);  do_temp(opArrayCopy->_length);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   774
      assert(opArrayCopy->_tmp->is_valid(), "used");          do_temp(opArrayCopy->_tmp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   775
      if (opArrayCopy->_info)                     do_info(opArrayCopy->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   776
489c9b5090e2 Initial load
duke
parents:
diff changeset
   777
      // the implementation of arraycopy always has a call into the runtime
489c9b5090e2 Initial load
duke
parents:
diff changeset
   778
      do_call();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   779
489c9b5090e2 Initial load
duke
parents:
diff changeset
   780
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   781
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   782
489c9b5090e2 Initial load
duke
parents:
diff changeset
   783
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   784
// LIR_OpUpdateCRC32
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   785
    case lir_updatecrc32: {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   786
      assert(op->as_OpUpdateCRC32() != NULL, "must be");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   787
      LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   788
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   789
      assert(opUp->_crc->is_valid(), "used");          do_input(opUp->_crc);     do_temp(opUp->_crc);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   790
      assert(opUp->_val->is_valid(), "used");          do_input(opUp->_val);     do_temp(opUp->_val);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   791
      assert(opUp->_result->is_valid(), "used");       do_output(opUp->_result);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   792
      assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   793
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   794
      break;
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   795
    }
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   796
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   797
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   798
// LIR_OpLock
489c9b5090e2 Initial load
duke
parents:
diff changeset
   799
    case lir_lock:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   800
    case lir_unlock: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   801
      assert(op->as_OpLock() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   802
      LIR_OpLock* opLock = (LIR_OpLock*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   803
489c9b5090e2 Initial load
duke
parents:
diff changeset
   804
      if (opLock->_info)                          do_info(opLock->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   805
489c9b5090e2 Initial load
duke
parents:
diff changeset
   806
      // TODO: check if these operands really have to be temp
489c9b5090e2 Initial load
duke
parents:
diff changeset
   807
      // (or if input is sufficient). This may have influence on the oop map!
489c9b5090e2 Initial load
duke
parents:
diff changeset
   808
      assert(opLock->_lock->is_valid(), "used");  do_temp(opLock->_lock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   809
      assert(opLock->_hdr->is_valid(),  "used");  do_temp(opLock->_hdr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   810
      assert(opLock->_obj->is_valid(),  "used");  do_temp(opLock->_obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   811
489c9b5090e2 Initial load
duke
parents:
diff changeset
   812
      if (opLock->_scratch->is_valid())           do_temp(opLock->_scratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   813
      assert(opLock->_result->is_illegal(), "unused");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   814
489c9b5090e2 Initial load
duke
parents:
diff changeset
   815
      do_stub(opLock->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   816
489c9b5090e2 Initial load
duke
parents:
diff changeset
   817
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   818
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   819
489c9b5090e2 Initial load
duke
parents:
diff changeset
   820
489c9b5090e2 Initial load
duke
parents:
diff changeset
   821
// LIR_OpDelay
489c9b5090e2 Initial load
duke
parents:
diff changeset
   822
    case lir_delay_slot: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   823
      assert(op->as_OpDelay() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   824
      LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   825
489c9b5090e2 Initial load
duke
parents:
diff changeset
   826
      visit(opDelay->delay_op());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   827
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   828
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   829
489c9b5090e2 Initial load
duke
parents:
diff changeset
   830
// LIR_OpTypeCheck
489c9b5090e2 Initial load
duke
parents:
diff changeset
   831
    case lir_instanceof:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   832
    case lir_checkcast:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   833
    case lir_store_check: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   834
      assert(op->as_OpTypeCheck() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   835
      LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   836
489c9b5090e2 Initial load
duke
parents:
diff changeset
   837
      if (opTypeCheck->_info_for_exception)       do_info(opTypeCheck->_info_for_exception);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   838
      if (opTypeCheck->_info_for_patch)           do_info(opTypeCheck->_info_for_patch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   839
      if (opTypeCheck->_object->is_valid())       do_input(opTypeCheck->_object);
11433
2a2e375199de 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 10562
diff changeset
   840
      if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
2a2e375199de 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 10562
diff changeset
   841
        do_temp(opTypeCheck->_object);
2a2e375199de 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 10562
diff changeset
   842
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   843
      if (opTypeCheck->_array->is_valid())        do_input(opTypeCheck->_array);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   844
      if (opTypeCheck->_tmp1->is_valid())         do_temp(opTypeCheck->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   845
      if (opTypeCheck->_tmp2->is_valid())         do_temp(opTypeCheck->_tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   846
      if (opTypeCheck->_tmp3->is_valid())         do_temp(opTypeCheck->_tmp3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   847
      if (opTypeCheck->_result->is_valid())       do_output(opTypeCheck->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   848
                                                  do_stub(opTypeCheck->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   849
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   850
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   851
489c9b5090e2 Initial load
duke
parents:
diff changeset
   852
// LIR_OpCompareAndSwap
489c9b5090e2 Initial load
duke
parents:
diff changeset
   853
    case lir_cas_long:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   854
    case lir_cas_obj:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   855
    case lir_cas_int: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   856
      assert(op->as_OpCompareAndSwap() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   857
      LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   858
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   859
      assert(opCompareAndSwap->_addr->is_valid(),      "used");
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   860
      assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   861
      assert(opCompareAndSwap->_new_value->is_valid(), "used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   862
      if (opCompareAndSwap->_info)                    do_info(opCompareAndSwap->_info);
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   863
                                                      do_input(opCompareAndSwap->_addr);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   864
                                                      do_temp(opCompareAndSwap->_addr);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   865
                                                      do_input(opCompareAndSwap->_cmp_value);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   866
                                                      do_temp(opCompareAndSwap->_cmp_value);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   867
                                                      do_input(opCompareAndSwap->_new_value);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   868
                                                      do_temp(opCompareAndSwap->_new_value);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   869
      if (opCompareAndSwap->_tmp1->is_valid())        do_temp(opCompareAndSwap->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   870
      if (opCompareAndSwap->_tmp2->is_valid())        do_temp(opCompareAndSwap->_tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   871
      if (opCompareAndSwap->_result->is_valid())      do_output(opCompareAndSwap->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   872
489c9b5090e2 Initial load
duke
parents:
diff changeset
   873
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   874
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   875
489c9b5090e2 Initial load
duke
parents:
diff changeset
   876
489c9b5090e2 Initial load
duke
parents:
diff changeset
   877
// LIR_OpAllocArray;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   878
    case lir_alloc_array: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   879
      assert(op->as_OpAllocArray() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   880
      LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   881
489c9b5090e2 Initial load
duke
parents:
diff changeset
   882
      if (opAllocArray->_info)                        do_info(opAllocArray->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   883
      if (opAllocArray->_klass->is_valid())           do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   884
      if (opAllocArray->_len->is_valid())             do_input(opAllocArray->_len);   do_temp(opAllocArray->_len);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   885
      if (opAllocArray->_tmp1->is_valid())            do_temp(opAllocArray->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   886
      if (opAllocArray->_tmp2->is_valid())            do_temp(opAllocArray->_tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   887
      if (opAllocArray->_tmp3->is_valid())            do_temp(opAllocArray->_tmp3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   888
      if (opAllocArray->_tmp4->is_valid())            do_temp(opAllocArray->_tmp4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   889
      if (opAllocArray->_result->is_valid())          do_output(opAllocArray->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   890
                                                      do_stub(opAllocArray->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   891
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   892
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   893
489c9b5090e2 Initial load
duke
parents:
diff changeset
   894
// LIR_OpProfileCall:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   895
    case lir_profile_call: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   896
      assert(op->as_OpProfileCall() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   897
      LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   898
489c9b5090e2 Initial load
duke
parents:
diff changeset
   899
      if (opProfileCall->_recv->is_valid())              do_temp(opProfileCall->_recv);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   900
      assert(opProfileCall->_mdo->is_valid(), "used");   do_temp(opProfileCall->_mdo);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   901
      assert(opProfileCall->_tmp1->is_valid(), "used");  do_temp(opProfileCall->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   902
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   903
    }
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   904
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   905
// LIR_OpProfileType:
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   906
    case lir_profile_type: {
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   907
      assert(op->as_OpProfileType() != NULL, "must be");
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   908
      LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   909
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   910
      do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   911
      do_input(opProfileType->_obj);
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   912
      do_temp(opProfileType->_tmp);
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   913
      break;
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   914
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   915
  default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   916
    ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   917
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   918
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   919
489c9b5090e2 Initial load
duke
parents:
diff changeset
   920
489c9b5090e2 Initial load
duke
parents:
diff changeset
   921
void LIR_OpVisitState::do_stub(CodeStub* stub) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   922
  if (stub != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   923
    stub->visit(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   924
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   925
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   926
489c9b5090e2 Initial load
duke
parents:
diff changeset
   927
XHandlers* LIR_OpVisitState::all_xhandler() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   928
  XHandlers* result = NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   929
489c9b5090e2 Initial load
duke
parents:
diff changeset
   930
  int i;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   931
  for (i = 0; i < info_count(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   932
    if (info_at(i)->exception_handlers() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   933
      result = info_at(i)->exception_handlers();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   934
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   935
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   936
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   937
489c9b5090e2 Initial load
duke
parents:
diff changeset
   938
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   939
  for (i = 0; i < info_count(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   940
    assert(info_at(i)->exception_handlers() == NULL ||
489c9b5090e2 Initial load
duke
parents:
diff changeset
   941
           info_at(i)->exception_handlers() == result,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   942
           "only one xhandler list allowed per LIR-operation");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   943
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   944
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   945
489c9b5090e2 Initial load
duke
parents:
diff changeset
   946
  if (result != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   947
    return result;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   948
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   949
    return new XHandlers();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   950
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   951
489c9b5090e2 Initial load
duke
parents:
diff changeset
   952
  return result;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   953
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   954
489c9b5090e2 Initial load
duke
parents:
diff changeset
   955
489c9b5090e2 Initial load
duke
parents:
diff changeset
   956
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   957
bool LIR_OpVisitState::no_operands(LIR_Op* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   958
  visit(op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   959
489c9b5090e2 Initial load
duke
parents:
diff changeset
   960
  return opr_count(inputMode) == 0 &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   961
         opr_count(outputMode) == 0 &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   962
         opr_count(tempMode) == 0 &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   963
         info_count() == 0 &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   964
         !has_call() &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   965
         !has_slow_case();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   966
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   967
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   968
489c9b5090e2 Initial load
duke
parents:
diff changeset
   969
//---------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   970
489c9b5090e2 Initial load
duke
parents:
diff changeset
   971
489c9b5090e2 Initial load
duke
parents:
diff changeset
   972
void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   973
  masm->emit_call(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   974
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   975
489c9b5090e2 Initial load
duke
parents:
diff changeset
   976
void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   977
  masm->emit_rtcall(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   978
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   979
489c9b5090e2 Initial load
duke
parents:
diff changeset
   980
void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   981
  masm->emit_opLabel(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   982
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   983
489c9b5090e2 Initial load
duke
parents:
diff changeset
   984
void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   985
  masm->emit_arraycopy(this);
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
   986
  masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   987
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   988
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   989
void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   990
  masm->emit_updatecrc32(this);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   991
}
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   992
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   993
void LIR_Op0::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   994
  masm->emit_op0(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   995
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   996
489c9b5090e2 Initial load
duke
parents:
diff changeset
   997
void LIR_Op1::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   998
  masm->emit_op1(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   999
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1001
void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1002
  masm->emit_alloc_obj(this);
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1003
  masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1004
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1005
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1006
void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1007
  masm->emit_opBranch(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1008
  if (stub()) {
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1009
    masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1010
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1011
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1012
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1013
void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1014
  masm->emit_opConvert(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1015
  if (stub() != NULL) {
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1016
    masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1017
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1018
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1019
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1020
void LIR_Op2::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1021
  masm->emit_op2(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1022
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1023
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1024
void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1025
  masm->emit_alloc_array(this);
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1026
  masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1027
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1028
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1029
void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
6461
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1030
  masm->emit_opTypeCheck(this);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1031
  if (stub()) {
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1032
    masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1033
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1034
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1035
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1036
void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1037
  masm->emit_compare_and_swap(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1038
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1039
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1040
void LIR_Op3::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1041
  masm->emit_op3(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1042
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1043
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1044
void LIR_OpLock::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1045
  masm->emit_lock(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1046
  if (stub()) {
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1047
    masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1048
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1049
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1050
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1051
#ifdef ASSERT
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1052
void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1053
  masm->emit_assert(this);
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1054
}
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1055
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1056
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1057
void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1058
  masm->emit_delay(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1059
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1060
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1061
void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1062
  masm->emit_profile_call(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1063
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1064
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1065
void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1066
  masm->emit_profile_type(this);
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1067
}
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1068
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1069
// LIR_List
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1070
LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1071
  : _operations(8)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1072
  , _compilation(compilation)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1073
#ifndef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1074
  , _block(block)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1075
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1076
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1077
  , _file(NULL)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1078
  , _line(0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1079
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1080
{ }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1081
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1082
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1083
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1084
void LIR_List::set_file_and_line(const char * file, int line) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1085
  const char * f = strrchr(file, '/');
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1086
  if (f == NULL) f = strrchr(file, '\\');
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1087
  if (f == NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1088
    f = file;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1089
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1090
    f++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1091
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1092
  _file = f;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1093
  _line = line;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1094
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1095
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1096
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1097
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1098
void LIR_List::append(LIR_InsertionBuffer* buffer) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1099
  assert(this == buffer->lir_list(), "wrong lir list");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1100
  const int n = _operations.length();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1101
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1102
  if (buffer->number_of_ops() > 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1103
    // increase size of instructions list
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1104
    _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1105
    // insert ops from buffer into instructions list
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1106
    int op_index = buffer->number_of_ops() - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1107
    int ip_index = buffer->number_of_insertion_points() - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1108
    int from_index = n - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1109
    int to_index = _operations.length() - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1110
    for (; ip_index >= 0; ip_index --) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1111
      int index = buffer->index_at(ip_index);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1112
      // make room after insertion point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1113
      while (index < from_index) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1114
        _operations.at_put(to_index --, _operations.at(from_index --));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1115
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1116
      // insert ops from buffer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1117
      for (int i = buffer->count_at(ip_index); i > 0; i --) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1118
        _operations.at_put(to_index --, buffer->op_at(op_index --));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1119
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1120
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1121
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1122
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1123
  buffer->finish();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1124
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1125
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1126
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1127
void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
13742
9180987e305d 7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents: 13728
diff changeset
  1128
  assert(reg->type() == T_OBJECT, "bad reg");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1129
  append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),  reg, T_OBJECT, lir_patch_normal, info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1130
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1131
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 12739
diff changeset
  1132
void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
13742
9180987e305d 7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents: 13728
diff changeset
  1133
  assert(reg->type() == T_METADATA, "bad reg");
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 12739
diff changeset
  1134
  append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 12739
diff changeset
  1135
}
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1136
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1137
void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1138
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1139
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1140
            LIR_OprFact::address(addr),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1141
            src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1142
            addr->type(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1143
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1144
            info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1145
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1146
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1147
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1148
void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1149
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1150
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1151
            LIR_OprFact::address(address),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1152
            dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1153
            address->type(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1154
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1155
            info, lir_move_volatile));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1156
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1157
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1158
void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1159
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1160
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1161
            LIR_OprFact::address(new LIR_Address(base, offset, type)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1162
            dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1163
            type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1164
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1165
            info, lir_move_volatile));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1166
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1167
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1168
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1169
void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1170
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1171
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1172
            LIR_OprFact::intConst(v),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1173
            LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1174
            type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1175
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1176
            info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1177
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1178
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1179
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1180
void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1181
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1182
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1183
            LIR_OprFact::oopConst(o),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1184
            LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1185
            type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1186
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1187
            info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1188
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1189
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1190
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1191
void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1192
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1193
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1194
            src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1195
            LIR_OprFact::address(addr),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1196
            addr->type(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1197
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1198
            info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1199
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1200
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1201
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1202
void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1203
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1204
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1205
            src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1206
            LIR_OprFact::address(addr),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1207
            addr->type(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1208
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1209
            info,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1210
            lir_move_volatile));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1211
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1212
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1213
void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1214
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1215
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1216
            src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1217
            LIR_OprFact::address(new LIR_Address(base, offset, type)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1218
            type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1219
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1220
            info, lir_move_volatile));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1221
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1222
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1223
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1224
void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1225
  append(new LIR_Op3(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1226
                    lir_idiv,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1227
                    left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1228
                    right,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1229
                    tmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1230
                    res,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1231
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1232
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1233
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1234
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1235
void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1236
  append(new LIR_Op3(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1237
                    lir_idiv,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1238
                    left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1239
                    LIR_OprFact::intConst(right),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1240
                    tmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1241
                    res,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1242
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1243
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1244
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1245
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1246
void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1247
  append(new LIR_Op3(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1248
                    lir_irem,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1249
                    left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1250
                    right,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1251
                    tmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1252
                    res,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1253
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1254
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1255
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1256
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1257
void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1258
  append(new LIR_Op3(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1259
                    lir_irem,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1260
                    left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1261
                    LIR_OprFact::intConst(right),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1262
                    tmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1263
                    res,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1264
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1265
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1266
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1267
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1268
void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1269
  append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1270
                    lir_cmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1271
                    condition,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1272
                    LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1273
                    LIR_OprFact::intConst(c),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1274
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1275
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1276
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1277
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1278
void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1279
  append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1280
                    lir_cmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1281
                    condition,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1282
                    reg,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1283
                    LIR_OprFact::address(addr),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1284
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1285
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1286
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1287
void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1288
                               int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1289
  append(new LIR_OpAllocObj(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1290
                           klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1291
                           dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1292
                           t1,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1293
                           t2,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1294
                           t3,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1295
                           t4,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1296
                           header_size,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1297
                           object_size,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1298
                           init_check,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1299
                           stub));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1300
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1301
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1302
void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1303
  append(new LIR_OpAllocArray(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1304
                           klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1305
                           len,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1306
                           dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1307
                           t1,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1308
                           t2,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1309
                           t3,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1310
                           t4,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1311
                           type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1312
                           stub));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1313
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1314
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1315
void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1316
 append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1317
                    lir_shl,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1318
                    value,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1319
                    count,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1320
                    dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1321
                    tmp));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1322
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1323
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1324
void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1325
 append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1326
                    lir_shr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1327
                    value,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1328
                    count,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1329
                    dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1330
                    tmp));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1331
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1332
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1333
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1334
void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1335
 append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1336
                    lir_ushr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1337
                    value,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1338
                    count,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1339
                    dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1340
                    tmp));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1341
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1342
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1343
void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1344
  append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1345
                     left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1346
                     right,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1347
                     dst));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1348
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1349
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1350
void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1351
  append(new LIR_OpLock(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1352
                    lir_lock,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1353
                    hdr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1354
                    obj,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1355
                    lock,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1356
                    scratch,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1357
                    stub,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1358
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1359
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1360
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1361
void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1362
  append(new LIR_OpLock(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1363
                    lir_unlock,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1364
                    hdr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1365
                    obj,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1366
                    lock,
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1367
                    scratch,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1368
                    stub,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1369
                    NULL));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1370
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1371
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1372
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1373
void check_LIR() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1374
  // cannot do the proper checking as PRODUCT and other modes return different results
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1375
  // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1376
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1377
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1378
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1379
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1380
void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1381
                          LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1382
                          CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1383
                          ciMethod* profiled_method, int profiled_bci) {
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1384
  LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1385
                                           tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1386
  if (profiled_method != NULL) {
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1387
    c->set_profiled_method(profiled_method);
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1388
    c->set_profiled_bci(profiled_bci);
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1389
    c->set_should_profile(true);
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1390
  }
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1391
  append(c);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1392
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1393
6461
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1394
void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1395
  LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1396
  if (profiled_method != NULL) {
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1397
    c->set_profiled_method(profiled_method);
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1398
    c->set_profiled_bci(profiled_bci);
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1399
    c->set_should_profile(true);
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1400
  }
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1401
  append(c);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1402
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1403
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1404
10562
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1405
void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1406
                           CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1407
  LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1408
  if (profiled_method != NULL) {
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1409
    c->set_profiled_method(profiled_method);
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1410
    c->set_profiled_bci(profiled_bci);
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1411
    c->set_should_profile(true);
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1412
  }
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1413
  append(c);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1414
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1415
43676
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1416
void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1417
  if (deoptimize_on_null) {
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1418
    // Emit an explicit null check and deoptimize if opr is null
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1419
    CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1420
    cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1421
    branch(lir_cond_equal, T_OBJECT, deopt);
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1422
  } else {
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1423
    // Emit an implicit null check
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1424
    append(new LIR_Op1(lir_null_check, opr, info));
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1425
  }
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1426
}
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1427
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1428
void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1429
                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1430
  append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1431
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1432
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1433
void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1434
                       LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1435
  append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1436
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1437
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1438
void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1439
                       LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1440
  append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1441
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1442
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1443
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1444
#ifdef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1445
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1446
void print_LIR(BlockList* blocks) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1447
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1448
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1449
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1450
// LIR_OprDesc
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1451
void LIR_OprDesc::print() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1452
  print(tty);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1453
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1454
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1455
void LIR_OprDesc::print(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1456
  if (is_illegal()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1457
    return;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1458
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1459
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1460
  out->print("[");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1461
  if (is_pointer()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1462
    pointer()->print_value_on(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1463
  } else if (is_single_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1464
    out->print("stack:%d", single_stack_ix());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1465
  } else if (is_double_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1466
    out->print("dbl_stack:%d",double_stack_ix());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1467
  } else if (is_virtual()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1468
    out->print("R%d", vreg_number());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1469
  } else if (is_single_cpu()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1470
    out->print("%s", as_register()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1471
  } else if (is_double_cpu()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1472
    out->print("%s", as_register_hi()->name());
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1473
    out->print("%s", as_register_lo()->name());
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1474
#if defined(X86)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1475
  } else if (is_single_xmm()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1476
    out->print("%s", as_xmm_float_reg()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1477
  } else if (is_double_xmm()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1478
    out->print("%s", as_xmm_double_reg()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1479
  } else if (is_single_fpu()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1480
    out->print("fpu%d", fpu_regnr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1481
  } else if (is_double_fpu()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1482
    out->print("fpu%d", fpu_regnrLo());
29180
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1483
#elif defined(AARCH64)
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1484
  } else if (is_single_fpu()) {
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1485
    out->print("fpu%d", fpu_regnr());
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1486
  } else if (is_double_fpu()) {
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1487
    out->print("fpu%d", fpu_regnrLo());
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1488
#elif defined(ARM)
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1489
  } else if (is_single_fpu()) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1490
    out->print("s%d", fpu_regnr());
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1491
  } else if (is_double_fpu()) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1492
    out->print("d%d", fpu_regnrLo() >> 1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1493
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1494
  } else if (is_single_fpu()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1495
    out->print("%s", as_float_reg()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1496
  } else if (is_double_fpu()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1497
    out->print("%s", as_double_reg()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1498
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1499
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1500
  } else if (is_illegal()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1501
    out->print("-");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1502
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1503
    out->print("Unknown Operand");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1504
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1505
  if (!is_illegal()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1506
    out->print("|%c", type_char());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1507
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1508
  if (is_register() && is_last_use()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1509
    out->print("(last_use)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1510
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1511
  out->print("]");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1512
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1513
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1514
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1515
// LIR_Address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1516
void LIR_Const::print_value_on(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1517
  switch (type()) {
5048
c31b6243f37e 6932496: c1: deoptimization of jsr subroutine fails on sparcv9
roland
parents: 5046
diff changeset
  1518
    case T_ADDRESS:out->print("address:%d",as_jint());          break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1519
    case T_INT:    out->print("int:%d",   as_jint());           break;
15228
e92acc84ade3 7102489: RFE: cleanup jlong typedef on __APPLE__and _LLP64 systems.
hseigel
parents: 13886
diff changeset
  1520
    case T_LONG:   out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1521
    case T_FLOAT:  out->print("flt:%f",   as_jfloat());         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1522
    case T_DOUBLE: out->print("dbl:%f",   as_jdouble());        break;
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1523
    case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject()));        break;
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1524
    case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1525
    default:       out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1526
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1527
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1528
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1529
// LIR_Address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1530
void LIR_Address::print_value_on(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1531
  out->print("Base:"); _base->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1532
  if (!_index->is_illegal()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1533
    out->print(" Index:"); _index->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1534
    switch (scale()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1535
    case times_1: break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1536
    case times_2: out->print(" * 2"); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1537
    case times_4: out->print(" * 4"); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1538
    case times_8: out->print(" * 8"); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1539
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1540
  }
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1541
  out->print(" Disp: " INTX_FORMAT, _disp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1542
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1543
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1544
// debug output of block header without InstructionPrinter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1545
//       (because phi functions are not necessary for LIR)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1546
static void print_block(BlockBegin* x) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1547
  // print block id
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1548
  BlockEnd* end = x->end();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1549
  tty->print("B%d ", x->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1550
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1551
  // print flags
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1552
  if (x->is_set(BlockBegin::std_entry_flag))               tty->print("std ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1553
  if (x->is_set(BlockBegin::osr_entry_flag))               tty->print("osr ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1554
  if (x->is_set(BlockBegin::exception_entry_flag))         tty->print("ex ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1555
  if (x->is_set(BlockBegin::subroutine_entry_flag))        tty->print("jsr ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1556
  if (x->is_set(BlockBegin::backward_branch_target_flag))  tty->print("bb ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1557
  if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1558
  if (x->is_set(BlockBegin::linear_scan_loop_end_flag))    tty->print("le ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1559
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1560
  // print block bci range
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6742
diff changeset
  1561
  tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1562
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1563
  // print predecessors and successors
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1564
  if (x->number_of_preds() > 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1565
    tty->print("preds: ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1566
    for (int i = 0; i < x->number_of_preds(); i ++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1567
      tty->print("B%d ", x->pred_at(i)->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1568
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1569
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1570
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1571
  if (x->number_of_sux() > 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1572
    tty->print("sux: ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1573
    for (int i = 0; i < x->number_of_sux(); i ++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1574
      tty->print("B%d ", x->sux_at(i)->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1575
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1576
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1577
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1578
  // print exception handlers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1579
  if (x->number_of_exception_handlers() > 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1580
    tty->print("xhandler: ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1581
    for (int i = 0; i < x->number_of_exception_handlers();  i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1582
      tty->print("B%d ", x->exception_handler_at(i)->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1583
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1584
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1585
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1586
  tty->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1587
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1588
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1589
void print_LIR(BlockList* blocks) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1590
  tty->print_cr("LIR:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1591
  int i;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1592
  for (i = 0; i < blocks->length(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1593
    BlockBegin* bb = blocks->at(i);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1594
    print_block(bb);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1595
    tty->print("__id_Instruction___________________________________________"); tty->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1596
    bb->lir()->print_instructions();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1597
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1598
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1599
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1600
void LIR_List::print_instructions() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1601
  for (int i = 0; i < _operations.length(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1602
    _operations.at(i)->print(); tty->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1603
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1604
  tty->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1605
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1606
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1607
// LIR_Ops printing routines
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1608
// LIR_Op
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1609
void LIR_Op::print_on(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1610
  if (id() != -1 || PrintCFGToFile) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1611
    out->print("%4d ", id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1612
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1613
    out->print("     ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1614
  }
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1615
  out->print("%s ", name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1616
  print_instr(out);
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6742
diff changeset
  1617
  if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1618
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1619
  if (Verbose && _file != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1620
    out->print(" (%s:%d)", _file, _line);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1621
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1622
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1623
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1624
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1625
const char * LIR_Op::name() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1626
  const char* s = NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1627
  switch(code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1628
     // LIR_Op0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1629
     case lir_membar:                s = "membar";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1630
     case lir_membar_acquire:        s = "membar_acquire"; break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1631
     case lir_membar_release:        s = "membar_release"; break;
11886
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
  1632
     case lir_membar_loadload:       s = "membar_loadload";   break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
  1633
     case lir_membar_storestore:     s = "membar_storestore"; break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
  1634
     case lir_membar_loadstore:      s = "membar_loadstore";  break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
  1635
     case lir_membar_storeload:      s = "membar_storeload";  break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1636
     case lir_word_align:            s = "word_align";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1637
     case lir_label:                 s = "label";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1638
     case lir_nop:                   s = "nop";           break;
38017
55047d16f141 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents: 35540
diff changeset
  1639
     case lir_on_spin_wait:          s = "on_spin_wait";  break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1640
     case lir_backwardbranch_target: s = "backbranch";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1641
     case lir_std_entry:             s = "std_entry";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1642
     case lir_osr_entry:             s = "osr_entry";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1643
     case lir_build_frame:           s = "build_frm";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1644
     case lir_fpop_raw:              s = "fpop_raw";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1645
     case lir_24bit_FPU:             s = "24bit_FPU";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1646
     case lir_reset_FPU:             s = "reset_FPU";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1647
     case lir_breakpoint:            s = "breakpoint";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1648
     case lir_get_thread:            s = "get_thread";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1649
     // LIR_Op1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1650
     case lir_fxch:                  s = "fxch";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1651
     case lir_fld:                   s = "fld";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1652
     case lir_ffree:                 s = "ffree";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1653
     case lir_push:                  s = "push";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1654
     case lir_pop:                   s = "pop";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1655
     case lir_null_check:            s = "null_check";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1656
     case lir_return:                s = "return";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1657
     case lir_safepoint:             s = "safepoint";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1658
     case lir_neg:                   s = "neg";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1659
     case lir_leal:                  s = "leal";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1660
     case lir_branch:                s = "branch";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1661
     case lir_cond_float_branch:     s = "flt_cond_br";   break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1662
     case lir_move:                  s = "move";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1663
     case lir_roundfp:               s = "roundfp";       break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1664
     case lir_rtcall:                s = "rtcall";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1665
     case lir_throw:                 s = "throw";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1666
     case lir_unwind:                s = "unwind";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1667
     case lir_convert:               s = "convert";       break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1668
     case lir_alloc_object:          s = "alloc_obj";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1669
     case lir_monaddr:               s = "mon_addr";      break;
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1670
     case lir_pack64:                s = "pack64";        break;
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1671
     case lir_unpack64:              s = "unpack64";      break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1672
     // LIR_Op2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1673
     case lir_cmp:                   s = "cmp";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1674
     case lir_cmp_l2i:               s = "cmp_l2i";       break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1675
     case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1676
     case lir_cmp_fd2i:              s = "comp_fd2i";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1677
     case lir_cmove:                 s = "cmove";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1678
     case lir_add:                   s = "add";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1679
     case lir_sub:                   s = "sub";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1680
     case lir_mul:                   s = "mul";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1681
     case lir_mul_strictfp:          s = "mul_strictfp";  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1682
     case lir_div:                   s = "div";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1683
     case lir_div_strictfp:          s = "div_strictfp";  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1684
     case lir_rem:                   s = "rem";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1685
     case lir_abs:                   s = "abs";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1686
     case lir_sqrt:                  s = "sqrt";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1687
     case lir_logic_and:             s = "logic_and";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1688
     case lir_logic_or:              s = "logic_or";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1689
     case lir_logic_xor:             s = "logic_xor";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1690
     case lir_shl:                   s = "shift_left";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1691
     case lir_shr:                   s = "shift_right";   break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1692
     case lir_ushr:                  s = "ushift_right";  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1693
     case lir_alloc_array:           s = "alloc_array";   break;
13886
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
  1694
     case lir_xadd:                  s = "xadd";          break;
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
  1695
     case lir_xchg:                  s = "xchg";          break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1696
     // LIR_Op3
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1697
     case lir_idiv:                  s = "idiv";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1698
     case lir_irem:                  s = "irem";          break;
41323
ddd5600d4762 8154122: Intrinsify fused mac operations
vdeshpande
parents: 40071
diff changeset
  1699
     case lir_fmad:                  s = "fmad";          break;
ddd5600d4762 8154122: Intrinsify fused mac operations
vdeshpande
parents: 40071
diff changeset
  1700
     case lir_fmaf:                  s = "fmaf";          break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1701
     // LIR_OpJavaCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1702
     case lir_static_call:           s = "static";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1703
     case lir_optvirtual_call:       s = "optvirtual";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1704
     case lir_icvirtual_call:        s = "icvirtual";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1705
     case lir_virtual_call:          s = "virtual";       break;
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
  1706
     case lir_dynamic_call:          s = "dynamic";       break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1707
     // LIR_OpArrayCopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1708
     case lir_arraycopy:             s = "arraycopy";     break;
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1709
     // LIR_OpUpdateCRC32
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1710
     case lir_updatecrc32:           s = "updatecrc32";   break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1711
     // LIR_OpLock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1712
     case lir_lock:                  s = "lock";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1713
     case lir_unlock:                s = "unlock";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1714
     // LIR_OpDelay
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1715
     case lir_delay_slot:            s = "delay";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1716
     // LIR_OpTypeCheck
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1717
     case lir_instanceof:            s = "instanceof";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1718
     case lir_checkcast:             s = "checkcast";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1719
     case lir_store_check:           s = "store_check";   break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1720
     // LIR_OpCompareAndSwap
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1721
     case lir_cas_long:              s = "cas_long";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1722
     case lir_cas_obj:               s = "cas_obj";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1723
     case lir_cas_int:               s = "cas_int";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1724
     // LIR_OpProfileCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1725
     case lir_profile_call:          s = "profile_call";  break;
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1726
     // LIR_OpProfileType
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1727
     case lir_profile_type:          s = "profile_type";  break;
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1728
     // LIR_OpAssert
17011
def8879c5b81 8011648: C1: optimized build is broken after 7153771
roland
parents: 16611
diff changeset
  1729
#ifdef ASSERT
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1730
     case lir_assert:                s = "assert";        break;
17011
def8879c5b81 8011648: C1: optimized build is broken after 7153771
roland
parents: 16611
diff changeset
  1731
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1732
     case lir_none:                  ShouldNotReachHere();break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1733
    default:                         s = "illegal_op";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1734
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1735
  return s;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1736
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1737
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1738
// LIR_OpJavaCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1739
void LIR_OpJavaCall::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1740
  out->print("call: ");
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1741
  out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1742
  if (receiver()->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1743
    out->print(" [recv: ");   receiver()->print(out);   out->print("]");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1744
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1745
  if (result_opr()->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1746
    out->print(" [result: "); result_opr()->print(out); out->print("]");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1747
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1748
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1749
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1750
// LIR_OpLabel
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1751
void LIR_OpLabel::print_instr(outputStream* out) const {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1752
  out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1753
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1754
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1755
// LIR_OpArrayCopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1756
void LIR_OpArrayCopy::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1757
  src()->print(out);     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1758
  src_pos()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1759
  dst()->print(out);     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1760
  dst_pos()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1761
  length()->print(out);  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1762
  tmp()->print(out);     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1763
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1764
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1765
// LIR_OpUpdateCRC32
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1766
void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1767
  crc()->print(out);     out->print(" ");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1768
  val()->print(out);     out->print(" ");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1769
  result_opr()->print(out); out->print(" ");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1770
}
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1771
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1772
// LIR_OpCompareAndSwap
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1773
void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1774
  addr()->print(out);      out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1775
  cmp_value()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1776
  new_value()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1777
  tmp1()->print(out);      out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1778
  tmp2()->print(out);      out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1779
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1780
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1781
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1782
// LIR_Op0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1783
void LIR_Op0::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1784
  result_opr()->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1785
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1786
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1787
// LIR_Op1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1788
const char * LIR_Op1::name() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1789
  if (code() == lir_move) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1790
    switch (move_kind()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1791
    case lir_move_normal:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1792
      return "move";
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1793
    case lir_move_unaligned:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1794
      return "unaligned move";
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1795
    case lir_move_volatile:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1796
      return "volatile_move";
7427
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
  1797
    case lir_move_wide:
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
  1798
      return "wide_move";
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1799
    default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1800
      ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1801
    return "illegal_op";
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1802
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1803
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1804
    return LIR_Op::name();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1805
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1806
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1807
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1808
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1809
void LIR_Op1::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1810
  _opr->print(out);         out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1811
  result_opr()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1812
  print_patch_code(out, patch_code());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1813
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1814
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1815
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1816
// LIR_Op1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1817
void LIR_OpRTCall::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1818
  intx a = (intx)addr();
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1819
  out->print("%s", Runtime1::name_for_address(addr()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1820
  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1821
  tmp()->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1822
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1823
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1824
void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1825
  switch(code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1826
    case lir_patch_none:                                 break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1827
    case lir_patch_low:    out->print("[patch_low]");    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1828
    case lir_patch_high:   out->print("[patch_high]");   break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1829
    case lir_patch_normal: out->print("[patch_normal]"); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1830
    default: ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1831
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1832
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1833
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1834
// LIR_OpBranch
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1835
void LIR_OpBranch::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1836
  print_condition(out, cond());             out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1837
  if (block() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1838
    out->print("[B%d] ", block()->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1839
  } else if (stub() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1840
    out->print("[");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1841
    stub()->print_name(out);
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1842
    out->print(": " INTPTR_FORMAT "]", p2i(stub()));
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6742
diff changeset
  1843
    if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1844
  } else {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1845
    out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1846
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1847
  if (ublock() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1848
    out->print("unordered: [B%d] ", ublock()->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1849
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1850
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1851
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1852
void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1853
  switch(cond) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1854
    case lir_cond_equal:           out->print("[EQ]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1855
    case lir_cond_notEqual:        out->print("[NE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1856
    case lir_cond_less:            out->print("[LT]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1857
    case lir_cond_lessEqual:       out->print("[LE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1858
    case lir_cond_greaterEqual:    out->print("[GE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1859
    case lir_cond_greater:         out->print("[GT]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1860
    case lir_cond_belowEqual:      out->print("[BE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1861
    case lir_cond_aboveEqual:      out->print("[AE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1862
    case lir_cond_always:          out->print("[AL]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1863
    default:                       out->print("[%d]",cond); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1864
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1865
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1866
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1867
// LIR_OpConvert
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1868
void LIR_OpConvert::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1869
  print_bytecode(out, bytecode());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1870
  in_opr()->print(out);                  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1871
  result_opr()->print(out);              out->print(" ");
34220
1ba69cb5585c 8138952: C1: Distinguish between PPC32 and PPC64
mdoerr
parents: 34170
diff changeset
  1872
#ifdef PPC32
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1873
  if(tmp1()->is_valid()) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1874
    tmp1()->print(out); out->print(" ");
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1875
    tmp2()->print(out); out->print(" ");
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1876
  }
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1877
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1878
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1879
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1880
void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1881
  switch(code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1882
    case Bytecodes::_d2f: out->print("[d2f] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1883
    case Bytecodes::_d2i: out->print("[d2i] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1884
    case Bytecodes::_d2l: out->print("[d2l] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1885
    case Bytecodes::_f2d: out->print("[f2d] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1886
    case Bytecodes::_f2i: out->print("[f2i] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1887
    case Bytecodes::_f2l: out->print("[f2l] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1888
    case Bytecodes::_i2b: out->print("[i2b] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1889
    case Bytecodes::_i2c: out->print("[i2c] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1890
    case Bytecodes::_i2d: out->print("[i2d] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1891
    case Bytecodes::_i2f: out->print("[i2f] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1892
    case Bytecodes::_i2l: out->print("[i2l] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1893
    case Bytecodes::_i2s: out->print("[i2s] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1894
    case Bytecodes::_l2i: out->print("[l2i] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1895
    case Bytecodes::_l2f: out->print("[l2f] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1896
    case Bytecodes::_l2d: out->print("[l2d] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1897
    default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1898
      out->print("[?%d]",code);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1899
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1900
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1901
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1902
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1903
void LIR_OpAllocObj::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1904
  klass()->print(out);                      out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1905
  obj()->print(out);                        out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1906
  tmp1()->print(out);                       out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1907
  tmp2()->print(out);                       out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1908
  tmp3()->print(out);                       out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1909
  tmp4()->print(out);                       out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1910
  out->print("[hdr:%d]", header_size()); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1911
  out->print("[obj:%d]", object_size()); out->print(" ");
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1912
  out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1913
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1914
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1915
void LIR_OpRoundFP::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1916
  _opr->print(out);         out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1917
  tmp()->print(out);        out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1918
  result_opr()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1919
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1920
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1921
// LIR_Op2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1922
void LIR_Op2::print_instr(outputStream* out) const {
34170
628b8ec31f2b 8142314: Bug in C1 ControlFlowOptimizer::delete_unnecessary_jumps with bytecode profiling
simonis
parents: 33465
diff changeset
  1923
  if (code() == lir_cmove || code() == lir_cmp) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1924
    print_condition(out, condition());         out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1925
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1926
  in_opr1()->print(out);    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1927
  in_opr2()->print(out);    out->print(" ");
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1928
  if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1929
  if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1930
  if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1931
  if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1932
  if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1933
  result_opr()->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1934
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1935
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1936
void LIR_OpAllocArray::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1937
  klass()->print(out);                   out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1938
  len()->print(out);                     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1939
  obj()->print(out);                     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1940
  tmp1()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1941
  tmp2()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1942
  tmp3()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1943
  tmp4()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1944
  out->print("[type:0x%x]", type());     out->print(" ");
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1945
  out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1946
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1947
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1948
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1949
void LIR_OpTypeCheck::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1950
  object()->print(out);                  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1951
  if (code() == lir_store_check) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1952
    array()->print(out);                 out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1953
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1954
  if (code() != lir_store_check) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1955
    klass()->print_name_on(out);         out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1956
    if (fast_check())                 out->print("fast_check ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1957
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1958
  tmp1()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1959
  tmp2()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1960
  tmp3()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1961
  result_opr()->print(out);              out->print(" ");
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6742
diff changeset
  1962
  if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1963
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1964
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1965
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1966
// LIR_Op3
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1967
void LIR_Op3::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1968
  in_opr1()->print(out);    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1969
  in_opr2()->print(out);    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1970
  in_opr3()->print(out);    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1971
  result_opr()->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1972
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1973
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1974
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1975
void LIR_OpLock::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1976
  hdr_opr()->print(out);   out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1977
  obj_opr()->print(out);   out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1978
  lock_opr()->print(out);  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1979
  if (_scratch->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1980
    _scratch->print(out);  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1981
  }
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1982
  out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1983
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1984
17011
def8879c5b81 8011648: C1: optimized build is broken after 7153771
roland
parents: 16611
diff changeset
  1985
#ifdef ASSERT
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1986
void LIR_OpAssert::print_instr(outputStream* out) const {
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1987
  print_condition(out, condition()); out->print(" ");
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1988
  in_opr1()->print(out);             out->print(" ");
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1989
  in_opr2()->print(out);             out->print(", \"");
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1990
  out->print("%s", msg());          out->print("\"");
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1991
}
17011
def8879c5b81 8011648: C1: optimized build is broken after 7153771
roland
parents: 16611
diff changeset
  1992
#endif
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1993
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1994
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1995
void LIR_OpDelay::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1996
  _op->print_on(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1997
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1998
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1999
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2000
// LIR_OpProfileCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2001
void LIR_OpProfileCall::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2002
  profiled_method()->name()->print_symbol_on(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2003
  out->print(".");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2004
  profiled_method()->holder()->name()->print_symbol_on(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2005
  out->print(" @ %d ", profiled_bci());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2006
  mdo()->print(out);           out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2007
  recv()->print(out);          out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2008
  tmp1()->print(out);          out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2009
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2010
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2011
// LIR_OpProfileType
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2012
void LIR_OpProfileType::print_instr(outputStream* out) const {
29351
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2013
  out->print("exact = ");
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2014
  if  (exact_klass() == NULL) {
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2015
    out->print("unknown");
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2016
  } else {
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2017
    exact_klass()->print_name_on(out);
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2018
  }
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2019
  out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2020
  out->print(" ");
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2021
  mdp()->print(out);          out->print(" ");
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2022
  obj()->print(out);          out->print(" ");
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2023
  tmp()->print(out);          out->print(" ");
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2024
}
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2025
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2026
#endif // PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2027
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2028
// Implementation of LIR_InsertionBuffer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2029
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2030
void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2031
  assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2032
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2033
  int i = number_of_insertion_points() - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2034
  if (i < 0 || index_at(i) < index) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2035
    append_new(index, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2036
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2037
    assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2038
    assert(count_at(i) > 0, "check");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2039
    set_count_at(i, count_at(i) + 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2040
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2041
  _ops.push(op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2042
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2043
  DEBUG_ONLY(verify());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2044
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2045
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2046
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2047
void LIR_InsertionBuffer::verify() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2048
  int sum = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2049
  int prev_idx = -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2050
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2051
  for (int i = 0; i < number_of_insertion_points(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2052
    assert(prev_idx < index_at(i), "index must be ordered ascending");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2053
    sum += count_at(i);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2054
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2055
  assert(sum == number_of_ops(), "wrong total sum");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2056
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2057
#endif