hotspot/src/share/vm/c1/c1_LIR.cpp
author jwilhelm
Thu, 06 Jul 2017 01:50:26 +0200
changeset 46630 75aa3e39d02c
parent 43676 c6eed495a42b
permissions -rw-r--r--
8182299: Enable disabled clang warnings, build on OSX 10 + Xcode 8 8182656: Make the required changes in GC code to build on OSX 10 + Xcode 8 8182657: Make the required changes in Runtime code to build on OSX 10 + Xcode 8 8182658: Make the required changes in Compiler code to build on OSX 10 + Xcode 8 Reviewed-by: jwilhelm, ehelin, phh Contributed-by: phh <hohensee@amazon.com>, jwilhelm <jesper.wilhelmsson@oracle.com>
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/*
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 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "c1/c1_InstructionPrinter.hpp"
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#include "c1/c1_LIR.hpp"
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#include "c1/c1_LIRAssembler.hpp"
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#include "c1/c1_ValueStack.hpp"
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#include "ci/ciInstance.hpp"
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#include "runtime/sharedRuntime.hpp"
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Register LIR_OprDesc::as_register() const {
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  return FrameMap::cpu_rnr2reg(cpu_regnr());
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}
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Register LIR_OprDesc::as_register_lo() const {
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  return FrameMap::cpu_rnr2reg(cpu_regnrLo());
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}
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Register LIR_OprDesc::as_register_hi() const {
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  return FrameMap::cpu_rnr2reg(cpu_regnrHi());
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}
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LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
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LIR_Opr LIR_OprFact::value_type(ValueType* type) {
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  ValueTag tag = type->tag();
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  switch (tag) {
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  case metaDataTag : {
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    ClassConstant* c = type->as_ClassConstant();
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    if (c != NULL && !c->value()->is_loaded()) {
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      return LIR_OprFact::metadataConst(NULL);
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    } else if (c != NULL) {
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      return LIR_OprFact::metadataConst(c->value()->constant_encoding());
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    } else {
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      MethodConstant* m = type->as_MethodConstant();
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      assert (m != NULL, "not a class or a method?");
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      return LIR_OprFact::metadataConst(m->value()->constant_encoding());
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    }
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  }
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  case objectTag : {
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      return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
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    }
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  case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
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  case intTag    : return LIR_OprFact::intConst(type->as_IntConstant()->value());
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  case floatTag  : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
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  case longTag   : return LIR_OprFact::longConst(type->as_LongConstant()->value());
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  case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
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  default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
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  }
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}
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LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
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  switch (type->tag()) {
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    case objectTag: return LIR_OprFact::oopConst(NULL);
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    case addressTag:return LIR_OprFact::addressConst(0);
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    case intTag:    return LIR_OprFact::intConst(0);
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    case floatTag:  return LIR_OprFact::floatConst(0.0);
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    case longTag:   return LIR_OprFact::longConst(0);
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    case doubleTag: return LIR_OprFact::doubleConst(0.0);
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    default:        ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
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  }
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  return illegalOpr;
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}
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//---------------------------------------------------
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LIR_Address::Scale LIR_Address::scale(BasicType type) {
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  int elem_size = type2aelembytes(type);
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  switch (elem_size) {
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  case 1: return LIR_Address::times_1;
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  case 2: return LIR_Address::times_2;
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  case 4: return LIR_Address::times_4;
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  case 8: return LIR_Address::times_8;
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  }
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  ShouldNotReachHere();
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  return LIR_Address::times_1;
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}
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//---------------------------------------------------
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char LIR_OprDesc::type_char(BasicType t) {
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  switch (t) {
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    case T_ARRAY:
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      t = T_OBJECT;
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    case T_BOOLEAN:
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    case T_CHAR:
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    case T_FLOAT:
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    case T_DOUBLE:
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    case T_BYTE:
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    case T_SHORT:
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    case T_INT:
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    case T_LONG:
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    case T_OBJECT:
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    case T_ADDRESS:
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    case T_VOID:
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      return ::type2char(t);
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    case T_METADATA:
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      return 'M';
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    case T_ILLEGAL:
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      return '?';
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    default:
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      ShouldNotReachHere();
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      return '?';
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  }
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}
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#ifndef PRODUCT
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void LIR_OprDesc::validate_type() const {
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#ifdef ASSERT
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  if (!is_pointer() && !is_illegal()) {
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    OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
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    switch (as_BasicType(type_field())) {
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    case T_LONG:
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      assert((kindfield == cpu_register || kindfield == stack_value) &&
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             size_field() == double_size, "must match");
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      break;
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    case T_FLOAT:
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      // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
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      assert((kindfield == fpu_register || kindfield == stack_value
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             ARM_ONLY(|| kindfield == cpu_register)
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             PPC32_ONLY(|| kindfield == cpu_register) ) &&
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             size_field() == single_size, "must match");
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      break;
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    case T_DOUBLE:
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      // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
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      assert((kindfield == fpu_register || kindfield == stack_value
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             ARM_ONLY(|| kindfield == cpu_register)
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             PPC32_ONLY(|| kindfield == cpu_register) ) &&
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             size_field() == double_size, "must match");
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      break;
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    case T_BOOLEAN:
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    case T_CHAR:
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    case T_BYTE:
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    case T_SHORT:
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    case T_INT:
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    case T_ADDRESS:
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    case T_OBJECT:
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    case T_METADATA:
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    case T_ARRAY:
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      assert((kindfield == cpu_register || kindfield == stack_value) &&
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             size_field() == single_size, "must match");
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      break;
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    case T_ILLEGAL:
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      // XXX TKR also means unknown right now
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      // assert(is_illegal(), "must match");
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      break;
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   176
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    default:
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      ShouldNotReachHere();
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    }
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  }
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#endif
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}
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#endif // PRODUCT
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bool LIR_OprDesc::is_oop() const {
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  if (is_pointer()) {
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    return pointer()->is_oop_pointer();
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  } else {
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    OprType t= type_field();
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    assert(t != unknown_type, "not set");
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    return t == object_type;
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  }
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}
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void LIR_Op2::verify() const {
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#ifdef ASSERT
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  switch (code()) {
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    case lir_cmove:
13886
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   203
    case lir_xchg:
1
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      break;
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    default:
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      assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
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             "can't produce oops from arith");
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  }
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   210
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   211
  if (TwoOperandLIRForm) {
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dca9294d9f59 8166561: [s390] Adaptions needed for s390 port in C1 and C2.
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#ifdef ASSERT
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    bool threeOperandForm = false;
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   215
#ifdef S390
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    // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
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    threeOperandForm =
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      code() == lir_shl ||
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      ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
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#endif
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goetz
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diff changeset
   221
#endif
dca9294d9f59 8166561: [s390] Adaptions needed for s390 port in C1 and C2.
goetz
parents: 41323
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   222
1
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    switch (code()) {
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   224
    case lir_add:
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   225
    case lir_sub:
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   226
    case lir_mul:
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   227
    case lir_mul_strictfp:
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   228
    case lir_div:
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   229
    case lir_div_strictfp:
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   230
    case lir_rem:
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   231
    case lir_logic_and:
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   232
    case lir_logic_or:
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   233
    case lir_logic_xor:
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   234
    case lir_shl:
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   235
    case lir_shr:
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goetz
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   236
      assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
1
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   237
      assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
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   238
      break;
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   239
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   240
    // special handling for lir_ushr because of write barriers
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   241
    case lir_ushr:
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goetz
parents: 41323
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   242
      assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
1
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   243
      assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
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   244
      break;
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   245
46630
75aa3e39d02c 8182299: Enable disabled clang warnings, build on OSX 10 + Xcode 8
jwilhelm
parents: 43676
diff changeset
   246
    default:
75aa3e39d02c 8182299: Enable disabled clang warnings, build on OSX 10 + Xcode 8
jwilhelm
parents: 43676
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   247
      break;
1
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   248
    }
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   249
  }
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   250
#endif
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   251
}
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   252
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   253
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LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
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  : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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   256
  , _cond(cond)
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   257
  , _type(type)
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   258
  , _label(block->label())
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   259
  , _block(block)
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   260
  , _ublock(NULL)
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   261
  , _stub(NULL) {
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   262
}
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   263
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   264
LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
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   265
  LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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   266
  , _cond(cond)
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   267
  , _type(type)
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   268
  , _label(stub->entry())
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   269
  , _block(NULL)
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   270
  , _ublock(NULL)
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   271
  , _stub(stub) {
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   272
}
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   273
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   274
LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
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  : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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   276
  , _cond(cond)
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   277
  , _type(type)
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   278
  , _label(block->label())
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   279
  , _block(block)
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   280
  , _ublock(ublock)
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   281
  , _stub(NULL)
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   282
{
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   283
}
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   284
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   285
void LIR_OpBranch::change_block(BlockBegin* b) {
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   286
  assert(_block != NULL, "must have old block");
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   287
  assert(_block->label() == label(), "must be equal");
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   288
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   289
  _block = b;
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   290
  _label = b->label();
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   291
}
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   292
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   293
void LIR_OpBranch::change_ublock(BlockBegin* b) {
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   294
  assert(_ublock != NULL, "must have old block");
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   295
  _ublock = b;
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   296
}
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   297
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diff changeset
   298
void LIR_OpBranch::negate_cond() {
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diff changeset
   299
  switch (_cond) {
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diff changeset
   300
    case lir_cond_equal:        _cond = lir_cond_notEqual;     break;
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diff changeset
   301
    case lir_cond_notEqual:     _cond = lir_cond_equal;        break;
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   302
    case lir_cond_less:         _cond = lir_cond_greaterEqual; break;
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parents:
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   303
    case lir_cond_lessEqual:    _cond = lir_cond_greater;      break;
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parents:
diff changeset
   304
    case lir_cond_greaterEqual: _cond = lir_cond_less;         break;
489c9b5090e2 Initial load
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parents:
diff changeset
   305
    case lir_cond_greater:      _cond = lir_cond_lessEqual;    break;
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diff changeset
   306
    default: ShouldNotReachHere();
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diff changeset
   307
  }
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diff changeset
   308
}
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parents:
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   309
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   310
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   311
LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
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   312
                                 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
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   313
                                 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
   314
                                 CodeStub* stub)
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
   315
1
489c9b5090e2 Initial load
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   316
  : LIR_Op(code, result, NULL)
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   317
  , _object(object)
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   318
  , _array(LIR_OprFact::illegalOpr)
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   319
  , _klass(klass)
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   320
  , _tmp1(tmp1)
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   321
  , _tmp2(tmp2)
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   322
  , _tmp3(tmp3)
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   323
  , _fast_check(fast_check)
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   324
  , _stub(stub)
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   325
  , _info_for_patch(info_for_patch)
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   326
  , _info_for_exception(info_for_exception)
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
   327
  , _profiled_method(NULL)
970dc585ab63 6953144: Tiered compilation
iveresov
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diff changeset
   328
  , _profiled_bci(-1)
970dc585ab63 6953144: Tiered compilation
iveresov
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diff changeset
   329
  , _should_profile(false)
970dc585ab63 6953144: Tiered compilation
iveresov
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diff changeset
   330
{
1
489c9b5090e2 Initial load
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diff changeset
   331
  if (code == lir_checkcast) {
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diff changeset
   332
    assert(info_for_exception != NULL, "checkcast throws exceptions");
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parents:
diff changeset
   333
  } else if (code == lir_instanceof) {
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diff changeset
   334
    assert(info_for_exception == NULL, "instanceof throws no exceptions");
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parents:
diff changeset
   335
  } else {
489c9b5090e2 Initial load
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diff changeset
   336
    ShouldNotReachHere();
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diff changeset
   337
  }
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diff changeset
   338
}
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   339
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   340
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diff changeset
   341
6453
970dc585ab63 6953144: Tiered compilation
iveresov
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diff changeset
   342
LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
1
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   343
  : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
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   344
  , _object(object)
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   345
  , _array(array)
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   346
  , _klass(NULL)
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   347
  , _tmp1(tmp1)
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   348
  , _tmp2(tmp2)
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   349
  , _tmp3(tmp3)
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   350
  , _fast_check(false)
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   351
  , _stub(NULL)
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   352
  , _info_for_patch(NULL)
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   353
  , _info_for_exception(info_for_exception)
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iveresov
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diff changeset
   354
  , _profiled_method(NULL)
970dc585ab63 6953144: Tiered compilation
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diff changeset
   355
  , _profiled_bci(-1)
970dc585ab63 6953144: Tiered compilation
iveresov
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diff changeset
   356
  , _should_profile(false)
970dc585ab63 6953144: Tiered compilation
iveresov
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diff changeset
   357
{
1
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   358
  if (code == lir_store_check) {
8067
f5f4eac4c48f 7008809: should report the class in ArrayStoreExceptions from compiled code
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parents: 7427
diff changeset
   359
    _stub = new ArrayStoreExceptionStub(object, info_for_exception);
1
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diff changeset
   360
    assert(info_for_exception != NULL, "store_check throws exceptions");
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parents:
diff changeset
   361
  } else {
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diff changeset
   362
    ShouldNotReachHere();
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parents:
diff changeset
   363
  }
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parents:
diff changeset
   364
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   365
489c9b5090e2 Initial load
duke
parents:
diff changeset
   366
489c9b5090e2 Initial load
duke
parents:
diff changeset
   367
LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   368
                                 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   369
  : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
  , _tmp(tmp)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
  , _src(src)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   372
  , _src_pos(src_pos)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   373
  , _dst(dst)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   374
  , _dst_pos(dst_pos)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   375
  , _flags(flags)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   376
  , _expected_type(expected_type)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   377
  , _length(length) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   378
  _stub = new ArrayCopyStub(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   379
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   380
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   381
LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   382
  : LIR_Op(lir_updatecrc32, res, NULL)
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   383
  , _crc(crc)
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   384
  , _val(val) {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   385
}
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   386
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
//-------------------verify--------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
void LIR_Op1::verify() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
  switch(code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
  case lir_move:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
    assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   393
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   394
  case lir_null_check:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   395
    assert(in_opr()->is_register(), "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
  case lir_return:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
    assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
    break;
46630
75aa3e39d02c 8182299: Enable disabled clang warnings, build on OSX 10 + Xcode 8
jwilhelm
parents: 43676
diff changeset
   400
  default:
75aa3e39d02c 8182299: Enable disabled clang warnings, build on OSX 10 + Xcode 8
jwilhelm
parents: 43676
diff changeset
   401
    break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   402
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   403
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
489c9b5090e2 Initial load
duke
parents:
diff changeset
   405
void LIR_OpRTCall::verify() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   406
  assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   407
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   408
489c9b5090e2 Initial load
duke
parents:
diff changeset
   409
//-------------------visits--------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
489c9b5090e2 Initial load
duke
parents:
diff changeset
   411
// complete rework of LIR instruction visitor.
30305
b92a97e1e9cb 8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents: 29474
diff changeset
   412
// The virtual call for each instruction type is replaced by a big
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
// switch that adds the operands for each instruction
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
489c9b5090e2 Initial load
duke
parents:
diff changeset
   415
void LIR_OpVisitState::visit(LIR_Op* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   416
  // copy information from the LIR_Op
489c9b5090e2 Initial load
duke
parents:
diff changeset
   417
  reset();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
  set_op(op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   419
489c9b5090e2 Initial load
duke
parents:
diff changeset
   420
  switch (op->code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   421
489c9b5090e2 Initial load
duke
parents:
diff changeset
   422
// LIR_Op0
489c9b5090e2 Initial load
duke
parents:
diff changeset
   423
    case lir_word_align:               // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   424
    case lir_backwardbranch_target:    // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
    case lir_build_frame:              // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   426
    case lir_fpop_raw:                 // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   427
    case lir_24bit_FPU:                // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   428
    case lir_reset_FPU:                // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   429
    case lir_breakpoint:               // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   430
    case lir_membar:                   // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   431
    case lir_membar_acquire:           // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   432
    case lir_membar_release:           // result and info always invalid
11886
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
   433
    case lir_membar_loadload:          // result and info always invalid
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
   434
    case lir_membar_storestore:        // result and info always invalid
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
   435
    case lir_membar_loadstore:         // result and info always invalid
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
   436
    case lir_membar_storeload:         // result and info always invalid
38017
55047d16f141 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents: 35540
diff changeset
   437
    case lir_on_spin_wait:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   438
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   439
      assert(op->as_Op0() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   440
      assert(op->_info == NULL, "info not used by this instruction");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   441
      assert(op->_result->is_illegal(), "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   442
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   443
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   444
489c9b5090e2 Initial load
duke
parents:
diff changeset
   445
    case lir_nop:                      // may have info, result always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   446
    case lir_std_entry:                // may have result, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   447
    case lir_osr_entry:                // may have result, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   448
    case lir_get_thread:               // may have result, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   449
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   450
      assert(op->as_Op0() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   451
      if (op->_info != NULL)           do_info(op->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
      if (op->_result->is_valid())     do_output(op->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   453
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   454
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   455
489c9b5090e2 Initial load
duke
parents:
diff changeset
   456
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
// LIR_OpLabel
489c9b5090e2 Initial load
duke
parents:
diff changeset
   458
    case lir_label:                    // result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   459
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   460
      assert(op->as_OpLabel() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   461
      assert(op->_info == NULL, "info not used by this instruction");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
      assert(op->_result->is_illegal(), "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   464
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
489c9b5090e2 Initial load
duke
parents:
diff changeset
   466
489c9b5090e2 Initial load
duke
parents:
diff changeset
   467
// LIR_Op1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   468
    case lir_fxch:           // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
    case lir_fld:            // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   470
    case lir_ffree:          // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   471
    case lir_push:           // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   472
    case lir_pop:            // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   473
    case lir_return:         // input always valid, result and info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   474
    case lir_leal:           // input and result always valid, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   475
    case lir_neg:            // input and result always valid, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   476
    case lir_monaddr:        // input and result always valid, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   477
    case lir_null_check:     // input and info always valid, result always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   478
    case lir_move:           // input and result always valid, may have info
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
   479
    case lir_pack64:         // input and result always valid
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
   480
    case lir_unpack64:       // input and result always valid
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   482
      assert(op->as_Op1() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
      LIR_Op1* op1 = (LIR_Op1*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   484
489c9b5090e2 Initial load
duke
parents:
diff changeset
   485
      if (op1->_info)                  do_info(op1->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   486
      if (op1->_opr->is_valid())       do_input(op1->_opr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   487
      if (op1->_result->is_valid())    do_output(op1->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   488
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   490
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
    case lir_safepoint:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
      assert(op->as_Op1() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
      LIR_Op1* op1 = (LIR_Op1*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
489c9b5090e2 Initial load
duke
parents:
diff changeset
   497
      assert(op1->_info != NULL, "");  do_info(op1->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   498
      if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
      assert(op1->_result->is_illegal(), "safepoint does not produce value");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   500
489c9b5090e2 Initial load
duke
parents:
diff changeset
   501
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   502
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   503
489c9b5090e2 Initial load
duke
parents:
diff changeset
   504
// LIR_OpConvert;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   505
    case lir_convert:        // input and result always valid, info always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   506
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   507
      assert(op->as_OpConvert() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   508
      LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   509
489c9b5090e2 Initial load
duke
parents:
diff changeset
   510
      assert(opConvert->_info == NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   511
      if (opConvert->_opr->is_valid())       do_input(opConvert->_opr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   512
      if (opConvert->_result->is_valid())    do_output(opConvert->_result);
34220
1ba69cb5585c 8138952: C1: Distinguish between PPC32 and PPC64
mdoerr
parents: 34170
diff changeset
   513
#ifdef PPC32
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   514
      if (opConvert->_tmp1->is_valid())      do_temp(opConvert->_tmp1);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   515
      if (opConvert->_tmp2->is_valid())      do_temp(opConvert->_tmp2);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   516
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
      do_stub(opConvert->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
489c9b5090e2 Initial load
duke
parents:
diff changeset
   522
// LIR_OpBranch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   523
    case lir_branch:                   // may have info, input and result register always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
    case lir_cond_float_branch:        // may have info, input and result register always invalid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   525
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   526
      assert(op->as_OpBranch() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   527
      LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   528
489c9b5090e2 Initial load
duke
parents:
diff changeset
   529
      if (opBranch->_info != NULL)     do_info(opBranch->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   530
      assert(opBranch->_result->is_illegal(), "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   531
      if (opBranch->_stub != NULL)     opBranch->stub()->visit(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   532
489c9b5090e2 Initial load
duke
parents:
diff changeset
   533
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   534
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   535
489c9b5090e2 Initial load
duke
parents:
diff changeset
   536
489c9b5090e2 Initial load
duke
parents:
diff changeset
   537
// LIR_OpAllocObj
489c9b5090e2 Initial load
duke
parents:
diff changeset
   538
    case lir_alloc_object:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   539
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   540
      assert(op->as_OpAllocObj() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   541
      LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   542
489c9b5090e2 Initial load
duke
parents:
diff changeset
   543
      if (opAllocObj->_info)                     do_info(opAllocObj->_info);
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   544
      if (opAllocObj->_opr->is_valid()) {        do_input(opAllocObj->_opr);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   545
                                                 do_temp(opAllocObj->_opr);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   546
                                        }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   547
      if (opAllocObj->_tmp1->is_valid())         do_temp(opAllocObj->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   548
      if (opAllocObj->_tmp2->is_valid())         do_temp(opAllocObj->_tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   549
      if (opAllocObj->_tmp3->is_valid())         do_temp(opAllocObj->_tmp3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   550
      if (opAllocObj->_tmp4->is_valid())         do_temp(opAllocObj->_tmp4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   551
      if (opAllocObj->_result->is_valid())       do_output(opAllocObj->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
                                                 do_stub(opAllocObj->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   553
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   554
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   555
489c9b5090e2 Initial load
duke
parents:
diff changeset
   556
489c9b5090e2 Initial load
duke
parents:
diff changeset
   557
// LIR_OpRoundFP;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   558
    case lir_roundfp: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   559
      assert(op->as_OpRoundFP() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   560
      LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   561
489c9b5090e2 Initial load
duke
parents:
diff changeset
   562
      assert(op->_info == NULL, "info not used by this instruction");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   563
      assert(opRoundFP->_tmp->is_illegal(), "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   564
      do_input(opRoundFP->_opr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   565
      do_output(opRoundFP->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   566
489c9b5090e2 Initial load
duke
parents:
diff changeset
   567
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   568
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   569
489c9b5090e2 Initial load
duke
parents:
diff changeset
   570
489c9b5090e2 Initial load
duke
parents:
diff changeset
   571
// LIR_Op2
489c9b5090e2 Initial load
duke
parents:
diff changeset
   572
    case lir_cmp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   573
    case lir_cmp_l2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   574
    case lir_ucmp_fd2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   575
    case lir_cmp_fd2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   576
    case lir_add:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   577
    case lir_sub:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   578
    case lir_mul:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   579
    case lir_div:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   580
    case lir_rem:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   581
    case lir_sqrt:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   582
    case lir_abs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   583
    case lir_logic_and:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   584
    case lir_logic_or:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   585
    case lir_logic_xor:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   586
    case lir_shl:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   587
    case lir_shr:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   588
    case lir_ushr:
13886
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   589
    case lir_xadd:
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   590
    case lir_xchg:
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
   591
    case lir_assert:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   592
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   593
      assert(op->as_Op2() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   594
      LIR_Op2* op2 = (LIR_Op2*)op;
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   595
      assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   596
             op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   597
489c9b5090e2 Initial load
duke
parents:
diff changeset
   598
      if (op2->_info)                     do_info(op2->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   599
      if (op2->_opr1->is_valid())         do_input(op2->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   600
      if (op2->_opr2->is_valid())         do_input(op2->_opr2);
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   601
      if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   602
      if (op2->_result->is_valid())       do_output(op2->_result);
13886
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   603
      if (op->code() == lir_xchg || op->code() == lir_xadd) {
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   604
        // on ARM and PPC, return value is loaded first so could
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   605
        // destroy inputs. On other platforms that implement those
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   606
        // (x86, sparc), the extra constrainsts are harmless.
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   607
        if (op2->_opr1->is_valid())       do_temp(op2->_opr1);
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   608
        if (op2->_opr2->is_valid())       do_temp(op2->_opr2);
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
   609
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   610
489c9b5090e2 Initial load
duke
parents:
diff changeset
   611
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   612
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   613
489c9b5090e2 Initial load
duke
parents:
diff changeset
   614
    // special handling for cmove: right input operand must not be equal
489c9b5090e2 Initial load
duke
parents:
diff changeset
   615
    // to the result operand, otherwise the backend fails
489c9b5090e2 Initial load
duke
parents:
diff changeset
   616
    case lir_cmove:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   617
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   618
      assert(op->as_Op2() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   619
      LIR_Op2* op2 = (LIR_Op2*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   620
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   621
      assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   622
             op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   623
      assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   624
489c9b5090e2 Initial load
duke
parents:
diff changeset
   625
      do_input(op2->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   626
      do_input(op2->_opr2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   627
      do_temp(op2->_opr2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   628
      do_output(op2->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   629
489c9b5090e2 Initial load
duke
parents:
diff changeset
   630
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   631
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   632
489c9b5090e2 Initial load
duke
parents:
diff changeset
   633
    // vspecial handling for strict operations: register input operands
489c9b5090e2 Initial load
duke
parents:
diff changeset
   634
    // as temp to guarantee that they do not overlap with other
489c9b5090e2 Initial load
duke
parents:
diff changeset
   635
    // registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
   636
    case lir_mul_strictfp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   637
    case lir_div_strictfp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   638
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   639
      assert(op->as_Op2() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   640
      LIR_Op2* op2 = (LIR_Op2*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   641
489c9b5090e2 Initial load
duke
parents:
diff changeset
   642
      assert(op2->_info == NULL, "not used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   643
      assert(op2->_opr1->is_valid(), "used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   644
      assert(op2->_opr2->is_valid(), "used");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   645
      assert(op2->_result->is_valid(), "used");
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   646
      assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   647
             op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   648
489c9b5090e2 Initial load
duke
parents:
diff changeset
   649
      do_input(op2->_opr1); do_temp(op2->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   650
      do_input(op2->_opr2); do_temp(op2->_opr2);
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   651
      if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   652
      do_output(op2->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   653
489c9b5090e2 Initial load
duke
parents:
diff changeset
   654
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   655
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   656
5334
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   657
    case lir_throw: {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   658
      assert(op->as_Op2() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   659
      LIR_Op2* op2 = (LIR_Op2*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   660
489c9b5090e2 Initial load
duke
parents:
diff changeset
   661
      if (op2->_info)                     do_info(op2->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   662
      if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   663
      if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
489c9b5090e2 Initial load
duke
parents:
diff changeset
   664
      assert(op2->_result->is_illegal(), "no result");
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   665
      assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   666
             op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   667
489c9b5090e2 Initial load
duke
parents:
diff changeset
   668
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   669
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   670
5334
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   671
    case lir_unwind: {
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   672
      assert(op->as_Op1() != NULL, "must be");
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   673
      LIR_Op1* op1 = (LIR_Op1*)op;
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   674
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   675
      assert(op1->_info == NULL, "no info");
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   676
      assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   677
      assert(op1->_result->is_illegal(), "no result");
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   678
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   679
      break;
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   680
    }
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   681
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   682
// LIR_Op3
489c9b5090e2 Initial load
duke
parents:
diff changeset
   683
    case lir_idiv:
42877
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   684
    case lir_irem: {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   685
      assert(op->as_Op3() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   686
      LIR_Op3* op3= (LIR_Op3*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   687
489c9b5090e2 Initial load
duke
parents:
diff changeset
   688
      if (op3->_info)                     do_info(op3->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   689
      if (op3->_opr1->is_valid())         do_input(op3->_opr1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   690
489c9b5090e2 Initial load
duke
parents:
diff changeset
   691
      // second operand is input and temp, so ensure that second operand
489c9b5090e2 Initial load
duke
parents:
diff changeset
   692
      // and third operand get not the same register
489c9b5090e2 Initial load
duke
parents:
diff changeset
   693
      if (op3->_opr2->is_valid())         do_input(op3->_opr2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   694
      if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   695
      if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   696
489c9b5090e2 Initial load
duke
parents:
diff changeset
   697
      if (op3->_result->is_valid())       do_output(op3->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   698
489c9b5090e2 Initial load
duke
parents:
diff changeset
   699
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   700
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   701
42877
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   702
    case lir_fmad:
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   703
    case lir_fmaf: {
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   704
      assert(op->as_Op3() != NULL, "must be");
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   705
      LIR_Op3* op3= (LIR_Op3*)op;
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   706
      assert(op3->_info == NULL, "no info");
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   707
      do_input(op3->_opr1);
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   708
      do_input(op3->_opr2);
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   709
      do_input(op3->_opr3);
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   710
      do_output(op3->_result);
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   711
      break;
6cbcb55d5232 8171092: C1's Math.fma() intrinsic doesn't correctly process its inputs
roland
parents: 42063
diff changeset
   712
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   713
489c9b5090e2 Initial load
duke
parents:
diff changeset
   714
// LIR_OpJavaCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
   715
    case lir_static_call:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   716
    case lir_optvirtual_call:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   717
    case lir_icvirtual_call:
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
   718
    case lir_virtual_call:
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
   719
    case lir_dynamic_call: {
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
   720
      LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
   721
      assert(opJavaCall != NULL, "must be");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   722
489c9b5090e2 Initial load
duke
parents:
diff changeset
   723
      if (opJavaCall->_receiver->is_valid())     do_input(opJavaCall->_receiver);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   724
489c9b5090e2 Initial load
duke
parents:
diff changeset
   725
      // only visit register parameters
489c9b5090e2 Initial load
duke
parents:
diff changeset
   726
      int n = opJavaCall->_arguments->length();
15760
cbb77ea2a3a3 8005722: Assert in c1_LIR.hpp incorrect wrt to number of register operands
bpittore
parents: 15228
diff changeset
   727
      for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   728
        if (!opJavaCall->_arguments->at(i)->is_pointer()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   729
          do_input(*opJavaCall->_arguments->adr_at(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   730
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   731
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   732
489c9b5090e2 Initial load
duke
parents:
diff changeset
   733
      if (opJavaCall->_info)                     do_info(opJavaCall->_info);
30305
b92a97e1e9cb 8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents: 29474
diff changeset
   734
      if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
b92a97e1e9cb 8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents: 29474
diff changeset
   735
          opJavaCall->is_method_handle_invoke()) {
5687
b862d1f189bd 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 5334
diff changeset
   736
        opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
b862d1f189bd 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 5334
diff changeset
   737
        do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
b862d1f189bd 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 5334
diff changeset
   738
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   739
      do_call();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   740
      if (opJavaCall->_result->is_valid())       do_output(opJavaCall->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   741
489c9b5090e2 Initial load
duke
parents:
diff changeset
   742
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   743
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   744
489c9b5090e2 Initial load
duke
parents:
diff changeset
   745
489c9b5090e2 Initial load
duke
parents:
diff changeset
   746
// LIR_OpRTCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
   747
    case lir_rtcall: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   748
      assert(op->as_OpRTCall() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   749
      LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   750
489c9b5090e2 Initial load
duke
parents:
diff changeset
   751
      // only visit register parameters
489c9b5090e2 Initial load
duke
parents:
diff changeset
   752
      int n = opRTCall->_arguments->length();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   753
      for (int i = 0; i < n; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   754
        if (!opRTCall->_arguments->at(i)->is_pointer()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   755
          do_input(*opRTCall->_arguments->adr_at(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   756
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   757
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   758
      if (opRTCall->_info)                     do_info(opRTCall->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   759
      if (opRTCall->_tmp->is_valid())          do_temp(opRTCall->_tmp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   760
      do_call();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   761
      if (opRTCall->_result->is_valid())       do_output(opRTCall->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   762
489c9b5090e2 Initial load
duke
parents:
diff changeset
   763
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   764
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   765
489c9b5090e2 Initial load
duke
parents:
diff changeset
   766
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
// LIR_OpArrayCopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
   768
    case lir_arraycopy: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   769
      assert(op->as_OpArrayCopy() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   770
      LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
489c9b5090e2 Initial load
duke
parents:
diff changeset
   772
      assert(opArrayCopy->_result->is_illegal(), "unused");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   773
      assert(opArrayCopy->_src->is_valid(), "used");          do_input(opArrayCopy->_src);     do_temp(opArrayCopy->_src);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   774
      assert(opArrayCopy->_src_pos->is_valid(), "used");      do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   775
      assert(opArrayCopy->_dst->is_valid(), "used");          do_input(opArrayCopy->_dst);     do_temp(opArrayCopy->_dst);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   776
      assert(opArrayCopy->_dst_pos->is_valid(), "used");      do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   777
      assert(opArrayCopy->_length->is_valid(), "used");       do_input(opArrayCopy->_length);  do_temp(opArrayCopy->_length);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   778
      assert(opArrayCopy->_tmp->is_valid(), "used");          do_temp(opArrayCopy->_tmp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   779
      if (opArrayCopy->_info)                     do_info(opArrayCopy->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   780
489c9b5090e2 Initial load
duke
parents:
diff changeset
   781
      // the implementation of arraycopy always has a call into the runtime
489c9b5090e2 Initial load
duke
parents:
diff changeset
   782
      do_call();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   783
489c9b5090e2 Initial load
duke
parents:
diff changeset
   784
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   785
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   786
489c9b5090e2 Initial load
duke
parents:
diff changeset
   787
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   788
// LIR_OpUpdateCRC32
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   789
    case lir_updatecrc32: {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   790
      assert(op->as_OpUpdateCRC32() != NULL, "must be");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   791
      LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   792
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   793
      assert(opUp->_crc->is_valid(), "used");          do_input(opUp->_crc);     do_temp(opUp->_crc);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   794
      assert(opUp->_val->is_valid(), "used");          do_input(opUp->_val);     do_temp(opUp->_val);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   795
      assert(opUp->_result->is_valid(), "used");       do_output(opUp->_result);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   796
      assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   797
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   798
      break;
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   799
    }
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   800
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   801
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   802
// LIR_OpLock
489c9b5090e2 Initial load
duke
parents:
diff changeset
   803
    case lir_lock:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   804
    case lir_unlock: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   805
      assert(op->as_OpLock() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   806
      LIR_OpLock* opLock = (LIR_OpLock*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   807
489c9b5090e2 Initial load
duke
parents:
diff changeset
   808
      if (opLock->_info)                          do_info(opLock->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   809
489c9b5090e2 Initial load
duke
parents:
diff changeset
   810
      // TODO: check if these operands really have to be temp
489c9b5090e2 Initial load
duke
parents:
diff changeset
   811
      // (or if input is sufficient). This may have influence on the oop map!
489c9b5090e2 Initial load
duke
parents:
diff changeset
   812
      assert(opLock->_lock->is_valid(), "used");  do_temp(opLock->_lock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   813
      assert(opLock->_hdr->is_valid(),  "used");  do_temp(opLock->_hdr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   814
      assert(opLock->_obj->is_valid(),  "used");  do_temp(opLock->_obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   815
489c9b5090e2 Initial load
duke
parents:
diff changeset
   816
      if (opLock->_scratch->is_valid())           do_temp(opLock->_scratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   817
      assert(opLock->_result->is_illegal(), "unused");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   818
489c9b5090e2 Initial load
duke
parents:
diff changeset
   819
      do_stub(opLock->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   820
489c9b5090e2 Initial load
duke
parents:
diff changeset
   821
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   822
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   823
489c9b5090e2 Initial load
duke
parents:
diff changeset
   824
489c9b5090e2 Initial load
duke
parents:
diff changeset
   825
// LIR_OpDelay
489c9b5090e2 Initial load
duke
parents:
diff changeset
   826
    case lir_delay_slot: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   827
      assert(op->as_OpDelay() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   828
      LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   829
489c9b5090e2 Initial load
duke
parents:
diff changeset
   830
      visit(opDelay->delay_op());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   831
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   832
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   833
489c9b5090e2 Initial load
duke
parents:
diff changeset
   834
// LIR_OpTypeCheck
489c9b5090e2 Initial load
duke
parents:
diff changeset
   835
    case lir_instanceof:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   836
    case lir_checkcast:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   837
    case lir_store_check: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   838
      assert(op->as_OpTypeCheck() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   839
      LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   840
489c9b5090e2 Initial load
duke
parents:
diff changeset
   841
      if (opTypeCheck->_info_for_exception)       do_info(opTypeCheck->_info_for_exception);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   842
      if (opTypeCheck->_info_for_patch)           do_info(opTypeCheck->_info_for_patch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   843
      if (opTypeCheck->_object->is_valid())       do_input(opTypeCheck->_object);
11433
2a2e375199de 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 10562
diff changeset
   844
      if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
2a2e375199de 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 10562
diff changeset
   845
        do_temp(opTypeCheck->_object);
2a2e375199de 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 10562
diff changeset
   846
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   847
      if (opTypeCheck->_array->is_valid())        do_input(opTypeCheck->_array);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   848
      if (opTypeCheck->_tmp1->is_valid())         do_temp(opTypeCheck->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   849
      if (opTypeCheck->_tmp2->is_valid())         do_temp(opTypeCheck->_tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   850
      if (opTypeCheck->_tmp3->is_valid())         do_temp(opTypeCheck->_tmp3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   851
      if (opTypeCheck->_result->is_valid())       do_output(opTypeCheck->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   852
                                                  do_stub(opTypeCheck->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   853
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   854
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   855
489c9b5090e2 Initial load
duke
parents:
diff changeset
   856
// LIR_OpCompareAndSwap
489c9b5090e2 Initial load
duke
parents:
diff changeset
   857
    case lir_cas_long:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   858
    case lir_cas_obj:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   859
    case lir_cas_int: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   860
      assert(op->as_OpCompareAndSwap() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   861
      LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   862
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   863
      assert(opCompareAndSwap->_addr->is_valid(),      "used");
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   864
      assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   865
      assert(opCompareAndSwap->_new_value->is_valid(), "used");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   866
      if (opCompareAndSwap->_info)                    do_info(opCompareAndSwap->_info);
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   867
                                                      do_input(opCompareAndSwap->_addr);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   868
                                                      do_temp(opCompareAndSwap->_addr);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   869
                                                      do_input(opCompareAndSwap->_cmp_value);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   870
                                                      do_temp(opCompareAndSwap->_cmp_value);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   871
                                                      do_input(opCompareAndSwap->_new_value);
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
   872
                                                      do_temp(opCompareAndSwap->_new_value);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   873
      if (opCompareAndSwap->_tmp1->is_valid())        do_temp(opCompareAndSwap->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   874
      if (opCompareAndSwap->_tmp2->is_valid())        do_temp(opCompareAndSwap->_tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   875
      if (opCompareAndSwap->_result->is_valid())      do_output(opCompareAndSwap->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   876
489c9b5090e2 Initial load
duke
parents:
diff changeset
   877
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   878
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   879
489c9b5090e2 Initial load
duke
parents:
diff changeset
   880
489c9b5090e2 Initial load
duke
parents:
diff changeset
   881
// LIR_OpAllocArray;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   882
    case lir_alloc_array: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   883
      assert(op->as_OpAllocArray() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   884
      LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   885
489c9b5090e2 Initial load
duke
parents:
diff changeset
   886
      if (opAllocArray->_info)                        do_info(opAllocArray->_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   887
      if (opAllocArray->_klass->is_valid())           do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   888
      if (opAllocArray->_len->is_valid())             do_input(opAllocArray->_len);   do_temp(opAllocArray->_len);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   889
      if (opAllocArray->_tmp1->is_valid())            do_temp(opAllocArray->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   890
      if (opAllocArray->_tmp2->is_valid())            do_temp(opAllocArray->_tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   891
      if (opAllocArray->_tmp3->is_valid())            do_temp(opAllocArray->_tmp3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   892
      if (opAllocArray->_tmp4->is_valid())            do_temp(opAllocArray->_tmp4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   893
      if (opAllocArray->_result->is_valid())          do_output(opAllocArray->_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   894
                                                      do_stub(opAllocArray->_stub);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   895
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   896
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   897
489c9b5090e2 Initial load
duke
parents:
diff changeset
   898
// LIR_OpProfileCall:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   899
    case lir_profile_call: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   900
      assert(op->as_OpProfileCall() != NULL, "must be");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   901
      LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   902
489c9b5090e2 Initial load
duke
parents:
diff changeset
   903
      if (opProfileCall->_recv->is_valid())              do_temp(opProfileCall->_recv);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   904
      assert(opProfileCall->_mdo->is_valid(), "used");   do_temp(opProfileCall->_mdo);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   905
      assert(opProfileCall->_tmp1->is_valid(), "used");  do_temp(opProfileCall->_tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   906
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   907
    }
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   908
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   909
// LIR_OpProfileType:
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   910
    case lir_profile_type: {
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   911
      assert(op->as_OpProfileType() != NULL, "must be");
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   912
      LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   913
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   914
      do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   915
      do_input(opProfileType->_obj);
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   916
      do_temp(opProfileType->_tmp);
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   917
      break;
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
   918
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   919
  default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   920
    ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   921
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   922
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   923
489c9b5090e2 Initial load
duke
parents:
diff changeset
   924
489c9b5090e2 Initial load
duke
parents:
diff changeset
   925
void LIR_OpVisitState::do_stub(CodeStub* stub) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   926
  if (stub != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   927
    stub->visit(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   928
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   929
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   930
489c9b5090e2 Initial load
duke
parents:
diff changeset
   931
XHandlers* LIR_OpVisitState::all_xhandler() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   932
  XHandlers* result = NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   933
489c9b5090e2 Initial load
duke
parents:
diff changeset
   934
  int i;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   935
  for (i = 0; i < info_count(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   936
    if (info_at(i)->exception_handlers() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   937
      result = info_at(i)->exception_handlers();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   938
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   939
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   940
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   941
489c9b5090e2 Initial load
duke
parents:
diff changeset
   942
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   943
  for (i = 0; i < info_count(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   944
    assert(info_at(i)->exception_handlers() == NULL ||
489c9b5090e2 Initial load
duke
parents:
diff changeset
   945
           info_at(i)->exception_handlers() == result,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   946
           "only one xhandler list allowed per LIR-operation");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   947
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   948
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   949
489c9b5090e2 Initial load
duke
parents:
diff changeset
   950
  if (result != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   951
    return result;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   952
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   953
    return new XHandlers();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   954
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   955
489c9b5090e2 Initial load
duke
parents:
diff changeset
   956
  return result;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   957
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   958
489c9b5090e2 Initial load
duke
parents:
diff changeset
   959
489c9b5090e2 Initial load
duke
parents:
diff changeset
   960
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   961
bool LIR_OpVisitState::no_operands(LIR_Op* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   962
  visit(op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   963
489c9b5090e2 Initial load
duke
parents:
diff changeset
   964
  return opr_count(inputMode) == 0 &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   965
         opr_count(outputMode) == 0 &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   966
         opr_count(tempMode) == 0 &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   967
         info_count() == 0 &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   968
         !has_call() &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   969
         !has_slow_case();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   970
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   971
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   972
489c9b5090e2 Initial load
duke
parents:
diff changeset
   973
//---------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   974
489c9b5090e2 Initial load
duke
parents:
diff changeset
   975
489c9b5090e2 Initial load
duke
parents:
diff changeset
   976
void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   977
  masm->emit_call(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   978
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   979
489c9b5090e2 Initial load
duke
parents:
diff changeset
   980
void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   981
  masm->emit_rtcall(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   982
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   983
489c9b5090e2 Initial load
duke
parents:
diff changeset
   984
void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   985
  masm->emit_opLabel(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   986
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   987
489c9b5090e2 Initial load
duke
parents:
diff changeset
   988
void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   989
  masm->emit_arraycopy(this);
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
   990
  masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   991
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   992
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   993
void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   994
  masm->emit_updatecrc32(this);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   995
}
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
   996
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   997
void LIR_Op0::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   998
  masm->emit_op0(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   999
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1001
void LIR_Op1::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1002
  masm->emit_op1(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1003
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1004
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1005
void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1006
  masm->emit_alloc_obj(this);
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1007
  masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1008
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1009
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1010
void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1011
  masm->emit_opBranch(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1012
  if (stub()) {
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1013
    masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1014
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1015
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1016
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1017
void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1018
  masm->emit_opConvert(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1019
  if (stub() != NULL) {
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1020
    masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1021
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1022
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1023
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1024
void LIR_Op2::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1025
  masm->emit_op2(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1026
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1027
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1028
void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1029
  masm->emit_alloc_array(this);
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1030
  masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1031
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1032
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1033
void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
6461
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1034
  masm->emit_opTypeCheck(this);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1035
  if (stub()) {
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1036
    masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1037
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1038
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1039
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1040
void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1041
  masm->emit_compare_and_swap(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1042
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1043
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1044
void LIR_Op3::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1045
  masm->emit_op3(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1046
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1047
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1048
void LIR_OpLock::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1049
  masm->emit_lock(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1050
  if (stub()) {
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24424
diff changeset
  1051
    masm->append_code_stub(stub());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1052
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1053
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1054
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1055
#ifdef ASSERT
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1056
void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1057
  masm->emit_assert(this);
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1058
}
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1059
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1060
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1061
void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1062
  masm->emit_delay(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1063
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1064
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1065
void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1066
  masm->emit_profile_call(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1067
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1068
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1069
void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1070
  masm->emit_profile_type(this);
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1071
}
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1072
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1073
// LIR_List
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1074
LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1075
  : _operations(8)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1076
  , _compilation(compilation)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1077
#ifndef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1078
  , _block(block)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1079
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1080
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1081
  , _file(NULL)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1082
  , _line(0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1083
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1084
{ }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1085
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1086
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1087
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1088
void LIR_List::set_file_and_line(const char * file, int line) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1089
  const char * f = strrchr(file, '/');
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1090
  if (f == NULL) f = strrchr(file, '\\');
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1091
  if (f == NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1092
    f = file;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1093
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1094
    f++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1095
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1096
  _file = f;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1097
  _line = line;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1098
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1099
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1100
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1101
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1102
void LIR_List::append(LIR_InsertionBuffer* buffer) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1103
  assert(this == buffer->lir_list(), "wrong lir list");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1104
  const int n = _operations.length();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1105
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1106
  if (buffer->number_of_ops() > 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1107
    // increase size of instructions list
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1108
    _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1109
    // insert ops from buffer into instructions list
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1110
    int op_index = buffer->number_of_ops() - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1111
    int ip_index = buffer->number_of_insertion_points() - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1112
    int from_index = n - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1113
    int to_index = _operations.length() - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1114
    for (; ip_index >= 0; ip_index --) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1115
      int index = buffer->index_at(ip_index);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1116
      // make room after insertion point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1117
      while (index < from_index) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1118
        _operations.at_put(to_index --, _operations.at(from_index --));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1119
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1120
      // insert ops from buffer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1121
      for (int i = buffer->count_at(ip_index); i > 0; i --) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1122
        _operations.at_put(to_index --, buffer->op_at(op_index --));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1123
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1124
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1125
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1126
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1127
  buffer->finish();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1128
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1129
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1130
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1131
void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
13742
9180987e305d 7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents: 13728
diff changeset
  1132
  assert(reg->type() == T_OBJECT, "bad reg");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1133
  append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),  reg, T_OBJECT, lir_patch_normal, info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1134
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1135
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 12739
diff changeset
  1136
void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
13742
9180987e305d 7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents: 13728
diff changeset
  1137
  assert(reg->type() == T_METADATA, "bad reg");
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 12739
diff changeset
  1138
  append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 12739
diff changeset
  1139
}
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1140
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1141
void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1142
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1143
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1144
            LIR_OprFact::address(addr),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1145
            src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1146
            addr->type(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1147
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1148
            info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1149
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1150
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1151
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1152
void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1153
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1154
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1155
            LIR_OprFact::address(address),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1156
            dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1157
            address->type(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1158
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1159
            info, lir_move_volatile));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1160
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1161
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1162
void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1163
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1164
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1165
            LIR_OprFact::address(new LIR_Address(base, offset, type)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1166
            dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1167
            type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1168
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1169
            info, lir_move_volatile));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1170
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1171
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1172
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1173
void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1174
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1175
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1176
            LIR_OprFact::intConst(v),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1177
            LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1178
            type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1179
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1180
            info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1181
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1182
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1183
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1184
void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1185
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1186
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1187
            LIR_OprFact::oopConst(o),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1188
            LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1189
            type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1190
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1191
            info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1192
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1193
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1194
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1195
void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1196
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1197
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1198
            src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1199
            LIR_OprFact::address(addr),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1200
            addr->type(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1201
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1202
            info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1203
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1204
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1205
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1206
void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1207
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1208
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1209
            src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1210
            LIR_OprFact::address(addr),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1211
            addr->type(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1212
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1213
            info,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1214
            lir_move_volatile));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1215
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1216
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1217
void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1218
  append(new LIR_Op1(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1219
            lir_move,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1220
            src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1221
            LIR_OprFact::address(new LIR_Address(base, offset, type)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1222
            type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1223
            patch_code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1224
            info, lir_move_volatile));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1225
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1226
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1227
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1228
void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1229
  append(new LIR_Op3(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1230
                    lir_idiv,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1231
                    left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1232
                    right,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1233
                    tmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1234
                    res,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1235
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1236
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1237
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1238
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1239
void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1240
  append(new LIR_Op3(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1241
                    lir_idiv,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1242
                    left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1243
                    LIR_OprFact::intConst(right),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1244
                    tmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1245
                    res,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1246
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1247
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1248
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1249
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1250
void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1251
  append(new LIR_Op3(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1252
                    lir_irem,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1253
                    left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1254
                    right,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1255
                    tmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1256
                    res,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1257
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1258
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1259
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1260
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1261
void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1262
  append(new LIR_Op3(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1263
                    lir_irem,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1264
                    left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1265
                    LIR_OprFact::intConst(right),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1266
                    tmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1267
                    res,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1268
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1269
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1270
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1271
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1272
void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1273
  append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1274
                    lir_cmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1275
                    condition,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1276
                    LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1277
                    LIR_OprFact::intConst(c),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1278
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1279
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1280
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1281
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1282
void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1283
  append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1284
                    lir_cmp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1285
                    condition,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1286
                    reg,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1287
                    LIR_OprFact::address(addr),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1288
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1289
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1290
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1291
void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1292
                               int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1293
  append(new LIR_OpAllocObj(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1294
                           klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1295
                           dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1296
                           t1,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1297
                           t2,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1298
                           t3,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1299
                           t4,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1300
                           header_size,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1301
                           object_size,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1302
                           init_check,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1303
                           stub));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1304
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1305
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1306
void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1307
  append(new LIR_OpAllocArray(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1308
                           klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1309
                           len,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1310
                           dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1311
                           t1,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1312
                           t2,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1313
                           t3,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1314
                           t4,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1315
                           type,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1316
                           stub));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1317
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1318
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1319
void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1320
 append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1321
                    lir_shl,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1322
                    value,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1323
                    count,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1324
                    dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1325
                    tmp));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1326
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1327
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1328
void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1329
 append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1330
                    lir_shr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1331
                    value,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1332
                    count,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1333
                    dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1334
                    tmp));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1335
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1336
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1337
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1338
void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1339
 append(new LIR_Op2(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1340
                    lir_ushr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1341
                    value,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1342
                    count,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1343
                    dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1344
                    tmp));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1345
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1346
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1347
void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1348
  append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1349
                     left,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1350
                     right,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1351
                     dst));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1352
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1353
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1354
void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1355
  append(new LIR_OpLock(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1356
                    lir_lock,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1357
                    hdr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1358
                    obj,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1359
                    lock,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1360
                    scratch,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1361
                    stub,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1362
                    info));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1363
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1364
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1365
void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1366
  append(new LIR_OpLock(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1367
                    lir_unlock,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1368
                    hdr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1369
                    obj,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1370
                    lock,
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1371
                    scratch,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1372
                    stub,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1373
                    NULL));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1374
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1375
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1376
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1377
void check_LIR() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1378
  // cannot do the proper checking as PRODUCT and other modes return different results
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1379
  // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1380
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1381
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1382
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1383
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1384
void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1385
                          LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1386
                          CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1387
                          ciMethod* profiled_method, int profiled_bci) {
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1388
  LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1389
                                           tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1390
  if (profiled_method != NULL) {
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1391
    c->set_profiled_method(profiled_method);
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1392
    c->set_profiled_bci(profiled_bci);
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1393
    c->set_should_profile(true);
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1394
  }
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1395
  append(c);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1396
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1397
6461
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1398
void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1399
  LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1400
  if (profiled_method != NULL) {
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1401
    c->set_profiled_method(profiled_method);
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1402
    c->set_profiled_bci(profiled_bci);
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1403
    c->set_should_profile(true);
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1404
  }
cfc616b49f58 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 6453
diff changeset
  1405
  append(c);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1406
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1407
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1408
10562
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1409
void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1410
                           CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1411
  LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1412
  if (profiled_method != NULL) {
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1413
    c->set_profiled_method(profiled_method);
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1414
    c->set_profiled_bci(profiled_bci);
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1415
    c->set_should_profile(true);
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1416
  }
7d59afed6699 7091764: Tiered: enable aastore profiling
iveresov
parents: 10550
diff changeset
  1417
  append(c);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1418
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1419
43676
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1420
void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1421
  if (deoptimize_on_null) {
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1422
    // Emit an explicit null check and deoptimize if opr is null
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1423
    CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1424
    cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1425
    branch(lir_cond_equal, T_OBJECT, deopt);
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1426
  } else {
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1427
    // Emit an implicit null check
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1428
    append(new LIR_Op1(lir_null_check, opr, info));
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1429
  }
c6eed495a42b 8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver
thartmann
parents: 42877
diff changeset
  1430
}
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1431
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1432
void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1433
                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1434
  append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1435
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1436
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1437
void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1438
                       LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1439
  append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1440
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1441
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1442
void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1443
                       LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1444
  append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1445
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1446
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1447
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1448
#ifdef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1449
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1450
void print_LIR(BlockList* blocks) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1451
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1452
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1453
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1454
// LIR_OprDesc
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1455
void LIR_OprDesc::print() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1456
  print(tty);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1457
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1458
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1459
void LIR_OprDesc::print(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1460
  if (is_illegal()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1461
    return;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1462
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1463
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1464
  out->print("[");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1465
  if (is_pointer()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1466
    pointer()->print_value_on(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1467
  } else if (is_single_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1468
    out->print("stack:%d", single_stack_ix());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1469
  } else if (is_double_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1470
    out->print("dbl_stack:%d",double_stack_ix());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1471
  } else if (is_virtual()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1472
    out->print("R%d", vreg_number());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1473
  } else if (is_single_cpu()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1474
    out->print("%s", as_register()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1475
  } else if (is_double_cpu()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1476
    out->print("%s", as_register_hi()->name());
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1477
    out->print("%s", as_register_lo()->name());
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1478
#if defined(X86)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1479
  } else if (is_single_xmm()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1480
    out->print("%s", as_xmm_float_reg()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1481
  } else if (is_double_xmm()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1482
    out->print("%s", as_xmm_double_reg()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1483
  } else if (is_single_fpu()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1484
    out->print("fpu%d", fpu_regnr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1485
  } else if (is_double_fpu()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1486
    out->print("fpu%d", fpu_regnrLo());
29180
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1487
#elif defined(AARCH64)
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1488
  } else if (is_single_fpu()) {
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1489
    out->print("fpu%d", fpu_regnr());
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1490
  } else if (is_double_fpu()) {
50369728b00e 8064611: AARCH64: Changes to HotSpot shared code
aph
parents: 24669
diff changeset
  1491
    out->print("fpu%d", fpu_regnrLo());
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1492
#elif defined(ARM)
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1493
  } else if (is_single_fpu()) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1494
    out->print("s%d", fpu_regnr());
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1495
  } else if (is_double_fpu()) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1496
    out->print("d%d", fpu_regnrLo() >> 1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1497
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1498
  } else if (is_single_fpu()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1499
    out->print("%s", as_float_reg()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1500
  } else if (is_double_fpu()) {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1501
    out->print("%s", as_double_reg()->name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1502
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1503
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1504
  } else if (is_illegal()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1505
    out->print("-");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1506
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1507
    out->print("Unknown Operand");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1508
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1509
  if (!is_illegal()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1510
    out->print("|%c", type_char());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1511
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1512
  if (is_register() && is_last_use()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1513
    out->print("(last_use)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1514
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1515
  out->print("]");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1516
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1517
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1518
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1519
// LIR_Address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1520
void LIR_Const::print_value_on(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1521
  switch (type()) {
5048
c31b6243f37e 6932496: c1: deoptimization of jsr subroutine fails on sparcv9
roland
parents: 5046
diff changeset
  1522
    case T_ADDRESS:out->print("address:%d",as_jint());          break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1523
    case T_INT:    out->print("int:%d",   as_jint());           break;
15228
e92acc84ade3 7102489: RFE: cleanup jlong typedef on __APPLE__and _LLP64 systems.
hseigel
parents: 13886
diff changeset
  1524
    case T_LONG:   out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1525
    case T_FLOAT:  out->print("flt:%f",   as_jfloat());         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1526
    case T_DOUBLE: out->print("dbl:%f",   as_jdouble());        break;
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1527
    case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject()));        break;
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1528
    case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1529
    default:       out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1530
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1531
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1532
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1533
// LIR_Address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1534
void LIR_Address::print_value_on(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1535
  out->print("Base:"); _base->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1536
  if (!_index->is_illegal()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1537
    out->print(" Index:"); _index->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1538
    switch (scale()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1539
    case times_1: break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1540
    case times_2: out->print(" * 2"); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1541
    case times_4: out->print(" * 4"); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1542
    case times_8: out->print(" * 8"); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1543
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1544
  }
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1545
  out->print(" Disp: " INTX_FORMAT, _disp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1546
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1547
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1548
// debug output of block header without InstructionPrinter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1549
//       (because phi functions are not necessary for LIR)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1550
static void print_block(BlockBegin* x) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1551
  // print block id
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1552
  BlockEnd* end = x->end();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1553
  tty->print("B%d ", x->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1554
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1555
  // print flags
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1556
  if (x->is_set(BlockBegin::std_entry_flag))               tty->print("std ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1557
  if (x->is_set(BlockBegin::osr_entry_flag))               tty->print("osr ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1558
  if (x->is_set(BlockBegin::exception_entry_flag))         tty->print("ex ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1559
  if (x->is_set(BlockBegin::subroutine_entry_flag))        tty->print("jsr ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1560
  if (x->is_set(BlockBegin::backward_branch_target_flag))  tty->print("bb ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1561
  if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1562
  if (x->is_set(BlockBegin::linear_scan_loop_end_flag))    tty->print("le ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1563
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1564
  // print block bci range
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6742
diff changeset
  1565
  tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1566
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1567
  // print predecessors and successors
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1568
  if (x->number_of_preds() > 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1569
    tty->print("preds: ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1570
    for (int i = 0; i < x->number_of_preds(); i ++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1571
      tty->print("B%d ", x->pred_at(i)->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1572
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1573
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1574
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1575
  if (x->number_of_sux() > 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1576
    tty->print("sux: ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1577
    for (int i = 0; i < x->number_of_sux(); i ++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1578
      tty->print("B%d ", x->sux_at(i)->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1579
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1580
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1581
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1582
  // print exception handlers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1583
  if (x->number_of_exception_handlers() > 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1584
    tty->print("xhandler: ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1585
    for (int i = 0; i < x->number_of_exception_handlers();  i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1586
      tty->print("B%d ", x->exception_handler_at(i)->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1587
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1588
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1589
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1590
  tty->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1591
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1592
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1593
void print_LIR(BlockList* blocks) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1594
  tty->print_cr("LIR:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1595
  int i;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1596
  for (i = 0; i < blocks->length(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1597
    BlockBegin* bb = blocks->at(i);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1598
    print_block(bb);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1599
    tty->print("__id_Instruction___________________________________________"); tty->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1600
    bb->lir()->print_instructions();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1601
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1602
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1603
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1604
void LIR_List::print_instructions() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1605
  for (int i = 0; i < _operations.length(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1606
    _operations.at(i)->print(); tty->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1607
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1608
  tty->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1609
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1610
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1611
// LIR_Ops printing routines
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1612
// LIR_Op
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1613
void LIR_Op::print_on(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1614
  if (id() != -1 || PrintCFGToFile) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1615
    out->print("%4d ", id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1616
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1617
    out->print("     ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1618
  }
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1619
  out->print("%s ", name());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1620
  print_instr(out);
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6742
diff changeset
  1621
  if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1622
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1623
  if (Verbose && _file != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1624
    out->print(" (%s:%d)", _file, _line);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1625
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1626
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1627
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1628
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1629
const char * LIR_Op::name() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1630
  const char* s = NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1631
  switch(code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1632
     // LIR_Op0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1633
     case lir_membar:                s = "membar";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1634
     case lir_membar_acquire:        s = "membar_acquire"; break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1635
     case lir_membar_release:        s = "membar_release"; break;
11886
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
  1636
     case lir_membar_loadload:       s = "membar_loadload";   break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
  1637
     case lir_membar_storestore:     s = "membar_storestore"; break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
  1638
     case lir_membar_loadstore:      s = "membar_loadstore";  break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 11433
diff changeset
  1639
     case lir_membar_storeload:      s = "membar_storeload";  break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1640
     case lir_word_align:            s = "word_align";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1641
     case lir_label:                 s = "label";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1642
     case lir_nop:                   s = "nop";           break;
38017
55047d16f141 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents: 35540
diff changeset
  1643
     case lir_on_spin_wait:          s = "on_spin_wait";  break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1644
     case lir_backwardbranch_target: s = "backbranch";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1645
     case lir_std_entry:             s = "std_entry";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1646
     case lir_osr_entry:             s = "osr_entry";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1647
     case lir_build_frame:           s = "build_frm";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1648
     case lir_fpop_raw:              s = "fpop_raw";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1649
     case lir_24bit_FPU:             s = "24bit_FPU";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1650
     case lir_reset_FPU:             s = "reset_FPU";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1651
     case lir_breakpoint:            s = "breakpoint";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1652
     case lir_get_thread:            s = "get_thread";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1653
     // LIR_Op1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1654
     case lir_fxch:                  s = "fxch";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1655
     case lir_fld:                   s = "fld";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1656
     case lir_ffree:                 s = "ffree";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1657
     case lir_push:                  s = "push";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1658
     case lir_pop:                   s = "pop";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1659
     case lir_null_check:            s = "null_check";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1660
     case lir_return:                s = "return";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1661
     case lir_safepoint:             s = "safepoint";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1662
     case lir_neg:                   s = "neg";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1663
     case lir_leal:                  s = "leal";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1664
     case lir_branch:                s = "branch";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1665
     case lir_cond_float_branch:     s = "flt_cond_br";   break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1666
     case lir_move:                  s = "move";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1667
     case lir_roundfp:               s = "roundfp";       break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1668
     case lir_rtcall:                s = "rtcall";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1669
     case lir_throw:                 s = "throw";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1670
     case lir_unwind:                s = "unwind";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1671
     case lir_convert:               s = "convert";       break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1672
     case lir_alloc_object:          s = "alloc_obj";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1673
     case lir_monaddr:               s = "mon_addr";      break;
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1674
     case lir_pack64:                s = "pack64";        break;
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6176
diff changeset
  1675
     case lir_unpack64:              s = "unpack64";      break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1676
     // LIR_Op2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1677
     case lir_cmp:                   s = "cmp";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1678
     case lir_cmp_l2i:               s = "cmp_l2i";       break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1679
     case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1680
     case lir_cmp_fd2i:              s = "comp_fd2i";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1681
     case lir_cmove:                 s = "cmove";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1682
     case lir_add:                   s = "add";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1683
     case lir_sub:                   s = "sub";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1684
     case lir_mul:                   s = "mul";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1685
     case lir_mul_strictfp:          s = "mul_strictfp";  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1686
     case lir_div:                   s = "div";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1687
     case lir_div_strictfp:          s = "div_strictfp";  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1688
     case lir_rem:                   s = "rem";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1689
     case lir_abs:                   s = "abs";           break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1690
     case lir_sqrt:                  s = "sqrt";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1691
     case lir_logic_and:             s = "logic_and";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1692
     case lir_logic_or:              s = "logic_or";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1693
     case lir_logic_xor:             s = "logic_xor";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1694
     case lir_shl:                   s = "shift_left";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1695
     case lir_shr:                   s = "shift_right";   break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1696
     case lir_ushr:                  s = "ushift_right";  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1697
     case lir_alloc_array:           s = "alloc_array";   break;
13886
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
  1698
     case lir_xadd:                  s = "xadd";          break;
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13742
diff changeset
  1699
     case lir_xchg:                  s = "xchg";          break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1700
     // LIR_Op3
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1701
     case lir_idiv:                  s = "idiv";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1702
     case lir_irem:                  s = "irem";          break;
41323
ddd5600d4762 8154122: Intrinsify fused mac operations
vdeshpande
parents: 40071
diff changeset
  1703
     case lir_fmad:                  s = "fmad";          break;
ddd5600d4762 8154122: Intrinsify fused mac operations
vdeshpande
parents: 40071
diff changeset
  1704
     case lir_fmaf:                  s = "fmaf";          break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1705
     // LIR_OpJavaCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1706
     case lir_static_call:           s = "static";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1707
     case lir_optvirtual_call:       s = "optvirtual";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1708
     case lir_icvirtual_call:        s = "icvirtual";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1709
     case lir_virtual_call:          s = "virtual";       break;
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3800
diff changeset
  1710
     case lir_dynamic_call:          s = "dynamic";       break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1711
     // LIR_OpArrayCopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1712
     case lir_arraycopy:             s = "arraycopy";     break;
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1713
     // LIR_OpUpdateCRC32
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1714
     case lir_updatecrc32:           s = "updatecrc32";   break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1715
     // LIR_OpLock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1716
     case lir_lock:                  s = "lock";          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1717
     case lir_unlock:                s = "unlock";        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1718
     // LIR_OpDelay
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1719
     case lir_delay_slot:            s = "delay";         break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1720
     // LIR_OpTypeCheck
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1721
     case lir_instanceof:            s = "instanceof";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1722
     case lir_checkcast:             s = "checkcast";     break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1723
     case lir_store_check:           s = "store_check";   break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1724
     // LIR_OpCompareAndSwap
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1725
     case lir_cas_long:              s = "cas_long";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1726
     case lir_cas_obj:               s = "cas_obj";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1727
     case lir_cas_int:               s = "cas_int";      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1728
     // LIR_OpProfileCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1729
     case lir_profile_call:          s = "profile_call";  break;
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1730
     // LIR_OpProfileType
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  1731
     case lir_profile_type:          s = "profile_type";  break;
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1732
     // LIR_OpAssert
17011
def8879c5b81 8011648: C1: optimized build is broken after 7153771
roland
parents: 16611
diff changeset
  1733
#ifdef ASSERT
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1734
     case lir_assert:                s = "assert";        break;
17011
def8879c5b81 8011648: C1: optimized build is broken after 7153771
roland
parents: 16611
diff changeset
  1735
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1736
     case lir_none:                  ShouldNotReachHere();break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1737
    default:                         s = "illegal_op";    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1738
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1739
  return s;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1740
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1741
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1742
// LIR_OpJavaCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1743
void LIR_OpJavaCall::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1744
  out->print("call: ");
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1745
  out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1746
  if (receiver()->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1747
    out->print(" [recv: ");   receiver()->print(out);   out->print("]");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1748
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1749
  if (result_opr()->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1750
    out->print(" [result: "); result_opr()->print(out); out->print("]");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1751
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1752
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1753
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1754
// LIR_OpLabel
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1755
void LIR_OpLabel::print_instr(outputStream* out) const {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1756
  out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1757
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1758
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1759
// LIR_OpArrayCopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1760
void LIR_OpArrayCopy::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1761
  src()->print(out);     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1762
  src_pos()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1763
  dst()->print(out);     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1764
  dst_pos()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1765
  length()->print(out);  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1766
  tmp()->print(out);     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1767
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1768
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1769
// LIR_OpUpdateCRC32
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1770
void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1771
  crc()->print(out);     out->print(" ");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1772
  val()->print(out);     out->print(" ");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1773
  result_opr()->print(out); out->print(" ");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1774
}
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18104
diff changeset
  1775
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1776
// LIR_OpCompareAndSwap
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1777
void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1778
  addr()->print(out);      out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1779
  cmp_value()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1780
  new_value()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1781
  tmp1()->print(out);      out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1782
  tmp2()->print(out);      out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1783
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1784
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1785
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1786
// LIR_Op0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1787
void LIR_Op0::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1788
  result_opr()->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1789
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1790
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1791
// LIR_Op1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1792
const char * LIR_Op1::name() const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1793
  if (code() == lir_move) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1794
    switch (move_kind()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1795
    case lir_move_normal:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1796
      return "move";
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1797
    case lir_move_unaligned:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1798
      return "unaligned move";
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1799
    case lir_move_volatile:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1800
      return "volatile_move";
7427
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
  1801
    case lir_move_wide:
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
  1802
      return "wide_move";
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1803
    default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1804
      ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1805
    return "illegal_op";
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1806
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1807
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1808
    return LIR_Op::name();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1809
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1810
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1811
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1812
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1813
void LIR_Op1::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1814
  _opr->print(out);         out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1815
  result_opr()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1816
  print_patch_code(out, patch_code());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1817
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1818
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1819
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1820
// LIR_Op1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1821
void LIR_OpRTCall::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1822
  intx a = (intx)addr();
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1823
  out->print("%s", Runtime1::name_for_address(addr()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1824
  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1825
  tmp()->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1826
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1827
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1828
void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1829
  switch(code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1830
    case lir_patch_none:                                 break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1831
    case lir_patch_low:    out->print("[patch_low]");    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1832
    case lir_patch_high:   out->print("[patch_high]");   break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1833
    case lir_patch_normal: out->print("[patch_normal]"); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1834
    default: ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1835
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1836
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1837
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1838
// LIR_OpBranch
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1839
void LIR_OpBranch::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1840
  print_condition(out, cond());             out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1841
  if (block() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1842
    out->print("[B%d] ", block()->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1843
  } else if (stub() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1844
    out->print("[");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1845
    stub()->print_name(out);
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1846
    out->print(": " INTPTR_FORMAT "]", p2i(stub()));
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6742
diff changeset
  1847
    if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1848
  } else {
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1849
    out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1850
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1851
  if (ublock() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1852
    out->print("unordered: [B%d] ", ublock()->block_id());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1853
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1854
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1855
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1856
void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1857
  switch(cond) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1858
    case lir_cond_equal:           out->print("[EQ]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1859
    case lir_cond_notEqual:        out->print("[NE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1860
    case lir_cond_less:            out->print("[LT]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1861
    case lir_cond_lessEqual:       out->print("[LE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1862
    case lir_cond_greaterEqual:    out->print("[GE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1863
    case lir_cond_greater:         out->print("[GT]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1864
    case lir_cond_belowEqual:      out->print("[BE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1865
    case lir_cond_aboveEqual:      out->print("[AE]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1866
    case lir_cond_always:          out->print("[AL]");      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1867
    default:                       out->print("[%d]",cond); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1868
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1869
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1870
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1871
// LIR_OpConvert
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1872
void LIR_OpConvert::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1873
  print_bytecode(out, bytecode());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1874
  in_opr()->print(out);                  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1875
  result_opr()->print(out);              out->print(" ");
34220
1ba69cb5585c 8138952: C1: Distinguish between PPC32 and PPC64
mdoerr
parents: 34170
diff changeset
  1876
#ifdef PPC32
6176
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1877
  if(tmp1()->is_valid()) {
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1878
    tmp1()->print(out); out->print(" ");
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1879
    tmp2()->print(out); out->print(" ");
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1880
  }
4d9030fe341f 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 5702
diff changeset
  1881
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1882
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1883
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1884
void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1885
  switch(code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1886
    case Bytecodes::_d2f: out->print("[d2f] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1887
    case Bytecodes::_d2i: out->print("[d2i] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1888
    case Bytecodes::_d2l: out->print("[d2l] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1889
    case Bytecodes::_f2d: out->print("[f2d] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1890
    case Bytecodes::_f2i: out->print("[f2i] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1891
    case Bytecodes::_f2l: out->print("[f2l] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1892
    case Bytecodes::_i2b: out->print("[i2b] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1893
    case Bytecodes::_i2c: out->print("[i2c] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1894
    case Bytecodes::_i2d: out->print("[i2d] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1895
    case Bytecodes::_i2f: out->print("[i2f] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1896
    case Bytecodes::_i2l: out->print("[i2l] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1897
    case Bytecodes::_i2s: out->print("[i2s] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1898
    case Bytecodes::_l2i: out->print("[l2i] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1899
    case Bytecodes::_l2f: out->print("[l2f] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1900
    case Bytecodes::_l2d: out->print("[l2d] "); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1901
    default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1902
      out->print("[?%d]",code);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1903
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1904
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1905
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1906
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1907
void LIR_OpAllocObj::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1908
  klass()->print(out);                      out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1909
  obj()->print(out);                        out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1910
  tmp1()->print(out);                       out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1911
  tmp2()->print(out);                       out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1912
  tmp3()->print(out);                       out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1913
  tmp4()->print(out);                       out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1914
  out->print("[hdr:%d]", header_size()); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1915
  out->print("[obj:%d]", object_size()); out->print(" ");
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1916
  out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1917
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1918
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1919
void LIR_OpRoundFP::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1920
  _opr->print(out);         out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1921
  tmp()->print(out);        out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1922
  result_opr()->print(out); out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1923
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1924
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1925
// LIR_Op2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1926
void LIR_Op2::print_instr(outputStream* out) const {
34170
628b8ec31f2b 8142314: Bug in C1 ControlFlowOptimizer::delete_unnecessary_jumps with bytecode profiling
simonis
parents: 33465
diff changeset
  1927
  if (code() == lir_cmove || code() == lir_cmp) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1928
    print_condition(out, condition());         out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1929
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1930
  in_opr1()->print(out);    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1931
  in_opr2()->print(out);    out->print(" ");
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1932
  if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1933
  if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1934
  if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1935
  if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
  1936
  if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1937
  result_opr()->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1938
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1939
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1940
void LIR_OpAllocArray::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1941
  klass()->print(out);                   out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1942
  len()->print(out);                     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1943
  obj()->print(out);                     out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1944
  tmp1()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1945
  tmp2()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1946
  tmp3()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1947
  tmp4()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1948
  out->print("[type:0x%x]", type());     out->print(" ");
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1949
  out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1950
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1951
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1952
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1953
void LIR_OpTypeCheck::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1954
  object()->print(out);                  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1955
  if (code() == lir_store_check) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1956
    array()->print(out);                 out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1957
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1958
  if (code() != lir_store_check) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1959
    klass()->print_name_on(out);         out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1960
    if (fast_check())                 out->print("fast_check ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1961
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1962
  tmp1()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1963
  tmp2()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1964
  tmp3()->print(out);                    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1965
  result_opr()->print(out);              out->print(" ");
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6742
diff changeset
  1966
  if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1967
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1968
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1969
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1970
// LIR_Op3
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1971
void LIR_Op3::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1972
  in_opr1()->print(out);    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1973
  in_opr2()->print(out);    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1974
  in_opr3()->print(out);    out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1975
  result_opr()->print(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1976
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1977
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1978
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1979
void LIR_OpLock::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1980
  hdr_opr()->print(out);   out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1981
  obj_opr()->print(out);   out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1982
  lock_opr()->print(out);  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1983
  if (_scratch->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1984
    _scratch->print(out);  out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1985
  }
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1986
  out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1987
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1988
17011
def8879c5b81 8011648: C1: optimized build is broken after 7153771
roland
parents: 16611
diff changeset
  1989
#ifdef ASSERT
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1990
void LIR_OpAssert::print_instr(outputStream* out) const {
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1991
  print_condition(out, condition()); out->print(" ");
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1992
  in_opr1()->print(out);             out->print(" ");
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1993
  in_opr2()->print(out);             out->print(", \"");
24424
2658d7834c6e 8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents: 21102
diff changeset
  1994
  out->print("%s", msg());          out->print("\"");
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1995
}
17011
def8879c5b81 8011648: C1: optimized build is broken after 7153771
roland
parents: 16611
diff changeset
  1996
#endif
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15760
diff changeset
  1997
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1998
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1999
void LIR_OpDelay::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2000
  _op->print_on(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2001
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2002
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2003
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2004
// LIR_OpProfileCall
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2005
void LIR_OpProfileCall::print_instr(outputStream* out) const {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2006
  profiled_method()->name()->print_symbol_on(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2007
  out->print(".");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2008
  profiled_method()->holder()->name()->print_symbol_on(out);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2009
  out->print(" @ %d ", profiled_bci());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2010
  mdo()->print(out);           out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2011
  recv()->print(out);          out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2012
  tmp1()->print(out);          out->print(" ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2013
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2014
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2015
// LIR_OpProfileType
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2016
void LIR_OpProfileType::print_instr(outputStream* out) const {
29351
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2017
  out->print("exact = ");
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2018
  if  (exact_klass() == NULL) {
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2019
    out->print("unknown");
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2020
  } else {
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2021
    exact_klass()->print_name_on(out);
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2022
  }
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2023
  out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
caf03a304610 8073154: NULL-pointer dereferencing in LIR_OpProfileType::print_instr
fzhinkin
parents: 28954
diff changeset
  2024
  out->print(" ");
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2025
  mdp()->print(out);          out->print(" ");
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2026
  obj()->print(out);          out->print(" ");
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2027
  tmp()->print(out);          out->print(" ");
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2028
}
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 18507
diff changeset
  2029
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2030
#endif // PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2031
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2032
// Implementation of LIR_InsertionBuffer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2033
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2034
void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2035
  assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2036
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2037
  int i = number_of_insertion_points() - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2038
  if (i < 0 || index_at(i) < index) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2039
    append_new(index, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2040
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2041
    assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2042
    assert(count_at(i) > 0, "check");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2043
    set_count_at(i, count_at(i) + 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2044
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2045
  _ops.push(op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2046
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2047
  DEBUG_ONLY(verify());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2048
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2049
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2050
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2051
void LIR_InsertionBuffer::verify() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2052
  int sum = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2053
  int prev_idx = -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2054
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2055
  for (int i = 0; i < number_of_insertion_points(); i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2056
    assert(prev_idx < index_at(i), "index must be ordered ascending");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2057
    sum += count_at(i);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2058
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2059
  assert(sum == number_of_ops(), "wrong total sum");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2060
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2061
#endif