src/hotspot/cpu/x86/stubGenerator_x86_32.cpp
author eosterlund
Mon, 19 Mar 2018 07:38:18 +0100
changeset 49455 848864ed9b17
parent 49353 5f487b498e78
child 49484 ee8fa73b90f9
permissions -rw-r--r--
8199604: Rename CardTableModRefBS to CardTableBarrierSet Reviewed-by: stefank, pliden
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/*
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 * Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "asm/macroAssembler.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "gc/shared/cardTable.hpp"
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#include "gc/shared/cardTableBarrierSet.hpp"
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#include "interpreter/interpreter.hpp"
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#include "nativeInst_x86.hpp"
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#include "oops/instanceOop.hpp"
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#include "oops/method.hpp"
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#include "oops/objArrayKlass.hpp"
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#include "oops/oop.inline.hpp"
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#include "prims/methodHandles.hpp"
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#include "runtime/frame.inline.hpp"
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#include "runtime/handles.inline.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/stubCodeGenerator.hpp"
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#include "runtime/stubRoutines.hpp"
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#include "runtime/thread.inline.hpp"
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#ifdef COMPILER2
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#include "opto/runtime.hpp"
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#endif
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// Declaration and definition of StubGenerator (no .hpp file).
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// For a more detailed description of the stub routine structure
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// see the comment in stubRoutines.hpp
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#define __ _masm->
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#define a__ ((Assembler*)_masm)->
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#ifdef PRODUCT
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#define BLOCK_COMMENT(str) /* nothing */
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#else
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#define BLOCK_COMMENT(str) __ block_comment(str)
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#endif
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#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
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const int MXCSR_MASK  = 0xFFC0;  // Mask out any pending exceptions
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const int FPU_CNTRL_WRD_MASK = 0xFFFF;
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// -------------------------------------------------------------------------------------------------------------------------
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// Stub Code definitions
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class StubGenerator: public StubCodeGenerator {
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 private:
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#ifdef PRODUCT
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#define inc_counter_np(counter) ((void)0)
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#else
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  void inc_counter_np_(int& counter) {
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    __ incrementl(ExternalAddress((address)&counter));
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  }
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#define inc_counter_np(counter) \
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  BLOCK_COMMENT("inc_counter " #counter); \
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  inc_counter_np_(counter);
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#endif //PRODUCT
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  void inc_copy_counter_np(BasicType t) {
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#ifndef PRODUCT
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    switch (t) {
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    case T_BYTE:    inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); return;
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    case T_SHORT:   inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); return;
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    case T_INT:     inc_counter_np(SharedRuntime::_jint_array_copy_ctr); return;
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    case T_LONG:    inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); return;
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    case T_OBJECT:  inc_counter_np(SharedRuntime::_oop_array_copy_ctr); return;
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    }
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    ShouldNotReachHere();
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#endif //PRODUCT
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  }
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  //------------------------------------------------------------------------------------------------------------------------
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  // Call stubs are used to call Java from C
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  //
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  //    [ return_from_Java     ] <--- rsp
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  //    [ argument word n      ]
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  //      ...
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  // -N [ argument word 1      ]
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  // -7 [ Possible padding for stack alignment ]
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  // -6 [ Possible padding for stack alignment ]
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  // -5 [ Possible padding for stack alignment ]
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  // -4 [ mxcsr save           ] <--- rsp_after_call
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  // -3 [ saved rbx,            ]
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  // -2 [ saved rsi            ]
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  // -1 [ saved rdi            ]
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  //  0 [ saved rbp,            ] <--- rbp,
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  //  1 [ return address       ]
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  //  2 [ ptr. to call wrapper ]
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  //  3 [ result               ]
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  //  4 [ result_type          ]
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  //  5 [ method               ]
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  //  6 [ entry_point          ]
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  //  7 [ parameters           ]
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  //  8 [ parameter_size       ]
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  //  9 [ thread               ]
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  address generate_call_stub(address& return_address) {
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    StubCodeMark mark(this, "StubRoutines", "call_stub");
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    address start = __ pc();
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    // stub code parameters / addresses
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    assert(frame::entry_frame_call_wrapper_offset == 2, "adjust this code");
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    bool  sse_save = false;
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    const Address rsp_after_call(rbp, -4 * wordSize); // same as in generate_catch_exception()!
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    const int     locals_count_in_bytes  (4*wordSize);
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    const Address mxcsr_save    (rbp, -4 * wordSize);
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    const Address saved_rbx     (rbp, -3 * wordSize);
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    const Address saved_rsi     (rbp, -2 * wordSize);
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    const Address saved_rdi     (rbp, -1 * wordSize);
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    const Address result        (rbp,  3 * wordSize);
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    const Address result_type   (rbp,  4 * wordSize);
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    const Address method        (rbp,  5 * wordSize);
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    const Address entry_point   (rbp,  6 * wordSize);
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    const Address parameters    (rbp,  7 * wordSize);
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    const Address parameter_size(rbp,  8 * wordSize);
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    const Address thread        (rbp,  9 * wordSize); // same as in generate_catch_exception()!
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    sse_save =  UseSSE > 0;
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    // stub code
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    __ enter();
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    __ movptr(rcx, parameter_size);              // parameter counter
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    __ shlptr(rcx, Interpreter::logStackElementSize); // convert parameter count to bytes
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    __ addptr(rcx, locals_count_in_bytes);       // reserve space for register saves
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    __ subptr(rsp, rcx);
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    __ andptr(rsp, -(StackAlignmentInBytes));    // Align stack
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    // save rdi, rsi, & rbx, according to C calling conventions
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    __ movptr(saved_rdi, rdi);
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    __ movptr(saved_rsi, rsi);
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    __ movptr(saved_rbx, rbx);
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    // provide initial value for required masks
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    if (UseAVX > 2) {
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      __ movl(rbx, 0xffff);
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      __ kmovwl(k1, rbx);
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    }
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    // save and initialize %mxcsr
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    if (sse_save) {
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      Label skip_ldmx;
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      __ stmxcsr(mxcsr_save);
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      __ movl(rax, mxcsr_save);
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      __ andl(rax, MXCSR_MASK);    // Only check control and mask bits
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      ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
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      __ cmp32(rax, mxcsr_std);
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      __ jcc(Assembler::equal, skip_ldmx);
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      __ ldmxcsr(mxcsr_std);
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      __ bind(skip_ldmx);
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    }
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    // make sure the control word is correct.
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    __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
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#ifdef ASSERT
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    // make sure we have no pending exceptions
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    { Label L;
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      __ movptr(rcx, thread);
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      __ cmpptr(Address(rcx, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
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      __ jcc(Assembler::equal, L);
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      __ stop("StubRoutines::call_stub: entered with pending exception");
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      __ bind(L);
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    }
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#endif
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    // pass parameters if any
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    BLOCK_COMMENT("pass parameters if any");
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    Label parameters_done;
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    __ movl(rcx, parameter_size);  // parameter counter
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    __ testl(rcx, rcx);
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    __ jcc(Assembler::zero, parameters_done);
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    // parameter passing loop
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    Label loop;
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    // Copy Java parameters in reverse order (receiver last)
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    // Note that the argument order is inverted in the process
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    // source is rdx[rcx: N-1..0]
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    // dest   is rsp[rbx: 0..N-1]
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    __ movptr(rdx, parameters);          // parameter pointer
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    __ xorptr(rbx, rbx);
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    __ BIND(loop);
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    // get parameter
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    __ movptr(rax, Address(rdx, rcx, Interpreter::stackElementScale(), -wordSize));
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    __ movptr(Address(rsp, rbx, Interpreter::stackElementScale(),
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                    Interpreter::expr_offset_in_bytes(0)), rax);          // store parameter
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    __ increment(rbx);
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    __ decrement(rcx);
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    __ jcc(Assembler::notZero, loop);
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    // call Java function
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    __ BIND(parameters_done);
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    __ movptr(rbx, method);           // get Method*
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    __ movptr(rax, entry_point);      // get entry_point
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    __ mov(rsi, rsp);                 // set sender sp
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    BLOCK_COMMENT("call Java function");
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    __ call(rax);
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    BLOCK_COMMENT("call_stub_return_address:");
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    return_address = __ pc();
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#ifdef COMPILER2
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    {
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      Label L_skip;
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      if (UseSSE >= 2) {
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        __ verify_FPU(0, "call_stub_return");
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      } else {
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        for (int i = 1; i < 8; i++) {
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          __ ffree(i);
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        }
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        // UseSSE <= 1 so double result should be left on TOS
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        __ movl(rsi, result_type);
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        __ cmpl(rsi, T_DOUBLE);
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        __ jcc(Assembler::equal, L_skip);
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        if (UseSSE == 0) {
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          // UseSSE == 0 so float result should be left on TOS
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          __ cmpl(rsi, T_FLOAT);
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          __ jcc(Assembler::equal, L_skip);
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        }
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        __ ffree(0);
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      }
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      __ BIND(L_skip);
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    }
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#endif // COMPILER2
1
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    // store result depending on type
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    // (everything that is not T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
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    __ movptr(rdi, result);
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    Label is_long, is_float, is_double, exit;
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    __ movl(rsi, result_type);
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    __ cmpl(rsi, T_LONG);
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    __ jcc(Assembler::equal, is_long);
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    __ cmpl(rsi, T_FLOAT);
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    __ jcc(Assembler::equal, is_float);
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    __ cmpl(rsi, T_DOUBLE);
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    __ jcc(Assembler::equal, is_double);
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    // handle T_INT case
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    __ movl(Address(rdi, 0), rax);
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    __ BIND(exit);
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    // check that FPU stack is empty
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    __ verify_FPU(0, "generate_call_stub");
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    // pop parameters
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    __ lea(rsp, rsp_after_call);
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    // restore %mxcsr
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    if (sse_save) {
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      __ ldmxcsr(mxcsr_save);
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    }
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    // restore rdi, rsi and rbx,
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    __ movptr(rbx, saved_rbx);
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    __ movptr(rsi, saved_rsi);
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    __ movptr(rdi, saved_rdi);
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    __ addptr(rsp, 4*wordSize);
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    // return
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    __ pop(rbp);
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    __ ret(0);
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    // handle return types different from T_INT
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    __ BIND(is_long);
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    __ movl(Address(rdi, 0 * wordSize), rax);
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    __ movl(Address(rdi, 1 * wordSize), rdx);
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    __ jmp(exit);
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    __ BIND(is_float);
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    // interpreter uses xmm0 for return values
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    if (UseSSE >= 1) {
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      __ movflt(Address(rdi, 0), xmm0);
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    } else {
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      __ fstp_s(Address(rdi, 0));
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    }
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    __ jmp(exit);
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    __ BIND(is_double);
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    // interpreter uses xmm0 for return values
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    if (UseSSE >= 2) {
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      __ movdbl(Address(rdi, 0), xmm0);
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    } else {
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      __ fstp_d(Address(rdi, 0));
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    }
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    __ jmp(exit);
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    return start;
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  }
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  //------------------------------------------------------------------------------------------------------------------------
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  // Return point for a Java call if there's an exception thrown in Java code.
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  // The exception is caught and transformed into a pending exception stored in
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  // JavaThread that can be tested from within the VM.
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  //
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  // Note: Usually the parameters are removed by the callee. In case of an exception
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  //       crossing an activation frame boundary, that is not the case if the callee
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  //       is compiled code => need to setup the rsp.
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  //
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  // rax,: exception oop
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  address generate_catch_exception() {
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    StubCodeMark mark(this, "StubRoutines", "catch_exception");
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    const Address rsp_after_call(rbp, -4 * wordSize); // same as in generate_call_stub()!
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    const Address thread        (rbp,  9 * wordSize); // same as in generate_call_stub()!
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    address start = __ pc();
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    // get thread directly
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    __ movptr(rcx, thread);
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#ifdef ASSERT
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    // verify that threads correspond
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    { Label L;
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      __ get_thread(rbx);
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      __ cmpptr(rbx, rcx);
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      __ jcc(Assembler::equal, L);
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      __ stop("StubRoutines::catch_exception: threads must correspond");
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      __ bind(L);
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    }
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#endif
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    // set pending exception
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    __ verify_oop(rax);
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    __ movptr(Address(rcx, Thread::pending_exception_offset()), rax          );
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    __ lea(Address(rcx, Thread::exception_file_offset   ()),
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           ExternalAddress((address)__FILE__));
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    __ movl(Address(rcx, Thread::exception_line_offset   ()), __LINE__ );
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    // complete return to VM
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    assert(StubRoutines::_call_stub_return_address != NULL, "_call_stub_return_address must have been generated before");
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    __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
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    return start;
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   358
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   359
489c9b5090e2 Initial load
duke
parents:
diff changeset
   360
489c9b5090e2 Initial load
duke
parents:
diff changeset
   361
  //------------------------------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   362
  // Continuation point for runtime calls returning with a pending exception.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   363
  // The pending exception check happened in the runtime or native call stub.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   364
  // The pending exception in Thread is converted into a Java-level exception.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   365
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   366
  // Contract with Java-level exception handlers:
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
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parents: 4740
diff changeset
   367
  // rax: exception
1
489c9b5090e2 Initial load
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parents:
diff changeset
   368
  // rdx: throwing pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   369
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
  // NOTE: At entry of this stub, exception-pc must be on stack !!
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
489c9b5090e2 Initial load
duke
parents:
diff changeset
   372
  address generate_forward_exception() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   373
    StubCodeMark mark(this, "StubRoutines", "forward exception");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   374
    address start = __ pc();
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
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parents: 4740
diff changeset
   375
    const Register thread = rcx;
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   376
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   377
    // other registers used in this stub
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   378
    const Register exception_oop = rax;
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   379
    const Register handler_addr  = rbx;
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   380
    const Register exception_pc  = rdx;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   381
489c9b5090e2 Initial load
duke
parents:
diff changeset
   382
    // Upon entry, the sp points to the return address returning into Java
489c9b5090e2 Initial load
duke
parents:
diff changeset
   383
    // (interpreted or compiled) code; i.e., the return address becomes the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   384
    // throwing pc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   385
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   386
    // Arguments pushed before the runtime call are still on the stack but
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
    // the exception handler will reset the stack pointer -> ignore them.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
    // A potential result in registers can be ignored as well.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
    // make sure this code is only executed if there is a pending exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
    { Label L;
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   393
      __ get_thread(thread);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   394
      __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   395
      __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
      __ stop("StubRoutines::forward exception: no pending exception (1)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   400
489c9b5090e2 Initial load
duke
parents:
diff changeset
   401
    // compute exception handler into rbx,
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   402
    __ get_thread(thread);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   403
    __ movptr(exception_pc, Address(rsp, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
    BLOCK_COMMENT("call exception_handler_for_return_address");
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   405
    __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   406
    __ mov(handler_addr, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   407
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   408
    // setup rax & rdx, remove return address & clear pending exception
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   409
    __ get_thread(thread);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   410
    __ pop(exception_pc);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   411
    __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   412
    __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   415
    // make sure exception is set
489c9b5090e2 Initial load
duke
parents:
diff changeset
   416
    { Label L;
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   417
      __ testptr(exception_oop, exception_oop);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
      __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   419
      __ stop("StubRoutines::forward exception: no pending exception (2)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   420
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   421
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   422
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   423
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   424
    // Verify that there is really a valid exception in RAX.
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   425
    __ verify_oop(exception_oop);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   426
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   427
    // continue at exception handler (return address removed)
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   428
    // rax: exception
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   429
    // rbx: exception handler
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   430
    // rdx: throwing pc
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   431
    __ jmp(handler_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   432
489c9b5090e2 Initial load
duke
parents:
diff changeset
   433
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   434
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   435
489c9b5090e2 Initial load
duke
parents:
diff changeset
   436
489c9b5090e2 Initial load
duke
parents:
diff changeset
   437
  //----------------------------------------------------------------------------------------------------
48468
7cc7de9bf4a4 8186903: Remove j-types from Atomic
coleenp
parents: 47810
diff changeset
   438
  // Support for int32_t Atomic::xchg(int32_t exchange_value, volatile int32_t* dest)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   439
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   440
  // xchg exists as far back as 8086, lock needed for MP only
489c9b5090e2 Initial load
duke
parents:
diff changeset
   441
  // Stack layout immediately after call:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   442
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   443
  // 0 [ret addr ] <--- rsp
489c9b5090e2 Initial load
duke
parents:
diff changeset
   444
  // 1 [  ex     ]
489c9b5090e2 Initial load
duke
parents:
diff changeset
   445
  // 2 [  dest   ]
489c9b5090e2 Initial load
duke
parents:
diff changeset
   446
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   447
  // Result:   *dest <- ex, return (old *dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   448
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   449
  // Note: win32 does not currently use this code
489c9b5090e2 Initial load
duke
parents:
diff changeset
   450
489c9b5090e2 Initial load
duke
parents:
diff changeset
   451
  address generate_atomic_xchg() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
    StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   453
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   454
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   455
    __ push(rdx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   456
    Address exchange(rsp, 2 * wordSize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
    Address dest_addr(rsp, 3 * wordSize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   458
    __ movl(rax, exchange);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   459
    __ movptr(rdx, dest_addr);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   460
    __ xchgl(rax, Address(rdx, 0));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   461
    __ pop(rdx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
489c9b5090e2 Initial load
duke
parents:
diff changeset
   464
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   466
489c9b5090e2 Initial load
duke
parents:
diff changeset
   467
  //----------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   468
  // Support for void verify_mxcsr()
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   470
  // This routine is used with -Xcheck:jni to verify that native
489c9b5090e2 Initial load
duke
parents:
diff changeset
   471
  // JNI code does not return to Java code without restoring the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   472
  // MXCSR register to our expected state.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   473
489c9b5090e2 Initial load
duke
parents:
diff changeset
   474
489c9b5090e2 Initial load
duke
parents:
diff changeset
   475
  address generate_verify_mxcsr() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   476
    StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   477
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   478
489c9b5090e2 Initial load
duke
parents:
diff changeset
   479
    const Address mxcsr_save(rsp, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   480
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
    if (CheckJNICalls && UseSSE > 0 ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   482
      Label ok_ret;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
      ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   484
      __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   485
      __ subptr(rsp, wordSize);      // allocate a temp location
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   486
      __ stmxcsr(mxcsr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   487
      __ movl(rax, mxcsr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   488
      __ andl(rax, MXCSR_MASK);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
      __ cmp32(rax, mxcsr_std);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   490
      __ jcc(Assembler::equal, ok_ret);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
      __ warn("MXCSR changed by native JNI code.");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
      __ ldmxcsr(mxcsr_std);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
      __ bind(ok_ret);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   497
      __ addptr(rsp, wordSize);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   498
      __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   500
489c9b5090e2 Initial load
duke
parents:
diff changeset
   501
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   502
489c9b5090e2 Initial load
duke
parents:
diff changeset
   503
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   504
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   505
489c9b5090e2 Initial load
duke
parents:
diff changeset
   506
489c9b5090e2 Initial load
duke
parents:
diff changeset
   507
  //---------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   508
  // Support for void verify_fpu_cntrl_wrd()
489c9b5090e2 Initial load
duke
parents:
diff changeset
   509
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   510
  // This routine is used with -Xcheck:jni to verify that native
489c9b5090e2 Initial load
duke
parents:
diff changeset
   511
  // JNI code does not return to Java code without restoring the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   512
  // FP control word to our expected state.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   513
489c9b5090e2 Initial load
duke
parents:
diff changeset
   514
  address generate_verify_fpu_cntrl_wrd() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   515
    StubCodeMark mark(this, "StubRoutines", "verify_spcw");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   516
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
    const Address fpu_cntrl_wrd_save(rsp, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
    if (CheckJNICalls) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
      Label ok_ret;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   522
      __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   523
      __ subptr(rsp, wordSize);      // allocate a temp location
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
      __ fnstcw(fpu_cntrl_wrd_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   525
      __ movl(rax, fpu_cntrl_wrd_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   526
      __ andl(rax, FPU_CNTRL_WRD_MASK);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   527
      ExternalAddress fpu_std(StubRoutines::addr_fpu_cntrl_wrd_std());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   528
      __ cmp32(rax, fpu_std);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   529
      __ jcc(Assembler::equal, ok_ret);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   530
489c9b5090e2 Initial load
duke
parents:
diff changeset
   531
      __ warn("Floating point control word changed by native JNI code.");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   532
489c9b5090e2 Initial load
duke
parents:
diff changeset
   533
      __ fldcw(fpu_std);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   534
489c9b5090e2 Initial load
duke
parents:
diff changeset
   535
      __ bind(ok_ret);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   536
      __ addptr(rsp, wordSize);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   537
      __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   538
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   539
489c9b5090e2 Initial load
duke
parents:
diff changeset
   540
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   541
489c9b5090e2 Initial load
duke
parents:
diff changeset
   542
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   543
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   544
489c9b5090e2 Initial load
duke
parents:
diff changeset
   545
  //---------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   546
  // Wrapper for slow-case handling of double-to-integer conversion
489c9b5090e2 Initial load
duke
parents:
diff changeset
   547
  // d2i or f2i fast case failed either because it is nan or because
489c9b5090e2 Initial load
duke
parents:
diff changeset
   548
  // of under/overflow.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   549
  // Input:  FPU TOS: float value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   550
  // Output: rax, (rdx): integer (long) result
489c9b5090e2 Initial load
duke
parents:
diff changeset
   551
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
  address generate_d2i_wrapper(BasicType t, address fcn) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   553
    StubCodeMark mark(this, "StubRoutines", "d2i_wrapper");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   554
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   555
489c9b5090e2 Initial load
duke
parents:
diff changeset
   556
  // Capture info about frame layout
489c9b5090e2 Initial load
duke
parents:
diff changeset
   557
  enum layout { FPUState_off         = 0,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   558
                rbp_off              = FPUStateSizeInWords,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   559
                rdi_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   560
                rsi_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   561
                rcx_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   562
                rbx_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   563
                saved_argument_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   564
                saved_argument_off2, // 2nd half of double
489c9b5090e2 Initial load
duke
parents:
diff changeset
   565
                framesize
489c9b5090e2 Initial load
duke
parents:
diff changeset
   566
  };
489c9b5090e2 Initial load
duke
parents:
diff changeset
   567
489c9b5090e2 Initial load
duke
parents:
diff changeset
   568
  assert(FPUStateSizeInWords == 27, "update stack layout");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   569
489c9b5090e2 Initial load
duke
parents:
diff changeset
   570
    // Save outgoing argument to stack across push_FPU_state()
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   571
    __ subptr(rsp, wordSize * 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   572
    __ fstp_d(Address(rsp, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   573
489c9b5090e2 Initial load
duke
parents:
diff changeset
   574
    // Save CPU & FPU state
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   575
    __ push(rbx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   576
    __ push(rcx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   577
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   578
    __ push(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   579
    __ push(rbp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   580
    __ push_FPU_state();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   581
489c9b5090e2 Initial load
duke
parents:
diff changeset
   582
    // push_FPU_state() resets the FP top of stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   583
    // Load original double into FP top of stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   584
    __ fld_d(Address(rsp, saved_argument_off * wordSize));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   585
    // Store double into stack as outgoing argument
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   586
    __ subptr(rsp, wordSize*2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   587
    __ fst_d(Address(rsp, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   588
489c9b5090e2 Initial load
duke
parents:
diff changeset
   589
    // Prepare FPU for doing math in C-land
489c9b5090e2 Initial load
duke
parents:
diff changeset
   590
    __ empty_FPU_stack();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   591
    // Call the C code to massage the double.  Result in EAX
489c9b5090e2 Initial load
duke
parents:
diff changeset
   592
    if (t == T_INT)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   593
      { BLOCK_COMMENT("SharedRuntime::d2i"); }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   594
    else if (t == T_LONG)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   595
      { BLOCK_COMMENT("SharedRuntime::d2l"); }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   596
    __ call_VM_leaf( fcn, 2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   597
489c9b5090e2 Initial load
duke
parents:
diff changeset
   598
    // Restore CPU & FPU state
489c9b5090e2 Initial load
duke
parents:
diff changeset
   599
    __ pop_FPU_state();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   600
    __ pop(rbp);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   601
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   602
    __ pop(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   603
    __ pop(rcx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   604
    __ pop(rbx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   605
    __ addptr(rsp, wordSize * 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   606
489c9b5090e2 Initial load
duke
parents:
diff changeset
   607
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   608
489c9b5090e2 Initial load
duke
parents:
diff changeset
   609
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   610
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   611
489c9b5090e2 Initial load
duke
parents:
diff changeset
   612
489c9b5090e2 Initial load
duke
parents:
diff changeset
   613
  //----------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   614
  // Non-destructive plausibility checks for oops
489c9b5090e2 Initial load
duke
parents:
diff changeset
   615
489c9b5090e2 Initial load
duke
parents:
diff changeset
   616
  address generate_verify_oop() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   617
    StubCodeMark mark(this, "StubRoutines", "verify_oop");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   618
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   619
489c9b5090e2 Initial load
duke
parents:
diff changeset
   620
    // Incoming arguments on stack after saving rax,:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   621
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   622
    // [tos    ]: saved rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
   623
    // [tos + 1]: saved EFLAGS
489c9b5090e2 Initial load
duke
parents:
diff changeset
   624
    // [tos + 2]: return address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   625
    // [tos + 3]: char* error message
489c9b5090e2 Initial load
duke
parents:
diff changeset
   626
    // [tos + 4]: oop   object to verify
489c9b5090e2 Initial load
duke
parents:
diff changeset
   627
    // [tos + 5]: saved rax, - saved by caller and bashed
489c9b5090e2 Initial load
duke
parents:
diff changeset
   628
489c9b5090e2 Initial load
duke
parents:
diff changeset
   629
    Label exit, error;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   630
    __ pushf();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   631
    __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   632
    __ push(rdx);                                // save rdx
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   633
    // make sure object is 'reasonable'
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   634
    __ movptr(rax, Address(rsp, 4 * wordSize));    // get object
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   635
    __ testptr(rax, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   636
    __ jcc(Assembler::zero, exit);               // if obj is NULL it is ok
489c9b5090e2 Initial load
duke
parents:
diff changeset
   637
489c9b5090e2 Initial load
duke
parents:
diff changeset
   638
    // Check if the oop is in the right area of memory
489c9b5090e2 Initial load
duke
parents:
diff changeset
   639
    const int oop_mask = Universe::verify_oop_mask();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   640
    const int oop_bits = Universe::verify_oop_bits();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   641
    __ mov(rdx, rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   642
    __ andptr(rdx, oop_mask);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   643
    __ cmpptr(rdx, oop_bits);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   644
    __ jcc(Assembler::notZero, error);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   645
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13391
diff changeset
   646
    // make sure klass is 'reasonable', which is not zero.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   647
    __ movptr(rax, Address(rax, oopDesc::klass_offset_in_bytes())); // get klass
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   648
    __ testptr(rax, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   649
    __ jcc(Assembler::zero, error);              // if klass is NULL it is broken
489c9b5090e2 Initial load
duke
parents:
diff changeset
   650
489c9b5090e2 Initial load
duke
parents:
diff changeset
   651
    // return if everything seems ok
489c9b5090e2 Initial load
duke
parents:
diff changeset
   652
    __ bind(exit);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   653
    __ movptr(rax, Address(rsp, 5 * wordSize));  // get saved rax, back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   654
    __ pop(rdx);                                 // restore rdx
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   655
    __ popf();                                   // restore EFLAGS
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   656
    __ ret(3 * wordSize);                        // pop arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
   657
489c9b5090e2 Initial load
duke
parents:
diff changeset
   658
    // handle errors
489c9b5090e2 Initial load
duke
parents:
diff changeset
   659
    __ bind(error);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   660
    __ movptr(rax, Address(rsp, 5 * wordSize));  // get saved rax, back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   661
    __ pop(rdx);                                 // get saved rdx back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   662
    __ popf();                                   // get saved EFLAGS off stack -- will be ignored
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   663
    __ pusha();                                  // push registers (eip = return address & msg are already pushed)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   664
    BLOCK_COMMENT("call MacroAssembler::debug");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   665
    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug32)));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   666
    __ popa();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   667
    __ ret(3 * wordSize);                        // pop arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
   668
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   669
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   670
489c9b5090e2 Initial load
duke
parents:
diff changeset
   671
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   672
  //  Generate pre-barrier for array stores
489c9b5090e2 Initial load
duke
parents:
diff changeset
   673
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   674
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   675
  //     start   -  starting address
3262
30d1c247fc25 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 2534
diff changeset
   676
  //     count   -  element count
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   677
  void  gen_write_ref_array_pre_barrier(Register start, Register count, bool uninitialized_target) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   678
    assert_different_registers(start, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   679
    BarrierSet* bs = Universe::heap()->barrier_set();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   680
    switch (bs->kind()) {
49353
5f487b498e78 8199219: Build failures after JDK-8195148 (Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet)
shade
parents: 49347
diff changeset
   681
#if INCLUDE_ALL_GCS
49347
edb65305d3ac 8195148: Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet
eosterlund
parents: 49172
diff changeset
   682
      case BarrierSet::G1BarrierSet:
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   683
        // With G1, don't generate the call if we statically know that the target in uninitialized
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   684
        if (!uninitialized_target) {
48807
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   685
          Register thread = rax;
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   686
          Label filtered;
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   687
          __ push(thread);
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   688
          __ get_thread(thread);
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   689
          Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   690
                                               SATBMarkQueue::byte_offset_of_active()));
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   691
          // Is marking active?
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   692
          if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   693
            __ cmpl(in_progress, 0);
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   694
          } else {
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   695
            assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   696
            __ cmpb(in_progress, 0);
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   697
          }
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   698
          __ pop(thread);
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   699
          __ jcc(Assembler::equal, filtered);
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   700
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   701
           __ pusha();                      // push registers
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   702
           __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre),
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   703
                           start, count);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   704
           __ popa();
48807
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   705
fd8ccb37fce9 8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents: 48468
diff changeset
   706
           __ bind(filtered);
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   707
         }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   708
        break;
49172
f047fae0169c 8198750: [s390+x86_32+aarch64] Fix build after jdk-8195142
mdoerr
parents: 49164
diff changeset
   709
#endif // INCLUDE_ALL_GCS
49455
848864ed9b17 8199604: Rename CardTableModRefBS to CardTableBarrierSet
eosterlund
parents: 49353
diff changeset
   710
      case BarrierSet::CardTableBarrierSet:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   711
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   712
      default      :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   713
        ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   714
489c9b5090e2 Initial load
duke
parents:
diff changeset
   715
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   716
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   717
489c9b5090e2 Initial load
duke
parents:
diff changeset
   718
489c9b5090e2 Initial load
duke
parents:
diff changeset
   719
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   720
  // Generate a post-barrier for an array store
489c9b5090e2 Initial load
duke
parents:
diff changeset
   721
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   722
  //     start    -  starting address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   723
  //     count    -  element count
489c9b5090e2 Initial load
duke
parents:
diff changeset
   724
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   725
  //  The two input registers are overwritten.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   726
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   727
  void  gen_write_ref_array_post_barrier(Register start, Register count) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   728
    BarrierSet* bs = Universe::heap()->barrier_set();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   729
    assert_different_registers(start, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   730
    switch (bs->kind()) {
49353
5f487b498e78 8199219: Build failures after JDK-8195148 (Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet)
shade
parents: 49347
diff changeset
   731
#if INCLUDE_ALL_GCS
49347
edb65305d3ac 8195148: Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet
eosterlund
parents: 49172
diff changeset
   732
      case BarrierSet::G1BarrierSet:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   733
        {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   734
          __ pusha();                      // push registers
4740
d708800308b7 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 4645
diff changeset
   735
          __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post),
d708800308b7 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 4645
diff changeset
   736
                          start, count);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   737
          __ popa();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   738
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   739
        break;
48872
c7774afc93e3 8196907: Fix minimal vm
coleenp
parents: 48807
diff changeset
   740
#endif // INCLUDE_ALL_GCS
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   741
49455
848864ed9b17 8199604: Rename CardTableModRefBS to CardTableBarrierSet
eosterlund
parents: 49353
diff changeset
   742
      case BarrierSet::CardTableBarrierSet:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   743
        {
49455
848864ed9b17 8199604: Rename CardTableModRefBS to CardTableBarrierSet
eosterlund
parents: 49353
diff changeset
   744
          CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(bs);
49164
7e958a8ebcd3 8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents: 48872
diff changeset
   745
          CardTable* ct = ctbs->card_table();
7e958a8ebcd3 8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents: 48872
diff changeset
   746
          assert(sizeof(*ct->byte_map_base()) == sizeof(jbyte), "adjust this code");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   747
489c9b5090e2 Initial load
duke
parents:
diff changeset
   748
          Label L_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   749
          const Register end = count;  // elements count; end == start+count-1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   750
          assert_different_registers(start, end);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   751
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   752
          __ lea(end,  Address(start, count, Address::times_ptr, -wordSize));
49164
7e958a8ebcd3 8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents: 48872
diff changeset
   753
          __ shrptr(start, CardTable::card_shift);
7e958a8ebcd3 8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents: 48872
diff changeset
   754
          __ shrptr(end,   CardTable::card_shift);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   755
          __ subptr(end, start); // end --> count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   756
        __ BIND(L_loop);
49164
7e958a8ebcd3 8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents: 48872
diff changeset
   757
        intptr_t disp = (intptr_t) ct->byte_map_base();
957
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 192
diff changeset
   758
          Address cardtable(start, count, Address::times_1, disp);
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 192
diff changeset
   759
          __ movb(cardtable, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   760
          __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   761
          __ jcc(Assembler::greaterEqual, L_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   762
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   763
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   764
      case BarrierSet::ModRef:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   765
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   766
      default      :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
        ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   768
489c9b5090e2 Initial load
duke
parents:
diff changeset
   769
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   770
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   772
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   773
  // Copy 64 bytes chunks
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   774
  //
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   775
  // Inputs:
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   776
  //   from        - source array address
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   777
  //   to_from     - destination array address - from
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   778
  //   qword_count - 8-bytes element count, negative
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   779
  //
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   780
  void xmm_copy_forward(Register from, Register to_from, Register qword_count) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   781
    assert( UseSSE >= 2, "supported cpu only" );
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   782
    Label L_copy_64_bytes_loop, L_copy_64_bytes, L_copy_8_bytes, L_exit;
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
   783
    if (UseAVX > 2) {
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
   784
      __ push(rbx);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
   785
      __ movl(rbx, 0xffff);
35113
b11bd150ed8a 8144771: Use AVX3 instructions for string compare
kvn
parents: 33465
diff changeset
   786
      __ kmovwl(k1, rbx);
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
   787
      __ pop(rbx);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
   788
    }
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   789
    // Copy 64-byte chunks
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   790
    __ jmpb(L_copy_64_bytes);
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
   791
    __ align(OptoLoopAlignment);
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   792
  __ BIND(L_copy_64_bytes_loop);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   793
15115
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   794
    if (UseUnalignedLoadStores) {
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 30299
diff changeset
   795
      if (UseAVX > 2) {
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
   796
        __ evmovdqul(xmm0, Address(from, 0), Assembler::AVX_512bit);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
   797
        __ evmovdqul(Address(from, to_from, Address::times_1, 0), xmm0, Assembler::AVX_512bit);
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 30299
diff changeset
   798
      } else if (UseAVX == 2) {
15115
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   799
        __ vmovdqu(xmm0, Address(from,  0));
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   800
        __ vmovdqu(Address(from, to_from, Address::times_1,  0), xmm0);
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   801
        __ vmovdqu(xmm1, Address(from, 32));
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   802
        __ vmovdqu(Address(from, to_from, Address::times_1, 32), xmm1);
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   803
      } else {
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   804
        __ movdqu(xmm0, Address(from, 0));
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   805
        __ movdqu(Address(from, to_from, Address::times_1, 0), xmm0);
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   806
        __ movdqu(xmm1, Address(from, 16));
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   807
        __ movdqu(Address(from, to_from, Address::times_1, 16), xmm1);
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   808
        __ movdqu(xmm2, Address(from, 32));
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   809
        __ movdqu(Address(from, to_from, Address::times_1, 32), xmm2);
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   810
        __ movdqu(xmm3, Address(from, 48));
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   811
        __ movdqu(Address(from, to_from, Address::times_1, 48), xmm3);
f8ef87f6f07f 8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents: 14834
diff changeset
   812
      }
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   813
    } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   814
      __ movq(xmm0, Address(from, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   815
      __ movq(Address(from, to_from, Address::times_1, 0), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   816
      __ movq(xmm1, Address(from, 8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   817
      __ movq(Address(from, to_from, Address::times_1, 8), xmm1);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   818
      __ movq(xmm2, Address(from, 16));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   819
      __ movq(Address(from, to_from, Address::times_1, 16), xmm2);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   820
      __ movq(xmm3, Address(from, 24));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   821
      __ movq(Address(from, to_from, Address::times_1, 24), xmm3);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   822
      __ movq(xmm4, Address(from, 32));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   823
      __ movq(Address(from, to_from, Address::times_1, 32), xmm4);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   824
      __ movq(xmm5, Address(from, 40));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   825
      __ movq(Address(from, to_from, Address::times_1, 40), xmm5);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   826
      __ movq(xmm6, Address(from, 48));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   827
      __ movq(Address(from, to_from, Address::times_1, 48), xmm6);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   828
      __ movq(xmm7, Address(from, 56));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   829
      __ movq(Address(from, to_from, Address::times_1, 56), xmm7);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   830
    }
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   831
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   832
    __ addl(from, 64);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   833
  __ BIND(L_copy_64_bytes);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   834
    __ subl(qword_count, 8);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   835
    __ jcc(Assembler::greaterEqual, L_copy_64_bytes_loop);
16624
9dbd4b210bf9 8011102: Clear AVX registers after return from JNI call
kvn
parents: 15115
diff changeset
   836
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 30299
diff changeset
   837
    if (UseUnalignedLoadStores && (UseAVX == 2)) {
16624
9dbd4b210bf9 8011102: Clear AVX registers after return from JNI call
kvn
parents: 15115
diff changeset
   838
      // clean upper bits of YMM registers
30299
1f6f7d1e0c1e 8078113: 8011102 changes may cause incorrect results
kvn
parents: 29695
diff changeset
   839
      __ vpxor(xmm0, xmm0);
1f6f7d1e0c1e 8078113: 8011102 changes may cause incorrect results
kvn
parents: 29695
diff changeset
   840
      __ vpxor(xmm1, xmm1);
16624
9dbd4b210bf9 8011102: Clear AVX registers after return from JNI call
kvn
parents: 15115
diff changeset
   841
    }
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   842
    __ addl(qword_count, 8);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   843
    __ jccb(Assembler::zero, L_exit);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   844
    //
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   845
    // length is too short, just copy qwords
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   846
    //
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   847
  __ BIND(L_copy_8_bytes);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   848
    __ movq(xmm0, Address(from, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   849
    __ movq(Address(from, to_from, Address::times_1), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   850
    __ addl(from, 8);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   851
    __ decrement(qword_count);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   852
    __ jcc(Assembler::greater, L_copy_8_bytes);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   853
  __ BIND(L_exit);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   854
  }
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   855
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   856
  // Copy 64 bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
   857
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   858
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   859
  //   from        - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   860
  //   to_from     - destination array address - from
489c9b5090e2 Initial load
duke
parents:
diff changeset
   861
  //   qword_count - 8-bytes element count, negative
489c9b5090e2 Initial load
duke
parents:
diff changeset
   862
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   863
  void mmx_copy_forward(Register from, Register to_from, Register qword_count) {
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   864
    assert( VM_Version::supports_mmx(), "supported cpu only" );
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   865
    Label L_copy_64_bytes_loop, L_copy_64_bytes, L_copy_8_bytes, L_exit;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   866
    // Copy 64-byte chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
   867
    __ jmpb(L_copy_64_bytes);
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
   868
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   869
  __ BIND(L_copy_64_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   870
    __ movq(mmx0, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   871
    __ movq(mmx1, Address(from, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   872
    __ movq(mmx2, Address(from, 16));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   873
    __ movq(Address(from, to_from, Address::times_1, 0), mmx0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   874
    __ movq(mmx3, Address(from, 24));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   875
    __ movq(Address(from, to_from, Address::times_1, 8), mmx1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   876
    __ movq(mmx4, Address(from, 32));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   877
    __ movq(Address(from, to_from, Address::times_1, 16), mmx2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   878
    __ movq(mmx5, Address(from, 40));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   879
    __ movq(Address(from, to_from, Address::times_1, 24), mmx3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   880
    __ movq(mmx6, Address(from, 48));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   881
    __ movq(Address(from, to_from, Address::times_1, 32), mmx4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   882
    __ movq(mmx7, Address(from, 56));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   883
    __ movq(Address(from, to_from, Address::times_1, 40), mmx5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   884
    __ movq(Address(from, to_from, Address::times_1, 48), mmx6);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   885
    __ movq(Address(from, to_from, Address::times_1, 56), mmx7);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   886
    __ addptr(from, 64);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   887
  __ BIND(L_copy_64_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   888
    __ subl(qword_count, 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   889
    __ jcc(Assembler::greaterEqual, L_copy_64_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   890
    __ addl(qword_count, 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   891
    __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   892
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   893
    // length is too short, just copy qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
   894
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   895
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   896
    __ movq(mmx0, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   897
    __ movq(Address(from, to_from, Address::times_1), mmx0);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   898
    __ addptr(from, 8);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   899
    __ decrement(qword_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   900
    __ jcc(Assembler::greater, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   901
  __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   902
    __ emms();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   903
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   904
489c9b5090e2 Initial load
duke
parents:
diff changeset
   905
  address generate_disjoint_copy(BasicType t, bool aligned,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   906
                                 Address::ScaleFactor sf,
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   907
                                 address* entry, const char *name,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   908
                                 bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   909
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   910
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   911
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   912
489c9b5090e2 Initial load
duke
parents:
diff changeset
   913
    Label L_0_count, L_exit, L_skip_align1, L_skip_align2, L_copy_byte;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   914
    Label L_copy_2_bytes, L_copy_4_bytes, L_copy_64_bytes;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   915
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   916
    int shift = Address::times_ptr - sf;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   917
489c9b5090e2 Initial load
duke
parents:
diff changeset
   918
    const Register from     = rsi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   919
    const Register to       = rdi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   920
    const Register count    = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
   921
    const Register to_from  = to;   // (to - from)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   922
    const Register saved_to = rdx;  // saved destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   923
489c9b5090e2 Initial load
duke
parents:
diff changeset
   924
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   925
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   926
    __ push(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   927
    __ movptr(from , Address(rsp, 12+ 4));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   928
    __ movptr(to   , Address(rsp, 12+ 8));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   929
    __ movl(count, Address(rsp, 12+ 12));
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   930
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   931
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   932
      *entry = __ pc(); // Entry point from conjoint arraycopy stub.
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   933
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   934
    }
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   935
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   936
    if (t == T_OBJECT) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   937
      __ testl(count, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   938
      __ jcc(Assembler::zero, L_0_count);
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   939
      gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   940
      __ mov(saved_to, to);          // save 'to'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   941
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   942
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   943
    __ subptr(to, from); // to --> to_from
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   944
    __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
489c9b5090e2 Initial load
duke
parents:
diff changeset
   945
    __ jcc(Assembler::below, L_copy_4_bytes); // use unsigned cmp
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   946
    if (!UseUnalignedLoadStores && !aligned && (t == T_BYTE || t == T_SHORT)) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   947
      // align source address at 4 bytes address boundary
489c9b5090e2 Initial load
duke
parents:
diff changeset
   948
      if (t == T_BYTE) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   949
        // One byte misalignment happens only for byte arrays
489c9b5090e2 Initial load
duke
parents:
diff changeset
   950
        __ testl(from, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   951
        __ jccb(Assembler::zero, L_skip_align1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   952
        __ movb(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   953
        __ movb(Address(from, to_from, Address::times_1, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   954
        __ increment(from);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   955
        __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   956
      __ BIND(L_skip_align1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   957
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   958
      // Two bytes misalignment happens only for byte and short (char) arrays
489c9b5090e2 Initial load
duke
parents:
diff changeset
   959
      __ testl(from, 2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   960
      __ jccb(Assembler::zero, L_skip_align2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   961
      __ movw(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   962
      __ movw(Address(from, to_from, Address::times_1, 0), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   963
      __ addptr(from, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   964
      __ subl(count, 1<<(shift-1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   965
    __ BIND(L_skip_align2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   966
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   967
    if (!VM_Version::supports_mmx()) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   968
      __ mov(rax, count);      // save 'count'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   969
      __ shrl(count, shift); // bytes count
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   970
      __ addptr(to_from, from);// restore 'to'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   971
      __ rep_mov();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   972
      __ subptr(to_from, from);// restore 'to_from'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   973
      __ mov(count, rax);      // restore 'count'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   974
      __ jmpb(L_copy_2_bytes); // all dwords were copied
489c9b5090e2 Initial load
duke
parents:
diff changeset
   975
    } else {
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   976
      if (!UseUnalignedLoadStores) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   977
        // align to 8 bytes, we know we are 4 byte aligned to start
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   978
        __ testptr(from, 4);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   979
        __ jccb(Assembler::zero, L_copy_64_bytes);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   980
        __ movl(rax, Address(from, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   981
        __ movl(Address(from, to_from, Address::times_1, 0), rax);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   982
        __ addptr(from, 4);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   983
        __ subl(count, 1<<shift);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   984
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   985
    __ BIND(L_copy_64_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   986
      __ mov(rax, count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   987
      __ shrl(rax, shift+1);  // 8 bytes chunk count
489c9b5090e2 Initial load
duke
parents:
diff changeset
   988
      //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   989
      // Copy 8-byte chunks through MMX registers, 8 per iteration of the loop
489c9b5090e2 Initial load
duke
parents:
diff changeset
   990
      //
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   991
      if (UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   992
        xmm_copy_forward(from, to_from, rax);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   993
      } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   994
        mmx_copy_forward(from, to_from, rax);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   995
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   996
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   997
    // copy tailing dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
   998
  __ BIND(L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   999
    __ testl(count, 1<<shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1000
    __ jccb(Assembler::zero, L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1001
    __ movl(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1002
    __ movl(Address(from, to_from, Address::times_1, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1003
    if (t == T_BYTE || t == T_SHORT) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1004
      __ addptr(from, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1005
    __ BIND(L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1006
      // copy tailing word
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1007
      __ testl(count, 1<<(shift-1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1008
      __ jccb(Assembler::zero, L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1009
      __ movw(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1010
      __ movw(Address(from, to_from, Address::times_1, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1011
      if (t == T_BYTE) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1012
        __ addptr(from, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1013
      __ BIND(L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1014
        // copy tailing byte
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1015
        __ testl(count, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1016
        __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1017
        __ movb(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1018
        __ movb(Address(from, to_from, Address::times_1, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1019
      __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1020
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1021
      __ BIND(L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1022
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1023
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1024
    __ BIND(L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1025
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1026
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1027
    if (t == T_OBJECT) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1028
      __ movl(count, Address(rsp, 12+12)); // reread 'count'
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1029
      __ mov(to, saved_to); // restore 'to'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1030
      gen_write_ref_array_post_barrier(to, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1031
    __ BIND(L_0_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1032
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1033
    inc_copy_counter_np(t);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1034
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1035
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1036
    __ leave(); // required for proper stackwalking of RuntimeStub frame
46440
61025eecb743 8178811: Minimize the AVX <-> SSE transition penalty through generation of vzeroupper instruction on x86
vdeshpande
parents: 42618
diff changeset
  1037
    __ vzeroupper();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1038
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1039
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1040
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1041
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1042
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1043
6433
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1044
  address generate_fill(BasicType t, bool aligned, const char *name) {
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1045
    __ align(CodeEntryAlignment);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1046
    StubCodeMark mark(this, "StubRoutines", name);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1047
    address start = __ pc();
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1048
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1049
    BLOCK_COMMENT("Entry:");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1050
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1051
    const Register to       = rdi;  // source array address
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1052
    const Register value    = rdx;  // value
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1053
    const Register count    = rsi;  // elements count
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1054
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1055
    __ enter(); // required for proper stackwalking of RuntimeStub frame
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1056
    __ push(rsi);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1057
    __ push(rdi);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1058
    __ movptr(to   , Address(rsp, 12+ 4));
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1059
    __ movl(value, Address(rsp, 12+ 8));
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1060
    __ movl(count, Address(rsp, 12+ 12));
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1061
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1062
    __ generate_fill(t, aligned, to, value, count, rax, xmm0);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1063
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1064
    __ pop(rdi);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1065
    __ pop(rsi);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1066
    __ leave(); // required for proper stackwalking of RuntimeStub frame
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1067
    __ ret(0);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1068
    return start;
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1069
  }
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1070
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1071
  address generate_conjoint_copy(BasicType t, bool aligned,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1072
                                 Address::ScaleFactor sf,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1073
                                 address nooverlap_target,
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1074
                                 address* entry, const char *name,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1075
                                 bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1076
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1077
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1078
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1079
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1080
    Label L_0_count, L_exit, L_skip_align1, L_skip_align2, L_copy_byte;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1081
    Label L_copy_2_bytes, L_copy_4_bytes, L_copy_8_bytes, L_copy_8_bytes_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1082
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1083
    int shift = Address::times_ptr - sf;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1084
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1085
    const Register src   = rax;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1086
    const Register dst   = rdx;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1087
    const Register from  = rsi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1088
    const Register to    = rdi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1089
    const Register count = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1090
    const Register end   = rax;  // array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1091
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1092
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1093
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1094
    __ push(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1095
    __ movptr(src  , Address(rsp, 12+ 4));   // from
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1096
    __ movptr(dst  , Address(rsp, 12+ 8));   // to
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1097
    __ movl2ptr(count, Address(rsp, 12+12)); // count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1098
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1099
    if (entry != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1100
      *entry = __ pc(); // Entry point from generic arraycopy stub.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1101
      BLOCK_COMMENT("Entry:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1102
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1103
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1104
    // nooverlap_target expects arguments in rsi and rdi.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1105
    __ mov(from, src);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1106
    __ mov(to  , dst);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1107
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1108
    // arrays overlap test: dispatch to disjoint stub if necessary.
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1109
    RuntimeAddress nooverlap(nooverlap_target);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1110
    __ cmpptr(dst, src);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1111
    __ lea(end, Address(src, count, sf, 0)); // src + count * elem_size
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1112
    __ jump_cc(Assembler::belowEqual, nooverlap);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1113
    __ cmpptr(dst, end);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1114
    __ jump_cc(Assembler::aboveEqual, nooverlap);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1115
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1116
    if (t == T_OBJECT) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1117
      __ testl(count, count);
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1118
      __ jcc(Assembler::zero, L_0_count);
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1119
      gen_write_ref_array_pre_barrier(dst, count, dest_uninitialized);
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1120
    }
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1121
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1122
    // copy from high to low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1123
    __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1124
    __ jcc(Assembler::below, L_copy_4_bytes); // use unsigned cmp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1125
    if (t == T_BYTE || t == T_SHORT) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1126
      // Align the end of destination array at 4 bytes address boundary
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1127
      __ lea(end, Address(dst, count, sf, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1128
      if (t == T_BYTE) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1129
        // One byte misalignment happens only for byte arrays
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1130
        __ testl(end, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1131
        __ jccb(Assembler::zero, L_skip_align1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1132
        __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1133
        __ movb(rdx, Address(from, count, sf, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1134
        __ movb(Address(to, count, sf, 0), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1135
      __ BIND(L_skip_align1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1136
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1137
      // Two bytes misalignment happens only for byte and short (char) arrays
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1138
      __ testl(end, 2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1139
      __ jccb(Assembler::zero, L_skip_align2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1140
      __ subptr(count, 1<<(shift-1));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1141
      __ movw(rdx, Address(from, count, sf, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1142
      __ movw(Address(to, count, sf, 0), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1143
    __ BIND(L_skip_align2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1144
      __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1145
      __ jcc(Assembler::below, L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1146
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1147
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1148
    if (!VM_Version::supports_mmx()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1149
      __ std();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1150
      __ mov(rax, count); // Save 'count'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1151
      __ mov(rdx, to);    // Save 'to'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1152
      __ lea(rsi, Address(from, count, sf, -4));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1153
      __ lea(rdi, Address(to  , count, sf, -4));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1154
      __ shrptr(count, shift); // bytes count
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1155
      __ rep_mov();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1156
      __ cld();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1157
      __ mov(count, rax); // restore 'count'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1158
      __ andl(count, (1<<shift)-1);      // mask the number of rest elements
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1159
      __ movptr(from, Address(rsp, 12+4)); // reread 'from'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1160
      __ mov(to, rdx);   // restore 'to'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1161
      __ jmpb(L_copy_2_bytes); // all dword were copied
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1162
   } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1163
      // Align to 8 bytes the end of array. It is aligned to 4 bytes already.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1164
      __ testptr(end, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1165
      __ jccb(Assembler::zero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1166
      __ subl(count, 1<<shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1167
      __ movl(rdx, Address(from, count, sf, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1168
      __ movl(Address(to, count, sf, 0), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1169
      __ jmpb(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1170
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1171
      __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1172
      // Move 8 bytes
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1173
    __ BIND(L_copy_8_bytes_loop);
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1174
      if (UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1175
        __ movq(xmm0, Address(from, count, sf, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1176
        __ movq(Address(to, count, sf, 0), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1177
      } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1178
        __ movq(mmx0, Address(from, count, sf, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1179
        __ movq(Address(to, count, sf, 0), mmx0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1180
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1181
    __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1182
      __ subl(count, 2<<shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1183
      __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1184
      __ addl(count, 2<<shift);
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1185
      if (!UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1186
        __ emms();
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1187
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1188
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1189
  __ BIND(L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1190
    // copy prefix qword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1191
    __ testl(count, 1<<shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1192
    __ jccb(Assembler::zero, L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1193
    __ movl(rdx, Address(from, count, sf, -4));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1194
    __ movl(Address(to, count, sf, -4), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1195
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1196
    if (t == T_BYTE || t == T_SHORT) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1197
        __ subl(count, (1<<shift));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1198
      __ BIND(L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1199
        // copy prefix dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1200
        __ testl(count, 1<<(shift-1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1201
        __ jccb(Assembler::zero, L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1202
        __ movw(rdx, Address(from, count, sf, -2));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1203
        __ movw(Address(to, count, sf, -2), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1204
        if (t == T_BYTE) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1205
          __ subl(count, 1<<(shift-1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1206
        __ BIND(L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1207
          // copy prefix byte
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1208
          __ testl(count, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1209
          __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1210
          __ movb(rdx, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1211
          __ movb(Address(to, 0), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1212
        __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1213
        } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1214
        __ BIND(L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1215
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1216
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1217
    __ BIND(L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1218
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1219
    if (t == T_OBJECT) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1220
      __ movl2ptr(count, Address(rsp, 12+12)); // reread count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1221
      gen_write_ref_array_post_barrier(to, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1222
    __ BIND(L_0_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1223
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1224
    inc_copy_counter_np(t);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1225
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1226
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1227
    __ leave(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1228
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1229
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1230
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1231
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1232
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1233
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1234
  address generate_disjoint_long_copy(address* entry, const char *name) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1235
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1236
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1237
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1238
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1239
    Label L_copy_8_bytes, L_copy_8_bytes_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1240
    const Register from       = rax;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1241
    const Register to         = rdx;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1242
    const Register count      = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1243
    const Register to_from    = rdx;  // (to - from)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1244
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1245
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1246
    __ movptr(from , Address(rsp, 8+0));       // from
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1247
    __ movptr(to   , Address(rsp, 8+4));       // to
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1248
    __ movl2ptr(count, Address(rsp, 8+8));     // count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1249
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1250
    *entry = __ pc(); // Entry point from conjoint arraycopy stub.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1251
    BLOCK_COMMENT("Entry:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1252
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1253
    __ subptr(to, from); // to --> to_from
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1254
    if (VM_Version::supports_mmx()) {
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1255
      if (UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1256
        xmm_copy_forward(from, to_from, count);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1257
      } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1258
        mmx_copy_forward(from, to_from, count);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1259
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1260
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1261
      __ jmpb(L_copy_8_bytes);
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1262
      __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1263
    __ BIND(L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1264
      __ fild_d(Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1265
      __ fistp_d(Address(from, to_from, Address::times_1));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1266
      __ addptr(from, 8);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1267
    __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1268
      __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1269
      __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1270
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1271
    inc_copy_counter_np(T_LONG);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1272
    __ leave(); // required for proper stackwalking of RuntimeStub frame
46440
61025eecb743 8178811: Minimize the AVX <-> SSE transition penalty through generation of vzeroupper instruction on x86
vdeshpande
parents: 42618
diff changeset
  1273
    __ vzeroupper();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1274
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1275
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1276
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1277
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1278
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1279
  address generate_conjoint_long_copy(address nooverlap_target,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1280
                                      address* entry, const char *name) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1281
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1282
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1283
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1284
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1285
    Label L_copy_8_bytes, L_copy_8_bytes_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1286
    const Register from       = rax;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1287
    const Register to         = rdx;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1288
    const Register count      = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1289
    const Register end_from   = rax;  // source array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1290
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1291
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1292
    __ movptr(from , Address(rsp, 8+0));       // from
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1293
    __ movptr(to   , Address(rsp, 8+4));       // to
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1294
    __ movl2ptr(count, Address(rsp, 8+8));     // count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1295
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1296
    *entry = __ pc(); // Entry point from generic arraycopy stub.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1297
    BLOCK_COMMENT("Entry:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1298
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1299
    // arrays overlap test
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1300
    __ cmpptr(to, from);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1301
    RuntimeAddress nooverlap(nooverlap_target);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1302
    __ jump_cc(Assembler::belowEqual, nooverlap);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1303
    __ lea(end_from, Address(from, count, Address::times_8, 0));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1304
    __ cmpptr(to, end_from);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1305
    __ movptr(from, Address(rsp, 8));  // from
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1306
    __ jump_cc(Assembler::aboveEqual, nooverlap);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1307
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1308
    __ jmpb(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1309
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1310
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1311
  __ BIND(L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1312
    if (VM_Version::supports_mmx()) {
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1313
      if (UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1314
        __ movq(xmm0, Address(from, count, Address::times_8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1315
        __ movq(Address(to, count, Address::times_8), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1316
      } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1317
        __ movq(mmx0, Address(from, count, Address::times_8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1318
        __ movq(Address(to, count, Address::times_8), mmx0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1319
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1320
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1321
      __ fild_d(Address(from, count, Address::times_8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1322
      __ fistp_d(Address(to, count, Address::times_8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1323
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1324
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1325
    __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1326
    __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1327
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1328
    if (VM_Version::supports_mmx() && !UseXMMForArrayCopy) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1329
      __ emms();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1330
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1331
    inc_copy_counter_np(T_LONG);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1332
    __ leave(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1333
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1334
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1335
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1336
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1337
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1338
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1339
  // Helper for generating a dynamic type check.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1340
  // The sub_klass must be one of {rbx, rdx, rsi}.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1341
  // The temp is killed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1342
  void generate_type_check(Register sub_klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1343
                           Address& super_check_offset_addr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1344
                           Address& super_klass_addr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1345
                           Register temp,
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1346
                           Label* L_success, Label* L_failure) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1347
    BLOCK_COMMENT("type_check:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1348
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1349
    Label L_fallthrough;
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1350
#define LOCAL_JCC(assembler_con, label_ptr)                             \
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1351
    if (label_ptr != NULL)  __ jcc(assembler_con, *(label_ptr));        \
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1352
    else                    __ jcc(assembler_con, L_fallthrough) /*omit semi*/
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1353
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1354
    // The following is a strange variation of the fast path which requires
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1355
    // one less register, because needed values are on the argument stack.
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1356
    // __ check_klass_subtype_fast_path(sub_klass, *super_klass*, temp,
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1357
    //                                  L_success, L_failure, NULL);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1358
    assert_different_registers(sub_klass, temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1359
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 10565
diff changeset
  1360
    int sc_offset = in_bytes(Klass::secondary_super_cache_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1361
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1362
    // if the pointers are equal, we are done (e.g., String[] elements)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1363
    __ cmpptr(sub_klass, super_klass_addr);
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1364
    LOCAL_JCC(Assembler::equal, L_success);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1365
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1366
    // check the supertype display:
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1367
    __ movl2ptr(temp, super_check_offset_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1368
    Address super_check_addr(sub_klass, temp, Address::times_1, 0);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1369
    __ movptr(temp, super_check_addr); // load displayed supertype
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1370
    __ cmpptr(temp, super_klass_addr); // test the super type
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1371
    LOCAL_JCC(Assembler::equal, L_success);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1372
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1373
    // if it was a primary super, we can just fail immediately
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1374
    __ cmpl(super_check_offset_addr, sc_offset);
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1375
    LOCAL_JCC(Assembler::notEqual, L_failure);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1376
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1377
    // The repne_scan instruction uses fixed registers, which will get spilled.
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1378
    // We happen to know this works best when super_klass is in rax.
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1379
    Register super_klass = temp;
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1380
    __ movptr(super_klass, super_klass_addr);
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1381
    __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg,
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1382
                                     L_success, L_failure);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1383
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1384
    __ bind(L_fallthrough);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1385
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1386
    if (L_success == NULL) { BLOCK_COMMENT("L_success:"); }
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1387
    if (L_failure == NULL) { BLOCK_COMMENT("L_failure:"); }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1388
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1389
#undef LOCAL_JCC
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1390
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1391
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1392
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1393
  //  Generate checkcasting array copy stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1394
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1395
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1396
  //    4(rsp)   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1397
  //    8(rsp)   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1398
  //   12(rsp)   - element count, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1399
  //   16(rsp)   - size_t ckoff (super_check_offset)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1400
  //   20(rsp)   - oop ckval (super_klass)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1401
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1402
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1403
  //    rax, ==  0  -  success
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1404
  //    rax, == -1^K - failure, where K is partial transfer count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1405
  //
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1406
  address generate_checkcast_copy(const char *name, address* entry, bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1407
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1408
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1409
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1410
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1411
    Label L_load_element, L_store_element, L_do_card_marks, L_done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1412
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1413
    // register use:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1414
    //  rax, rdx, rcx -- loop control (end_from, end_to, count)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1415
    //  rdi, rsi      -- element access (oop, klass)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1416
    //  rbx,           -- temp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1417
    const Register from       = rax;    // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1418
    const Register to         = rdx;    // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1419
    const Register length     = rcx;    // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1420
    const Register elem       = rdi;    // each oop copied
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1421
    const Register elem_klass = rsi;    // each elem._klass (sub_klass)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1422
    const Register temp       = rbx;    // lone remaining temp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1423
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1424
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1425
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1426
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1427
    __ push(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1428
    __ push(rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1429
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1430
    Address   from_arg(rsp, 16+ 4);     // from
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1431
    Address     to_arg(rsp, 16+ 8);     // to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1432
    Address length_arg(rsp, 16+12);     // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1433
    Address  ckoff_arg(rsp, 16+16);     // super_check_offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1434
    Address  ckval_arg(rsp, 16+20);     // super_klass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1435
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1436
    // Load up:
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1437
    __ movptr(from,     from_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1438
    __ movptr(to,         to_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1439
    __ movl2ptr(length, length_arg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1440
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1441
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1442
      *entry = __ pc(); // Entry point from generic arraycopy stub.
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1443
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1444
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1445
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1446
    //---------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1447
    // Assembler stub will be used for this call to arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1448
    // if the two arrays are subtypes of Object[] but the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1449
    // destination array type is not equal to or a supertype
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1450
    // of the source type.  Each element must be separately
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1451
    // checked.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1452
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1453
    // Loop-invariant addresses.  They are exclusive end pointers.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1454
    Address end_from_addr(from, length, Address::times_ptr, 0);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1455
    Address   end_to_addr(to,   length, Address::times_ptr, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1456
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1457
    Register end_from = from;           // re-use
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1458
    Register end_to   = to;             // re-use
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1459
    Register count    = length;         // re-use
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1460
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1461
    // Loop-variant addresses.  They assume post-incremented count < 0.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1462
    Address from_element_addr(end_from, count, Address::times_ptr, 0);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1463
    Address   to_element_addr(end_to,   count, Address::times_ptr, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1464
    Address elem_klass_addr(elem, oopDesc::klass_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1465
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1466
    // Copy from low to high addresses, indexed from the end of each array.
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1467
    gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1468
    __ lea(end_from, end_from_addr);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1469
    __ lea(end_to,   end_to_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1470
    assert(length == count, "");        // else fix next line:
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1471
    __ negptr(count);                   // negate and test the length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1472
    __ jccb(Assembler::notZero, L_load_element);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1473
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1474
    // Empty array:  Nothing to do.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1475
    __ xorptr(rax, rax);                  // return 0 on (trivial) success
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1476
    __ jmp(L_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1477
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1478
    // ======== begin loop ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1479
    // (Loop is rotated; its entry is L_load_element.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1480
    // Loop control:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1481
    //   for (count = -count; count != 0; count++)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1482
    // Base pointers src, dst are biased by 8*count,to last element.
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1483
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1484
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1485
    __ BIND(L_store_element);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1486
    __ movptr(to_element_addr, elem);     // store the oop
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1487
    __ increment(count);                // increment the count toward zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1488
    __ jccb(Assembler::zero, L_do_card_marks);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1489
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1490
    // ======== loop entry is here ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1491
    __ BIND(L_load_element);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1492
    __ movptr(elem, from_element_addr);   // load the oop
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1493
    __ testptr(elem, elem);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1494
    __ jccb(Assembler::zero, L_store_element);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1495
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1496
    // (Could do a trick here:  Remember last successful non-null
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1497
    // element stored and make a quick oop equality check on it.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1498
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1499
    __ movptr(elem_klass, elem_klass_addr); // query the object klass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1500
    generate_type_check(elem_klass, ckoff_arg, ckval_arg, temp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1501
                        &L_store_element, NULL);
17622
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1502
    // (On fall-through, we have failed the element type check.)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1503
    // ======== end loop ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1504
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1505
    // It was a real error; we must depend on the caller to finish the job.
192
d66300cdf939 6614036: REGRESSION: Java server x86 VM intermittently crash with SIGSEGV (0xb)
rasbold
parents: 189
diff changeset
  1506
    // Register "count" = -1 * number of *remaining* oops, length_arg = *total* oops.
d66300cdf939 6614036: REGRESSION: Java server x86 VM intermittently crash with SIGSEGV (0xb)
rasbold
parents: 189
diff changeset
  1507
    // Emit GC store barriers for the oops we have copied (length_arg + count),
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1508
    // and report their number to the caller.
17622
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1509
    assert_different_registers(to, count, rax);
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1510
    Label L_post_barrier;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1511
    __ addl(count, length_arg);         // transfers = (length - remaining)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1512
    __ movl2ptr(rax, count);            // save the value
17622
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1513
    __ notptr(rax);                     // report (-1^K) to caller (does not affect flags)
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1514
    __ jccb(Assembler::notZero, L_post_barrier);
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1515
    __ jmp(L_done); // K == 0, nothing was copied, skip post barrier
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1516
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1517
    // Come here on success only.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1518
    __ BIND(L_do_card_marks);
17622
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1519
    __ xorptr(rax, rax);                // return 0 on success
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1520
    __ movl2ptr(count, length_arg);
17622
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1521
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1522
    __ BIND(L_post_barrier);
4037daf22a17 8010927: Kitchensink crashed with SIGSEGV, Problematic frame: v ~StubRoutines::checkcast_arraycopy
kvn
parents: 16624
diff changeset
  1523
    __ movptr(to, to_arg);              // reload
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1524
    gen_write_ref_array_post_barrier(to, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1525
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1526
    // Common exit point (success or failure).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1527
    __ BIND(L_done);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1528
    __ pop(rbx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1529
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1530
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1531
    inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1532
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1533
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1534
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1535
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1536
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1537
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1538
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1539
  //  Generate 'unsafe' array copy stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1540
  //  Though just as safe as the other stubs, it takes an unscaled
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1541
  //  size_t argument instead of an element count.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1542
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1543
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1544
  //    4(rsp)   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1545
  //    8(rsp)   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1546
  //   12(rsp)   - byte count, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1547
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1548
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1549
  //    rax, ==  0  -  success
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1550
  //    rax, == -1  -  need to call System.arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1551
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1552
  // Examines the alignment of the operands and dispatches
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1553
  // to a long, int, short, or byte copy loop.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1554
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1555
  address generate_unsafe_copy(const char *name,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1556
                               address byte_copy_entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1557
                               address short_copy_entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1558
                               address int_copy_entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1559
                               address long_copy_entry) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1560
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1561
    Label L_long_aligned, L_int_aligned, L_short_aligned;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1562
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1563
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1564
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1565
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1566
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1567
    const Register from       = rax;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1568
    const Register to         = rdx;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1569
    const Register count      = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1570
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1571
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1572
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1573
    __ push(rdi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1574
    Address  from_arg(rsp, 12+ 4);      // from
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1575
    Address    to_arg(rsp, 12+ 8);      // to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1576
    Address count_arg(rsp, 12+12);      // byte count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1577
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1578
    // Load up:
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1579
    __ movptr(from ,  from_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1580
    __ movptr(to   ,    to_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1581
    __ movl2ptr(count, count_arg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1582
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1583
    // bump this on entry, not on exit:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1584
    inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1585
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1586
    const Register bits = rsi;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1587
    __ mov(bits, from);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1588
    __ orptr(bits, to);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1589
    __ orptr(bits, count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1590
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1591
    __ testl(bits, BytesPerLong-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1592
    __ jccb(Assembler::zero, L_long_aligned);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1593
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1594
    __ testl(bits, BytesPerInt-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1595
    __ jccb(Assembler::zero, L_int_aligned);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1596
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1597
    __ testl(bits, BytesPerShort-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1598
    __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1599
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1600
    __ BIND(L_short_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1601
    __ shrptr(count, LogBytesPerShort); // size => short_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1602
    __ movl(count_arg, count);          // update 'count'
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1603
    __ jump(RuntimeAddress(short_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1604
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1605
    __ BIND(L_int_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1606
    __ shrptr(count, LogBytesPerInt); // size => int_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1607
    __ movl(count_arg, count);          // update 'count'
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1608
    __ jump(RuntimeAddress(int_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1609
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1610
    __ BIND(L_long_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1611
    __ shrptr(count, LogBytesPerLong); // size => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1612
    __ movl(count_arg, count);          // update 'count'
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1613
    __ pop(rdi); // Do pops here since jlong_arraycopy stub does not do it.
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1614
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1615
    __ jump(RuntimeAddress(long_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1616
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1617
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1618
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1619
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1620
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1621
  // Perform range checks on the proposed arraycopy.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1622
  // Smashes src_pos and dst_pos.  (Uses them up for temps.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1623
  void arraycopy_range_checks(Register src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1624
                              Register src_pos,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1625
                              Register dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1626
                              Register dst_pos,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1627
                              Address& length,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1628
                              Label& L_failed) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1629
    BLOCK_COMMENT("arraycopy_range_checks:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1630
    const Register src_end = src_pos;   // source array end position
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1631
    const Register dst_end = dst_pos;   // destination array end position
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1632
    __ addl(src_end, length); // src_pos + length
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1633
    __ addl(dst_end, length); // dst_pos + length
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1634
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1635
    //  if (src_pos + length > arrayOop(src)->length() ) FAIL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1636
    __ cmpl(src_end, Address(src, arrayOopDesc::length_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1637
    __ jcc(Assembler::above, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1638
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1639
    //  if (dst_pos + length > arrayOop(dst)->length() ) FAIL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1640
    __ cmpl(dst_end, Address(dst, arrayOopDesc::length_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1641
    __ jcc(Assembler::above, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1642
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1643
    BLOCK_COMMENT("arraycopy_range_checks done");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1644
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1645
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1646
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1647
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1648
  //  Generate generic array copy stubs
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1649
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1650
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1651
  //     4(rsp)    -  src oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1652
  //     8(rsp)    -  src_pos
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1653
  //    12(rsp)    -  dst oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1654
  //    16(rsp)    -  dst_pos
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1655
  //    20(rsp)    -  element count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1656
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1657
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1658
  //    rax, ==  0  -  success
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1659
  //    rax, == -1^K - failure, where K is partial transfer count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1660
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1661
  address generate_generic_copy(const char *name,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1662
                                address entry_jbyte_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1663
                                address entry_jshort_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1664
                                address entry_jint_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1665
                                address entry_oop_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1666
                                address entry_jlong_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1667
                                address entry_checkcast_arraycopy) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1668
    Label L_failed, L_failed_0, L_objArray;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1669
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1670
    { int modulus = CodeEntryAlignment;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1671
      int target  = modulus - 5; // 5 = sizeof jmp(L_failed)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1672
      int advance = target - (__ offset() % modulus);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1673
      if (advance < 0)  advance += modulus;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1674
      if (advance > 0)  __ nop(advance);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1675
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1676
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1677
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1678
    // Short-hop target to L_failed.  Makes for denser prologue code.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1679
    __ BIND(L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1680
    __ jmp(L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1681
    assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1682
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1683
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1684
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1685
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1686
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1687
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1688
    __ push(rdi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1689
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1690
    // bump this on entry, not on exit:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1691
    inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1692
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1693
    // Input values
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1694
    Address SRC     (rsp, 12+ 4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1695
    Address SRC_POS (rsp, 12+ 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1696
    Address DST     (rsp, 12+12);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1697
    Address DST_POS (rsp, 12+16);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1698
    Address LENGTH  (rsp, 12+20);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1699
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1700
    //-----------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1701
    // Assembler stub will be used for this call to arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1702
    // if the following conditions are met:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1703
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1704
    // (1) src and dst must not be null.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1705
    // (2) src_pos must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1706
    // (3) dst_pos must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1707
    // (4) length  must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1708
    // (5) src klass and dst klass should be the same and not NULL.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1709
    // (6) src and dst should be arrays.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1710
    // (7) src_pos + length must not exceed length of src.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1711
    // (8) dst_pos + length must not exceed length of dst.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1712
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1713
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1714
    const Register src     = rax;       // source array oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1715
    const Register src_pos = rsi;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1716
    const Register dst     = rdx;       // destination array oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1717
    const Register dst_pos = rdi;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1718
    const Register length  = rcx;       // transfer count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1719
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1720
    //  if (src == NULL) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1721
    __ movptr(src, SRC);      // src oop
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1722
    __ testptr(src, src);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1723
    __ jccb(Assembler::zero, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1724
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1725
    //  if (src_pos < 0) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1726
    __ movl2ptr(src_pos, SRC_POS);  // src_pos
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1727
    __ testl(src_pos, src_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1728
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1729
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1730
    //  if (dst == NULL) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1731
    __ movptr(dst, DST);      // dst oop
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1732
    __ testptr(dst, dst);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1733
    __ jccb(Assembler::zero, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1734
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1735
    //  if (dst_pos < 0) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1736
    __ movl2ptr(dst_pos, DST_POS);  // dst_pos
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1737
    __ testl(dst_pos, dst_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1738
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1739
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1740
    //  if (length < 0) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1741
    __ movl2ptr(length, LENGTH);   // length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1742
    __ testl(length, length);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1743
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1744
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1745
    //  if (src->klass() == NULL) return -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1746
    Address src_klass_addr(src, oopDesc::klass_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1747
    Address dst_klass_addr(dst, oopDesc::klass_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1748
    const Register rcx_src_klass = rcx;    // array klass
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1749
    __ movptr(rcx_src_klass, Address(src, oopDesc::klass_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1750
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1751
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1752
    //  assert(src->klass() != NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1753
    BLOCK_COMMENT("assert klasses not null");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1754
    { Label L1, L2;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1755
      __ testptr(rcx_src_klass, rcx_src_klass);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1756
      __ jccb(Assembler::notZero, L2);   // it is broken if klass is NULL
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1757
      __ bind(L1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1758
      __ stop("broken null klass");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1759
      __ bind(L2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1760
      __ cmpptr(dst_klass_addr, (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1761
      __ jccb(Assembler::equal, L1);      // this would be broken also
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1762
      BLOCK_COMMENT("assert done");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1763
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1764
#endif //ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1765
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1766
    // Load layout helper (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1767
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1768
    //  |array_tag|     | header_size | element_type |     |log2_element_size|
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1769
    // 32        30    24            16              8     2                 0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1770
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1771
    //   array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1772
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1773
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 10565
diff changeset
  1774
    int lh_offset = in_bytes(Klass::layout_helper_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1775
    Address src_klass_lh_addr(rcx_src_klass, lh_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1776
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1777
    // Handle objArrays completely differently...
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1778
    jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1779
    __ cmpl(src_klass_lh_addr, objArray_lh);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1780
    __ jcc(Assembler::equal, L_objArray);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1781
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1782
    //  if (src->klass() != dst->klass()) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1783
    __ cmpptr(rcx_src_klass, dst_klass_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1784
    __ jccb(Assembler::notEqual, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1785
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1786
    const Register rcx_lh = rcx;  // layout helper
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1787
    assert(rcx_lh == rcx_src_klass, "known alias");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1788
    __ movl(rcx_lh, src_klass_lh_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1789
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1790
    //  if (!src->is_Array()) return -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1791
    __ cmpl(rcx_lh, Klass::_lh_neutral_value);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1792
    __ jcc(Assembler::greaterEqual, L_failed_0); // signed cmp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1793
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1794
    // At this point, it is known to be a typeArray (array_tag 0x3).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1795
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1796
    { Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1797
      __ cmpl(rcx_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1798
      __ jcc(Assembler::greaterEqual, L); // signed cmp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1799
      __ stop("must be a primitive array");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1800
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1801
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1802
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1803
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1804
    assert_different_registers(src, src_pos, dst, dst_pos, rcx_lh);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1805
    arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1806
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  1807
    // TypeArrayKlass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1808
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1809
    // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1810
    // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1811
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1812
    const Register rsi_offset = rsi; // array offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1813
    const Register src_array  = src; // src array offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1814
    const Register dst_array  = dst; // dst array offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1815
    const Register rdi_elsize = rdi; // log2 element size
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1816
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1817
    __ mov(rsi_offset, rcx_lh);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1818
    __ shrptr(rsi_offset, Klass::_lh_header_size_shift);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1819
    __ andptr(rsi_offset, Klass::_lh_header_size_mask);   // array_offset
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1820
    __ addptr(src_array, rsi_offset);  // src array offset
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1821
    __ addptr(dst_array, rsi_offset);  // dst array offset
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1822
    __ andptr(rcx_lh, Klass::_lh_log2_element_size_mask); // log2 elsize
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1823
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1824
    // next registers should be set before the jump to corresponding stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1825
    const Register from       = src; // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1826
    const Register to         = dst; // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1827
    const Register count      = rcx; // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1828
    // some of them should be duplicated on stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1829
#define FROM   Address(rsp, 12+ 4)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1830
#define TO     Address(rsp, 12+ 8)   // Not used now
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1831
#define COUNT  Address(rsp, 12+12)   // Only for oop arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1832
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1833
    BLOCK_COMMENT("scale indexes to element size");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1834
    __ movl2ptr(rsi, SRC_POS);  // src_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1835
    __ shlptr(rsi);             // src_pos << rcx (log2 elsize)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1836
    assert(src_array == from, "");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1837
    __ addptr(from, rsi);       // from = src_array + SRC_POS << log2 elsize
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1838
    __ movl2ptr(rdi, DST_POS);  // dst_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1839
    __ shlptr(rdi);             // dst_pos << rcx (log2 elsize)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1840
    assert(dst_array == to, "");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1841
    __ addptr(to,  rdi);        // to   = dst_array + DST_POS << log2 elsize
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1842
    __ movptr(FROM, from);      // src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1843
    __ mov(rdi_elsize, rcx_lh); // log2 elsize
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1844
    __ movl2ptr(count, LENGTH); // elements count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1845
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1846
    BLOCK_COMMENT("choose copy loop based on element size");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1847
    __ cmpl(rdi_elsize, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1848
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1849
    __ jump_cc(Assembler::equal, RuntimeAddress(entry_jbyte_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1850
    __ cmpl(rdi_elsize, LogBytesPerShort);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1851
    __ jump_cc(Assembler::equal, RuntimeAddress(entry_jshort_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1852
    __ cmpl(rdi_elsize, LogBytesPerInt);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1853
    __ jump_cc(Assembler::equal, RuntimeAddress(entry_jint_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1854
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1855
    __ cmpl(rdi_elsize, LogBytesPerLong);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1856
    __ jccb(Assembler::notEqual, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1857
#endif
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1858
    __ pop(rdi); // Do pops here since jlong_arraycopy stub does not do it.
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1859
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1860
    __ jump(RuntimeAddress(entry_jlong_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1861
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1862
  __ BIND(L_failed);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1863
    __ xorptr(rax, rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1864
    __ notptr(rax); // return -1
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1865
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1866
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1867
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1868
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1869
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  1870
    // ObjArrayKlass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1871
  __ BIND(L_objArray);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1872
    // live at this point:  rcx_src_klass, src[_pos], dst[_pos]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1873
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1874
    Label L_plain_copy, L_checkcast_copy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1875
    //  test array classes for subtyping
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1876
    __ cmpptr(rcx_src_klass, dst_klass_addr); // usual case is exact equality
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1877
    __ jccb(Assembler::notEqual, L_checkcast_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1878
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1879
    // Identically typed arrays can be copied without element-wise checks.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1880
    assert_different_registers(src, src_pos, dst, dst_pos, rcx_src_klass);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1881
    arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1882
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1883
  __ BIND(L_plain_copy);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1884
    __ movl2ptr(count, LENGTH); // elements count
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1885
    __ movl2ptr(src_pos, SRC_POS);  // reload src_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1886
    __ lea(from, Address(src, src_pos, Address::times_ptr,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1887
                 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1888
    __ movl2ptr(dst_pos, DST_POS);  // reload dst_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1889
    __ lea(to,   Address(dst, dst_pos, Address::times_ptr,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1890
                 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1891
    __ movptr(FROM,  from);   // src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1892
    __ movptr(TO,    to);     // dst_addr
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1893
    __ movl(COUNT, count);  // count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1894
    __ jump(RuntimeAddress(entry_oop_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1895
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1896
  __ BIND(L_checkcast_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1897
    // live at this point:  rcx_src_klass, dst[_pos], src[_pos]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1898
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1899
      // Handy offsets:
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  1900
      int  ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 10565
diff changeset
  1901
      int sco_offset = in_bytes(Klass::super_check_offset_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1902
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1903
      Register rsi_dst_klass = rsi;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1904
      Register rdi_temp      = rdi;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1905
      assert(rsi_dst_klass == src_pos, "expected alias w/ src_pos");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1906
      assert(rdi_temp      == dst_pos, "expected alias w/ dst_pos");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1907
      Address dst_klass_lh_addr(rsi_dst_klass, lh_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1908
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1909
      // Before looking at dst.length, make sure dst is also an objArray.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1910
      __ movptr(rsi_dst_klass, dst_klass_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1911
      __ cmpl(dst_klass_lh_addr, objArray_lh);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1912
      __ jccb(Assembler::notEqual, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1913
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1914
      // It is safe to examine both src.length and dst.length.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1915
      __ movl2ptr(src_pos, SRC_POS);        // reload rsi
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1916
      arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1917
      // (Now src_pos and dst_pos are killed, but not src and dst.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1918
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1919
      // We'll need this temp (don't forget to pop it after the type check).
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1920
      __ push(rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1921
      Register rbx_src_klass = rbx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1922
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1923
      __ mov(rbx_src_klass, rcx_src_klass); // spill away from rcx
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1924
      __ movptr(rsi_dst_klass, dst_klass_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1925
      Address super_check_offset_addr(rsi_dst_klass, sco_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1926
      Label L_fail_array_check;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1927
      generate_type_check(rbx_src_klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1928
                          super_check_offset_addr, dst_klass_addr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1929
                          rdi_temp, NULL, &L_fail_array_check);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1930
      // (On fall-through, we have passed the array type check.)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1931
      __ pop(rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1932
      __ jmp(L_plain_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1933
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1934
      __ BIND(L_fail_array_check);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1935
      // Reshuffle arguments so we can call checkcast_arraycopy:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1936
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1937
      // match initial saves for checkcast_arraycopy
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1938
      // push(rsi);    // already done; see above
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1939
      // push(rdi);    // already done; see above
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1940
      // push(rbx);    // already done; see above
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1941
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1942
      // Marshal outgoing arguments now, freeing registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1943
      Address   from_arg(rsp, 16+ 4);   // from
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1944
      Address     to_arg(rsp, 16+ 8);   // to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1945
      Address length_arg(rsp, 16+12);   // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1946
      Address  ckoff_arg(rsp, 16+16);   // super_check_offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1947
      Address  ckval_arg(rsp, 16+20);   // super_klass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1948
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1949
      Address SRC_POS_arg(rsp, 16+ 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1950
      Address DST_POS_arg(rsp, 16+16);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1951
      Address  LENGTH_arg(rsp, 16+20);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1952
      // push rbx, changed the incoming offsets (why not just use rbp,??)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1953
      // assert(SRC_POS_arg.disp() == SRC_POS.disp() + 4, "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1954
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1955
      __ movptr(rbx, Address(rsi_dst_klass, ek_offset));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1956
      __ movl2ptr(length, LENGTH_arg);    // reload elements count
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1957
      __ movl2ptr(src_pos, SRC_POS_arg);  // reload src_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1958
      __ movl2ptr(dst_pos, DST_POS_arg);  // reload dst_pos
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1959
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1960
      __ movptr(ckval_arg, rbx);          // destination element type
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1961
      __ movl(rbx, Address(rbx, sco_offset));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1962
      __ movl(ckoff_arg, rbx);          // corresponding class check offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1963
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1964
      __ movl(length_arg, length);      // outgoing length argument
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1965
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1966
      __ lea(from, Address(src, src_pos, Address::times_ptr,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1967
                            arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1968
      __ movptr(from_arg, from);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1969
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1970
      __ lea(to, Address(dst, dst_pos, Address::times_ptr,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1971
                          arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1972
      __ movptr(to_arg, to);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1973
      __ jump(RuntimeAddress(entry_checkcast_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1974
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1975
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1976
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1977
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1978
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1979
  void generate_arraycopy_stubs() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1980
    address entry;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1981
    address entry_jbyte_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1982
    address entry_jshort_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1983
    address entry_jint_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1984
    address entry_oop_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1985
    address entry_jlong_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1986
    address entry_checkcast_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1987
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1988
    StubRoutines::_arrayof_jbyte_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1989
        generate_disjoint_copy(T_BYTE,  true, Address::times_1, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1990
                               "arrayof_jbyte_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1991
    StubRoutines::_arrayof_jbyte_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1992
        generate_conjoint_copy(T_BYTE,  true, Address::times_1,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1993
                               NULL, "arrayof_jbyte_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1994
    StubRoutines::_jbyte_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1995
        generate_disjoint_copy(T_BYTE, false, Address::times_1, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1996
                               "jbyte_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1997
    StubRoutines::_jbyte_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1998
        generate_conjoint_copy(T_BYTE, false, Address::times_1,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1999
                               &entry_jbyte_arraycopy, "jbyte_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2001
    StubRoutines::_arrayof_jshort_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2002
        generate_disjoint_copy(T_SHORT,  true, Address::times_2, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2003
                               "arrayof_jshort_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2004
    StubRoutines::_arrayof_jshort_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2005
        generate_conjoint_copy(T_SHORT,  true, Address::times_2,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2006
                               NULL, "arrayof_jshort_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2007
    StubRoutines::_jshort_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2008
        generate_disjoint_copy(T_SHORT, false, Address::times_2, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2009
                               "jshort_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2010
    StubRoutines::_jshort_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2011
        generate_conjoint_copy(T_SHORT, false, Address::times_2,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2012
                               &entry_jshort_arraycopy, "jshort_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2013
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2014
    // Next arrays are always aligned on 4 bytes at least.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2015
    StubRoutines::_jint_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2016
        generate_disjoint_copy(T_INT, true, Address::times_4, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2017
                               "jint_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2018
    StubRoutines::_jint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2019
        generate_conjoint_copy(T_INT, true, Address::times_4,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2020
                               &entry_jint_arraycopy, "jint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2021
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2022
    StubRoutines::_oop_disjoint_arraycopy =
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2023
        generate_disjoint_copy(T_OBJECT, true, Address::times_ptr, &entry,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2024
                               "oop_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2025
    StubRoutines::_oop_arraycopy =
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2026
        generate_conjoint_copy(T_OBJECT, true, Address::times_ptr,  entry,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2027
                               &entry_oop_arraycopy, "oop_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2028
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2029
    StubRoutines::_oop_disjoint_arraycopy_uninit =
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2030
        generate_disjoint_copy(T_OBJECT, true, Address::times_ptr, &entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2031
                               "oop_disjoint_arraycopy_uninit",
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2032
                               /*dest_uninitialized*/true);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2033
    StubRoutines::_oop_arraycopy_uninit =
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2034
        generate_conjoint_copy(T_OBJECT, true, Address::times_ptr,  entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2035
                               NULL, "oop_arraycopy_uninit",
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2036
                               /*dest_uninitialized*/true);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2037
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2038
    StubRoutines::_jlong_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2039
        generate_disjoint_long_copy(&entry, "jlong_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2040
    StubRoutines::_jlong_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2041
        generate_conjoint_long_copy(entry, &entry_jlong_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2042
                                    "jlong_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2043
6433
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2044
    StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2045
    StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2046
    StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2047
    StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2048
    StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2049
    StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2050
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2051
    StubRoutines::_arrayof_jint_disjoint_arraycopy       = StubRoutines::_jint_disjoint_arraycopy;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2052
    StubRoutines::_arrayof_oop_disjoint_arraycopy        = StubRoutines::_oop_disjoint_arraycopy;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2053
    StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = StubRoutines::_oop_disjoint_arraycopy_uninit;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2054
    StubRoutines::_arrayof_jlong_disjoint_arraycopy      = StubRoutines::_jlong_disjoint_arraycopy;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2055
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2056
    StubRoutines::_arrayof_jint_arraycopy       = StubRoutines::_jint_arraycopy;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2057
    StubRoutines::_arrayof_oop_arraycopy        = StubRoutines::_oop_arraycopy;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2058
    StubRoutines::_arrayof_oop_arraycopy_uninit = StubRoutines::_oop_arraycopy_uninit;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2059
    StubRoutines::_arrayof_jlong_arraycopy      = StubRoutines::_jlong_arraycopy;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2060
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2061
    StubRoutines::_checkcast_arraycopy =
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2062
        generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2063
    StubRoutines::_checkcast_arraycopy_uninit =
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2064
        generate_checkcast_copy("checkcast_arraycopy_uninit", NULL, /*dest_uninitialized*/true);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2065
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2066
    StubRoutines::_unsafe_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2067
        generate_unsafe_copy("unsafe_arraycopy",
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2068
                               entry_jbyte_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2069
                               entry_jshort_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2070
                               entry_jint_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2071
                               entry_jlong_arraycopy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2072
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2073
    StubRoutines::_generic_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2074
        generate_generic_copy("generic_arraycopy",
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2075
                               entry_jbyte_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2076
                               entry_jshort_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2077
                               entry_jint_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2078
                               entry_oop_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2079
                               entry_jlong_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2080
                               entry_checkcast_arraycopy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2081
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2082
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2083
  // AES intrinsic stubs
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2084
  enum {AESBlockSize = 16};
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2085
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2086
  address generate_key_shuffle_mask() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2087
    __ align(16);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2088
    StubCodeMark mark(this, "StubRoutines", "key_shuffle_mask");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2089
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2090
    __ emit_data(0x00010203, relocInfo::none, 0 );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2091
    __ emit_data(0x04050607, relocInfo::none, 0 );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2092
    __ emit_data(0x08090a0b, relocInfo::none, 0 );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2093
    __ emit_data(0x0c0d0e0f, relocInfo::none, 0 );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2094
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2095
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2096
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2097
  address generate_counter_shuffle_mask() {
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2098
    __ align(16);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2099
    StubCodeMark mark(this, "StubRoutines", "counter_shuffle_mask");
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2100
    address start = __ pc();
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2101
    __ emit_data(0x0c0d0e0f, relocInfo::none, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2102
    __ emit_data(0x08090a0b, relocInfo::none, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2103
    __ emit_data(0x04050607, relocInfo::none, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2104
    __ emit_data(0x00010203, relocInfo::none, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2105
    return start;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2106
  }
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2107
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2108
  // Utility routine for loading a 128-bit key word in little endian format
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2109
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2110
  void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2111
    __ movdqu(xmmdst, Address(key, offset));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2112
    if (xmm_shuf_mask != NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2113
      __ pshufb(xmmdst, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2114
    } else {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2115
      __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2116
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2117
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2118
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2119
  // aesenc using specified key+offset
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2120
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2121
  void aes_enc_key(XMMRegister xmmdst, XMMRegister xmmtmp, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2122
    load_key(xmmtmp, key, offset, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2123
    __ aesenc(xmmdst, xmmtmp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2124
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2125
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2126
  // aesdec using specified key+offset
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2127
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2128
  void aes_dec_key(XMMRegister xmmdst, XMMRegister xmmtmp, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2129
    load_key(xmmtmp, key, offset, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2130
    __ aesdec(xmmdst, xmmtmp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2131
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2132
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2133
  // Utility routine for increase 128bit counter (iv in CTR mode)
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2134
  //  XMM_128bit,  D3, D2, D1, D0
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2135
  void inc_counter(Register reg, XMMRegister xmmdst, int inc_delta, Label& next_block) {
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2136
    __ pextrd(reg, xmmdst, 0x0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2137
    __ addl(reg, inc_delta);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2138
    __ pinsrd(xmmdst, reg, 0x0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2139
    __ jcc(Assembler::carryClear, next_block); // jump if no carry
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2140
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2141
    __ pextrd(reg, xmmdst, 0x01); // Carry-> D1
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2142
    __ addl(reg, 0x01);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2143
    __ pinsrd(xmmdst, reg, 0x01);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2144
    __ jcc(Assembler::carryClear, next_block); // jump if no carry
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2145
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2146
    __ pextrd(reg, xmmdst, 0x02); // Carry-> D2
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2147
    __ addl(reg, 0x01);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2148
    __ pinsrd(xmmdst, reg, 0x02);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2149
    __ jcc(Assembler::carryClear, next_block); // jump if no carry
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2150
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2151
    __ pextrd(reg, xmmdst, 0x03); // Carry -> D3
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2152
    __ addl(reg, 0x01);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2153
    __ pinsrd(xmmdst, reg, 0x03);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2155
    __ BIND(next_block);          // next instruction
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2156
  }
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2157
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2158
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2159
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2160
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2161
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2162
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2163
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2164
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2165
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2166
  address generate_aescrypt_encryptBlock() {
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2167
    assert(UseAES, "need AES instructions and misaligned SSE support");
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2168
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2169
    StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2170
    Label L_doLast;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2171
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2172
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2173
    const Register from        = rdx;      // source array address
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2174
    const Register to          = rdx;      // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2175
    const Register key         = rcx;      // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2176
    const Register keylen      = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2177
    const Address  from_param(rbp, 8+0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2178
    const Address  to_param  (rbp, 8+4);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2179
    const Address  key_param (rbp, 8+8);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2180
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2181
    const XMMRegister xmm_result = xmm0;
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2182
    const XMMRegister xmm_key_shuf_mask = xmm1;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2183
    const XMMRegister xmm_temp1  = xmm2;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2184
    const XMMRegister xmm_temp2  = xmm3;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2185
    const XMMRegister xmm_temp3  = xmm4;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2186
    const XMMRegister xmm_temp4  = xmm5;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2187
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2188
    __ enter();   // required for proper stackwalking of RuntimeStub frame
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2189
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2190
    // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2191
    // context for the registers used, where all instructions below are using 128-bit mode
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2192
    // On EVEX without VL and BW, these instructions will all be AVX.
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2193
    if (VM_Version::supports_avx512vlbw()) {
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2194
      __ movl(rdx, 0xffff);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2195
      __ kmovdl(k1, rdx);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2196
    }
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2197
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2198
    __ movptr(from, from_param);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2199
    __ movptr(key, key_param);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2200
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2201
    // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2202
    __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2203
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2204
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2205
    __ movdqu(xmm_result, Address(from, 0));  // get 16 bytes of input
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2206
    __ movptr(to, to_param);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2207
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2208
    // For encryption, the java expanded key ordering is just what we need
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2209
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2210
    load_key(xmm_temp1, key, 0x00, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2211
    __ pxor(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2212
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2213
    load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2214
    load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2215
    load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2216
    load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2217
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2218
    __ aesenc(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2219
    __ aesenc(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2220
    __ aesenc(xmm_result, xmm_temp3);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2221
    __ aesenc(xmm_result, xmm_temp4);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2222
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2223
    load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2224
    load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2225
    load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2226
    load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2227
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2228
    __ aesenc(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2229
    __ aesenc(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2230
    __ aesenc(xmm_result, xmm_temp3);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2231
    __ aesenc(xmm_result, xmm_temp4);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2232
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2233
    load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2234
    load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2235
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2236
    __ cmpl(keylen, 44);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2237
    __ jccb(Assembler::equal, L_doLast);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2238
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2239
    __ aesenc(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2240
    __ aesenc(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2241
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2242
    load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2243
    load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2244
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2245
    __ cmpl(keylen, 52);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2246
    __ jccb(Assembler::equal, L_doLast);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2247
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2248
    __ aesenc(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2249
    __ aesenc(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2250
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2251
    load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2252
    load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2253
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2254
    __ BIND(L_doLast);
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2255
    __ aesenc(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2256
    __ aesenclast(xmm_result, xmm_temp2);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2257
    __ movdqu(Address(to, 0), xmm_result);        // store the result
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2258
    __ xorptr(rax, rax); // return 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2259
    __ leave(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2260
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2261
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2262
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2263
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2264
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2265
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2266
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2267
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2268
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2269
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2270
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2271
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2272
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2273
  address generate_aescrypt_decryptBlock() {
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2274
    assert(UseAES, "need AES instructions and misaligned SSE support");
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2275
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2276
    StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2277
    Label L_doLast;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2278
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2279
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2280
    const Register from        = rdx;      // source array address
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2281
    const Register to          = rdx;      // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2282
    const Register key         = rcx;      // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2283
    const Register keylen      = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2284
    const Address  from_param(rbp, 8+0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2285
    const Address  to_param  (rbp, 8+4);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2286
    const Address  key_param (rbp, 8+8);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2287
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2288
    const XMMRegister xmm_result = xmm0;
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2289
    const XMMRegister xmm_key_shuf_mask = xmm1;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2290
    const XMMRegister xmm_temp1  = xmm2;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2291
    const XMMRegister xmm_temp2  = xmm3;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2292
    const XMMRegister xmm_temp3  = xmm4;
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2293
    const XMMRegister xmm_temp4  = xmm5;
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2294
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2295
    __ enter(); // required for proper stackwalking of RuntimeStub frame
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2296
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2297
    // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2298
    // context for the registers used, where all instructions below are using 128-bit mode
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2299
    // On EVEX without VL and BW, these instructions will all be AVX.
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2300
    if (VM_Version::supports_avx512vlbw()) {
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2301
      __ movl(rdx, 0xffff);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2302
      __ kmovdl(k1, rdx);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2303
    }
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2304
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2305
    __ movptr(from, from_param);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2306
    __ movptr(key, key_param);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2307
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2308
    // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2309
    __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2310
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2311
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2312
    __ movdqu(xmm_result, Address(from, 0));
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2313
    __ movptr(to, to_param);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2314
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2315
    // for decryption java expanded key ordering is rotated one position from what we want
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2316
    // so we start from 0x10 here and hit 0x00 last
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2317
    // we don't know if the key is aligned, hence not using load-execute form
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2318
    load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2319
    load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2320
    load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2321
    load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2322
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2323
    __ pxor  (xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2324
    __ aesdec(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2325
    __ aesdec(xmm_result, xmm_temp3);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2326
    __ aesdec(xmm_result, xmm_temp4);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2327
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2328
    load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2329
    load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2330
    load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2331
    load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2332
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2333
    __ aesdec(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2334
    __ aesdec(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2335
    __ aesdec(xmm_result, xmm_temp3);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2336
    __ aesdec(xmm_result, xmm_temp4);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2337
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2338
    load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2339
    load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2340
    load_key(xmm_temp3, key, 0x00, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2341
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2342
    __ cmpl(keylen, 44);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2343
    __ jccb(Assembler::equal, L_doLast);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2344
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2345
    __ aesdec(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2346
    __ aesdec(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2347
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2348
    load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2349
    load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2350
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2351
    __ cmpl(keylen, 52);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2352
    __ jccb(Assembler::equal, L_doLast);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2353
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2354
    __ aesdec(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2355
    __ aesdec(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2356
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2357
    load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2358
    load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2359
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2360
    __ BIND(L_doLast);
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2361
    __ aesdec(xmm_result, xmm_temp1);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2362
    __ aesdec(xmm_result, xmm_temp2);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2363
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2364
    // for decryption the aesdeclast operation is always on key+0x00
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2365
    __ aesdeclast(xmm_result, xmm_temp3);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2366
    __ movdqu(Address(to, 0), xmm_result);  // store the result
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2367
    __ xorptr(rax, rax); // return 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2368
    __ leave(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2369
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2370
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2371
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2372
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2373
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2374
  void handleSOERegisters(bool saving) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2375
    const int saveFrameSizeInBytes = 4 * wordSize;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2376
    const Address saved_rbx     (rbp, -3 * wordSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2377
    const Address saved_rsi     (rbp, -2 * wordSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2378
    const Address saved_rdi     (rbp, -1 * wordSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2379
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2380
    if (saving) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2381
      __ subptr(rsp, saveFrameSizeInBytes);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2382
      __ movptr(saved_rsi, rsi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2383
      __ movptr(saved_rdi, rdi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2384
      __ movptr(saved_rbx, rbx);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2385
    } else {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2386
      // restoring
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2387
      __ movptr(rsi, saved_rsi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2388
      __ movptr(rdi, saved_rdi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2389
      __ movptr(rbx, saved_rbx);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2390
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2391
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2392
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2393
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2394
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2395
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2396
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2397
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2398
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2399
  //   c_rarg3   - r vector byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2400
  //   c_rarg4   - input length
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2401
  //
22505
4523090c9674 8002074: Support for AES on SPARC
kvn
parents: 19319
diff changeset
  2402
  // Output:
4523090c9674 8002074: Support for AES on SPARC
kvn
parents: 19319
diff changeset
  2403
  //   rax       - input length
4523090c9674 8002074: Support for AES on SPARC
kvn
parents: 19319
diff changeset
  2404
  //
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2405
  address generate_cipherBlockChaining_encryptAESCrypt() {
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2406
    assert(UseAES, "need AES instructions and misaligned SSE support");
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2407
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2408
    StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2409
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2410
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2411
    Label L_exit, L_key_192_256, L_key_256, L_loopTop_128, L_loopTop_192, L_loopTop_256;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2412
    const Register from        = rsi;      // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2413
    const Register to          = rdx;      // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2414
    const Register key         = rcx;      // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2415
    const Register rvec        = rdi;      // r byte array initialized from initvector array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2416
                                           // and left with the results of the last encryption block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2417
    const Register len_reg     = rbx;      // src len (must be multiple of blocksize 16)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2418
    const Register pos         = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2419
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2420
    // xmm register assignments for the loops below
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2421
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2422
    const XMMRegister xmm_temp   = xmm1;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2423
    // first 6 keys preloaded into xmm2-xmm7
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2424
    const int XMM_REG_NUM_KEY_FIRST = 2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2425
    const int XMM_REG_NUM_KEY_LAST  = 7;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2426
    const XMMRegister xmm_key0   = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2427
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2428
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2429
    handleSOERegisters(true /*saving*/);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2430
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2431
    // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2432
    // context for the registers used, where all instructions below are using 128-bit mode
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2433
    // On EVEX without VL and BW, these instructions will all be AVX.
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2434
    if (VM_Version::supports_avx512vlbw()) {
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2435
      __ movl(rdx, 0xffff);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2436
      __ kmovdl(k1, rdx);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2437
    }
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2438
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2439
    // load registers from incoming parameters
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2440
    const Address  from_param(rbp, 8+0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2441
    const Address  to_param  (rbp, 8+4);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2442
    const Address  key_param (rbp, 8+8);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2443
    const Address  rvec_param (rbp, 8+12);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2444
    const Address  len_param  (rbp, 8+16);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2445
    __ movptr(from , from_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2446
    __ movptr(to   , to_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2447
    __ movptr(key  , key_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2448
    __ movptr(rvec , rvec_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2449
    __ movptr(len_reg , len_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2450
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2451
    const XMMRegister xmm_key_shuf_mask = xmm_temp;  // used temporarily to swap key bytes up front
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2452
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2453
    // load up xmm regs 2 thru 7 with keys 0-5
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2454
    for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x00; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2455
      load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2456
      offset += 0x10;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2457
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2458
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2459
    __ movdqu(xmm_result, Address(rvec, 0x00));   // initialize xmm_result with r vec
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2460
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2461
    // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2462
    __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2463
    __ cmpl(rax, 44);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2464
    __ jcc(Assembler::notEqual, L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2465
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2466
    // 128 bit code follows here
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2467
    __ movl(pos, 0);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2468
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2469
    __ BIND(L_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2470
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2471
    __ pxor  (xmm_result, xmm_temp);                                // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2472
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2473
    __ pxor  (xmm_result, xmm_key0);                                // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2474
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2475
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2476
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2477
    for (int key_offset = 0x60; key_offset <= 0x90; key_offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2478
      aes_enc_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2479
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2480
    load_key(xmm_temp, key, 0xa0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2481
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2482
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2483
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2484
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2485
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2486
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2487
    __ jcc(Assembler::notEqual, L_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2488
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2489
    __ BIND(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2490
    __ movdqu(Address(rvec, 0), xmm_result);     // final value of r stored in rvec of CipherBlockChaining object
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2491
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2492
    handleSOERegisters(false /*restoring*/);
22505
4523090c9674 8002074: Support for AES on SPARC
kvn
parents: 19319
diff changeset
  2493
    __ movptr(rax, len_param); // return length
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2494
    __ leave();                                  // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2495
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2496
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2497
    __ BIND(L_key_192_256);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2498
    // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2499
    __ cmpl(rax, 52);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2500
    __ jcc(Assembler::notEqual, L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2501
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2502
    // 192-bit code follows here (could be changed to use more xmm registers)
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2503
    __ movl(pos, 0);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2504
    __ align(OptoLoopAlignment);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2505
    __ BIND(L_loopTop_192);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2506
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2507
    __ pxor  (xmm_result, xmm_temp);                                // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2508
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2509
    __ pxor  (xmm_result, xmm_key0);                                // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2510
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2511
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2512
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2513
    for (int key_offset = 0x60; key_offset <= 0xb0; key_offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2514
      aes_enc_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2515
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2516
    load_key(xmm_temp, key, 0xc0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2517
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2518
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2519
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);   // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2520
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2521
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2522
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2523
    __ jcc(Assembler::notEqual, L_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2524
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2525
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2526
    __ BIND(L_key_256);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2527
    // 256-bit code follows here (could be changed to use more xmm registers)
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2528
    __ movl(pos, 0);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2529
    __ align(OptoLoopAlignment);
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2530
    __ BIND(L_loopTop_256);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2531
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2532
    __ pxor  (xmm_result, xmm_temp);                                // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2533
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2534
    __ pxor  (xmm_result, xmm_key0);                                // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2535
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2536
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2537
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2538
    for (int key_offset = 0x60; key_offset <= 0xd0; key_offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2539
      aes_enc_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2540
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2541
    load_key(xmm_temp, key, 0xe0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2542
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2543
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2544
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);   // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2545
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2546
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2547
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2548
    __ jcc(Assembler::notEqual, L_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2549
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2550
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2551
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2552
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2553
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2554
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2555
  // CBC AES Decryption.
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2556
  // In 32-bit stub, because of lack of registers we do not try to parallelize 4 blocks at a time.
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2557
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2558
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2559
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2560
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2561
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2562
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2563
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2564
  //   c_rarg3   - r vector byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2565
  //   c_rarg4   - input length
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2566
  //
22505
4523090c9674 8002074: Support for AES on SPARC
kvn
parents: 19319
diff changeset
  2567
  // Output:
4523090c9674 8002074: Support for AES on SPARC
kvn
parents: 19319
diff changeset
  2568
  //   rax       - input length
4523090c9674 8002074: Support for AES on SPARC
kvn
parents: 19319
diff changeset
  2569
  //
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2570
36825
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2571
  address generate_cipherBlockChaining_decryptAESCrypt_Parallel() {
14834
f29c91f2f22b 8004835: Improve AES intrinsics on x86
kvn
parents: 14633
diff changeset
  2572
    assert(UseAES, "need AES instructions and misaligned SSE support");
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2573
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2574
    StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2575
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2576
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2577
    const Register from        = rsi;      // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2578
    const Register to          = rdx;      // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2579
    const Register key         = rcx;      // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2580
    const Register rvec        = rdi;      // r byte array initialized from initvector array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2581
                                           // and left with the results of the last encryption block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2582
    const Register len_reg     = rbx;      // src len (must be multiple of blocksize 16)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2583
    const Register pos         = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2584
36825
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2585
    const int PARALLEL_FACTOR = 4;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2586
    const int ROUNDS[3] = { 10, 12, 14 }; //aes rounds for key128, key192, key256
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2587
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2588
    Label L_exit;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2589
    Label L_singleBlock_loopTop[3]; //128, 192, 256
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2590
    Label L_multiBlock_loopTop[3]; //128, 192, 256
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2591
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2592
    const XMMRegister xmm_prev_block_cipher = xmm0; // holds cipher of previous block
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2593
    const XMMRegister xmm_key_shuf_mask = xmm1;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2594
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2595
    const XMMRegister xmm_key_tmp0 = xmm2;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2596
    const XMMRegister xmm_key_tmp1 = xmm3;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2597
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2598
    // registers holding the six results in the parallelized loop
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2599
    const XMMRegister xmm_result0 = xmm4;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2600
    const XMMRegister xmm_result1 = xmm5;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2601
    const XMMRegister xmm_result2 = xmm6;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2602
    const XMMRegister xmm_result3 = xmm7;
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2603
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2604
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2605
    handleSOERegisters(true /*saving*/);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2606
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2607
    // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2608
    // context for the registers used, where all instructions below are using 128-bit mode
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2609
    // On EVEX without VL and BW, these instructions will all be AVX.
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2610
    if (VM_Version::supports_avx512vlbw()) {
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2611
      __ movl(rdx, 0xffff);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2612
      __ kmovdl(k1, rdx);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2613
    }
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  2614
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2615
    // load registers from incoming parameters
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2616
    const Address  from_param(rbp, 8+0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2617
    const Address  to_param  (rbp, 8+4);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2618
    const Address  key_param (rbp, 8+8);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2619
    const Address  rvec_param (rbp, 8+12);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2620
    const Address  len_param  (rbp, 8+16);
36825
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2621
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2622
    __ movptr(from , from_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2623
    __ movptr(to   , to_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2624
    __ movptr(key  , key_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2625
    __ movptr(rvec , rvec_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2626
    __ movptr(len_reg , len_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2627
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2628
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
36825
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2629
    __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // initialize with initial rvec
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2630
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2631
    __ xorptr(pos, pos);
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2632
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2633
    // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
36825
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2634
    // rvec is reused
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2635
    __ movl(rvec, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2636
    __ cmpl(rvec, 52);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2637
    __ jcc(Assembler::equal, L_multiBlock_loopTop[1]);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2638
    __ cmpl(rvec, 60);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2639
    __ jcc(Assembler::equal, L_multiBlock_loopTop[2]);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2640
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2641
#define DoFour(opc, src_reg)           \
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2642
  __ opc(xmm_result0, src_reg);         \
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2643
  __ opc(xmm_result1, src_reg);         \
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2644
  __ opc(xmm_result2, src_reg);         \
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2645
  __ opc(xmm_result3, src_reg);         \
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2646
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2647
    for (int k = 0; k < 3; ++k) {
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2648
      __ align(OptoLoopAlignment);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2649
      __ BIND(L_multiBlock_loopTop[k]);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2650
      __ cmpptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // see if at least 4 blocks left
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2651
      __ jcc(Assembler::less, L_singleBlock_loopTop[k]);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2652
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2653
      __ movdqu(xmm_result0, Address(from, pos, Address::times_1, 0 * AESBlockSize)); // get next 4 blocks into xmmresult registers
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2654
      __ movdqu(xmm_result1, Address(from, pos, Address::times_1, 1 * AESBlockSize));
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2655
      __ movdqu(xmm_result2, Address(from, pos, Address::times_1, 2 * AESBlockSize));
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2656
      __ movdqu(xmm_result3, Address(from, pos, Address::times_1, 3 * AESBlockSize));
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2657
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2658
      // the java expanded key ordering is rotated one position from what we want
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2659
      // so we start from 0x10 here and hit 0x00 last
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2660
      load_key(xmm_key_tmp0, key, 0x10, xmm_key_shuf_mask);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2661
      DoFour(pxor, xmm_key_tmp0); //xor with first key
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2662
      // do the aes dec rounds
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2663
      for (int rnum = 1; rnum <= ROUNDS[k];) {
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2664
        //load two keys at a time
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2665
        //k1->0x20, ..., k9->0xa0, k10->0x00
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2666
        load_key(xmm_key_tmp1, key, (rnum + 1) * 0x10, xmm_key_shuf_mask);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2667
        load_key(xmm_key_tmp0, key, ((rnum + 2) % (ROUNDS[k] + 1)) * 0x10, xmm_key_shuf_mask); // hit 0x00 last!
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2668
        DoFour(aesdec, xmm_key_tmp1);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2669
        rnum++;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2670
        if (rnum != ROUNDS[k]) {
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2671
          DoFour(aesdec, xmm_key_tmp0);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2672
        }
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2673
        else {
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2674
          DoFour(aesdeclast, xmm_key_tmp0);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2675
        }
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2676
        rnum++;
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2677
      }
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2678
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2679
      // for each result, xor with the r vector of previous cipher block
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2680
      __ pxor(xmm_result0, xmm_prev_block_cipher);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2681
      __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 0 * AESBlockSize));
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2682
      __ pxor(xmm_result1, xmm_prev_block_cipher);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2683
      __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 1 * AESBlockSize));
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2684
      __ pxor(xmm_result2, xmm_prev_block_cipher);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2685
      __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 2 * AESBlockSize));
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2686
      __ pxor(xmm_result3, xmm_prev_block_cipher);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2687
      __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 3 * AESBlockSize)); // this will carry over to next set of blocks
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2688
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2689
            // store 4 results into the next 64 bytes of output
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2690
       __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2691
       __ movdqu(Address(to, pos, Address::times_1, 1 * AESBlockSize), xmm_result1);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2692
       __ movdqu(Address(to, pos, Address::times_1, 2 * AESBlockSize), xmm_result2);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2693
       __ movdqu(Address(to, pos, Address::times_1, 3 * AESBlockSize), xmm_result3);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2694
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2695
       __ addptr(pos, 4 * AESBlockSize);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2696
       __ subptr(len_reg, 4 * AESBlockSize);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2697
       __ jmp(L_multiBlock_loopTop[k]);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2698
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2699
       //singleBlock starts here
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2700
       __ align(OptoLoopAlignment);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2701
       __ BIND(L_singleBlock_loopTop[k]);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2702
       __ cmpptr(len_reg, 0); // any blocks left?
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2703
       __ jcc(Assembler::equal, L_exit);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2704
       __ movdqu(xmm_result0, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2705
       __ movdqa(xmm_result1, xmm_result0);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2706
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2707
       load_key(xmm_key_tmp0, key, 0x10, xmm_key_shuf_mask);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2708
       __ pxor(xmm_result0, xmm_key_tmp0);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2709
       // do the aes dec rounds
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2710
       for (int rnum = 1; rnum < ROUNDS[k]; rnum++) {
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2711
         // the java expanded key ordering is rotated one position from what we want
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2712
         load_key(xmm_key_tmp0, key, (rnum + 1) * 0x10, xmm_key_shuf_mask);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2713
         __ aesdec(xmm_result0, xmm_key_tmp0);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2714
       }
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2715
       load_key(xmm_key_tmp0, key, 0x00, xmm_key_shuf_mask);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2716
       __ aesdeclast(xmm_result0, xmm_key_tmp0);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2717
       __ pxor(xmm_result0, xmm_prev_block_cipher); // xor with the current r vector
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2718
       __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result0); // store into the next 16 bytes of output
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2719
       // no need to store r to memory until we exit
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2720
       __ movdqa(xmm_prev_block_cipher, xmm_result1); // set up next r vector with cipher input from this block
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2721
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2722
       __ addptr(pos, AESBlockSize);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2723
       __ subptr(len_reg, AESBlockSize);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2724
       __ jmp(L_singleBlock_loopTop[k]);
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2725
    }//for 128/192/256
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2726
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2727
    __ BIND(L_exit);
36825
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2728
    __ movptr(rvec, rvec_param);                        // restore this since reused earlier
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2729
    __ movdqu(Address(rvec, 0), xmm_prev_block_cipher); // final value of r stored in rvec of CipherBlockChaining object
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2730
    handleSOERegisters(false /*restoring*/);
36825
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2731
    __ movptr(rax, len_param);                          // return length
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  2732
    __ leave();                                         // required for proper stackwalking of RuntimeStub frame
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2733
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2734
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2735
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2736
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2737
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2738
  // CTR AES crypt.
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2739
  // In 32-bit stub, parallelize 4 blocks at a time
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2740
  // Arguments:
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2741
  //
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2742
  // Inputs:
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2743
  //   c_rarg0   - source byte array address
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2744
  //   c_rarg1   - destination byte array address
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2745
  //   c_rarg2   - K (key) in little endian int array
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2746
  //   c_rarg3   - counter vector byte array address
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2747
  //   c_rarg4   - input length
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2748
  //
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2749
  // Output:
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2750
  //   rax       - input length
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2751
  //
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2752
  address generate_counterMode_AESCrypt_Parallel() {
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2753
    assert(UseAES, "need AES instructions and misaligned SSE support");
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2754
    __ align(CodeEntryAlignment);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2755
    StubCodeMark mark(this, "StubRoutines", "counterMode_AESCrypt");
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2756
    address start = __ pc();
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2757
    const Register from        = rsi;      // source array address
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2758
    const Register to          = rdx;      // destination array address
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2759
    const Register key         = rcx;      // key array address
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2760
    const Register counter     = rdi;      // counter byte array initialized from initvector array address
35537
bed5e2dc57a1 8146581: Minor corrections to the patch submitted for earlier bug id - 8143925
kvn
parents: 35154
diff changeset
  2761
                                           // and updated with the incremented counter in the end
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2762
    const Register len_reg     = rbx;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2763
    const Register pos         = rax;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2764
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2765
    __ enter(); // required for proper stackwalking of RuntimeStub frame
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2766
    handleSOERegisters(true /*saving*/); // save rbx, rsi, rdi
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2767
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2768
    // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2769
    // context for the registers used, where all instructions below are using 128-bit mode
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2770
    // On EVEX without VL and BW, these instructions will all be AVX.
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2771
    if (VM_Version::supports_avx512vlbw()) {
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2772
      __ movl(rdx, 0xffff);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2773
      __ kmovdl(k1, rdx);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2774
    }
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2775
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2776
    // load registers from incoming parameters
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2777
    const Address  from_param(rbp, 8+0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2778
    const Address  to_param  (rbp, 8+4);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2779
    const Address  key_param (rbp, 8+8);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2780
    const Address  rvec_param (rbp, 8+12);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2781
    const Address  len_param  (rbp, 8+16);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2782
    const Address  saved_counter_param(rbp, 8 + 20);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2783
    const Address  used_addr_param(rbp, 8 + 24);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2784
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2785
    __ movptr(from , from_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2786
    __ movptr(to   , to_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2787
    __ movptr(len_reg , len_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2788
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2789
    // Use the partially used encrpyted counter from last invocation
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2790
    Label L_exit_preLoop, L_preLoop_start;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2791
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2792
    // Use the registers 'counter' and 'key' here in this preloop
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2793
    // to hold of last 2 params 'used' and 'saved_encCounter_start'
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2794
    Register used = counter;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2795
    Register saved_encCounter_start = key;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2796
    Register used_addr = saved_encCounter_start;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2797
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2798
    __ movptr(used_addr, used_addr_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2799
    __ movptr(used, Address(used_addr, 0));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2800
    __ movptr(saved_encCounter_start, saved_counter_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2801
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2802
    __ BIND(L_preLoop_start);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2803
    __ cmpptr(used, 16);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2804
    __ jcc(Assembler::aboveEqual, L_exit_preLoop);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2805
    __ cmpptr(len_reg, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2806
    __ jcc(Assembler::lessEqual, L_exit_preLoop);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2807
    __ movb(rax, Address(saved_encCounter_start, used));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2808
    __ xorb(rax, Address(from, 0));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2809
    __ movb(Address(to, 0), rax);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2810
    __ addptr(from, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2811
    __ addptr(to, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2812
    __ addptr(used, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2813
    __ subptr(len_reg, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2814
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2815
    __ jmp(L_preLoop_start);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2816
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2817
    __ BIND(L_exit_preLoop);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2818
    __ movptr(used_addr, used_addr_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2819
    __ movptr(used_addr, used_addr_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2820
    __ movl(Address(used_addr, 0), used);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2821
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2822
    // load the parameters 'key' and 'counter'
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2823
    __ movptr(key, key_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2824
    __ movptr(counter, rvec_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2825
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2826
    // xmm register assignments for the loops below
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2827
    const XMMRegister xmm_curr_counter      = xmm0;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2828
    const XMMRegister xmm_counter_shuf_mask = xmm1;  // need to be reloaded
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2829
    const XMMRegister xmm_key_shuf_mask     = xmm2;  // need to be reloaded
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2830
    const XMMRegister xmm_key               = xmm3;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2831
    const XMMRegister xmm_result0           = xmm4;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2832
    const XMMRegister xmm_result1           = xmm5;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2833
    const XMMRegister xmm_result2           = xmm6;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2834
    const XMMRegister xmm_result3           = xmm7;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2835
    const XMMRegister xmm_from0             = xmm1;   //reuse XMM register
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2836
    const XMMRegister xmm_from1             = xmm2;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2837
    const XMMRegister xmm_from2             = xmm3;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2838
    const XMMRegister xmm_from3             = xmm4;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2839
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2840
    //for key_128, key_192, key_256
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2841
    const int rounds[3] = {10, 12, 14};
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2842
    Label L_singleBlockLoopTop[3];
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2843
    Label L_multiBlock_loopTop[3];
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2844
    Label L_key192_top, L_key256_top;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2845
    Label L_incCounter[3][4]; // 3: different key length,  4: 4 blocks at a time
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2846
    Label L_incCounter_single[3]; //for single block, key128, key192, key256
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2847
    Label L_processTail_insr[3], L_processTail_4_insr[3], L_processTail_2_insr[3], L_processTail_1_insr[3], L_processTail_exit_insr[3];
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2848
    Label L_processTail_extr[3], L_processTail_4_extr[3], L_processTail_2_extr[3], L_processTail_1_extr[3], L_processTail_exit_extr[3];
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2849
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2850
    Label L_exit;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2851
    const int PARALLEL_FACTOR = 4;  //because of the limited register number
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2852
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2853
    // initialize counter with initial counter
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2854
    __ movdqu(xmm_curr_counter, Address(counter, 0x00));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2855
    __ movdqu(xmm_counter_shuf_mask, ExternalAddress(StubRoutines::x86::counter_shuffle_mask_addr()));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2856
    __ pshufb(xmm_curr_counter, xmm_counter_shuf_mask); //counter is shuffled for increase
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2857
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2858
    // key length could be only {11, 13, 15} * 4 = {44, 52, 60}
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2859
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2860
    __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2861
    __ cmpl(rax, 52);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2862
    __ jcc(Assembler::equal, L_key192_top);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2863
    __ cmpl(rax, 60);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2864
    __ jcc(Assembler::equal, L_key256_top);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2865
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2866
    //key128 begins here
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2867
    __ movptr(pos, 0); // init pos before L_multiBlock_loopTop
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2868
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2869
#define CTR_DoFour(opc, src_reg)               \
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2870
    __ opc(xmm_result0, src_reg);              \
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2871
    __ opc(xmm_result1, src_reg);              \
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2872
    __ opc(xmm_result2, src_reg);              \
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2873
    __ opc(xmm_result3, src_reg);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2874
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2875
    // k == 0 :  generate code for key_128
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2876
    // k == 1 :  generate code for key_192
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2877
    // k == 2 :  generate code for key_256
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2878
    for (int k = 0; k < 3; ++k) {
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2879
      //multi blocks starts here
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2880
      __ align(OptoLoopAlignment);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2881
      __ BIND(L_multiBlock_loopTop[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2882
      __ cmpptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // see if at least PARALLEL_FACTOR blocks left
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2883
      __ jcc(Assembler::less, L_singleBlockLoopTop[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2884
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2885
      __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2886
      __ movdqu(xmm_counter_shuf_mask, ExternalAddress(StubRoutines::x86::counter_shuffle_mask_addr()));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2887
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2888
      //load, then increase counters
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2889
      CTR_DoFour(movdqa, xmm_curr_counter);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2890
      __ push(rbx);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2891
      inc_counter(rbx, xmm_result1, 0x01, L_incCounter[k][0]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2892
      inc_counter(rbx, xmm_result2, 0x02, L_incCounter[k][1]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2893
      inc_counter(rbx, xmm_result3, 0x03, L_incCounter[k][2]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2894
      inc_counter(rbx, xmm_curr_counter, 0x04, L_incCounter[k][3]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2895
      __ pop (rbx);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2896
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2897
      load_key(xmm_key, key, 0x00, xmm_key_shuf_mask); // load Round 0 key. interleaving for better performance
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2898
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2899
      CTR_DoFour(pshufb, xmm_counter_shuf_mask); // after increased, shuffled counters back for PXOR
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2900
      CTR_DoFour(pxor, xmm_key);   //PXOR with Round 0 key
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2901
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2902
      for (int i = 1; i < rounds[k]; ++i) {
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2903
        load_key(xmm_key, key, (0x10 * i), xmm_key_shuf_mask);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2904
        CTR_DoFour(aesenc, xmm_key);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2905
      }
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2906
      load_key(xmm_key, key, (0x10 * rounds[k]), xmm_key_shuf_mask);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2907
      CTR_DoFour(aesenclast, xmm_key);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2908
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2909
      // get next PARALLEL_FACTOR blocks into xmm_from registers
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2910
      __ movdqu(xmm_from0, Address(from, pos, Address::times_1, 0 * AESBlockSize));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2911
      __ movdqu(xmm_from1, Address(from, pos, Address::times_1, 1 * AESBlockSize));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2912
      __ movdqu(xmm_from2, Address(from, pos, Address::times_1, 2 * AESBlockSize));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2913
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2914
      // PXOR with input text
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2915
      __ pxor(xmm_result0, xmm_from0); //result0 is xmm4
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2916
      __ pxor(xmm_result1, xmm_from1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2917
      __ pxor(xmm_result2, xmm_from2);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2918
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2919
      // store PARALLEL_FACTOR results into the next 64 bytes of output
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2920
      __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2921
      __ movdqu(Address(to, pos, Address::times_1, 1 * AESBlockSize), xmm_result1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2922
      __ movdqu(Address(to, pos, Address::times_1, 2 * AESBlockSize), xmm_result2);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2923
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2924
      // do it here after xmm_result0 is saved, because xmm_from3 reuse the same register of xmm_result0.
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2925
      __ movdqu(xmm_from3, Address(from, pos, Address::times_1, 3 * AESBlockSize));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2926
      __ pxor(xmm_result3, xmm_from3);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2927
      __ movdqu(Address(to, pos, Address::times_1, 3 * AESBlockSize), xmm_result3);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2928
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2929
      __ addptr(pos, PARALLEL_FACTOR * AESBlockSize); // increase the length of crypt text
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2930
      __ subptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // decrease the remaining length
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2931
      __ jmp(L_multiBlock_loopTop[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2932
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2933
      // singleBlock starts here
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2934
      __ align(OptoLoopAlignment);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2935
      __ BIND(L_singleBlockLoopTop[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2936
      __ cmpptr(len_reg, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2937
      __ jcc(Assembler::equal, L_exit);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2938
      __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2939
      __ movdqu(xmm_counter_shuf_mask, ExternalAddress(StubRoutines::x86::counter_shuffle_mask_addr()));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2940
      __ movdqa(xmm_result0, xmm_curr_counter);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2941
      load_key(xmm_key, key, 0x00, xmm_key_shuf_mask);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2942
      __ push(rbx);//rbx is used for increasing counter
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2943
      inc_counter(rbx, xmm_curr_counter, 0x01, L_incCounter_single[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2944
      __ pop (rbx);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2945
      __ pshufb(xmm_result0, xmm_counter_shuf_mask);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2946
      __ pxor(xmm_result0, xmm_key);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2947
      for (int i = 1; i < rounds[k]; i++) {
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2948
        load_key(xmm_key, key, (0x10 * i), xmm_key_shuf_mask);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2949
        __ aesenc(xmm_result0, xmm_key);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2950
      }
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2951
      load_key(xmm_key, key, (0x10 * rounds[k]), xmm_key_shuf_mask);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2952
      __ aesenclast(xmm_result0, xmm_key);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2953
      __ cmpptr(len_reg, AESBlockSize);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2954
      __ jcc(Assembler::less, L_processTail_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2955
        __ movdqu(xmm_from0, Address(from, pos, Address::times_1, 0 * AESBlockSize));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2956
        __ pxor(xmm_result0, xmm_from0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2957
        __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2958
        __ addptr(pos, AESBlockSize);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2959
        __ subptr(len_reg, AESBlockSize);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2960
        __ jmp(L_singleBlockLoopTop[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2961
35537
bed5e2dc57a1 8146581: Minor corrections to the patch submitted for earlier bug id - 8143925
kvn
parents: 35154
diff changeset
  2962
      __ BIND(L_processTail_insr[k]);                                               // Process the tail part of the input array
bed5e2dc57a1 8146581: Minor corrections to the patch submitted for earlier bug id - 8143925
kvn
parents: 35154
diff changeset
  2963
        __ addptr(pos, len_reg);                                                    // 1. Insert bytes from src array into xmm_from0 register
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2964
        __ testptr(len_reg, 8);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2965
        __ jcc(Assembler::zero, L_processTail_4_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2966
          __ subptr(pos,8);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2967
          __ pinsrd(xmm_from0, Address(from, pos), 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2968
          __ pinsrd(xmm_from0, Address(from, pos, Address::times_1, 4), 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2969
        __ BIND(L_processTail_4_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2970
        __ testptr(len_reg, 4);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2971
        __ jcc(Assembler::zero, L_processTail_2_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2972
          __ subptr(pos,4);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2973
          __ pslldq(xmm_from0, 4);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2974
          __ pinsrd(xmm_from0, Address(from, pos), 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2975
        __ BIND(L_processTail_2_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2976
        __ testptr(len_reg, 2);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2977
        __ jcc(Assembler::zero, L_processTail_1_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2978
          __ subptr(pos, 2);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2979
          __ pslldq(xmm_from0, 2);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2980
          __ pinsrw(xmm_from0, Address(from, pos), 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2981
        __ BIND(L_processTail_1_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2982
        __ testptr(len_reg, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2983
        __ jcc(Assembler::zero, L_processTail_exit_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2984
          __ subptr(pos, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2985
          __ pslldq(xmm_from0, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2986
          __ pinsrb(xmm_from0, Address(from, pos), 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2987
        __ BIND(L_processTail_exit_insr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2988
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2989
        __ movptr(saved_encCounter_start, saved_counter_param);
35537
bed5e2dc57a1 8146581: Minor corrections to the patch submitted for earlier bug id - 8143925
kvn
parents: 35154
diff changeset
  2990
        __ movdqu(Address(saved_encCounter_start, 0), xmm_result0);               // 2. Perform pxor of the encrypted counter and plaintext Bytes.
bed5e2dc57a1 8146581: Minor corrections to the patch submitted for earlier bug id - 8143925
kvn
parents: 35154
diff changeset
  2991
        __ pxor(xmm_result0, xmm_from0);                                          //    Also the encrypted counter is saved for next invocation.
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2992
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2993
        __ testptr(len_reg, 8);
35537
bed5e2dc57a1 8146581: Minor corrections to the patch submitted for earlier bug id - 8143925
kvn
parents: 35154
diff changeset
  2994
        __ jcc(Assembler::zero, L_processTail_4_extr[k]);                        // 3. Extract bytes from xmm_result0 into the dest. array
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2995
          __ pextrd(Address(to, pos), xmm_result0, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2996
          __ pextrd(Address(to, pos, Address::times_1, 4), xmm_result0, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2997
          __ psrldq(xmm_result0, 8);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2998
          __ addptr(pos, 8);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  2999
        __ BIND(L_processTail_4_extr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3000
        __ testptr(len_reg, 4);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3001
        __ jcc(Assembler::zero, L_processTail_2_extr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3002
          __ pextrd(Address(to, pos), xmm_result0, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3003
          __ psrldq(xmm_result0, 4);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3004
          __ addptr(pos, 4);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3005
        __ BIND(L_processTail_2_extr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3006
        __ testptr(len_reg, 2);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3007
        __ jcc(Assembler::zero, L_processTail_1_extr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3008
          __ pextrb(Address(to, pos), xmm_result0, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3009
          __ pextrb(Address(to, pos, Address::times_1, 1), xmm_result0, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3010
          __ psrldq(xmm_result0, 2);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3011
          __ addptr(pos, 2);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3012
        __ BIND(L_processTail_1_extr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3013
        __ testptr(len_reg, 1);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3014
        __ jcc(Assembler::zero, L_processTail_exit_extr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3015
          __ pextrb(Address(to, pos), xmm_result0, 0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3016
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3017
        __ BIND(L_processTail_exit_extr[k]);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3018
        __ movptr(used_addr, used_addr_param);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3019
        __ movl(Address(used_addr, 0), len_reg);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3020
        __ jmp(L_exit);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3021
    }
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3022
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3023
    __ BIND(L_exit);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3024
    __ movdqu(xmm_counter_shuf_mask, ExternalAddress(StubRoutines::x86::counter_shuffle_mask_addr()));
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3025
    __ pshufb(xmm_curr_counter, xmm_counter_shuf_mask); //counter is shuffled back.
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3026
    __ movdqu(Address(counter, 0), xmm_curr_counter); //save counter back
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3027
    handleSOERegisters(false /*restoring*/);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3028
    __ movptr(rax, len_param); // return length
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3029
    __ leave();                // required for proper stackwalking of RuntimeStub frame
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3030
    __ ret(0);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3031
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3032
    __ BIND (L_key192_top);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3033
    __ movptr(pos, 0); // init pos before L_multiBlock_loopTop
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3034
    __ jmp(L_multiBlock_loopTop[1]); //key192
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3035
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3036
    __ BIND (L_key256_top);
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3037
    __ movptr(pos, 0); // init pos before L_multiBlock_loopTop
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3038
    __ jmp(L_multiBlock_loopTop[2]); //key192
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3039
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3040
    return start;
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3041
  }
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3042
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3043
  address generate_upper_word_mask() {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3044
    __ align(64);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3045
    StubCodeMark mark(this, "StubRoutines", "upper_word_mask");
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3046
    address start = __ pc();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3047
    __ emit_data(0x00000000, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3048
    __ emit_data(0x00000000, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3049
    __ emit_data(0x00000000, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3050
    __ emit_data(0xFFFFFFFF, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3051
    return start;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3052
  }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3053
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3054
  address generate_shuffle_byte_flip_mask() {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3055
    __ align(64);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3056
    StubCodeMark mark(this, "StubRoutines", "shuffle_byte_flip_mask");
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3057
    address start = __ pc();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3058
    __ emit_data(0x0c0d0e0f, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3059
    __ emit_data(0x08090a0b, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3060
    __ emit_data(0x04050607, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3061
    __ emit_data(0x00010203, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3062
    return start;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3063
  }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3064
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3065
  // ofs and limit are use for multi-block byte array.
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3066
  // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3067
  address generate_sha1_implCompress(bool multi_block, const char *name) {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3068
    __ align(CodeEntryAlignment);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3069
    StubCodeMark mark(this, "StubRoutines", name);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3070
    address start = __ pc();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3071
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3072
    Register buf   = rax;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3073
    Register state = rdx;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3074
    Register ofs   = rcx;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3075
    Register limit = rdi;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3076
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3077
    const Address  buf_param(rbp, 8 + 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3078
    const Address  state_param(rbp, 8 + 4);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3079
    const Address  ofs_param(rbp, 8 + 8);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3080
    const Address  limit_param(rbp, 8 + 12);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3081
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3082
    const XMMRegister abcd = xmm0;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3083
    const XMMRegister e0 = xmm1;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3084
    const XMMRegister e1 = xmm2;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3085
    const XMMRegister msg0 = xmm3;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3086
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3087
    const XMMRegister msg1 = xmm4;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3088
    const XMMRegister msg2 = xmm5;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3089
    const XMMRegister msg3 = xmm6;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3090
    const XMMRegister shuf_mask = xmm7;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3091
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3092
    __ enter();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3093
    __ subptr(rsp, 8 * wordSize);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3094
    if (multi_block) {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3095
      __ push(limit);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3096
    }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3097
    __ movptr(buf, buf_param);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3098
    __ movptr(state, state_param);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3099
    if (multi_block) {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3100
      __ movptr(ofs, ofs_param);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3101
      __ movptr(limit, limit_param);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3102
    }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3103
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3104
    __ fast_sha1(abcd, e0, e1, msg0, msg1, msg2, msg3, shuf_mask,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3105
      buf, state, ofs, limit, rsp, multi_block);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3106
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3107
    if (multi_block) {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3108
      __ pop(limit);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3109
    }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3110
    __ addptr(rsp, 8 * wordSize);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3111
    __ leave();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3112
    __ ret(0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3113
    return start;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3114
  }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3115
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3116
  address generate_pshuffle_byte_flip_mask() {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3117
    __ align(64);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3118
    StubCodeMark mark(this, "StubRoutines", "pshuffle_byte_flip_mask");
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3119
    address start = __ pc();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3120
    __ emit_data(0x00010203, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3121
    __ emit_data(0x04050607, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3122
    __ emit_data(0x08090a0b, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3123
    __ emit_data(0x0c0d0e0f, relocInfo::none, 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3124
    return start;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3125
  }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3126
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3127
  // ofs and limit are use for multi-block byte array.
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3128
  // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3129
 address generate_sha256_implCompress(bool multi_block, const char *name) {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3130
    __ align(CodeEntryAlignment);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3131
    StubCodeMark mark(this, "StubRoutines", name);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3132
    address start = __ pc();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3133
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3134
    Register buf = rbx;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3135
    Register state = rsi;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3136
    Register ofs = rdx;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3137
    Register limit = rcx;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3138
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3139
    const Address  buf_param(rbp, 8 + 0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3140
    const Address  state_param(rbp, 8 + 4);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3141
    const Address  ofs_param(rbp, 8 + 8);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3142
    const Address  limit_param(rbp, 8 + 12);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3143
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3144
    const XMMRegister msg = xmm0;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3145
    const XMMRegister state0 = xmm1;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3146
    const XMMRegister state1 = xmm2;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3147
    const XMMRegister msgtmp0 = xmm3;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3148
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3149
    const XMMRegister msgtmp1 = xmm4;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3150
    const XMMRegister msgtmp2 = xmm5;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3151
    const XMMRegister msgtmp3 = xmm6;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3152
    const XMMRegister msgtmp4 = xmm7;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3153
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3154
    __ enter();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3155
    __ subptr(rsp, 8 * wordSize);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3156
    handleSOERegisters(true /*saving*/);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3157
    __ movptr(buf, buf_param);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3158
    __ movptr(state, state_param);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3159
    if (multi_block) {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3160
     __ movptr(ofs, ofs_param);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3161
     __ movptr(limit, limit_param);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3162
    }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3163
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3164
    __ fast_sha256(msg, state0, state1, msgtmp0, msgtmp1, msgtmp2, msgtmp3, msgtmp4,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3165
      buf, state, ofs, limit, rsp, multi_block);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3166
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3167
    handleSOERegisters(false);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3168
    __ addptr(rsp, 8 * wordSize);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3169
    __ leave();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3170
    __ ret(0);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3171
    return start;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3172
  }
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3173
31404
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3174
  // byte swap x86 long
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3175
  address generate_ghash_long_swap_mask() {
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3176
    __ align(CodeEntryAlignment);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3177
    StubCodeMark mark(this, "StubRoutines", "ghash_long_swap_mask");
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3178
    address start = __ pc();
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3179
    __ emit_data(0x0b0a0908, relocInfo::none, 0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3180
    __ emit_data(0x0f0e0d0c, relocInfo::none, 0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3181
    __ emit_data(0x03020100, relocInfo::none, 0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3182
    __ emit_data(0x07060504, relocInfo::none, 0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3183
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3184
  return start;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3185
  }
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3186
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3187
  // byte swap x86 byte array
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3188
  address generate_ghash_byte_swap_mask() {
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3189
    __ align(CodeEntryAlignment);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3190
    StubCodeMark mark(this, "StubRoutines", "ghash_byte_swap_mask");
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3191
    address start = __ pc();
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3192
    __ emit_data(0x0c0d0e0f, relocInfo::none, 0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3193
    __ emit_data(0x08090a0b, relocInfo::none, 0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3194
    __ emit_data(0x04050607, relocInfo::none, 0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3195
    __ emit_data(0x00010203, relocInfo::none, 0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3196
  return start;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3197
  }
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3198
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3199
  /* Single and multi-block ghash operations */
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3200
  address generate_ghash_processBlocks() {
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3201
    assert(UseGHASHIntrinsics, "need GHASH intrinsics and CLMUL support");
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3202
    __ align(CodeEntryAlignment);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3203
    Label L_ghash_loop, L_exit;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3204
    StubCodeMark mark(this, "StubRoutines", "ghash_processBlocks");
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3205
    address start = __ pc();
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3206
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3207
    const Register state        = rdi;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3208
    const Register subkeyH      = rsi;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3209
    const Register data         = rdx;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3210
    const Register blocks       = rcx;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3211
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3212
    const Address  state_param(rbp, 8+0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3213
    const Address  subkeyH_param(rbp, 8+4);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3214
    const Address  data_param(rbp, 8+8);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3215
    const Address  blocks_param(rbp, 8+12);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3216
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3217
    const XMMRegister xmm_temp0 = xmm0;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3218
    const XMMRegister xmm_temp1 = xmm1;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3219
    const XMMRegister xmm_temp2 = xmm2;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3220
    const XMMRegister xmm_temp3 = xmm3;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3221
    const XMMRegister xmm_temp4 = xmm4;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3222
    const XMMRegister xmm_temp5 = xmm5;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3223
    const XMMRegister xmm_temp6 = xmm6;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3224
    const XMMRegister xmm_temp7 = xmm7;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3225
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3226
    __ enter();
31771
c9f593020799 8130341: GHASH 32bit intrinsics has AEADBadTagException
ascarpino
parents: 31404
diff changeset
  3227
    handleSOERegisters(true);  // Save registers
31404
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3228
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  3229
    // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  3230
    // context for the registers used, where all instructions below are using 128-bit mode
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  3231
    // On EVEX without VL and BW, these instructions will all be AVX.
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  3232
    if (VM_Version::supports_avx512vlbw()) {
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  3233
      __ movl(rdx, 0xffff);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  3234
      __ kmovdl(k1, rdx);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  3235
    }
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32596
diff changeset
  3236
31404
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3237
    __ movptr(state, state_param);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3238
    __ movptr(subkeyH, subkeyH_param);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3239
    __ movptr(data, data_param);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3240
    __ movptr(blocks, blocks_param);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3241
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3242
    __ movdqu(xmm_temp0, Address(state, 0));
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3243
    __ pshufb(xmm_temp0, ExternalAddress(StubRoutines::x86::ghash_long_swap_mask_addr()));
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3244
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3245
    __ movdqu(xmm_temp1, Address(subkeyH, 0));
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3246
    __ pshufb(xmm_temp1, ExternalAddress(StubRoutines::x86::ghash_long_swap_mask_addr()));
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3247
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3248
    __ BIND(L_ghash_loop);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3249
    __ movdqu(xmm_temp2, Address(data, 0));
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3250
    __ pshufb(xmm_temp2, ExternalAddress(StubRoutines::x86::ghash_byte_swap_mask_addr()));
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3251
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3252
    __ pxor(xmm_temp0, xmm_temp2);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3253
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3254
    //
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3255
    // Multiply with the hash key
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3256
    //
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3257
    __ movdqu(xmm_temp3, xmm_temp0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3258
    __ pclmulqdq(xmm_temp3, xmm_temp1, 0);      // xmm3 holds a0*b0
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3259
    __ movdqu(xmm_temp4, xmm_temp0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3260
    __ pclmulqdq(xmm_temp4, xmm_temp1, 16);     // xmm4 holds a0*b1
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3261
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3262
    __ movdqu(xmm_temp5, xmm_temp0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3263
    __ pclmulqdq(xmm_temp5, xmm_temp1, 1);      // xmm5 holds a1*b0
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3264
    __ movdqu(xmm_temp6, xmm_temp0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3265
    __ pclmulqdq(xmm_temp6, xmm_temp1, 17);     // xmm6 holds a1*b1
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3266
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3267
    __ pxor(xmm_temp4, xmm_temp5);      // xmm4 holds a0*b1 + a1*b0
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3268
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3269
    __ movdqu(xmm_temp5, xmm_temp4);    // move the contents of xmm4 to xmm5
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3270
    __ psrldq(xmm_temp4, 8);    // shift by xmm4 64 bits to the right
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3271
    __ pslldq(xmm_temp5, 8);    // shift by xmm5 64 bits to the left
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3272
    __ pxor(xmm_temp3, xmm_temp5);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3273
    __ pxor(xmm_temp6, xmm_temp4);      // Register pair <xmm6:xmm3> holds the result
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3274
                                        // of the carry-less multiplication of
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3275
                                        // xmm0 by xmm1.
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3276
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3277
    // We shift the result of the multiplication by one bit position
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3278
    // to the left to cope for the fact that the bits are reversed.
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3279
    __ movdqu(xmm_temp7, xmm_temp3);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3280
    __ movdqu(xmm_temp4, xmm_temp6);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3281
    __ pslld (xmm_temp3, 1);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3282
    __ pslld(xmm_temp6, 1);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3283
    __ psrld(xmm_temp7, 31);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3284
    __ psrld(xmm_temp4, 31);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3285
    __ movdqu(xmm_temp5, xmm_temp7);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3286
    __ pslldq(xmm_temp4, 4);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3287
    __ pslldq(xmm_temp7, 4);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3288
    __ psrldq(xmm_temp5, 12);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3289
    __ por(xmm_temp3, xmm_temp7);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3290
    __ por(xmm_temp6, xmm_temp4);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3291
    __ por(xmm_temp6, xmm_temp5);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3292
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3293
    //
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3294
    // First phase of the reduction
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3295
    //
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3296
    // Move xmm3 into xmm4, xmm5, xmm7 in order to perform the shifts
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3297
    // independently.
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3298
    __ movdqu(xmm_temp7, xmm_temp3);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3299
    __ movdqu(xmm_temp4, xmm_temp3);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3300
    __ movdqu(xmm_temp5, xmm_temp3);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3301
    __ pslld(xmm_temp7, 31);    // packed right shift shifting << 31
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3302
    __ pslld(xmm_temp4, 30);    // packed right shift shifting << 30
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3303
    __ pslld(xmm_temp5, 25);    // packed right shift shifting << 25
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3304
    __ pxor(xmm_temp7, xmm_temp4);      // xor the shifted versions
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3305
    __ pxor(xmm_temp7, xmm_temp5);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3306
    __ movdqu(xmm_temp4, xmm_temp7);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3307
    __ pslldq(xmm_temp7, 12);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3308
    __ psrldq(xmm_temp4, 4);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3309
    __ pxor(xmm_temp3, xmm_temp7);      // first phase of the reduction complete
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3310
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3311
    //
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3312
    // Second phase of the reduction
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3313
    //
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3314
    // Make 3 copies of xmm3 in xmm2, xmm5, xmm7 for doing these
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3315
    // shift operations.
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3316
    __ movdqu(xmm_temp2, xmm_temp3);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3317
    __ movdqu(xmm_temp7, xmm_temp3);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3318
    __ movdqu(xmm_temp5, xmm_temp3);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3319
    __ psrld(xmm_temp2, 1);     // packed left shifting >> 1
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3320
    __ psrld(xmm_temp7, 2);     // packed left shifting >> 2
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3321
    __ psrld(xmm_temp5, 7);     // packed left shifting >> 7
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3322
    __ pxor(xmm_temp2, xmm_temp7);      // xor the shifted versions
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3323
    __ pxor(xmm_temp2, xmm_temp5);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3324
    __ pxor(xmm_temp2, xmm_temp4);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3325
    __ pxor(xmm_temp3, xmm_temp2);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3326
    __ pxor(xmm_temp6, xmm_temp3);      // the result is in xmm6
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3327
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3328
    __ decrement(blocks);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3329
    __ jcc(Assembler::zero, L_exit);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3330
    __ movdqu(xmm_temp0, xmm_temp6);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3331
    __ addptr(data, 16);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3332
    __ jmp(L_ghash_loop);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3333
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3334
    __ BIND(L_exit);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3335
       // Byte swap 16-byte result
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3336
    __ pshufb(xmm_temp6, ExternalAddress(StubRoutines::x86::ghash_long_swap_mask_addr()));
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3337
    __ movdqu(Address(state, 0), xmm_temp6);   // store the result
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3338
31771
c9f593020799 8130341: GHASH 32bit intrinsics has AEADBadTagException
ascarpino
parents: 31404
diff changeset
  3339
    handleSOERegisters(false);  // restore registers
31404
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3340
    __ leave();
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3341
    __ ret(0);
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3342
    return start;
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3343
  }
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3344
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3345
  /**
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3346
   *  Arguments:
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3347
   *
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3348
   * Inputs:
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3349
   *   rsp(4)   - int crc
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3350
   *   rsp(8)   - byte* buf
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3351
   *   rsp(12)  - int length
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3352
   *
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3353
   * Ouput:
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3354
   *       rax   - int crc result
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3355
   */
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3356
  address generate_updateBytesCRC32() {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3357
    assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3358
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3359
    __ align(CodeEntryAlignment);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3360
    StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3361
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3362
    address start = __ pc();
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3363
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3364
    const Register crc   = rdx;  // crc
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3365
    const Register buf   = rsi;  // source java byte array address
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3366
    const Register len   = rcx;  // length
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3367
    const Register table = rdi;  // crc_table address (reuse register)
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3368
    const Register tmp   = rbx;
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3369
    assert_different_registers(crc, buf, len, table, tmp, rax);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3370
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3371
    BLOCK_COMMENT("Entry:");
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3372
    __ enter(); // required for proper stackwalking of RuntimeStub frame
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3373
    __ push(rsi);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3374
    __ push(rdi);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3375
    __ push(rbx);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3376
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3377
    Address crc_arg(rbp, 8 + 0);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3378
    Address buf_arg(rbp, 8 + 4);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3379
    Address len_arg(rbp, 8 + 8);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3380
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3381
    // Load up:
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3382
    __ movl(crc,   crc_arg);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3383
    __ movptr(buf, buf_arg);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3384
    __ movl(len,   len_arg);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3385
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3386
    __ kernel_crc32(crc, buf, len, table, tmp);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3387
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3388
    __ movl(rax, crc);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3389
    __ pop(rbx);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3390
    __ pop(rdi);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3391
    __ pop(rsi);
46440
61025eecb743 8178811: Minimize the AVX <-> SSE transition penalty through generation of vzeroupper instruction on x86
vdeshpande
parents: 42618
diff changeset
  3392
    __ vzeroupper();
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3393
    __ leave(); // required for proper stackwalking of RuntimeStub frame
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3394
    __ ret(0);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3395
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3396
    return start;
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3397
  }
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3398
33066
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3399
  /**
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3400
  *  Arguments:
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3401
  *
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3402
  * Inputs:
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3403
  *   rsp(4)   - int crc
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3404
  *   rsp(8)   - byte* buf
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3405
  *   rsp(12)  - int length
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3406
  *   rsp(16)  - table_start - optional (present only when doing a library_calll,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3407
  *              not used by x86 algorithm)
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3408
  *
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3409
  * Ouput:
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3410
  *       rax  - int crc result
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3411
  */
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3412
  address generate_updateBytesCRC32C(bool is_pclmulqdq_supported) {
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3413
    assert(UseCRC32CIntrinsics, "need SSE4_2");
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3414
    __ align(CodeEntryAlignment);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3415
    StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32C");
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3416
    address start = __ pc();
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3417
    const Register crc = rax;  // crc
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3418
    const Register buf = rcx;  // source java byte array address
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3419
    const Register len = rdx;  // length
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3420
    const Register d = rbx;
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3421
    const Register g = rsi;
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3422
    const Register h = rdi;
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3423
    const Register empty = 0; // will never be used, in order not
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3424
                              // to change a signature for crc32c_IPL_Alg2_Alt2
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3425
                              // between 64/32 I'm just keeping it here
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3426
    assert_different_registers(crc, buf, len, d, g, h);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3427
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3428
    BLOCK_COMMENT("Entry:");
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3429
    __ enter(); // required for proper stackwalking of RuntimeStub frame
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3430
    Address crc_arg(rsp, 4 + 4 + 0); // ESP+4 +
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3431
                                     // we need to add additional 4 because __ enter
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3432
                                     // have just pushed ebp on a stack
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3433
    Address buf_arg(rsp, 4 + 4 + 4);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3434
    Address len_arg(rsp, 4 + 4 + 8);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3435
      // Load up:
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3436
      __ movl(crc, crc_arg);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3437
      __ movl(buf, buf_arg);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3438
      __ movl(len, len_arg);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3439
      __ push(d);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3440
      __ push(g);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3441
      __ push(h);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3442
      __ crc32c_ipl_alg2_alt2(crc, buf, len,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3443
                              d, g, h,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3444
                              empty, empty, empty,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3445
                              xmm0, xmm1, xmm2,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3446
                              is_pclmulqdq_supported);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3447
      __ pop(h);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3448
      __ pop(g);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3449
      __ pop(d);
46440
61025eecb743 8178811: Minimize the AVX <-> SSE transition penalty through generation of vzeroupper instruction on x86
vdeshpande
parents: 42618
diff changeset
  3450
    __ vzeroupper();
33066
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3451
    __ leave(); // required for proper stackwalking of RuntimeStub frame
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3452
    __ ret(0);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3453
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3454
    return start;
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3455
  }
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3456
33089
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3457
 address generate_libmExp() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3458
    StubCodeMark mark(this, "StubRoutines", "libmExp");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3459
33089
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3460
    address start = __ pc();
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3461
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3462
    const XMMRegister x0  = xmm0;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3463
    const XMMRegister x1  = xmm1;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3464
    const XMMRegister x2  = xmm2;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3465
    const XMMRegister x3  = xmm3;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3466
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3467
    const XMMRegister x4  = xmm4;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3468
    const XMMRegister x5  = xmm5;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3469
    const XMMRegister x6  = xmm6;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3470
    const XMMRegister x7  = xmm7;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3471
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3472
    const Register tmp   = rbx;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3473
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3474
    BLOCK_COMMENT("Entry:");
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3475
    __ enter(); // required for proper stackwalking of RuntimeStub frame
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3476
    __ fast_exp(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3477
    __ leave(); // required for proper stackwalking of RuntimeStub frame
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3478
    __ ret(0);
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3479
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3480
    return start;
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3481
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3482
  }
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3483
33465
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3484
 address generate_libmLog() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3485
   StubCodeMark mark(this, "StubRoutines", "libmLog");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3486
33465
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3487
   address start = __ pc();
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3488
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3489
   const XMMRegister x0 = xmm0;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3490
   const XMMRegister x1 = xmm1;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3491
   const XMMRegister x2 = xmm2;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3492
   const XMMRegister x3 = xmm3;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3493
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3494
   const XMMRegister x4 = xmm4;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3495
   const XMMRegister x5 = xmm5;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3496
   const XMMRegister x6 = xmm6;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3497
   const XMMRegister x7 = xmm7;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3498
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3499
   const Register tmp = rbx;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3500
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3501
   BLOCK_COMMENT("Entry:");
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3502
   __ enter(); // required for proper stackwalking of RuntimeStub frame
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3503
   __ fast_log(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3504
   __ leave(); // required for proper stackwalking of RuntimeStub frame
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3505
   __ ret(0);
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3506
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3507
   return start;
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3508
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3509
 }
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3510
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3511
 address generate_libmLog10() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3512
   StubCodeMark mark(this, "StubRoutines", "libmLog10");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3513
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3514
   address start = __ pc();
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3515
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3516
   const XMMRegister x0 = xmm0;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3517
   const XMMRegister x1 = xmm1;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3518
   const XMMRegister x2 = xmm2;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3519
   const XMMRegister x3 = xmm3;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3520
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3521
   const XMMRegister x4 = xmm4;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3522
   const XMMRegister x5 = xmm5;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3523
   const XMMRegister x6 = xmm6;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3524
   const XMMRegister x7 = xmm7;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3525
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3526
   const Register tmp = rbx;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3527
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3528
   BLOCK_COMMENT("Entry:");
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3529
   __ enter(); // required for proper stackwalking of RuntimeStub frame
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3530
   __ fast_log10(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3531
   __ leave(); // required for proper stackwalking of RuntimeStub frame
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3532
   __ ret(0);
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3533
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3534
   return start;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3535
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3536
 }
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3537
35146
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3538
 address generate_libmPow() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3539
   StubCodeMark mark(this, "StubRoutines", "libmPow");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3540
35146
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3541
   address start = __ pc();
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3542
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3543
   const XMMRegister x0 = xmm0;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3544
   const XMMRegister x1 = xmm1;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3545
   const XMMRegister x2 = xmm2;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3546
   const XMMRegister x3 = xmm3;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3547
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3548
   const XMMRegister x4 = xmm4;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3549
   const XMMRegister x5 = xmm5;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3550
   const XMMRegister x6 = xmm6;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3551
   const XMMRegister x7 = xmm7;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3552
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3553
   const Register tmp = rbx;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3554
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3555
   BLOCK_COMMENT("Entry:");
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3556
   __ enter(); // required for proper stackwalking of RuntimeStub frame
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3557
   __ fast_pow(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3558
   __ leave(); // required for proper stackwalking of RuntimeStub frame
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3559
   __ ret(0);
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3560
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3561
   return start;
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3562
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  3563
 }
33465
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  3564
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3565
 address generate_libm_reduce_pi04l() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3566
   StubCodeMark mark(this, "StubRoutines", "libm_reduce_pi04l");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3567
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3568
   address start = __ pc();
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3569
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3570
   BLOCK_COMMENT("Entry:");
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3571
   __ libm_reduce_pi04l(rax, rcx, rdx, rbx, rsi, rdi, rbp, rsp);
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3572
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3573
   return start;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3574
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3575
 }
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3576
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3577
 address generate_libm_sin_cos_huge() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3578
   StubCodeMark mark(this, "StubRoutines", "libm_sin_cos_huge");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3579
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3580
   address start = __ pc();
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3581
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3582
   const XMMRegister x0 = xmm0;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3583
   const XMMRegister x1 = xmm1;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3584
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3585
   BLOCK_COMMENT("Entry:");
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3586
   __ libm_sincos_huge(x0, x1, rax, rcx, rdx, rbx, rsi, rdi, rbp, rsp);
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3587
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3588
   return start;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3589
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3590
 }
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3591
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3592
 address generate_libmSin() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3593
   StubCodeMark mark(this, "StubRoutines", "libmSin");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3594
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3595
   address start = __ pc();
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3596
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3597
   const XMMRegister x0 = xmm0;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3598
   const XMMRegister x1 = xmm1;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3599
   const XMMRegister x2 = xmm2;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3600
   const XMMRegister x3 = xmm3;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3601
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3602
   const XMMRegister x4 = xmm4;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3603
   const XMMRegister x5 = xmm5;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3604
   const XMMRegister x6 = xmm6;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3605
   const XMMRegister x7 = xmm7;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3606
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3607
   BLOCK_COMMENT("Entry:");
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3608
   __ enter(); // required for proper stackwalking of RuntimeStub frame
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3609
   __ fast_sin(x0, x1, x2, x3, x4, x5, x6, x7, rax, rbx, rdx);
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3610
   __ leave(); // required for proper stackwalking of RuntimeStub frame
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3611
   __ ret(0);
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3612
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3613
   return start;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3614
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3615
 }
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3616
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3617
 address generate_libmCos() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3618
   StubCodeMark mark(this, "StubRoutines", "libmCos");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3619
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3620
   address start = __ pc();
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3621
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3622
   const XMMRegister x0 = xmm0;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3623
   const XMMRegister x1 = xmm1;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3624
   const XMMRegister x2 = xmm2;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3625
   const XMMRegister x3 = xmm3;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3626
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3627
   const XMMRegister x4 = xmm4;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3628
   const XMMRegister x5 = xmm5;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3629
   const XMMRegister x6 = xmm6;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3630
   const XMMRegister x7 = xmm7;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3631
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3632
   const Register tmp = rbx;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3633
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3634
   BLOCK_COMMENT("Entry:");
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3635
   __ enter(); // required for proper stackwalking of RuntimeStub frame
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3636
   __ fast_cos(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3637
   __ leave(); // required for proper stackwalking of RuntimeStub frame
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3638
   __ ret(0);
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3639
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3640
   return start;
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3641
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35537
diff changeset
  3642
 }
33089
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3643
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3644
 address generate_libm_tan_cot_huge() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3645
   StubCodeMark mark(this, "StubRoutines", "libm_tan_cot_huge");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3646
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3647
   address start = __ pc();
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3648
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3649
   const XMMRegister x0 = xmm0;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3650
   const XMMRegister x1 = xmm1;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3651
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3652
   BLOCK_COMMENT("Entry:");
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3653
   __ libm_tancot_huge(x0, x1, rax, rcx, rdx, rbx, rsi, rdi, rbp, rsp);
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3654
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3655
   return start;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3656
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3657
 }
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3658
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3659
 address generate_libmTan() {
47810
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3660
   StubCodeMark mark(this, "StubRoutines", "libmTan");
083c15bfba35 8190887: Stub code marking missing from some x86 generated stub routines
psandoz
parents: 47216
diff changeset
  3661
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3662
   address start = __ pc();
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3663
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3664
   const XMMRegister x0 = xmm0;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3665
   const XMMRegister x1 = xmm1;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3666
   const XMMRegister x2 = xmm2;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3667
   const XMMRegister x3 = xmm3;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3668
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3669
   const XMMRegister x4 = xmm4;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3670
   const XMMRegister x5 = xmm5;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3671
   const XMMRegister x6 = xmm6;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3672
   const XMMRegister x7 = xmm7;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3673
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3674
   const Register tmp = rbx;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3675
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3676
   BLOCK_COMMENT("Entry:");
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3677
   __ enter(); // required for proper stackwalking of RuntimeStub frame
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3678
   __ fast_tan(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3679
   __ leave(); // required for proper stackwalking of RuntimeStub frame
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3680
   __ ret(0);
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3681
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3682
   return start;
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3683
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3684
 }
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 36825
diff changeset
  3685
18740
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3686
  // Safefetch stubs.
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3687
  void generate_safefetch(const char* name, int size, address* entry,
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3688
                          address* fault_pc, address* continuation_pc) {
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3689
    // safefetch signatures:
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3690
    //   int      SafeFetch32(int*      adr, int      errValue);
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3691
    //   intptr_t SafeFetchN (intptr_t* adr, intptr_t errValue);
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3692
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3693
    StubCodeMark mark(this, "StubRoutines", name);
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3694
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3695
    // Entry point, pc or function descriptor.
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3696
    *entry = __ pc();
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3697
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3698
    __ movl(rax, Address(rsp, 0x8));
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3699
    __ movl(rcx, Address(rsp, 0x4));
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3700
    // Load *adr into eax, may fault.
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3701
    *fault_pc = __ pc();
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3702
    switch (size) {
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3703
      case 4:
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3704
        // int32_t
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3705
        __ movl(rax, Address(rcx, 0));
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3706
        break;
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3707
      case 8:
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3708
        // int64_t
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3709
        Unimplemented();
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3710
        break;
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3711
      default:
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3712
        ShouldNotReachHere();
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3713
    }
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3714
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3715
    // Return errValue or *adr.
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3716
    *continuation_pc = __ pc();
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3717
    __ ret(0);
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3718
  }
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3719
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3720
 public:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3721
  // Information about frame layout at time of blocking runtime call.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3722
  // Note that we only have to preserve callee-saved registers since
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3723
  // the compilers are responsible for supplying a continuation point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3724
  // if they expect all registers to be preserved.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3725
  enum layout {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3726
    thread_off,    // last_java_sp
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3727
    arg1_off,
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3728
    arg2_off,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3729
    rbp_off,       // callee saved register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3730
    ret_pc,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3731
    framesize
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3732
  };
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3733
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3734
 private:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3735
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3736
#undef  __
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3737
#define __ masm->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3738
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3739
  //------------------------------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3740
  // Continuation point for throwing of implicit exceptions that are not handled in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3741
  // the current activation. Fabricates an exception oop and initiates normal
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3742
  // exception dispatching in this frame.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3743
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3744
  // Previously the compiler (c2) allowed for callee save registers on Java calls.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3745
  // This is no longer true after adapter frames were removed but could possibly
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3746
  // be brought back in the future if the interpreter code was reworked and it
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3747
  // was deemed worthwhile. The comment below was left to describe what must
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3748
  // happen here if callee saves were resurrected. As it stands now this stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3749
  // could actually be a vanilla BufferBlob and have now oopMap at all.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3750
  // Since it doesn't make much difference we've chosen to leave it the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3751
  // way it was in the callee save days and keep the comment.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3752
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3753
  // If we need to preserve callee-saved values we need a callee-saved oop map and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3754
  // therefore have to make these stubs into RuntimeStubs rather than BufferBlobs.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3755
  // If the compiler needs all registers to be preserved between the fault
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3756
  // point and the exception handler then it must assume responsibility for that in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3757
  // AbstractCompiler::continuation_for_implicit_null_exception or
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3758
  // continuation_for_implicit_division_by_zero_exception. All other implicit
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3759
  // exceptions (e.g., NullPointerException or AbstractMethodError on entry) are
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3760
  // either at call sites or otherwise assume that stack unwinding will be initiated,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3761
  // so caller saved registers were assumed volatile in the compiler.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3762
  address generate_throw_exception(const char* name, address runtime_entry,
10545
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  3763
                                   Register arg1 = noreg, Register arg2 = noreg) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3764
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3765
    int insts_size = 256;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3766
    int locs_size  = 32;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3767
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3768
    CodeBuffer code(name, insts_size, locs_size);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3769
    OopMapSet* oop_maps  = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3770
    MacroAssembler* masm = new MacroAssembler(&code);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3771
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3772
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3773
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3774
    // This is an inlined and slightly modified version of call_VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3775
    // which has the ability to fetch the return PC out of
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3776
    // thread-local storage and also sets up last_Java_sp slightly
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3777
    // differently than the real call_VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3778
    Register java_thread = rbx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3779
    __ get_thread(java_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3780
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3781
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3782
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3783
    // pc and rbp, already pushed
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3784
    __ subptr(rsp, (framesize-2) * wordSize); // prolog
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3785
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3786
    // Frame is now completed as far as size and linkage.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3787
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3788
    int frame_complete = __ pc() - start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3789
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3790
    // push java thread (becomes first argument of C function)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3791
    __ movptr(Address(rsp, thread_off * wordSize), java_thread);
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3792
    if (arg1 != noreg) {
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3793
      __ movptr(Address(rsp, arg1_off * wordSize), arg1);
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3794
    }
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3795
    if (arg2 != noreg) {
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3796
      assert(arg1 != noreg, "missing reg arg");
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3797
      __ movptr(Address(rsp, arg2_off * wordSize), arg2);
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3798
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3799
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3800
    // Set up last_Java_sp and last_Java_fp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3801
    __ set_last_Java_frame(java_thread, rsp, rbp, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3802
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3803
    // Call runtime
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3804
    BLOCK_COMMENT("call runtime_entry");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3805
    __ call(RuntimeAddress(runtime_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3806
    // Generate oop map
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3807
    OopMap* map =  new OopMap(framesize, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3808
    oop_maps->add_gc_map(__ pc() - start, map);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3809
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3810
    // restore the thread (cannot use the pushed argument since arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3811
    // may be overwritten by C code generated by an optimizing compiler);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3812
    // however can use the register value directly if it is callee saved.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3813
    __ get_thread(java_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3814
40644
39e631ed7145 8161598: Kitchensink fails: assert(nm->insts_contains(original_pc)) failed: original PC must be in nmethod/CompiledMethod
dlong
parents: 38699
diff changeset
  3815
    __ reset_last_Java_frame(java_thread, true);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3816
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3817
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3818
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3819
    // check for pending exceptions
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3820
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3821
    Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3822
    __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3823
    __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3824
    __ should_not_reach_here();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3825
    __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3826
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3827
    __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3828
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3829
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3830
    RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, framesize, oop_maps, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3831
    return stub->entry_point();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3832
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3833
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3834
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3835
  void create_control_words() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3836
    // Round to nearest, 53-bit mode, exceptions masked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3837
    StubRoutines::_fpu_cntrl_wrd_std   = 0x027F;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3838
    // Round to zero, 53-bit mode, exception mased
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3839
    StubRoutines::_fpu_cntrl_wrd_trunc = 0x0D7F;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3840
    // Round to nearest, 24-bit mode, exceptions masked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3841
    StubRoutines::_fpu_cntrl_wrd_24    = 0x007F;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3842
    // Round to nearest, 64-bit mode, exceptions masked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3843
    StubRoutines::_fpu_cntrl_wrd_64    = 0x037F;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3844
    // Round to nearest, 64-bit mode, exceptions masked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3845
    StubRoutines::_mxcsr_std           = 0x1F80;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3846
    // Note: the following two constants are 80-bit values
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3847
    //       layout is critical for correct loading by FPU.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3848
    // Bias for strict fp multiply/divide
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3849
    StubRoutines::_fpu_subnormal_bias1[0]= 0x00000000; // 2^(-15360) == 0x03ff 8000 0000 0000 0000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3850
    StubRoutines::_fpu_subnormal_bias1[1]= 0x80000000;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3851
    StubRoutines::_fpu_subnormal_bias1[2]= 0x03ff;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3852
    // Un-Bias for strict fp multiply/divide
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3853
    StubRoutines::_fpu_subnormal_bias2[0]= 0x00000000; // 2^(+15360) == 0x7bff 8000 0000 0000 0000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3854
    StubRoutines::_fpu_subnormal_bias2[1]= 0x80000000;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3855
    StubRoutines::_fpu_subnormal_bias2[2]= 0x7bff;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3856
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3857
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3858
  //---------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3859
  // Initialization
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3860
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3861
  void generate_initial() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3862
    // Generates all stubs and initializes the entry points
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3863
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3864
    //------------------------------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3865
    // entry points that exist in all platforms
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3866
    // Note: This is code that could be shared among different platforms - however the benefit seems to be smaller than
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3867
    //       the disadvantage of having a much more complicated generator structure. See also comment in stubRoutines.hpp.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3868
    StubRoutines::_forward_exception_entry      = generate_forward_exception();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3869
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3870
    StubRoutines::_call_stub_entry              =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3871
      generate_call_stub(StubRoutines::_call_stub_return_address);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3872
    // is referenced by megamorphic call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3873
    StubRoutines::_catch_exception_entry        = generate_catch_exception();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3874
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3875
    // These are currently used by Solaris/Intel
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3876
    StubRoutines::_atomic_xchg_entry            = generate_atomic_xchg();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3877
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3878
    // platform dependent
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3879
    create_control_words();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3880
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3881
    StubRoutines::x86::_verify_mxcsr_entry                 = generate_verify_mxcsr();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3882
    StubRoutines::x86::_verify_fpu_cntrl_wrd_entry         = generate_verify_fpu_cntrl_wrd();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3883
    StubRoutines::_d2i_wrapper                              = generate_d2i_wrapper(T_INT,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3884
                                                                                   CAST_FROM_FN_PTR(address, SharedRuntime::d2i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3885
    StubRoutines::_d2l_wrapper                              = generate_d2i_wrapper(T_LONG,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3886
                                                                                   CAST_FROM_FN_PTR(address, SharedRuntime::d2l));
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3887
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  3888
    // Build this early so it's available for the interpreter
35071
a0910b1d3e0d 8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents: 33465
diff changeset
  3889
    StubRoutines::_throw_StackOverflowError_entry          = generate_throw_exception("StackOverflowError throw_exception",
a0910b1d3e0d 8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents: 33465
diff changeset
  3890
                                                                                      CAST_FROM_FN_PTR(address, SharedRuntime::throw_StackOverflowError));
a0910b1d3e0d 8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents: 33465
diff changeset
  3891
    StubRoutines::_throw_delayed_StackOverflowError_entry  = generate_throw_exception("delayed StackOverflowError throw_exception",
a0910b1d3e0d 8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents: 33465
diff changeset
  3892
                                                                                      CAST_FROM_FN_PTR(address, SharedRuntime::throw_delayed_StackOverflowError));
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3893
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3894
    if (UseCRC32Intrinsics) {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3895
      // set table address before stub generation which use it
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3896
      StubRoutines::_crc_table_adr = (address)StubRoutines::x86::_crc_table;
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3897
      StubRoutines::_updateBytesCRC32 = generate_updateBytesCRC32();
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 18073
diff changeset
  3898
    }
33066
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3899
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3900
    if (UseCRC32CIntrinsics) {
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3901
      bool supports_clmul = VM_Version::supports_clmul();
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3902
      StubRoutines::x86::generate_CRC32C_table(supports_clmul);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3903
      StubRoutines::_crc32c_table_addr = (address)StubRoutines::x86::_crc32c_table;
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3904
      StubRoutines::_updateBytesCRC32C = generate_updateBytesCRC32C(supports_clmul);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  3905
    }
42618
08162de8f053 8170430: x86 pow() stub from Intel libm is inconsistent with pow() from fdlib
vdeshpande
parents: 40644
diff changeset
  3906
    if (VM_Version::supports_sse2() && UseLibmIntrinsic && InlineIntrinsics) {
38699
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3907
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin) ||
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3908
          vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dcos) ||
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3909
          vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dtan)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3910
        StubRoutines::x86::_L_2il0floatpacket_0_adr = (address)StubRoutines::x86::_L_2il0floatpacket_0;
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3911
        StubRoutines::x86::_Pi4Inv_adr = (address)StubRoutines::x86::_Pi4Inv;
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3912
        StubRoutines::x86::_Pi4x3_adr = (address)StubRoutines::x86::_Pi4x3;
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3913
        StubRoutines::x86::_Pi4x4_adr = (address)StubRoutines::x86::_Pi4x4;
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3914
        StubRoutines::x86::_ones_adr = (address)StubRoutines::x86::_ones;
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3915
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3916
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dexp)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3917
        StubRoutines::_dexp = generate_libmExp();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3918
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3919
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dlog)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3920
        StubRoutines::_dlog = generate_libmLog();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3921
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3922
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dlog10)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3923
        StubRoutines::_dlog10 = generate_libmLog10();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3924
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3925
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dpow)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3926
        StubRoutines::_dpow = generate_libmPow();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3927
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3928
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin) ||
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3929
        vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dcos) ||
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3930
        vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dtan)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3931
        StubRoutines::_dlibm_reduce_pi04l = generate_libm_reduce_pi04l();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3932
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3933
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin) ||
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3934
        vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dcos)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3935
        StubRoutines::_dlibm_sin_cos_huge = generate_libm_sin_cos_huge();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3936
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3937
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3938
        StubRoutines::_dsin = generate_libmSin();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3939
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3940
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dcos)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3941
        StubRoutines::_dcos = generate_libmCos();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3942
      }
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3943
      if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dtan)) {
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3944
        StubRoutines::_dlibm_tan_cot_huge = generate_libm_tan_cot_huge();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3945
        StubRoutines::_dtan = generate_libmTan();
f8bec5f6b09c 8154473: Update for CompilerDirectives to control stub generation and intrinsics
vdeshpande
parents: 38209
diff changeset
  3946
      }
33089
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  3947
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3948
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3949
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3950
  void generate_all() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3951
    // Generates all stubs and initializes the entry points
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3952
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3953
    // These entry points require SharedInfo::stack0 to be set up in non-core builds
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3954
    // and need to be relocatable, so they each fabricate a RuntimeStub internally.
10545
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  3955
    StubRoutines::_throw_AbstractMethodError_entry         = generate_throw_exception("AbstractMethodError throw_exception",          CAST_FROM_FN_PTR(address, SharedRuntime::throw_AbstractMethodError));
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  3956
    StubRoutines::_throw_IncompatibleClassChangeError_entry= generate_throw_exception("IncompatibleClassChangeError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_IncompatibleClassChangeError));
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  3957
    StubRoutines::_throw_NullPointerException_at_call_entry= generate_throw_exception("NullPointerException at call throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_NullPointerException_at_call));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3958
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3959
    //------------------------------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3960
    // entry points that are platform specific
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3961
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3962
    // support for verify_oop (must happen after universe_init)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3963
    StubRoutines::_verify_oop_subroutine_entry     = generate_verify_oop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3964
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3965
    // arraycopy stubs used by compilers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3966
    generate_arraycopy_stubs();
2534
08dac9ce0cd7 6655638: dynamic languages need method handles
jrose
parents: 2259
diff changeset
  3967
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3968
    // don't bother generating these AES intrinsic stubs unless global flag is set
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3969
    if (UseAESIntrinsics) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3970
      StubRoutines::x86::_key_shuffle_mask_addr = generate_key_shuffle_mask();  // might be needed by the others
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3971
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3972
      StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3973
      StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3974
      StubRoutines::_cipherBlockChaining_encryptAESCrypt = generate_cipherBlockChaining_encryptAESCrypt();
36825
6ebe5519b753 8152354: Update for x86 AES CBC Decryption
vdeshpande
parents: 36555
diff changeset
  3975
      StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptAESCrypt_Parallel();
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3976
    }
18740
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  3977
35154
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3978
    if (UseAESCTRIntrinsics) {
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3979
      StubRoutines::x86::_counter_shuffle_mask_addr = generate_counter_shuffle_mask();
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3980
      StubRoutines::_counterMode_AESCrypt = generate_counterMode_AESCrypt_Parallel();
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3981
    }
a9b3c1984a01 8143925: Enhancing CounterMode.crypt() for AES
kvn
parents: 35146
diff changeset
  3982
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3983
    if (UseSHA1Intrinsics) {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3984
      StubRoutines::x86::_upper_word_mask_addr = generate_upper_word_mask();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3985
      StubRoutines::x86::_shuffle_byte_flip_mask_addr = generate_shuffle_byte_flip_mask();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3986
      StubRoutines::_sha1_implCompress = generate_sha1_implCompress(false, "sha1_implCompress");
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3987
      StubRoutines::_sha1_implCompressMB = generate_sha1_implCompress(true, "sha1_implCompressMB");
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3988
    }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3989
    if (UseSHA256Intrinsics) {
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3990
      StubRoutines::x86::_k256_adr = (address)StubRoutines::x86::_k256;
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3991
      StubRoutines::x86::_pshuffle_byte_flip_mask_addr = generate_pshuffle_byte_flip_mask();
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3992
      StubRoutines::_sha256_implCompress = generate_sha256_implCompress(false, "sha256_implCompress");
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3993
      StubRoutines::_sha256_implCompressMB = generate_sha256_implCompress(true, "sha256_implCompressMB");
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3994
    }
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 35540
diff changeset
  3995
31404
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3996
    // Generate GHASH intrinsics code
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3997
    if (UseGHASHIntrinsics) {
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3998
      StubRoutines::x86::_ghash_long_swap_mask_addr = generate_ghash_long_swap_mask();
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  3999
      StubRoutines::x86::_ghash_byte_swap_mask_addr = generate_ghash_byte_swap_mask();
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  4000
      StubRoutines::_ghash_processBlocks = generate_ghash_processBlocks();
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  4001
    }
63e8fcd70bfc 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents: 30624
diff changeset
  4002
18740
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  4003
    // Safefetch stubs.
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  4004
    generate_safefetch("SafeFetch32", sizeof(int), &StubRoutines::_safefetch32_entry,
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  4005
                                                   &StubRoutines::_safefetch32_fault_pc,
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  4006
                                                   &StubRoutines::_safefetch32_continuation_pc);
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  4007
    StubRoutines::_safefetchN_entry           = StubRoutines::_safefetch32_entry;
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  4008
    StubRoutines::_safefetchN_fault_pc        = StubRoutines::_safefetch32_fault_pc;
db44b1599483 8016697: Use stubs to implement safefetch
goetz
parents: 18507
diff changeset
  4009
    StubRoutines::_safefetchN_continuation_pc = StubRoutines::_safefetch32_continuation_pc;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4010
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4011
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4012
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4013
 public:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4014
  StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4015
    if (all) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4016
      generate_all();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4017
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4018
      generate_initial();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4019
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4020
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4021
}; // end class declaration
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4022
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4023
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4024
void StubGenerator_generate(CodeBuffer* code, bool all) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4025
  StubGenerator g(code, all);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  4026
}