hotspot/src/cpu/x86/vm/stubGenerator_x86_32.cpp
author kvn
Wed, 24 Oct 2012 14:33:22 -0700
changeset 14132 3c1437abcefd
parent 13952 e3cf184080bc
child 14626 0cf4eccf130f
child 14583 d70ee55535f4
permissions -rw-r--r--
7184394: add intrinsics to use AES instructions Summary: Use new x86 AES instructions for AESCrypt. Reviewed-by: twisti, kvn, roland Contributed-by: tom.deneau@amd.com
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/*
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 * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "asm/assembler.hpp"
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#include "assembler_x86.inline.hpp"
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#include "interpreter/interpreter.hpp"
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#include "nativeInst_x86.hpp"
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#include "oops/instanceOop.hpp"
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#include "oops/method.hpp"
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#include "oops/objArrayKlass.hpp"
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#include "oops/oop.inline.hpp"
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#include "prims/methodHandles.hpp"
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#include "runtime/frame.inline.hpp"
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#include "runtime/handles.inline.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/stubCodeGenerator.hpp"
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#include "runtime/stubRoutines.hpp"
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#include "utilities/top.hpp"
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#ifdef TARGET_OS_FAMILY_linux
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# include "thread_linux.inline.hpp"
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#endif
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#ifdef TARGET_OS_FAMILY_solaris
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# include "thread_solaris.inline.hpp"
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#endif
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#ifdef TARGET_OS_FAMILY_windows
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# include "thread_windows.inline.hpp"
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#endif
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#ifdef TARGET_OS_FAMILY_bsd
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# include "thread_bsd.inline.hpp"
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#endif
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#ifdef COMPILER2
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#include "opto/runtime.hpp"
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#endif
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// Declaration and definition of StubGenerator (no .hpp file).
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// For a more detailed description of the stub routine structure
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// see the comment in stubRoutines.hpp
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#define __ _masm->
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#define a__ ((Assembler*)_masm)->
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#ifdef PRODUCT
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#define BLOCK_COMMENT(str) /* nothing */
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#else
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#define BLOCK_COMMENT(str) __ block_comment(str)
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#endif
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#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
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const int MXCSR_MASK  = 0xFFC0;  // Mask out any pending exceptions
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const int FPU_CNTRL_WRD_MASK = 0xFFFF;
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// -------------------------------------------------------------------------------------------------------------------------
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// Stub Code definitions
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static address handle_unsafe_access() {
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  JavaThread* thread = JavaThread::current();
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  address pc  = thread->saved_exception_pc();
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  // pc is the instruction which we must emulate
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  // doing a no-op is fine:  return garbage from the load
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  // therefore, compute npc
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  address npc = Assembler::locate_next_instruction(pc);
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  // request an async exception
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  thread->set_pending_unsafe_access_error();
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  // return address of next instruction to execute
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  return npc;
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}
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class StubGenerator: public StubCodeGenerator {
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 private:
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#ifdef PRODUCT
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#define inc_counter_np(counter) (0)
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#else
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  void inc_counter_np_(int& counter) {
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    __ incrementl(ExternalAddress((address)&counter));
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  }
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#define inc_counter_np(counter) \
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  BLOCK_COMMENT("inc_counter " #counter); \
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  inc_counter_np_(counter);
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#endif //PRODUCT
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  void inc_copy_counter_np(BasicType t) {
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#ifndef PRODUCT
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    switch (t) {
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    case T_BYTE:    inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); return;
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    case T_SHORT:   inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); return;
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    case T_INT:     inc_counter_np(SharedRuntime::_jint_array_copy_ctr); return;
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    case T_LONG:    inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); return;
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    case T_OBJECT:  inc_counter_np(SharedRuntime::_oop_array_copy_ctr); return;
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    }
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    ShouldNotReachHere();
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#endif //PRODUCT
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  }
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  //------------------------------------------------------------------------------------------------------------------------
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  // Call stubs are used to call Java from C
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  //
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  //    [ return_from_Java     ] <--- rsp
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  //    [ argument word n      ]
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  //      ...
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  // -N [ argument word 1      ]
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  // -7 [ Possible padding for stack alignment ]
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  // -6 [ Possible padding for stack alignment ]
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  // -5 [ Possible padding for stack alignment ]
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  // -4 [ mxcsr save           ] <--- rsp_after_call
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  // -3 [ saved rbx,            ]
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  // -2 [ saved rsi            ]
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  // -1 [ saved rdi            ]
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  //  0 [ saved rbp,            ] <--- rbp,
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  //  1 [ return address       ]
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  //  2 [ ptr. to call wrapper ]
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  //  3 [ result               ]
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  //  4 [ result_type          ]
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  //  5 [ method               ]
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  //  6 [ entry_point          ]
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  //  7 [ parameters           ]
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  //  8 [ parameter_size       ]
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  //  9 [ thread               ]
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  address generate_call_stub(address& return_address) {
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    StubCodeMark mark(this, "StubRoutines", "call_stub");
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    address start = __ pc();
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    // stub code parameters / addresses
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    assert(frame::entry_frame_call_wrapper_offset == 2, "adjust this code");
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    bool  sse_save = false;
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    const Address rsp_after_call(rbp, -4 * wordSize); // same as in generate_catch_exception()!
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    const int     locals_count_in_bytes  (4*wordSize);
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    const Address mxcsr_save    (rbp, -4 * wordSize);
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    const Address saved_rbx     (rbp, -3 * wordSize);
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    const Address saved_rsi     (rbp, -2 * wordSize);
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    const Address saved_rdi     (rbp, -1 * wordSize);
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    const Address result        (rbp,  3 * wordSize);
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    const Address result_type   (rbp,  4 * wordSize);
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    const Address method        (rbp,  5 * wordSize);
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    const Address entry_point   (rbp,  6 * wordSize);
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    const Address parameters    (rbp,  7 * wordSize);
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    const Address parameter_size(rbp,  8 * wordSize);
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    const Address thread        (rbp,  9 * wordSize); // same as in generate_catch_exception()!
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    sse_save =  UseSSE > 0;
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    // stub code
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    __ enter();
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    __ movptr(rcx, parameter_size);              // parameter counter
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    __ shlptr(rcx, Interpreter::logStackElementSize); // convert parameter count to bytes
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    __ addptr(rcx, locals_count_in_bytes);       // reserve space for register saves
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    __ subptr(rsp, rcx);
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    __ andptr(rsp, -(StackAlignmentInBytes));    // Align stack
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    // save rdi, rsi, & rbx, according to C calling conventions
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    __ movptr(saved_rdi, rdi);
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    __ movptr(saved_rsi, rsi);
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    __ movptr(saved_rbx, rbx);
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    // save and initialize %mxcsr
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    if (sse_save) {
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      Label skip_ldmx;
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      __ stmxcsr(mxcsr_save);
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      __ movl(rax, mxcsr_save);
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      __ andl(rax, MXCSR_MASK);    // Only check control and mask bits
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      ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
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      __ cmp32(rax, mxcsr_std);
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      __ jcc(Assembler::equal, skip_ldmx);
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      __ ldmxcsr(mxcsr_std);
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      __ bind(skip_ldmx);
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    }
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    // make sure the control word is correct.
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    __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
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#ifdef ASSERT
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    // make sure we have no pending exceptions
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    { Label L;
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      __ movptr(rcx, thread);
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      __ cmpptr(Address(rcx, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
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      __ jcc(Assembler::equal, L);
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      __ stop("StubRoutines::call_stub: entered with pending exception");
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      __ bind(L);
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    }
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#endif
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    // pass parameters if any
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    BLOCK_COMMENT("pass parameters if any");
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    Label parameters_done;
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    __ movl(rcx, parameter_size);  // parameter counter
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    __ testl(rcx, rcx);
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    __ jcc(Assembler::zero, parameters_done);
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    // parameter passing loop
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    Label loop;
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    // Copy Java parameters in reverse order (receiver last)
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    // Note that the argument order is inverted in the process
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    // source is rdx[rcx: N-1..0]
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    // dest   is rsp[rbx: 0..N-1]
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    __ movptr(rdx, parameters);          // parameter pointer
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    __ xorptr(rbx, rbx);
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    __ BIND(loop);
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    // get parameter
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    __ movptr(rax, Address(rdx, rcx, Interpreter::stackElementScale(), -wordSize));
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    __ movptr(Address(rsp, rbx, Interpreter::stackElementScale(),
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                    Interpreter::expr_offset_in_bytes(0)), rax);          // store parameter
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    __ increment(rbx);
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    __ decrement(rcx);
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    __ jcc(Assembler::notZero, loop);
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   234
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    // call Java function
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    __ BIND(parameters_done);
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    __ movptr(rbx, method);           // get Method*
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    __ movptr(rax, entry_point);      // get entry_point
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    __ mov(rsi, rsp);                 // set sender sp
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    BLOCK_COMMENT("call Java function");
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    __ call(rax);
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    BLOCK_COMMENT("call_stub_return_address:");
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    return_address = __ pc();
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#ifdef COMPILER2
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    {
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      Label L_skip;
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      if (UseSSE >= 2) {
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        __ verify_FPU(0, "call_stub_return");
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      } else {
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        for (int i = 1; i < 8; i++) {
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          __ ffree(i);
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        }
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        // UseSSE <= 1 so double result should be left on TOS
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        __ movl(rsi, result_type);
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        __ cmpl(rsi, T_DOUBLE);
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        __ jcc(Assembler::equal, L_skip);
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        if (UseSSE == 0) {
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          // UseSSE == 0 so float result should be left on TOS
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          __ cmpl(rsi, T_FLOAT);
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          __ jcc(Assembler::equal, L_skip);
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        }
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        __ ffree(0);
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      }
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      __ BIND(L_skip);
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    }
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#endif // COMPILER2
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    // store result depending on type
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    // (everything that is not T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
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    __ movptr(rdi, result);
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    Label is_long, is_float, is_double, exit;
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    __ movl(rsi, result_type);
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    __ cmpl(rsi, T_LONG);
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    __ jcc(Assembler::equal, is_long);
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    __ cmpl(rsi, T_FLOAT);
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    __ jcc(Assembler::equal, is_float);
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    __ cmpl(rsi, T_DOUBLE);
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    __ jcc(Assembler::equal, is_double);
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    // handle T_INT case
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    __ movl(Address(rdi, 0), rax);
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    __ BIND(exit);
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    // check that FPU stack is empty
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    __ verify_FPU(0, "generate_call_stub");
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    // pop parameters
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    __ lea(rsp, rsp_after_call);
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    // restore %mxcsr
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    if (sse_save) {
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      __ ldmxcsr(mxcsr_save);
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    }
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    // restore rdi, rsi and rbx,
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    __ movptr(rbx, saved_rbx);
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    __ movptr(rsi, saved_rsi);
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    __ movptr(rdi, saved_rdi);
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    __ addptr(rsp, 4*wordSize);
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    // return
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    __ pop(rbp);
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    __ ret(0);
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    // handle return types different from T_INT
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    __ BIND(is_long);
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    __ movl(Address(rdi, 0 * wordSize), rax);
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    __ movl(Address(rdi, 1 * wordSize), rdx);
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    __ jmp(exit);
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    __ BIND(is_float);
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    // interpreter uses xmm0 for return values
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    if (UseSSE >= 1) {
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      __ movflt(Address(rdi, 0), xmm0);
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    } else {
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      __ fstp_s(Address(rdi, 0));
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    }
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    __ jmp(exit);
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    __ BIND(is_double);
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    // interpreter uses xmm0 for return values
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    if (UseSSE >= 2) {
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      __ movdbl(Address(rdi, 0), xmm0);
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    } else {
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      __ fstp_d(Address(rdi, 0));
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    }
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    __ jmp(exit);
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    return start;
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  }
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  //------------------------------------------------------------------------------------------------------------------------
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  // Return point for a Java call if there's an exception thrown in Java code.
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  // The exception is caught and transformed into a pending exception stored in
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  // JavaThread that can be tested from within the VM.
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  //
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  // Note: Usually the parameters are removed by the callee. In case of an exception
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  //       crossing an activation frame boundary, that is not the case if the callee
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  //       is compiled code => need to setup the rsp.
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  //
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  // rax,: exception oop
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  address generate_catch_exception() {
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    StubCodeMark mark(this, "StubRoutines", "catch_exception");
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    const Address rsp_after_call(rbp, -4 * wordSize); // same as in generate_call_stub()!
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    const Address thread        (rbp,  9 * wordSize); // same as in generate_call_stub()!
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    address start = __ pc();
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   352
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    // get thread directly
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    __ movptr(rcx, thread);
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#ifdef ASSERT
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    // verify that threads correspond
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    { Label L;
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      __ get_thread(rbx);
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      __ cmpptr(rbx, rcx);
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parents:
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   360
      __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
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parents:
diff changeset
   361
      __ stop("StubRoutines::catch_exception: threads must correspond");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   362
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   363
    }
489c9b5090e2 Initial load
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parents:
diff changeset
   364
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   365
    // set pending exception
489c9b5090e2 Initial load
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parents:
diff changeset
   366
    __ verify_oop(rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
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parents: 957
diff changeset
   367
    __ movptr(Address(rcx, Thread::pending_exception_offset()), rax          );
1
489c9b5090e2 Initial load
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parents:
diff changeset
   368
    __ lea(Address(rcx, Thread::exception_file_offset   ()),
489c9b5090e2 Initial load
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parents:
diff changeset
   369
           ExternalAddress((address)__FILE__));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
    __ movl(Address(rcx, Thread::exception_line_offset   ()), __LINE__ );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
    // complete return to VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
   372
    assert(StubRoutines::_call_stub_return_address != NULL, "_call_stub_return_address must have been generated before");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   373
    __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   374
489c9b5090e2 Initial load
duke
parents:
diff changeset
   375
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   376
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   377
489c9b5090e2 Initial load
duke
parents:
diff changeset
   378
489c9b5090e2 Initial load
duke
parents:
diff changeset
   379
  //------------------------------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   380
  // Continuation point for runtime calls returning with a pending exception.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   381
  // The pending exception check happened in the runtime or native call stub.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   382
  // The pending exception in Thread is converted into a Java-level exception.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   383
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   384
  // Contract with Java-level exception handlers:
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   385
  // rax: exception
1
489c9b5090e2 Initial load
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parents:
diff changeset
   386
  // rdx: throwing pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
  // NOTE: At entry of this stub, exception-pc must be on stack !!
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
  address generate_forward_exception() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
    StubCodeMark mark(this, "StubRoutines", "forward exception");
489c9b5090e2 Initial load
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parents:
diff changeset
   392
    address start = __ pc();
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   393
    const Register thread = rcx;
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   394
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   395
    // other registers used in this stub
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   396
    const Register exception_oop = rax;
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   397
    const Register handler_addr  = rbx;
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   398
    const Register exception_pc  = rdx;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
489c9b5090e2 Initial load
duke
parents:
diff changeset
   400
    // Upon entry, the sp points to the return address returning into Java
489c9b5090e2 Initial load
duke
parents:
diff changeset
   401
    // (interpreted or compiled) code; i.e., the return address becomes the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   402
    // throwing pc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   403
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
    // Arguments pushed before the runtime call are still on the stack but
489c9b5090e2 Initial load
duke
parents:
diff changeset
   405
    // the exception handler will reset the stack pointer -> ignore them.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   406
    // A potential result in registers can be ignored as well.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   407
489c9b5090e2 Initial load
duke
parents:
diff changeset
   408
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   409
    // make sure this code is only executed if there is a pending exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
    { Label L;
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   411
      __ get_thread(thread);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   412
      __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
      __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
      __ stop("StubRoutines::forward exception: no pending exception (1)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   415
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   416
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   417
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
489c9b5090e2 Initial load
duke
parents:
diff changeset
   419
    // compute exception handler into rbx,
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   420
    __ get_thread(thread);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   421
    __ movptr(exception_pc, Address(rsp, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   422
    BLOCK_COMMENT("call exception_handler_for_return_address");
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   423
    __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   424
    __ mov(handler_addr, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   426
    // setup rax & rdx, remove return address & clear pending exception
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   427
    __ get_thread(thread);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   428
    __ pop(exception_pc);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   429
    __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   430
    __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   431
489c9b5090e2 Initial load
duke
parents:
diff changeset
   432
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   433
    // make sure exception is set
489c9b5090e2 Initial load
duke
parents:
diff changeset
   434
    { Label L;
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   435
      __ testptr(exception_oop, exception_oop);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   436
      __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   437
      __ stop("StubRoutines::forward exception: no pending exception (2)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   438
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   439
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   440
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   441
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   442
    // Verify that there is really a valid exception in RAX.
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   443
    __ verify_oop(exception_oop);
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   444
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   445
    // continue at exception handler (return address removed)
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   446
    // rax: exception
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   447
    // rbx: exception handler
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   448
    // rdx: throwing pc
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   449
    __ jmp(handler_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   450
489c9b5090e2 Initial load
duke
parents:
diff changeset
   451
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   453
489c9b5090e2 Initial load
duke
parents:
diff changeset
   454
489c9b5090e2 Initial load
duke
parents:
diff changeset
   455
  //----------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   456
  // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   458
  // xchg exists as far back as 8086, lock needed for MP only
489c9b5090e2 Initial load
duke
parents:
diff changeset
   459
  // Stack layout immediately after call:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   460
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   461
  // 0 [ret addr ] <--- rsp
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
  // 1 [  ex     ]
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
  // 2 [  dest   ]
489c9b5090e2 Initial load
duke
parents:
diff changeset
   464
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
  // Result:   *dest <- ex, return (old *dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   466
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   467
  // Note: win32 does not currently use this code
489c9b5090e2 Initial load
duke
parents:
diff changeset
   468
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
  address generate_atomic_xchg() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   470
    StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   471
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   472
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   473
    __ push(rdx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   474
    Address exchange(rsp, 2 * wordSize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   475
    Address dest_addr(rsp, 3 * wordSize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   476
    __ movl(rax, exchange);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   477
    __ movptr(rdx, dest_addr);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   478
    __ xchgl(rax, Address(rdx, 0));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   479
    __ pop(rdx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   480
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
489c9b5090e2 Initial load
duke
parents:
diff changeset
   482
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   484
489c9b5090e2 Initial load
duke
parents:
diff changeset
   485
  //----------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   486
  // Support for void verify_mxcsr()
489c9b5090e2 Initial load
duke
parents:
diff changeset
   487
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   488
  // This routine is used with -Xcheck:jni to verify that native
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
  // JNI code does not return to Java code without restoring the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   490
  // MXCSR register to our expected state.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
  address generate_verify_mxcsr() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
    StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
489c9b5090e2 Initial load
duke
parents:
diff changeset
   497
    const Address mxcsr_save(rsp, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   498
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
    if (CheckJNICalls && UseSSE > 0 ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   500
      Label ok_ret;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   501
      ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   502
      __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   503
      __ subptr(rsp, wordSize);      // allocate a temp location
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   504
      __ stmxcsr(mxcsr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   505
      __ movl(rax, mxcsr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   506
      __ andl(rax, MXCSR_MASK);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   507
      __ cmp32(rax, mxcsr_std);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   508
      __ jcc(Assembler::equal, ok_ret);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   509
489c9b5090e2 Initial load
duke
parents:
diff changeset
   510
      __ warn("MXCSR changed by native JNI code.");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   511
489c9b5090e2 Initial load
duke
parents:
diff changeset
   512
      __ ldmxcsr(mxcsr_std);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   513
489c9b5090e2 Initial load
duke
parents:
diff changeset
   514
      __ bind(ok_ret);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   515
      __ addptr(rsp, wordSize);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   516
      __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   522
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   523
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
489c9b5090e2 Initial load
duke
parents:
diff changeset
   525
  //---------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   526
  // Support for void verify_fpu_cntrl_wrd()
489c9b5090e2 Initial load
duke
parents:
diff changeset
   527
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   528
  // This routine is used with -Xcheck:jni to verify that native
489c9b5090e2 Initial load
duke
parents:
diff changeset
   529
  // JNI code does not return to Java code without restoring the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   530
  // FP control word to our expected state.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   531
489c9b5090e2 Initial load
duke
parents:
diff changeset
   532
  address generate_verify_fpu_cntrl_wrd() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   533
    StubCodeMark mark(this, "StubRoutines", "verify_spcw");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   534
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   535
489c9b5090e2 Initial load
duke
parents:
diff changeset
   536
    const Address fpu_cntrl_wrd_save(rsp, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   537
489c9b5090e2 Initial load
duke
parents:
diff changeset
   538
    if (CheckJNICalls) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   539
      Label ok_ret;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   540
      __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   541
      __ subptr(rsp, wordSize);      // allocate a temp location
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   542
      __ fnstcw(fpu_cntrl_wrd_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   543
      __ movl(rax, fpu_cntrl_wrd_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   544
      __ andl(rax, FPU_CNTRL_WRD_MASK);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   545
      ExternalAddress fpu_std(StubRoutines::addr_fpu_cntrl_wrd_std());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   546
      __ cmp32(rax, fpu_std);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   547
      __ jcc(Assembler::equal, ok_ret);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   548
489c9b5090e2 Initial load
duke
parents:
diff changeset
   549
      __ warn("Floating point control word changed by native JNI code.");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   550
489c9b5090e2 Initial load
duke
parents:
diff changeset
   551
      __ fldcw(fpu_std);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
489c9b5090e2 Initial load
duke
parents:
diff changeset
   553
      __ bind(ok_ret);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   554
      __ addptr(rsp, wordSize);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   555
      __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   556
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   557
489c9b5090e2 Initial load
duke
parents:
diff changeset
   558
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   559
489c9b5090e2 Initial load
duke
parents:
diff changeset
   560
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   561
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   562
489c9b5090e2 Initial load
duke
parents:
diff changeset
   563
  //---------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   564
  // Wrapper for slow-case handling of double-to-integer conversion
489c9b5090e2 Initial load
duke
parents:
diff changeset
   565
  // d2i or f2i fast case failed either because it is nan or because
489c9b5090e2 Initial load
duke
parents:
diff changeset
   566
  // of under/overflow.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   567
  // Input:  FPU TOS: float value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   568
  // Output: rax, (rdx): integer (long) result
489c9b5090e2 Initial load
duke
parents:
diff changeset
   569
489c9b5090e2 Initial load
duke
parents:
diff changeset
   570
  address generate_d2i_wrapper(BasicType t, address fcn) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   571
    StubCodeMark mark(this, "StubRoutines", "d2i_wrapper");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   572
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   573
489c9b5090e2 Initial load
duke
parents:
diff changeset
   574
  // Capture info about frame layout
489c9b5090e2 Initial load
duke
parents:
diff changeset
   575
  enum layout { FPUState_off         = 0,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   576
                rbp_off              = FPUStateSizeInWords,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   577
                rdi_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   578
                rsi_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   579
                rcx_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   580
                rbx_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   581
                saved_argument_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   582
                saved_argument_off2, // 2nd half of double
489c9b5090e2 Initial load
duke
parents:
diff changeset
   583
                framesize
489c9b5090e2 Initial load
duke
parents:
diff changeset
   584
  };
489c9b5090e2 Initial load
duke
parents:
diff changeset
   585
489c9b5090e2 Initial load
duke
parents:
diff changeset
   586
  assert(FPUStateSizeInWords == 27, "update stack layout");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   587
489c9b5090e2 Initial load
duke
parents:
diff changeset
   588
    // Save outgoing argument to stack across push_FPU_state()
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   589
    __ subptr(rsp, wordSize * 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   590
    __ fstp_d(Address(rsp, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   591
489c9b5090e2 Initial load
duke
parents:
diff changeset
   592
    // Save CPU & FPU state
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   593
    __ push(rbx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   594
    __ push(rcx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   595
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   596
    __ push(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   597
    __ push(rbp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   598
    __ push_FPU_state();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   599
489c9b5090e2 Initial load
duke
parents:
diff changeset
   600
    // push_FPU_state() resets the FP top of stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   601
    // Load original double into FP top of stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   602
    __ fld_d(Address(rsp, saved_argument_off * wordSize));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   603
    // Store double into stack as outgoing argument
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   604
    __ subptr(rsp, wordSize*2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   605
    __ fst_d(Address(rsp, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   606
489c9b5090e2 Initial load
duke
parents:
diff changeset
   607
    // Prepare FPU for doing math in C-land
489c9b5090e2 Initial load
duke
parents:
diff changeset
   608
    __ empty_FPU_stack();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   609
    // Call the C code to massage the double.  Result in EAX
489c9b5090e2 Initial load
duke
parents:
diff changeset
   610
    if (t == T_INT)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   611
      { BLOCK_COMMENT("SharedRuntime::d2i"); }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   612
    else if (t == T_LONG)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   613
      { BLOCK_COMMENT("SharedRuntime::d2l"); }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   614
    __ call_VM_leaf( fcn, 2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   615
489c9b5090e2 Initial load
duke
parents:
diff changeset
   616
    // Restore CPU & FPU state
489c9b5090e2 Initial load
duke
parents:
diff changeset
   617
    __ pop_FPU_state();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   618
    __ pop(rbp);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   619
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   620
    __ pop(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   621
    __ pop(rcx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   622
    __ pop(rbx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   623
    __ addptr(rsp, wordSize * 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   624
489c9b5090e2 Initial load
duke
parents:
diff changeset
   625
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   626
489c9b5090e2 Initial load
duke
parents:
diff changeset
   627
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   628
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   629
489c9b5090e2 Initial load
duke
parents:
diff changeset
   630
489c9b5090e2 Initial load
duke
parents:
diff changeset
   631
  //---------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   632
  // The following routine generates a subroutine to throw an asynchronous
489c9b5090e2 Initial load
duke
parents:
diff changeset
   633
  // UnknownError when an unsafe access gets a fault that could not be
489c9b5090e2 Initial load
duke
parents:
diff changeset
   634
  // reasonably prevented by the programmer.  (Example: SIGBUS/OBJERR.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   635
  address generate_handler_for_unsafe_access() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   636
    StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   637
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   638
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   639
    __ push(0);                       // hole for return address-to-be
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   640
    __ pusha();                       // push registers
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   641
    Address next_pc(rsp, RegisterImpl::number_of_registers * BytesPerWord);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   642
    BLOCK_COMMENT("call handle_unsafe_access");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   643
    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, handle_unsafe_access)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   644
    __ movptr(next_pc, rax);          // stuff next address
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   645
    __ popa();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   646
    __ ret(0);                        // jump to next address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   647
489c9b5090e2 Initial load
duke
parents:
diff changeset
   648
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   649
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   650
489c9b5090e2 Initial load
duke
parents:
diff changeset
   651
489c9b5090e2 Initial load
duke
parents:
diff changeset
   652
  //----------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   653
  // Non-destructive plausibility checks for oops
489c9b5090e2 Initial load
duke
parents:
diff changeset
   654
489c9b5090e2 Initial load
duke
parents:
diff changeset
   655
  address generate_verify_oop() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   656
    StubCodeMark mark(this, "StubRoutines", "verify_oop");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   657
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   658
489c9b5090e2 Initial load
duke
parents:
diff changeset
   659
    // Incoming arguments on stack after saving rax,:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   660
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   661
    // [tos    ]: saved rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
   662
    // [tos + 1]: saved EFLAGS
489c9b5090e2 Initial load
duke
parents:
diff changeset
   663
    // [tos + 2]: return address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   664
    // [tos + 3]: char* error message
489c9b5090e2 Initial load
duke
parents:
diff changeset
   665
    // [tos + 4]: oop   object to verify
489c9b5090e2 Initial load
duke
parents:
diff changeset
   666
    // [tos + 5]: saved rax, - saved by caller and bashed
489c9b5090e2 Initial load
duke
parents:
diff changeset
   667
489c9b5090e2 Initial load
duke
parents:
diff changeset
   668
    Label exit, error;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   669
    __ pushf();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   670
    __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   671
    __ push(rdx);                                // save rdx
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   672
    // make sure object is 'reasonable'
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   673
    __ movptr(rax, Address(rsp, 4 * wordSize));    // get object
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   674
    __ testptr(rax, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   675
    __ jcc(Assembler::zero, exit);               // if obj is NULL it is ok
489c9b5090e2 Initial load
duke
parents:
diff changeset
   676
489c9b5090e2 Initial load
duke
parents:
diff changeset
   677
    // Check if the oop is in the right area of memory
489c9b5090e2 Initial load
duke
parents:
diff changeset
   678
    const int oop_mask = Universe::verify_oop_mask();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   679
    const int oop_bits = Universe::verify_oop_bits();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   680
    __ mov(rdx, rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   681
    __ andptr(rdx, oop_mask);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   682
    __ cmpptr(rdx, oop_bits);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   683
    __ jcc(Assembler::notZero, error);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   684
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13391
diff changeset
   685
    // make sure klass is 'reasonable', which is not zero.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   686
    __ movptr(rax, Address(rax, oopDesc::klass_offset_in_bytes())); // get klass
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   687
    __ testptr(rax, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   688
    __ jcc(Assembler::zero, error);              // if klass is NULL it is broken
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13391
diff changeset
   689
    // TODO: Future assert that klass is lower 4g memory for UseCompressedKlassPointers
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   690
489c9b5090e2 Initial load
duke
parents:
diff changeset
   691
    // return if everything seems ok
489c9b5090e2 Initial load
duke
parents:
diff changeset
   692
    __ bind(exit);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   693
    __ movptr(rax, Address(rsp, 5 * wordSize));  // get saved rax, back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   694
    __ pop(rdx);                                 // restore rdx
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   695
    __ popf();                                   // restore EFLAGS
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   696
    __ ret(3 * wordSize);                        // pop arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
   697
489c9b5090e2 Initial load
duke
parents:
diff changeset
   698
    // handle errors
489c9b5090e2 Initial load
duke
parents:
diff changeset
   699
    __ bind(error);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   700
    __ movptr(rax, Address(rsp, 5 * wordSize));  // get saved rax, back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   701
    __ pop(rdx);                                 // get saved rdx back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   702
    __ popf();                                   // get saved EFLAGS off stack -- will be ignored
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   703
    __ pusha();                                  // push registers (eip = return address & msg are already pushed)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   704
    BLOCK_COMMENT("call MacroAssembler::debug");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   705
    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug32)));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   706
    __ popa();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   707
    __ ret(3 * wordSize);                        // pop arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
   708
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   709
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   710
489c9b5090e2 Initial load
duke
parents:
diff changeset
   711
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   712
  //  Generate pre-barrier for array stores
489c9b5090e2 Initial load
duke
parents:
diff changeset
   713
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   714
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   715
  //     start   -  starting address
3262
30d1c247fc25 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 2534
diff changeset
   716
  //     count   -  element count
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   717
  void  gen_write_ref_array_pre_barrier(Register start, Register count, bool uninitialized_target) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   718
    assert_different_registers(start, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   719
    BarrierSet* bs = Universe::heap()->barrier_set();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   720
    switch (bs->kind()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   721
      case BarrierSet::G1SATBCT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   722
      case BarrierSet::G1SATBCTLogging:
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   723
        // With G1, don't generate the call if we statically know that the target in uninitialized
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   724
        if (!uninitialized_target) {
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   725
           __ pusha();                      // push registers
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   726
           __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre),
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   727
                           start, count);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   728
           __ popa();
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   729
         }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   730
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   731
      case BarrierSet::CardTableModRef:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   732
      case BarrierSet::CardTableExtension:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   733
      case BarrierSet::ModRef:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   734
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   735
      default      :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   736
        ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   737
489c9b5090e2 Initial load
duke
parents:
diff changeset
   738
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   739
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   740
489c9b5090e2 Initial load
duke
parents:
diff changeset
   741
489c9b5090e2 Initial load
duke
parents:
diff changeset
   742
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   743
  // Generate a post-barrier for an array store
489c9b5090e2 Initial load
duke
parents:
diff changeset
   744
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   745
  //     start    -  starting address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   746
  //     count    -  element count
489c9b5090e2 Initial load
duke
parents:
diff changeset
   747
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   748
  //  The two input registers are overwritten.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   749
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   750
  void  gen_write_ref_array_post_barrier(Register start, Register count) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   751
    BarrierSet* bs = Universe::heap()->barrier_set();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   752
    assert_different_registers(start, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   753
    switch (bs->kind()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   754
      case BarrierSet::G1SATBCT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   755
      case BarrierSet::G1SATBCTLogging:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   756
        {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   757
          __ pusha();                      // push registers
4740
d708800308b7 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 4645
diff changeset
   758
          __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post),
d708800308b7 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 4645
diff changeset
   759
                          start, count);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   760
          __ popa();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   761
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   762
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   763
489c9b5090e2 Initial load
duke
parents:
diff changeset
   764
      case BarrierSet::CardTableModRef:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   765
      case BarrierSet::CardTableExtension:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   766
        {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
          CardTableModRefBS* ct = (CardTableModRefBS*)bs;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   768
          assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   769
489c9b5090e2 Initial load
duke
parents:
diff changeset
   770
          Label L_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
          const Register end = count;  // elements count; end == start+count-1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   772
          assert_different_registers(start, end);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   773
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   774
          __ lea(end,  Address(start, count, Address::times_ptr, -wordSize));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   775
          __ shrptr(start, CardTableModRefBS::card_shift);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   776
          __ shrptr(end,   CardTableModRefBS::card_shift);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   777
          __ subptr(end, start); // end --> count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   778
        __ BIND(L_loop);
957
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 192
diff changeset
   779
          intptr_t disp = (intptr_t) ct->byte_map_base;
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 192
diff changeset
   780
          Address cardtable(start, count, Address::times_1, disp);
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 192
diff changeset
   781
          __ movb(cardtable, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   782
          __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   783
          __ jcc(Assembler::greaterEqual, L_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   784
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   785
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   786
      case BarrierSet::ModRef:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   787
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   788
      default      :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   789
        ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   790
489c9b5090e2 Initial load
duke
parents:
diff changeset
   791
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   792
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   793
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   794
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   795
  // Copy 64 bytes chunks
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   796
  //
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   797
  // Inputs:
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   798
  //   from        - source array address
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   799
  //   to_from     - destination array address - from
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   800
  //   qword_count - 8-bytes element count, negative
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   801
  //
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   802
  void xmm_copy_forward(Register from, Register to_from, Register qword_count) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   803
    assert( UseSSE >= 2, "supported cpu only" );
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   804
    Label L_copy_64_bytes_loop, L_copy_64_bytes, L_copy_8_bytes, L_exit;
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   805
    // Copy 64-byte chunks
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   806
    __ jmpb(L_copy_64_bytes);
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
   807
    __ align(OptoLoopAlignment);
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   808
  __ BIND(L_copy_64_bytes_loop);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   809
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   810
    if(UseUnalignedLoadStores) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   811
      __ movdqu(xmm0, Address(from, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   812
      __ movdqu(Address(from, to_from, Address::times_1, 0), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   813
      __ movdqu(xmm1, Address(from, 16));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   814
      __ movdqu(Address(from, to_from, Address::times_1, 16), xmm1);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   815
      __ movdqu(xmm2, Address(from, 32));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   816
      __ movdqu(Address(from, to_from, Address::times_1, 32), xmm2);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   817
      __ movdqu(xmm3, Address(from, 48));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   818
      __ movdqu(Address(from, to_from, Address::times_1, 48), xmm3);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   819
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   820
    } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   821
      __ movq(xmm0, Address(from, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   822
      __ movq(Address(from, to_from, Address::times_1, 0), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   823
      __ movq(xmm1, Address(from, 8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   824
      __ movq(Address(from, to_from, Address::times_1, 8), xmm1);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   825
      __ movq(xmm2, Address(from, 16));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   826
      __ movq(Address(from, to_from, Address::times_1, 16), xmm2);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   827
      __ movq(xmm3, Address(from, 24));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   828
      __ movq(Address(from, to_from, Address::times_1, 24), xmm3);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   829
      __ movq(xmm4, Address(from, 32));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   830
      __ movq(Address(from, to_from, Address::times_1, 32), xmm4);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   831
      __ movq(xmm5, Address(from, 40));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   832
      __ movq(Address(from, to_from, Address::times_1, 40), xmm5);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   833
      __ movq(xmm6, Address(from, 48));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   834
      __ movq(Address(from, to_from, Address::times_1, 48), xmm6);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   835
      __ movq(xmm7, Address(from, 56));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   836
      __ movq(Address(from, to_from, Address::times_1, 56), xmm7);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   837
    }
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   838
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   839
    __ addl(from, 64);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   840
  __ BIND(L_copy_64_bytes);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   841
    __ subl(qword_count, 8);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   842
    __ jcc(Assembler::greaterEqual, L_copy_64_bytes_loop);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   843
    __ addl(qword_count, 8);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   844
    __ jccb(Assembler::zero, L_exit);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   845
    //
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   846
    // length is too short, just copy qwords
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   847
    //
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   848
  __ BIND(L_copy_8_bytes);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   849
    __ movq(xmm0, Address(from, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   850
    __ movq(Address(from, to_from, Address::times_1), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   851
    __ addl(from, 8);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   852
    __ decrement(qword_count);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   853
    __ jcc(Assembler::greater, L_copy_8_bytes);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   854
  __ BIND(L_exit);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   855
  }
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   856
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   857
  // Copy 64 bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
   858
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   859
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   860
  //   from        - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   861
  //   to_from     - destination array address - from
489c9b5090e2 Initial load
duke
parents:
diff changeset
   862
  //   qword_count - 8-bytes element count, negative
489c9b5090e2 Initial load
duke
parents:
diff changeset
   863
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   864
  void mmx_copy_forward(Register from, Register to_from, Register qword_count) {
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   865
    assert( VM_Version::supports_mmx(), "supported cpu only" );
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   866
    Label L_copy_64_bytes_loop, L_copy_64_bytes, L_copy_8_bytes, L_exit;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   867
    // Copy 64-byte chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
   868
    __ jmpb(L_copy_64_bytes);
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
   869
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   870
  __ BIND(L_copy_64_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   871
    __ movq(mmx0, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   872
    __ movq(mmx1, Address(from, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   873
    __ movq(mmx2, Address(from, 16));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   874
    __ movq(Address(from, to_from, Address::times_1, 0), mmx0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   875
    __ movq(mmx3, Address(from, 24));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   876
    __ movq(Address(from, to_from, Address::times_1, 8), mmx1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   877
    __ movq(mmx4, Address(from, 32));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   878
    __ movq(Address(from, to_from, Address::times_1, 16), mmx2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   879
    __ movq(mmx5, Address(from, 40));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   880
    __ movq(Address(from, to_from, Address::times_1, 24), mmx3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   881
    __ movq(mmx6, Address(from, 48));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   882
    __ movq(Address(from, to_from, Address::times_1, 32), mmx4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   883
    __ movq(mmx7, Address(from, 56));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   884
    __ movq(Address(from, to_from, Address::times_1, 40), mmx5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   885
    __ movq(Address(from, to_from, Address::times_1, 48), mmx6);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   886
    __ movq(Address(from, to_from, Address::times_1, 56), mmx7);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   887
    __ addptr(from, 64);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   888
  __ BIND(L_copy_64_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   889
    __ subl(qword_count, 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   890
    __ jcc(Assembler::greaterEqual, L_copy_64_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   891
    __ addl(qword_count, 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   892
    __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   893
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   894
    // length is too short, just copy qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
   895
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   896
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   897
    __ movq(mmx0, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   898
    __ movq(Address(from, to_from, Address::times_1), mmx0);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   899
    __ addptr(from, 8);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   900
    __ decrement(qword_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   901
    __ jcc(Assembler::greater, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   902
  __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   903
    __ emms();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   904
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   905
489c9b5090e2 Initial load
duke
parents:
diff changeset
   906
  address generate_disjoint_copy(BasicType t, bool aligned,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   907
                                 Address::ScaleFactor sf,
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   908
                                 address* entry, const char *name,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   909
                                 bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   910
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   911
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   912
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   913
489c9b5090e2 Initial load
duke
parents:
diff changeset
   914
    Label L_0_count, L_exit, L_skip_align1, L_skip_align2, L_copy_byte;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   915
    Label L_copy_2_bytes, L_copy_4_bytes, L_copy_64_bytes;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   916
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   917
    int shift = Address::times_ptr - sf;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   918
489c9b5090e2 Initial load
duke
parents:
diff changeset
   919
    const Register from     = rsi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   920
    const Register to       = rdi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   921
    const Register count    = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
   922
    const Register to_from  = to;   // (to - from)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   923
    const Register saved_to = rdx;  // saved destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   924
489c9b5090e2 Initial load
duke
parents:
diff changeset
   925
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   926
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   927
    __ push(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   928
    __ movptr(from , Address(rsp, 12+ 4));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   929
    __ movptr(to   , Address(rsp, 12+ 8));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   930
    __ movl(count, Address(rsp, 12+ 12));
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   931
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   932
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   933
      *entry = __ pc(); // Entry point from conjoint arraycopy stub.
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   934
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   935
    }
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
   936
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   937
    if (t == T_OBJECT) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   938
      __ testl(count, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   939
      __ jcc(Assembler::zero, L_0_count);
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
   940
      gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   941
      __ mov(saved_to, to);          // save 'to'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   942
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   943
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   944
    __ subptr(to, from); // to --> to_from
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   945
    __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
489c9b5090e2 Initial load
duke
parents:
diff changeset
   946
    __ jcc(Assembler::below, L_copy_4_bytes); // use unsigned cmp
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   947
    if (!UseUnalignedLoadStores && !aligned && (t == T_BYTE || t == T_SHORT)) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   948
      // align source address at 4 bytes address boundary
489c9b5090e2 Initial load
duke
parents:
diff changeset
   949
      if (t == T_BYTE) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   950
        // One byte misalignment happens only for byte arrays
489c9b5090e2 Initial load
duke
parents:
diff changeset
   951
        __ testl(from, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   952
        __ jccb(Assembler::zero, L_skip_align1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   953
        __ movb(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   954
        __ movb(Address(from, to_from, Address::times_1, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   955
        __ increment(from);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   956
        __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   957
      __ BIND(L_skip_align1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   958
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   959
      // Two bytes misalignment happens only for byte and short (char) arrays
489c9b5090e2 Initial load
duke
parents:
diff changeset
   960
      __ testl(from, 2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   961
      __ jccb(Assembler::zero, L_skip_align2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   962
      __ movw(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   963
      __ movw(Address(from, to_from, Address::times_1, 0), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   964
      __ addptr(from, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   965
      __ subl(count, 1<<(shift-1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   966
    __ BIND(L_skip_align2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   967
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   968
    if (!VM_Version::supports_mmx()) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   969
      __ mov(rax, count);      // save 'count'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   970
      __ shrl(count, shift); // bytes count
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   971
      __ addptr(to_from, from);// restore 'to'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   972
      __ rep_mov();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   973
      __ subptr(to_from, from);// restore 'to_from'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   974
      __ mov(count, rax);      // restore 'count'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   975
      __ jmpb(L_copy_2_bytes); // all dwords were copied
489c9b5090e2 Initial load
duke
parents:
diff changeset
   976
    } else {
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   977
      if (!UseUnalignedLoadStores) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   978
        // align to 8 bytes, we know we are 4 byte aligned to start
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   979
        __ testptr(from, 4);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   980
        __ jccb(Assembler::zero, L_copy_64_bytes);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   981
        __ movl(rax, Address(from, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   982
        __ movl(Address(from, to_from, Address::times_1, 0), rax);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   983
        __ addptr(from, 4);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   984
        __ subl(count, 1<<shift);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   985
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   986
    __ BIND(L_copy_64_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   987
      __ mov(rax, count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   988
      __ shrl(rax, shift+1);  // 8 bytes chunk count
489c9b5090e2 Initial load
duke
parents:
diff changeset
   989
      //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   990
      // Copy 8-byte chunks through MMX registers, 8 per iteration of the loop
489c9b5090e2 Initial load
duke
parents:
diff changeset
   991
      //
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   992
      if (UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   993
        xmm_copy_forward(from, to_from, rax);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   994
      } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   995
        mmx_copy_forward(from, to_from, rax);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
   996
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   997
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   998
    // copy tailing dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
   999
  __ BIND(L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1000
    __ testl(count, 1<<shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1001
    __ jccb(Assembler::zero, L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1002
    __ movl(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1003
    __ movl(Address(from, to_from, Address::times_1, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1004
    if (t == T_BYTE || t == T_SHORT) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1005
      __ addptr(from, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1006
    __ BIND(L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1007
      // copy tailing word
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1008
      __ testl(count, 1<<(shift-1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1009
      __ jccb(Assembler::zero, L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1010
      __ movw(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1011
      __ movw(Address(from, to_from, Address::times_1, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1012
      if (t == T_BYTE) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1013
        __ addptr(from, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1014
      __ BIND(L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1015
        // copy tailing byte
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1016
        __ testl(count, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1017
        __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1018
        __ movb(rax, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1019
        __ movb(Address(from, to_from, Address::times_1, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1020
      __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1021
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1022
      __ BIND(L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1023
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1024
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1025
    __ BIND(L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1026
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1027
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1028
    if (t == T_OBJECT) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1029
      __ movl(count, Address(rsp, 12+12)); // reread 'count'
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1030
      __ mov(to, saved_to); // restore 'to'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1031
      gen_write_ref_array_post_barrier(to, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1032
    __ BIND(L_0_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1033
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1034
    inc_copy_counter_np(t);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1035
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1036
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1037
    __ leave(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1038
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1039
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1040
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1041
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1042
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1043
6433
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1044
  address generate_fill(BasicType t, bool aligned, const char *name) {
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1045
    __ align(CodeEntryAlignment);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1046
    StubCodeMark mark(this, "StubRoutines", name);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1047
    address start = __ pc();
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1048
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1049
    BLOCK_COMMENT("Entry:");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1050
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1051
    const Register to       = rdi;  // source array address
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1052
    const Register value    = rdx;  // value
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1053
    const Register count    = rsi;  // elements count
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1054
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1055
    __ enter(); // required for proper stackwalking of RuntimeStub frame
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1056
    __ push(rsi);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1057
    __ push(rdi);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1058
    __ movptr(to   , Address(rsp, 12+ 4));
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1059
    __ movl(value, Address(rsp, 12+ 8));
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1060
    __ movl(count, Address(rsp, 12+ 12));
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1061
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1062
    __ generate_fill(t, aligned, to, value, count, rax, xmm0);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1063
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1064
    __ pop(rdi);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1065
    __ pop(rsi);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1066
    __ leave(); // required for proper stackwalking of RuntimeStub frame
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1067
    __ ret(0);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1068
    return start;
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1069
  }
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  1070
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1071
  address generate_conjoint_copy(BasicType t, bool aligned,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1072
                                 Address::ScaleFactor sf,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1073
                                 address nooverlap_target,
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1074
                                 address* entry, const char *name,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1075
                                 bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1076
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1077
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1078
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1079
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1080
    Label L_0_count, L_exit, L_skip_align1, L_skip_align2, L_copy_byte;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1081
    Label L_copy_2_bytes, L_copy_4_bytes, L_copy_8_bytes, L_copy_8_bytes_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1082
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1083
    int shift = Address::times_ptr - sf;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1084
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1085
    const Register src   = rax;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1086
    const Register dst   = rdx;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1087
    const Register from  = rsi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1088
    const Register to    = rdi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1089
    const Register count = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1090
    const Register end   = rax;  // array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1091
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1092
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1093
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1094
    __ push(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1095
    __ movptr(src  , Address(rsp, 12+ 4));   // from
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1096
    __ movptr(dst  , Address(rsp, 12+ 8));   // to
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1097
    __ movl2ptr(count, Address(rsp, 12+12)); // count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1098
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1099
    if (entry != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1100
      *entry = __ pc(); // Entry point from generic arraycopy stub.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1101
      BLOCK_COMMENT("Entry:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1102
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1103
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1104
    // nooverlap_target expects arguments in rsi and rdi.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1105
    __ mov(from, src);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1106
    __ mov(to  , dst);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1107
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1108
    // arrays overlap test: dispatch to disjoint stub if necessary.
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1109
    RuntimeAddress nooverlap(nooverlap_target);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1110
    __ cmpptr(dst, src);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1111
    __ lea(end, Address(src, count, sf, 0)); // src + count * elem_size
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1112
    __ jump_cc(Assembler::belowEqual, nooverlap);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1113
    __ cmpptr(dst, end);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1114
    __ jump_cc(Assembler::aboveEqual, nooverlap);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1115
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1116
    if (t == T_OBJECT) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1117
      __ testl(count, count);
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1118
      __ jcc(Assembler::zero, L_0_count);
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1119
      gen_write_ref_array_pre_barrier(dst, count, dest_uninitialized);
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1120
    }
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1121
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1122
    // copy from high to low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1123
    __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1124
    __ jcc(Assembler::below, L_copy_4_bytes); // use unsigned cmp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1125
    if (t == T_BYTE || t == T_SHORT) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1126
      // Align the end of destination array at 4 bytes address boundary
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1127
      __ lea(end, Address(dst, count, sf, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1128
      if (t == T_BYTE) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1129
        // One byte misalignment happens only for byte arrays
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1130
        __ testl(end, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1131
        __ jccb(Assembler::zero, L_skip_align1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1132
        __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1133
        __ movb(rdx, Address(from, count, sf, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1134
        __ movb(Address(to, count, sf, 0), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1135
      __ BIND(L_skip_align1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1136
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1137
      // Two bytes misalignment happens only for byte and short (char) arrays
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1138
      __ testl(end, 2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1139
      __ jccb(Assembler::zero, L_skip_align2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1140
      __ subptr(count, 1<<(shift-1));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1141
      __ movw(rdx, Address(from, count, sf, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1142
      __ movw(Address(to, count, sf, 0), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1143
    __ BIND(L_skip_align2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1144
      __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1145
      __ jcc(Assembler::below, L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1146
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1147
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1148
    if (!VM_Version::supports_mmx()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1149
      __ std();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1150
      __ mov(rax, count); // Save 'count'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1151
      __ mov(rdx, to);    // Save 'to'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1152
      __ lea(rsi, Address(from, count, sf, -4));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1153
      __ lea(rdi, Address(to  , count, sf, -4));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1154
      __ shrptr(count, shift); // bytes count
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1155
      __ rep_mov();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1156
      __ cld();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1157
      __ mov(count, rax); // restore 'count'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1158
      __ andl(count, (1<<shift)-1);      // mask the number of rest elements
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1159
      __ movptr(from, Address(rsp, 12+4)); // reread 'from'
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1160
      __ mov(to, rdx);   // restore 'to'
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1161
      __ jmpb(L_copy_2_bytes); // all dword were copied
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1162
   } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1163
      // Align to 8 bytes the end of array. It is aligned to 4 bytes already.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1164
      __ testptr(end, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1165
      __ jccb(Assembler::zero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1166
      __ subl(count, 1<<shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1167
      __ movl(rdx, Address(from, count, sf, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1168
      __ movl(Address(to, count, sf, 0), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1169
      __ jmpb(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1170
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1171
      __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1172
      // Move 8 bytes
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1173
    __ BIND(L_copy_8_bytes_loop);
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1174
      if (UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1175
        __ movq(xmm0, Address(from, count, sf, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1176
        __ movq(Address(to, count, sf, 0), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1177
      } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1178
        __ movq(mmx0, Address(from, count, sf, 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1179
        __ movq(Address(to, count, sf, 0), mmx0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1180
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1181
    __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1182
      __ subl(count, 2<<shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1183
      __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1184
      __ addl(count, 2<<shift);
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1185
      if (!UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1186
        __ emms();
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1187
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1188
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1189
  __ BIND(L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1190
    // copy prefix qword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1191
    __ testl(count, 1<<shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1192
    __ jccb(Assembler::zero, L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1193
    __ movl(rdx, Address(from, count, sf, -4));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1194
    __ movl(Address(to, count, sf, -4), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1195
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1196
    if (t == T_BYTE || t == T_SHORT) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1197
        __ subl(count, (1<<shift));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1198
      __ BIND(L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1199
        // copy prefix dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1200
        __ testl(count, 1<<(shift-1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1201
        __ jccb(Assembler::zero, L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1202
        __ movw(rdx, Address(from, count, sf, -2));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1203
        __ movw(Address(to, count, sf, -2), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1204
        if (t == T_BYTE) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1205
          __ subl(count, 1<<(shift-1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1206
        __ BIND(L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1207
          // copy prefix byte
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1208
          __ testl(count, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1209
          __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1210
          __ movb(rdx, Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1211
          __ movb(Address(to, 0), rdx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1212
        __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1213
        } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1214
        __ BIND(L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1215
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1216
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1217
    __ BIND(L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1218
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1219
    if (t == T_OBJECT) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1220
      __ movl2ptr(count, Address(rsp, 12+12)); // reread count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1221
      gen_write_ref_array_post_barrier(to, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1222
    __ BIND(L_0_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1223
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1224
    inc_copy_counter_np(t);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1225
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1226
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1227
    __ leave(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1228
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1229
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1230
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1231
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1232
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1233
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1234
  address generate_disjoint_long_copy(address* entry, const char *name) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1235
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1236
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1237
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1238
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1239
    Label L_copy_8_bytes, L_copy_8_bytes_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1240
    const Register from       = rax;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1241
    const Register to         = rdx;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1242
    const Register count      = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1243
    const Register to_from    = rdx;  // (to - from)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1244
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1245
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1246
    __ movptr(from , Address(rsp, 8+0));       // from
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1247
    __ movptr(to   , Address(rsp, 8+4));       // to
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1248
    __ movl2ptr(count, Address(rsp, 8+8));     // count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1249
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1250
    *entry = __ pc(); // Entry point from conjoint arraycopy stub.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1251
    BLOCK_COMMENT("Entry:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1252
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1253
    __ subptr(to, from); // to --> to_from
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1254
    if (VM_Version::supports_mmx()) {
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1255
      if (UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1256
        xmm_copy_forward(from, to_from, count);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1257
      } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1258
        mmx_copy_forward(from, to_from, count);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1259
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1260
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1261
      __ jmpb(L_copy_8_bytes);
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1262
      __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1263
    __ BIND(L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1264
      __ fild_d(Address(from, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1265
      __ fistp_d(Address(from, to_from, Address::times_1));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1266
      __ addptr(from, 8);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1267
    __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1268
      __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1269
      __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1270
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1271
    inc_copy_counter_np(T_LONG);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1272
    __ leave(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1273
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1274
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1275
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1276
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1277
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1278
  address generate_conjoint_long_copy(address nooverlap_target,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1279
                                      address* entry, const char *name) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1280
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1281
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1282
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1283
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1284
    Label L_copy_8_bytes, L_copy_8_bytes_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1285
    const Register from       = rax;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1286
    const Register to         = rdx;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1287
    const Register count      = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1288
    const Register end_from   = rax;  // source array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1289
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1290
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1291
    __ movptr(from , Address(rsp, 8+0));       // from
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1292
    __ movptr(to   , Address(rsp, 8+4));       // to
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1293
    __ movl2ptr(count, Address(rsp, 8+8));     // count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1294
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1295
    *entry = __ pc(); // Entry point from generic arraycopy stub.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1296
    BLOCK_COMMENT("Entry:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1297
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1298
    // arrays overlap test
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1299
    __ cmpptr(to, from);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1300
    RuntimeAddress nooverlap(nooverlap_target);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1301
    __ jump_cc(Assembler::belowEqual, nooverlap);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1302
    __ lea(end_from, Address(from, count, Address::times_8, 0));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1303
    __ cmpptr(to, end_from);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1304
    __ movptr(from, Address(rsp, 8));  // from
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1305
    __ jump_cc(Assembler::aboveEqual, nooverlap);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1306
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1307
    __ jmpb(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1308
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1309
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1310
  __ BIND(L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1311
    if (VM_Version::supports_mmx()) {
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1312
      if (UseXMMForArrayCopy) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1313
        __ movq(xmm0, Address(from, count, Address::times_8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1314
        __ movq(Address(to, count, Address::times_8), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1315
      } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1316
        __ movq(mmx0, Address(from, count, Address::times_8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1317
        __ movq(Address(to, count, Address::times_8), mmx0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1318
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1319
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1320
      __ fild_d(Address(from, count, Address::times_8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1321
      __ fistp_d(Address(to, count, Address::times_8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1322
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1323
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1324
    __ decrement(count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1325
    __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1326
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1327
    if (VM_Version::supports_mmx() && !UseXMMForArrayCopy) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1328
      __ emms();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1329
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1330
    inc_copy_counter_np(T_LONG);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1331
    __ leave(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1332
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1333
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1334
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1335
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1336
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1337
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1338
  // Helper for generating a dynamic type check.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1339
  // The sub_klass must be one of {rbx, rdx, rsi}.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1340
  // The temp is killed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1341
  void generate_type_check(Register sub_klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1342
                           Address& super_check_offset_addr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1343
                           Address& super_klass_addr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1344
                           Register temp,
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1345
                           Label* L_success, Label* L_failure) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1346
    BLOCK_COMMENT("type_check:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1347
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1348
    Label L_fallthrough;
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1349
#define LOCAL_JCC(assembler_con, label_ptr)                             \
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1350
    if (label_ptr != NULL)  __ jcc(assembler_con, *(label_ptr));        \
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1351
    else                    __ jcc(assembler_con, L_fallthrough) /*omit semi*/
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1352
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1353
    // The following is a strange variation of the fast path which requires
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1354
    // one less register, because needed values are on the argument stack.
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1355
    // __ check_klass_subtype_fast_path(sub_klass, *super_klass*, temp,
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1356
    //                                  L_success, L_failure, NULL);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1357
    assert_different_registers(sub_klass, temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1358
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 10565
diff changeset
  1359
    int sc_offset = in_bytes(Klass::secondary_super_cache_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1360
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1361
    // if the pointers are equal, we are done (e.g., String[] elements)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1362
    __ cmpptr(sub_klass, super_klass_addr);
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1363
    LOCAL_JCC(Assembler::equal, L_success);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1364
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1365
    // check the supertype display:
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1366
    __ movl2ptr(temp, super_check_offset_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1367
    Address super_check_addr(sub_klass, temp, Address::times_1, 0);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1368
    __ movptr(temp, super_check_addr); // load displayed supertype
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1369
    __ cmpptr(temp, super_klass_addr); // test the super type
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1370
    LOCAL_JCC(Assembler::equal, L_success);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1371
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1372
    // if it was a primary super, we can just fail immediately
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1373
    __ cmpl(super_check_offset_addr, sc_offset);
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1374
    LOCAL_JCC(Assembler::notEqual, L_failure);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1375
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1376
    // The repne_scan instruction uses fixed registers, which will get spilled.
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1377
    // We happen to know this works best when super_klass is in rax.
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1378
    Register super_klass = temp;
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1379
    __ movptr(super_klass, super_klass_addr);
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1380
    __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg,
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1381
                                     L_success, L_failure);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1382
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1383
    __ bind(L_fallthrough);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1384
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1385
    if (L_success == NULL) { BLOCK_COMMENT("L_success:"); }
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1386
    if (L_failure == NULL) { BLOCK_COMMENT("L_failure:"); }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1387
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1909
diff changeset
  1388
#undef LOCAL_JCC
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1389
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1390
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1391
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1392
  //  Generate checkcasting array copy stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1393
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1394
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1395
  //    4(rsp)   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1396
  //    8(rsp)   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1397
  //   12(rsp)   - element count, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1398
  //   16(rsp)   - size_t ckoff (super_check_offset)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1399
  //   20(rsp)   - oop ckval (super_klass)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1400
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1401
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1402
  //    rax, ==  0  -  success
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1403
  //    rax, == -1^K - failure, where K is partial transfer count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1404
  //
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1405
  address generate_checkcast_copy(const char *name, address* entry, bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1406
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1407
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1408
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1409
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1410
    Label L_load_element, L_store_element, L_do_card_marks, L_done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1411
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1412
    // register use:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1413
    //  rax, rdx, rcx -- loop control (end_from, end_to, count)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1414
    //  rdi, rsi      -- element access (oop, klass)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1415
    //  rbx,           -- temp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1416
    const Register from       = rax;    // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1417
    const Register to         = rdx;    // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1418
    const Register length     = rcx;    // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1419
    const Register elem       = rdi;    // each oop copied
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1420
    const Register elem_klass = rsi;    // each elem._klass (sub_klass)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1421
    const Register temp       = rbx;    // lone remaining temp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1422
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1423
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1424
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1425
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1426
    __ push(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1427
    __ push(rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1428
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1429
    Address   from_arg(rsp, 16+ 4);     // from
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1430
    Address     to_arg(rsp, 16+ 8);     // to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1431
    Address length_arg(rsp, 16+12);     // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1432
    Address  ckoff_arg(rsp, 16+16);     // super_check_offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1433
    Address  ckval_arg(rsp, 16+20);     // super_klass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1434
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1435
    // Load up:
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1436
    __ movptr(from,     from_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1437
    __ movptr(to,         to_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1438
    __ movl2ptr(length, length_arg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1439
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1440
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1441
      *entry = __ pc(); // Entry point from generic arraycopy stub.
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1442
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 8315
diff changeset
  1443
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1444
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1445
    //---------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1446
    // Assembler stub will be used for this call to arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1447
    // if the two arrays are subtypes of Object[] but the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1448
    // destination array type is not equal to or a supertype
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1449
    // of the source type.  Each element must be separately
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1450
    // checked.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1451
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1452
    // Loop-invariant addresses.  They are exclusive end pointers.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1453
    Address end_from_addr(from, length, Address::times_ptr, 0);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1454
    Address   end_to_addr(to,   length, Address::times_ptr, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1455
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1456
    Register end_from = from;           // re-use
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1457
    Register end_to   = to;             // re-use
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1458
    Register count    = length;         // re-use
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1459
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1460
    // Loop-variant addresses.  They assume post-incremented count < 0.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1461
    Address from_element_addr(end_from, count, Address::times_ptr, 0);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1462
    Address   to_element_addr(end_to,   count, Address::times_ptr, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1463
    Address elem_klass_addr(elem, oopDesc::klass_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1464
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1465
    // Copy from low to high addresses, indexed from the end of each array.
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  1466
    gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1467
    __ lea(end_from, end_from_addr);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1468
    __ lea(end_to,   end_to_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1469
    assert(length == count, "");        // else fix next line:
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1470
    __ negptr(count);                   // negate and test the length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1471
    __ jccb(Assembler::notZero, L_load_element);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1472
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1473
    // Empty array:  Nothing to do.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1474
    __ xorptr(rax, rax);                  // return 0 on (trivial) success
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1475
    __ jmp(L_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1476
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1477
    // ======== begin loop ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1478
    // (Loop is rotated; its entry is L_load_element.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1479
    // Loop control:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1480
    //   for (count = -count; count != 0; count++)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1481
    // Base pointers src, dst are biased by 8*count,to last element.
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1482
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1483
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1484
    __ BIND(L_store_element);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1485
    __ movptr(to_element_addr, elem);     // store the oop
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1486
    __ increment(count);                // increment the count toward zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1487
    __ jccb(Assembler::zero, L_do_card_marks);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1488
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1489
    // ======== loop entry is here ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1490
    __ BIND(L_load_element);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1491
    __ movptr(elem, from_element_addr);   // load the oop
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1492
    __ testptr(elem, elem);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1493
    __ jccb(Assembler::zero, L_store_element);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1494
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1495
    // (Could do a trick here:  Remember last successful non-null
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1496
    // element stored and make a quick oop equality check on it.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1497
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1498
    __ movptr(elem_klass, elem_klass_addr); // query the object klass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1499
    generate_type_check(elem_klass, ckoff_arg, ckval_arg, temp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1500
                        &L_store_element, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1501
      // (On fall-through, we have failed the element type check.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1502
    // ======== end loop ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1503
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1504
    // It was a real error; we must depend on the caller to finish the job.
192
d66300cdf939 6614036: REGRESSION: Java server x86 VM intermittently crash with SIGSEGV (0xb)
rasbold
parents: 189
diff changeset
  1505
    // Register "count" = -1 * number of *remaining* oops, length_arg = *total* oops.
d66300cdf939 6614036: REGRESSION: Java server x86 VM intermittently crash with SIGSEGV (0xb)
rasbold
parents: 189
diff changeset
  1506
    // Emit GC store barriers for the oops we have copied (length_arg + count),
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1507
    // and report their number to the caller.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1508
    __ addl(count, length_arg);         // transfers = (length - remaining)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1509
    __ movl2ptr(rax, count);            // save the value
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1510
    __ notptr(rax);                     // report (-1^K) to caller
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1511
    __ movptr(to, to_arg);              // reload
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1512
    assert_different_registers(to, count, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1513
    gen_write_ref_array_post_barrier(to, count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1514
    __ jmpb(L_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1515
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1516
    // Come here on success only.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1517
    __ BIND(L_do_card_marks);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1518
    __ movl2ptr(count, length_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1519
    __ movptr(to, to_arg);                // reload
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1520
    gen_write_ref_array_post_barrier(to, count);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1521
    __ xorptr(rax, rax);                  // return 0 on success
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1522
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1523
    // Common exit point (success or failure).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1524
    __ BIND(L_done);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1525
    __ pop(rbx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1526
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1527
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1528
    inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1529
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1530
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1531
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1532
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1533
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1534
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1535
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1536
  //  Generate 'unsafe' array copy stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1537
  //  Though just as safe as the other stubs, it takes an unscaled
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1538
  //  size_t argument instead of an element count.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1539
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1540
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1541
  //    4(rsp)   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1542
  //    8(rsp)   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1543
  //   12(rsp)   - byte count, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1544
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1545
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1546
  //    rax, ==  0  -  success
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1547
  //    rax, == -1  -  need to call System.arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1548
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1549
  // Examines the alignment of the operands and dispatches
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1550
  // to a long, int, short, or byte copy loop.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1551
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1552
  address generate_unsafe_copy(const char *name,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1553
                               address byte_copy_entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1554
                               address short_copy_entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1555
                               address int_copy_entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1556
                               address long_copy_entry) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1557
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1558
    Label L_long_aligned, L_int_aligned, L_short_aligned;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1559
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1560
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1561
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1562
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1563
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1564
    const Register from       = rax;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1565
    const Register to         = rdx;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1566
    const Register count      = rcx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1567
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1568
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1569
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1570
    __ push(rdi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1571
    Address  from_arg(rsp, 12+ 4);      // from
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1572
    Address    to_arg(rsp, 12+ 8);      // to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1573
    Address count_arg(rsp, 12+12);      // byte count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1574
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1575
    // Load up:
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1576
    __ movptr(from ,  from_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1577
    __ movptr(to   ,    to_arg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1578
    __ movl2ptr(count, count_arg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1579
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1580
    // bump this on entry, not on exit:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1581
    inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1582
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1583
    const Register bits = rsi;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1584
    __ mov(bits, from);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1585
    __ orptr(bits, to);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1586
    __ orptr(bits, count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1587
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1588
    __ testl(bits, BytesPerLong-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1589
    __ jccb(Assembler::zero, L_long_aligned);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1590
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1591
    __ testl(bits, BytesPerInt-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1592
    __ jccb(Assembler::zero, L_int_aligned);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1593
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1594
    __ testl(bits, BytesPerShort-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1595
    __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1596
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1597
    __ BIND(L_short_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1598
    __ shrptr(count, LogBytesPerShort); // size => short_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1599
    __ movl(count_arg, count);          // update 'count'
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1600
    __ jump(RuntimeAddress(short_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1601
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1602
    __ BIND(L_int_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1603
    __ shrptr(count, LogBytesPerInt); // size => int_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1604
    __ movl(count_arg, count);          // update 'count'
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1605
    __ jump(RuntimeAddress(int_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1606
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1607
    __ BIND(L_long_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1608
    __ shrptr(count, LogBytesPerLong); // size => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1609
    __ movl(count_arg, count);          // update 'count'
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1610
    __ pop(rdi); // Do pops here since jlong_arraycopy stub does not do it.
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1611
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1612
    __ jump(RuntimeAddress(long_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1613
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1614
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1615
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1616
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1617
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1618
  // Perform range checks on the proposed arraycopy.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1619
  // Smashes src_pos and dst_pos.  (Uses them up for temps.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1620
  void arraycopy_range_checks(Register src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1621
                              Register src_pos,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1622
                              Register dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1623
                              Register dst_pos,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1624
                              Address& length,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1625
                              Label& L_failed) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1626
    BLOCK_COMMENT("arraycopy_range_checks:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1627
    const Register src_end = src_pos;   // source array end position
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1628
    const Register dst_end = dst_pos;   // destination array end position
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1629
    __ addl(src_end, length); // src_pos + length
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1630
    __ addl(dst_end, length); // dst_pos + length
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1631
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1632
    //  if (src_pos + length > arrayOop(src)->length() ) FAIL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1633
    __ cmpl(src_end, Address(src, arrayOopDesc::length_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1634
    __ jcc(Assembler::above, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1635
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1636
    //  if (dst_pos + length > arrayOop(dst)->length() ) FAIL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1637
    __ cmpl(dst_end, Address(dst, arrayOopDesc::length_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1638
    __ jcc(Assembler::above, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1639
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1640
    BLOCK_COMMENT("arraycopy_range_checks done");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1641
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1642
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1643
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1644
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1645
  //  Generate generic array copy stubs
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1646
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1647
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1648
  //     4(rsp)    -  src oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1649
  //     8(rsp)    -  src_pos
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1650
  //    12(rsp)    -  dst oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1651
  //    16(rsp)    -  dst_pos
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1652
  //    20(rsp)    -  element count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1653
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1654
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1655
  //    rax, ==  0  -  success
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1656
  //    rax, == -1^K - failure, where K is partial transfer count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1657
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1658
  address generate_generic_copy(const char *name,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1659
                                address entry_jbyte_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1660
                                address entry_jshort_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1661
                                address entry_jint_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1662
                                address entry_oop_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1663
                                address entry_jlong_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1664
                                address entry_checkcast_arraycopy) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1665
    Label L_failed, L_failed_0, L_objArray;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1666
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1667
    { int modulus = CodeEntryAlignment;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1668
      int target  = modulus - 5; // 5 = sizeof jmp(L_failed)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1669
      int advance = target - (__ offset() % modulus);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1670
      if (advance < 0)  advance += modulus;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1671
      if (advance > 0)  __ nop(advance);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1672
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1673
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1674
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1675
    // Short-hop target to L_failed.  Makes for denser prologue code.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1676
    __ BIND(L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1677
    __ jmp(L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1678
    assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1679
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1680
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1681
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1682
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1683
    __ enter(); // required for proper stackwalking of RuntimeStub frame
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1684
    __ push(rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1685
    __ push(rdi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1686
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1687
    // bump this on entry, not on exit:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1688
    inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1689
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1690
    // Input values
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1691
    Address SRC     (rsp, 12+ 4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1692
    Address SRC_POS (rsp, 12+ 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1693
    Address DST     (rsp, 12+12);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1694
    Address DST_POS (rsp, 12+16);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1695
    Address LENGTH  (rsp, 12+20);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1696
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1697
    //-----------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1698
    // Assembler stub will be used for this call to arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1699
    // if the following conditions are met:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1700
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1701
    // (1) src and dst must not be null.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1702
    // (2) src_pos must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1703
    // (3) dst_pos must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1704
    // (4) length  must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1705
    // (5) src klass and dst klass should be the same and not NULL.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1706
    // (6) src and dst should be arrays.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1707
    // (7) src_pos + length must not exceed length of src.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1708
    // (8) dst_pos + length must not exceed length of dst.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1709
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1710
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1711
    const Register src     = rax;       // source array oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1712
    const Register src_pos = rsi;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1713
    const Register dst     = rdx;       // destination array oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1714
    const Register dst_pos = rdi;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1715
    const Register length  = rcx;       // transfer count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1716
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1717
    //  if (src == NULL) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1718
    __ movptr(src, SRC);      // src oop
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1719
    __ testptr(src, src);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1720
    __ jccb(Assembler::zero, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1721
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1722
    //  if (src_pos < 0) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1723
    __ movl2ptr(src_pos, SRC_POS);  // src_pos
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1724
    __ testl(src_pos, src_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1725
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1726
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1727
    //  if (dst == NULL) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1728
    __ movptr(dst, DST);      // dst oop
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1729
    __ testptr(dst, dst);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1730
    __ jccb(Assembler::zero, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1731
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1732
    //  if (dst_pos < 0) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1733
    __ movl2ptr(dst_pos, DST_POS);  // dst_pos
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1734
    __ testl(dst_pos, dst_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1735
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1736
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1737
    //  if (length < 0) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1738
    __ movl2ptr(length, LENGTH);   // length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1739
    __ testl(length, length);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1740
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1741
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1742
    //  if (src->klass() == NULL) return -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1743
    Address src_klass_addr(src, oopDesc::klass_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1744
    Address dst_klass_addr(dst, oopDesc::klass_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1745
    const Register rcx_src_klass = rcx;    // array klass
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1746
    __ movptr(rcx_src_klass, Address(src, oopDesc::klass_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1747
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1748
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1749
    //  assert(src->klass() != NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1750
    BLOCK_COMMENT("assert klasses not null");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1751
    { Label L1, L2;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1752
      __ testptr(rcx_src_klass, rcx_src_klass);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1753
      __ jccb(Assembler::notZero, L2);   // it is broken if klass is NULL
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1754
      __ bind(L1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1755
      __ stop("broken null klass");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1756
      __ bind(L2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1757
      __ cmpptr(dst_klass_addr, (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1758
      __ jccb(Assembler::equal, L1);      // this would be broken also
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1759
      BLOCK_COMMENT("assert done");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1760
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1761
#endif //ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1762
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1763
    // Load layout helper (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1764
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1765
    //  |array_tag|     | header_size | element_type |     |log2_element_size|
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1766
    // 32        30    24            16              8     2                 0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1767
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1768
    //   array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1769
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1770
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 10565
diff changeset
  1771
    int lh_offset = in_bytes(Klass::layout_helper_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1772
    Address src_klass_lh_addr(rcx_src_klass, lh_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1773
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1774
    // Handle objArrays completely differently...
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1775
    jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1776
    __ cmpl(src_klass_lh_addr, objArray_lh);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1777
    __ jcc(Assembler::equal, L_objArray);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1778
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1779
    //  if (src->klass() != dst->klass()) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1780
    __ cmpptr(rcx_src_klass, dst_klass_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1781
    __ jccb(Assembler::notEqual, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1782
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1783
    const Register rcx_lh = rcx;  // layout helper
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1784
    assert(rcx_lh == rcx_src_klass, "known alias");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1785
    __ movl(rcx_lh, src_klass_lh_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1786
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1787
    //  if (!src->is_Array()) return -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1788
    __ cmpl(rcx_lh, Klass::_lh_neutral_value);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1789
    __ jcc(Assembler::greaterEqual, L_failed_0); // signed cmp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1790
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1791
    // At this point, it is known to be a typeArray (array_tag 0x3).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1792
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1793
    { Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1794
      __ cmpl(rcx_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1795
      __ jcc(Assembler::greaterEqual, L); // signed cmp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1796
      __ stop("must be a primitive array");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1797
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1798
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1799
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1800
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1801
    assert_different_registers(src, src_pos, dst, dst_pos, rcx_lh);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1802
    arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1803
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  1804
    // TypeArrayKlass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1805
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1806
    // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1807
    // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1808
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1809
    const Register rsi_offset = rsi; // array offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1810
    const Register src_array  = src; // src array offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1811
    const Register dst_array  = dst; // dst array offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1812
    const Register rdi_elsize = rdi; // log2 element size
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1813
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1814
    __ mov(rsi_offset, rcx_lh);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1815
    __ shrptr(rsi_offset, Klass::_lh_header_size_shift);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1816
    __ andptr(rsi_offset, Klass::_lh_header_size_mask);   // array_offset
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1817
    __ addptr(src_array, rsi_offset);  // src array offset
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1818
    __ addptr(dst_array, rsi_offset);  // dst array offset
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1819
    __ andptr(rcx_lh, Klass::_lh_log2_element_size_mask); // log2 elsize
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1820
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1821
    // next registers should be set before the jump to corresponding stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1822
    const Register from       = src; // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1823
    const Register to         = dst; // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1824
    const Register count      = rcx; // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1825
    // some of them should be duplicated on stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1826
#define FROM   Address(rsp, 12+ 4)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1827
#define TO     Address(rsp, 12+ 8)   // Not used now
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1828
#define COUNT  Address(rsp, 12+12)   // Only for oop arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1829
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1830
    BLOCK_COMMENT("scale indexes to element size");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1831
    __ movl2ptr(rsi, SRC_POS);  // src_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1832
    __ shlptr(rsi);             // src_pos << rcx (log2 elsize)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1833
    assert(src_array == from, "");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1834
    __ addptr(from, rsi);       // from = src_array + SRC_POS << log2 elsize
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1835
    __ movl2ptr(rdi, DST_POS);  // dst_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1836
    __ shlptr(rdi);             // dst_pos << rcx (log2 elsize)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1837
    assert(dst_array == to, "");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1838
    __ addptr(to,  rdi);        // to   = dst_array + DST_POS << log2 elsize
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1839
    __ movptr(FROM, from);      // src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1840
    __ mov(rdi_elsize, rcx_lh); // log2 elsize
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1841
    __ movl2ptr(count, LENGTH); // elements count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1842
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1843
    BLOCK_COMMENT("choose copy loop based on element size");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1844
    __ cmpl(rdi_elsize, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1845
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1846
    __ jump_cc(Assembler::equal, RuntimeAddress(entry_jbyte_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1847
    __ cmpl(rdi_elsize, LogBytesPerShort);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1848
    __ jump_cc(Assembler::equal, RuntimeAddress(entry_jshort_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1849
    __ cmpl(rdi_elsize, LogBytesPerInt);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1850
    __ jump_cc(Assembler::equal, RuntimeAddress(entry_jint_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1851
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1852
    __ cmpl(rdi_elsize, LogBytesPerLong);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1853
    __ jccb(Assembler::notEqual, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1854
#endif
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1855
    __ pop(rdi); // Do pops here since jlong_arraycopy stub does not do it.
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1856
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1857
    __ jump(RuntimeAddress(entry_jlong_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1858
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1859
  __ BIND(L_failed);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1860
    __ xorptr(rax, rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1861
    __ notptr(rax); // return -1
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1862
    __ pop(rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1863
    __ pop(rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1864
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1865
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1866
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  1867
    // ObjArrayKlass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1868
  __ BIND(L_objArray);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1869
    // live at this point:  rcx_src_klass, src[_pos], dst[_pos]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1870
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1871
    Label L_plain_copy, L_checkcast_copy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1872
    //  test array classes for subtyping
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1873
    __ cmpptr(rcx_src_klass, dst_klass_addr); // usual case is exact equality
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1874
    __ jccb(Assembler::notEqual, L_checkcast_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1875
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1876
    // Identically typed arrays can be copied without element-wise checks.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1877
    assert_different_registers(src, src_pos, dst, dst_pos, rcx_src_klass);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1878
    arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1879
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1880
  __ BIND(L_plain_copy);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1881
    __ movl2ptr(count, LENGTH); // elements count
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1882
    __ movl2ptr(src_pos, SRC_POS);  // reload src_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1883
    __ lea(from, Address(src, src_pos, Address::times_ptr,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1884
                 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1885
    __ movl2ptr(dst_pos, DST_POS);  // reload dst_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1886
    __ lea(to,   Address(dst, dst_pos, Address::times_ptr,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1887
                 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1888
    __ movptr(FROM,  from);   // src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1889
    __ movptr(TO,    to);     // dst_addr
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1890
    __ movl(COUNT, count);  // count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1891
    __ jump(RuntimeAddress(entry_oop_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1892
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1893
  __ BIND(L_checkcast_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1894
    // live at this point:  rcx_src_klass, dst[_pos], src[_pos]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1895
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1896
      // Handy offsets:
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  1897
      int  ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 10565
diff changeset
  1898
      int sco_offset = in_bytes(Klass::super_check_offset_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1899
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1900
      Register rsi_dst_klass = rsi;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1901
      Register rdi_temp      = rdi;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1902
      assert(rsi_dst_klass == src_pos, "expected alias w/ src_pos");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1903
      assert(rdi_temp      == dst_pos, "expected alias w/ dst_pos");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1904
      Address dst_klass_lh_addr(rsi_dst_klass, lh_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1905
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1906
      // Before looking at dst.length, make sure dst is also an objArray.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1907
      __ movptr(rsi_dst_klass, dst_klass_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1908
      __ cmpl(dst_klass_lh_addr, objArray_lh);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1909
      __ jccb(Assembler::notEqual, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1910
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1911
      // It is safe to examine both src.length and dst.length.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1912
      __ movl2ptr(src_pos, SRC_POS);        // reload rsi
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1913
      arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1914
      // (Now src_pos and dst_pos are killed, but not src and dst.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1915
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1916
      // We'll need this temp (don't forget to pop it after the type check).
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1917
      __ push(rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1918
      Register rbx_src_klass = rbx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1919
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1920
      __ mov(rbx_src_klass, rcx_src_klass); // spill away from rcx
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1921
      __ movptr(rsi_dst_klass, dst_klass_addr);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1922
      Address super_check_offset_addr(rsi_dst_klass, sco_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1923
      Label L_fail_array_check;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1924
      generate_type_check(rbx_src_klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1925
                          super_check_offset_addr, dst_klass_addr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1926
                          rdi_temp, NULL, &L_fail_array_check);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1927
      // (On fall-through, we have passed the array type check.)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1928
      __ pop(rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1929
      __ jmp(L_plain_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1930
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1931
      __ BIND(L_fail_array_check);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1932
      // Reshuffle arguments so we can call checkcast_arraycopy:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1933
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1934
      // match initial saves for checkcast_arraycopy
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1935
      // push(rsi);    // already done; see above
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1936
      // push(rdi);    // already done; see above
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1937
      // push(rbx);    // already done; see above
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1938
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1939
      // Marshal outgoing arguments now, freeing registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1940
      Address   from_arg(rsp, 16+ 4);   // from
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1941
      Address     to_arg(rsp, 16+ 8);   // to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1942
      Address length_arg(rsp, 16+12);   // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1943
      Address  ckoff_arg(rsp, 16+16);   // super_check_offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1944
      Address  ckval_arg(rsp, 16+20);   // super_klass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1945
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1946
      Address SRC_POS_arg(rsp, 16+ 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1947
      Address DST_POS_arg(rsp, 16+16);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1948
      Address  LENGTH_arg(rsp, 16+20);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1949
      // push rbx, changed the incoming offsets (why not just use rbp,??)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1950
      // assert(SRC_POS_arg.disp() == SRC_POS.disp() + 4, "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1951
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1952
      __ movptr(rbx, Address(rsi_dst_klass, ek_offset));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1953
      __ movl2ptr(length, LENGTH_arg);    // reload elements count
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1954
      __ movl2ptr(src_pos, SRC_POS_arg);  // reload src_pos
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1955
      __ movl2ptr(dst_pos, DST_POS_arg);  // reload dst_pos
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1956
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1957
      __ movptr(ckval_arg, rbx);          // destination element type
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1958
      __ movl(rbx, Address(rbx, sco_offset));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1959
      __ movl(ckoff_arg, rbx);          // corresponding class check offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1960
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1961
      __ movl(length_arg, length);      // outgoing length argument
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1962
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1963
      __ lea(from, Address(src, src_pos, Address::times_ptr,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1964
                            arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1965
      __ movptr(from_arg, from);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1966
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1967
      __ lea(to, Address(dst, dst_pos, Address::times_ptr,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1968
                          arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1969
      __ movptr(to_arg, to);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1970
      __ jump(RuntimeAddress(entry_checkcast_arraycopy));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1971
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1972
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1973
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1974
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1975
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1976
  void generate_arraycopy_stubs() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1977
    address entry;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1978
    address entry_jbyte_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1979
    address entry_jshort_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1980
    address entry_jint_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1981
    address entry_oop_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1982
    address entry_jlong_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1983
    address entry_checkcast_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1984
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1985
    StubRoutines::_arrayof_jbyte_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1986
        generate_disjoint_copy(T_BYTE,  true, Address::times_1, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1987
                               "arrayof_jbyte_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1988
    StubRoutines::_arrayof_jbyte_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1989
        generate_conjoint_copy(T_BYTE,  true, Address::times_1,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1990
                               NULL, "arrayof_jbyte_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1991
    StubRoutines::_jbyte_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1992
        generate_disjoint_copy(T_BYTE, false, Address::times_1, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1993
                               "jbyte_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1994
    StubRoutines::_jbyte_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1995
        generate_conjoint_copy(T_BYTE, false, Address::times_1,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1996
                               &entry_jbyte_arraycopy, "jbyte_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1997
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1998
    StubRoutines::_arrayof_jshort_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1999
        generate_disjoint_copy(T_SHORT,  true, Address::times_2, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2000
                               "arrayof_jshort_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2001
    StubRoutines::_arrayof_jshort_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2002
        generate_conjoint_copy(T_SHORT,  true, Address::times_2,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2003
                               NULL, "arrayof_jshort_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2004
    StubRoutines::_jshort_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2005
        generate_disjoint_copy(T_SHORT, false, Address::times_2, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2006
                               "jshort_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2007
    StubRoutines::_jshort_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2008
        generate_conjoint_copy(T_SHORT, false, Address::times_2,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2009
                               &entry_jshort_arraycopy, "jshort_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2010
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2011
    // Next arrays are always aligned on 4 bytes at least.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2012
    StubRoutines::_jint_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2013
        generate_disjoint_copy(T_INT, true, Address::times_4, &entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2014
                               "jint_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2015
    StubRoutines::_jint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2016
        generate_conjoint_copy(T_INT, true, Address::times_4,  entry,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2017
                               &entry_jint_arraycopy, "jint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2018
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2019
    StubRoutines::_oop_disjoint_arraycopy =
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2020
        generate_disjoint_copy(T_OBJECT, true, Address::times_ptr, &entry,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2021
                               "oop_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2022
    StubRoutines::_oop_arraycopy =
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2023
        generate_conjoint_copy(T_OBJECT, true, Address::times_ptr,  entry,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2024
                               &entry_oop_arraycopy, "oop_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2025
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2026
    StubRoutines::_oop_disjoint_arraycopy_uninit =
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2027
        generate_disjoint_copy(T_OBJECT, true, Address::times_ptr, &entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2028
                               "oop_disjoint_arraycopy_uninit",
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2029
                               /*dest_uninitialized*/true);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2030
    StubRoutines::_oop_arraycopy_uninit =
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2031
        generate_conjoint_copy(T_OBJECT, true, Address::times_ptr,  entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2032
                               NULL, "oop_arraycopy_uninit",
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2033
                               /*dest_uninitialized*/true);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2034
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2035
    StubRoutines::_jlong_disjoint_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2036
        generate_disjoint_long_copy(&entry, "jlong_disjoint_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2037
    StubRoutines::_jlong_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2038
        generate_conjoint_long_copy(entry, &entry_jlong_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2039
                                    "jlong_arraycopy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2040
6433
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2041
    StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2042
    StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2043
    StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2044
    StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2045
    StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2046
    StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5547
diff changeset
  2047
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2048
    StubRoutines::_arrayof_jint_disjoint_arraycopy       = StubRoutines::_jint_disjoint_arraycopy;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2049
    StubRoutines::_arrayof_oop_disjoint_arraycopy        = StubRoutines::_oop_disjoint_arraycopy;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2050
    StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = StubRoutines::_oop_disjoint_arraycopy_uninit;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2051
    StubRoutines::_arrayof_jlong_disjoint_arraycopy      = StubRoutines::_jlong_disjoint_arraycopy;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2052
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2053
    StubRoutines::_arrayof_jint_arraycopy       = StubRoutines::_jint_arraycopy;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2054
    StubRoutines::_arrayof_oop_arraycopy        = StubRoutines::_oop_arraycopy;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2055
    StubRoutines::_arrayof_oop_arraycopy_uninit = StubRoutines::_oop_arraycopy_uninit;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2056
    StubRoutines::_arrayof_jlong_arraycopy      = StubRoutines::_jlong_arraycopy;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2057
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2058
    StubRoutines::_checkcast_arraycopy =
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2059
        generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2060
    StubRoutines::_checkcast_arraycopy_uninit =
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8495
diff changeset
  2061
        generate_checkcast_copy("checkcast_arraycopy_uninit", NULL, /*dest_uninitialized*/true);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2062
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2063
    StubRoutines::_unsafe_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2064
        generate_unsafe_copy("unsafe_arraycopy",
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2065
                               entry_jbyte_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2066
                               entry_jshort_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2067
                               entry_jint_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2068
                               entry_jlong_arraycopy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2069
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2070
    StubRoutines::_generic_arraycopy =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2071
        generate_generic_copy("generic_arraycopy",
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2072
                               entry_jbyte_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2073
                               entry_jshort_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2074
                               entry_jint_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2075
                               entry_oop_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2076
                               entry_jlong_arraycopy,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2077
                               entry_checkcast_arraycopy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2078
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2079
4645
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2080
  void generate_math_stubs() {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2081
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2082
      StubCodeMark mark(this, "StubRoutines", "log");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2083
      StubRoutines::_intrinsic_log = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2084
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2085
      __ fld_d(Address(rsp, 4));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2086
      __ flog();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2087
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2088
    }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2089
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2090
      StubCodeMark mark(this, "StubRoutines", "log10");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2091
      StubRoutines::_intrinsic_log10 = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2092
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2093
      __ fld_d(Address(rsp, 4));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2094
      __ flog10();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2095
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2096
    }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2097
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2098
      StubCodeMark mark(this, "StubRoutines", "sin");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2099
      StubRoutines::_intrinsic_sin = (double (*)(double))  __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2100
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2101
      __ fld_d(Address(rsp, 4));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2102
      __ trigfunc('s');
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2103
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2104
    }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2105
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2106
      StubCodeMark mark(this, "StubRoutines", "cos");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2107
      StubRoutines::_intrinsic_cos = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2108
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2109
      __ fld_d(Address(rsp, 4));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2110
      __ trigfunc('c');
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2111
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2112
    }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2113
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2114
      StubCodeMark mark(this, "StubRoutines", "tan");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2115
      StubRoutines::_intrinsic_tan = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2116
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2117
      __ fld_d(Address(rsp, 4));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2118
      __ trigfunc('t');
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2119
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2120
    }
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2121
    {
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2122
      StubCodeMark mark(this, "StubRoutines", "exp");
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2123
      StubRoutines::_intrinsic_exp = (double (*)(double)) __ pc();
4645
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2124
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2125
      __ fld_d(Address(rsp, 4));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2126
      __ exp_with_fallback(0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2127
      __ ret(0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2128
    }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2129
    {
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2130
      StubCodeMark mark(this, "StubRoutines", "pow");
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2131
      StubRoutines::_intrinsic_pow = (double (*)(double,double)) __ pc();
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2132
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2133
      __ fld_d(Address(rsp, 12));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2134
      __ fld_d(Address(rsp, 4));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2135
      __ pow_with_fallback(0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2136
      __ ret(0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11439
diff changeset
  2137
    }
4645
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2138
  }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2139
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2140
  // AES intrinsic stubs
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2141
  enum {AESBlockSize = 16};
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2142
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2143
  address generate_key_shuffle_mask() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2144
    __ align(16);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2145
    StubCodeMark mark(this, "StubRoutines", "key_shuffle_mask");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2146
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2147
    __ emit_data(0x00010203, relocInfo::none, 0 );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2148
    __ emit_data(0x04050607, relocInfo::none, 0 );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2149
    __ emit_data(0x08090a0b, relocInfo::none, 0 );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2150
    __ emit_data(0x0c0d0e0f, relocInfo::none, 0 );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2151
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2152
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2153
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2154
  // Utility routine for loading a 128-bit key word in little endian format
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2155
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2156
  void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2157
    __ movdqu(xmmdst, Address(key, offset));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2158
    if (xmm_shuf_mask != NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2159
      __ pshufb(xmmdst, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2160
    } else {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2161
      __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2162
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2163
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2164
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2165
  // aesenc using specified key+offset
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2166
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2167
  void aes_enc_key(XMMRegister xmmdst, XMMRegister xmmtmp, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2168
    load_key(xmmtmp, key, offset, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2169
    __ aesenc(xmmdst, xmmtmp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2170
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2171
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2172
  // aesdec using specified key+offset
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2173
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2174
  void aes_dec_key(XMMRegister xmmdst, XMMRegister xmmtmp, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2175
    load_key(xmmtmp, key, offset, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2176
    __ aesdec(xmmdst, xmmtmp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2177
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2178
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2179
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2180
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2181
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2182
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2183
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2184
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2185
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2186
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2187
  address generate_aescrypt_encryptBlock() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2188
    assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2189
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2190
    StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2191
    Label L_doLast;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2192
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2193
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2194
    const Register from        = rsi;      // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2195
    const Register to          = rdx;      // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2196
    const Register key         = rcx;      // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2197
    const Register keylen      = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2198
    const Address  from_param(rbp, 8+0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2199
    const Address  to_param  (rbp, 8+4);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2200
    const Address  key_param (rbp, 8+8);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2201
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2202
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2203
    const XMMRegister xmm_temp   = xmm1;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2204
    const XMMRegister xmm_key_shuf_mask = xmm2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2205
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2206
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2207
    __ push(rsi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2208
    __ movptr(from , from_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2209
    __ movptr(to   , to_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2210
    __ movptr(key  , key_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2211
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2212
    __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2213
    // keylen = # of 32-bit words, convert to 128-bit words
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2214
    __ shrl(keylen, 2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2215
    __ subl(keylen, 11);   // every key has at least 11 128-bit words, some have more
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2216
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2217
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2218
    __ movdqu(xmm_result, Address(from, 0));  // get 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2219
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2220
    // For encryption, the java expanded key ordering is just what we need
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2221
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2222
    load_key(xmm_temp, key, 0x00, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2223
    __ pxor(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2224
    for (int offset = 0x10; offset <= 0x90; offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2225
      aes_enc_key(xmm_result, xmm_temp, key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2226
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2227
    load_key  (xmm_temp, key, 0xa0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2228
    __ cmpl(keylen, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2229
    __ jcc(Assembler::equal, L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2230
    __ aesenc(xmm_result, xmm_temp);                   // only in 192 and 256 bit keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2231
    aes_enc_key(xmm_result, xmm_temp, key, 0xb0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2232
    load_key(xmm_temp, key, 0xc0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2233
    __ subl(keylen, 2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2234
    __ jcc(Assembler::equal, L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2235
    __ aesenc(xmm_result, xmm_temp);                   // only in 256 bit keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2236
    aes_enc_key(xmm_result, xmm_temp, key, 0xd0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2237
    load_key(xmm_temp, key, 0xe0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2238
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2239
    __ BIND(L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2240
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2241
    __ movdqu(Address(to, 0), xmm_result);        // store the result
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2242
    __ xorptr(rax, rax); // return 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2243
    __ pop(rsi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2244
    __ leave(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2245
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2246
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2247
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2248
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2249
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2250
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2251
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2252
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2253
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2254
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2255
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2256
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2257
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2258
  address generate_aescrypt_decryptBlock() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2259
    assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2260
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2261
    StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2262
    Label L_doLast;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2263
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2264
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2265
    const Register from        = rsi;      // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2266
    const Register to          = rdx;      // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2267
    const Register key         = rcx;      // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2268
    const Register keylen      = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2269
    const Address  from_param(rbp, 8+0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2270
    const Address  to_param  (rbp, 8+4);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2271
    const Address  key_param (rbp, 8+8);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2272
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2273
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2274
    const XMMRegister xmm_temp   = xmm1;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2275
    const XMMRegister xmm_key_shuf_mask = xmm2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2276
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2277
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2278
    __ push(rsi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2279
    __ movptr(from , from_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2280
    __ movptr(to   , to_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2281
    __ movptr(key  , key_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2282
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2283
    __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2284
    // keylen = # of 32-bit words, convert to 128-bit words
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2285
    __ shrl(keylen, 2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2286
    __ subl(keylen, 11);   // every key has at least 11 128-bit words, some have more
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2287
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2288
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2289
    __ movdqu(xmm_result, Address(from, 0));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2290
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2291
    // for decryption java expanded key ordering is rotated one position from what we want
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2292
    // so we start from 0x10 here and hit 0x00 last
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2293
    // we don't know if the key is aligned, hence not using load-execute form
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2294
    load_key(xmm_temp, key, 0x10, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2295
    __ pxor  (xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2296
    for (int offset = 0x20; offset <= 0xa0; offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2297
      aes_dec_key(xmm_result, xmm_temp, key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2298
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2299
    __ cmpl(keylen, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2300
    __ jcc(Assembler::equal, L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2301
    // only in 192 and 256 bit keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2302
    aes_dec_key(xmm_result, xmm_temp, key, 0xb0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2303
    aes_dec_key(xmm_result, xmm_temp, key, 0xc0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2304
    __ subl(keylen, 2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2305
    __ jcc(Assembler::equal, L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2306
    // only in 256 bit keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2307
    aes_dec_key(xmm_result, xmm_temp, key, 0xd0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2308
    aes_dec_key(xmm_result, xmm_temp, key, 0xe0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2309
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2310
    __ BIND(L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2311
    // for decryption the aesdeclast operation is always on key+0x00
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2312
    load_key(xmm_temp, key, 0x00, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2313
    __ aesdeclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2314
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2315
    __ movdqu(Address(to, 0), xmm_result);  // store the result
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2316
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2317
    __ xorptr(rax, rax); // return 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2318
    __ pop(rsi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2319
    __ leave(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2320
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2321
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2322
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2323
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2324
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2325
  void handleSOERegisters(bool saving) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2326
    const int saveFrameSizeInBytes = 4 * wordSize;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2327
    const Address saved_rbx     (rbp, -3 * wordSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2328
    const Address saved_rsi     (rbp, -2 * wordSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2329
    const Address saved_rdi     (rbp, -1 * wordSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2330
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2331
    if (saving) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2332
      __ subptr(rsp, saveFrameSizeInBytes);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2333
      __ movptr(saved_rsi, rsi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2334
      __ movptr(saved_rdi, rdi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2335
      __ movptr(saved_rbx, rbx);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2336
    } else {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2337
      // restoring
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2338
      __ movptr(rsi, saved_rsi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2339
      __ movptr(rdi, saved_rdi);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2340
      __ movptr(rbx, saved_rbx);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2341
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2342
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2343
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2344
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2345
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2346
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2347
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2348
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2349
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2350
  //   c_rarg3   - r vector byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2351
  //   c_rarg4   - input length
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2352
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2353
  address generate_cipherBlockChaining_encryptAESCrypt() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2354
    assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2355
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2356
    StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2357
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2358
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2359
    Label L_exit, L_key_192_256, L_key_256, L_loopTop_128, L_loopTop_192, L_loopTop_256;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2360
    const Register from        = rsi;      // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2361
    const Register to          = rdx;      // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2362
    const Register key         = rcx;      // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2363
    const Register rvec        = rdi;      // r byte array initialized from initvector array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2364
                                           // and left with the results of the last encryption block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2365
    const Register len_reg     = rbx;      // src len (must be multiple of blocksize 16)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2366
    const Register pos         = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2367
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2368
    // xmm register assignments for the loops below
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2369
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2370
    const XMMRegister xmm_temp   = xmm1;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2371
    // first 6 keys preloaded into xmm2-xmm7
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2372
    const int XMM_REG_NUM_KEY_FIRST = 2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2373
    const int XMM_REG_NUM_KEY_LAST  = 7;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2374
    const XMMRegister xmm_key0   = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2375
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2376
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2377
    handleSOERegisters(true /*saving*/);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2378
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2379
    // load registers from incoming parameters
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2380
    const Address  from_param(rbp, 8+0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2381
    const Address  to_param  (rbp, 8+4);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2382
    const Address  key_param (rbp, 8+8);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2383
    const Address  rvec_param (rbp, 8+12);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2384
    const Address  len_param  (rbp, 8+16);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2385
    __ movptr(from , from_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2386
    __ movptr(to   , to_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2387
    __ movptr(key  , key_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2388
    __ movptr(rvec , rvec_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2389
    __ movptr(len_reg , len_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2390
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2391
    const XMMRegister xmm_key_shuf_mask = xmm_temp;  // used temporarily to swap key bytes up front
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2392
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2393
    // load up xmm regs 2 thru 7 with keys 0-5
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2394
    for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x00; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2395
      load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2396
      offset += 0x10;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2397
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2398
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2399
    __ movdqu(xmm_result, Address(rvec, 0x00));   // initialize xmm_result with r vec
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2400
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2401
    // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2402
    __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2403
    __ cmpl(rax, 44);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2404
    __ jcc(Assembler::notEqual, L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2405
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2406
    // 128 bit code follows here
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2407
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2408
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2409
    __ BIND(L_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2410
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2411
    __ pxor  (xmm_result, xmm_temp);                                // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2412
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2413
    __ pxor  (xmm_result, xmm_key0);                                // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2414
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2415
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2416
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2417
    for (int key_offset = 0x60; key_offset <= 0x90; key_offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2418
      aes_enc_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2419
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2420
    load_key(xmm_temp, key, 0xa0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2421
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2422
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2423
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2424
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2425
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2426
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2427
    __ jcc(Assembler::notEqual, L_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2428
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2429
    __ BIND(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2430
    __ movdqu(Address(rvec, 0), xmm_result);     // final value of r stored in rvec of CipherBlockChaining object
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2431
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2432
    handleSOERegisters(false /*restoring*/);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2433
    __ movl(rax, 0);                             // return 0 (why?)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2434
    __ leave();                                  // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2435
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2436
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2437
  __ BIND(L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2438
  // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2439
    __ cmpl(rax, 52);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2440
    __ jcc(Assembler::notEqual, L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2441
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2442
    // 192-bit code follows here (could be changed to use more xmm registers)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2443
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2444
  __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2445
  __ BIND(L_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2446
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2447
    __ pxor  (xmm_result, xmm_temp);                                // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2448
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2449
    __ pxor  (xmm_result, xmm_key0);                                // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2450
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2451
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2452
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2453
    for (int key_offset = 0x60; key_offset <= 0xb0; key_offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2454
      aes_enc_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2455
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2456
    load_key(xmm_temp, key, 0xc0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2457
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2458
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2459
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);   // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2460
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2461
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2462
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2463
    __ jcc(Assembler::notEqual, L_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2464
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2465
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2466
  __ BIND(L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2467
    // 256-bit code follows here (could be changed to use more xmm registers)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2468
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2469
  __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2470
  __ BIND(L_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2471
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2472
    __ pxor  (xmm_result, xmm_temp);                                // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2473
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2474
    __ pxor  (xmm_result, xmm_key0);                                // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2475
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2476
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2477
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2478
    for (int key_offset = 0x60; key_offset <= 0xd0; key_offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2479
      aes_enc_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2480
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2481
    load_key(xmm_temp, key, 0xe0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2482
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2483
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2484
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);   // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2485
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2486
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2487
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2488
    __ jcc(Assembler::notEqual, L_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2489
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2490
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2491
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2492
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2493
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2494
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2495
  // CBC AES Decryption.
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2496
  // In 32-bit stub, because of lack of registers we do not try to parallelize 4 blocks at a time.
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2497
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2498
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2499
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2500
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2501
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2502
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2503
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2504
  //   c_rarg3   - r vector byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2505
  //   c_rarg4   - input length
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2506
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2507
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2508
  address generate_cipherBlockChaining_decryptAESCrypt() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2509
    assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2510
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2511
    StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2512
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2513
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2514
    Label L_exit, L_key_192_256, L_key_256;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2515
    Label L_singleBlock_loopTop_128;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2516
    Label L_singleBlock_loopTop_192, L_singleBlock_loopTop_256;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2517
    const Register from        = rsi;      // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2518
    const Register to          = rdx;      // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2519
    const Register key         = rcx;      // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2520
    const Register rvec        = rdi;      // r byte array initialized from initvector array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2521
                                           // and left with the results of the last encryption block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2522
    const Register len_reg     = rbx;      // src len (must be multiple of blocksize 16)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2523
    const Register pos         = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2524
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2525
    // xmm register assignments for the loops below
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2526
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2527
    const XMMRegister xmm_temp   = xmm1;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2528
    // first 6 keys preloaded into xmm2-xmm7
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2529
    const int XMM_REG_NUM_KEY_FIRST = 2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2530
    const int XMM_REG_NUM_KEY_LAST  = 7;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2531
    const int FIRST_NON_REG_KEY_offset = 0x70;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2532
    const XMMRegister xmm_key_first   = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2533
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2534
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2535
    handleSOERegisters(true /*saving*/);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2536
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2537
    // load registers from incoming parameters
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2538
    const Address  from_param(rbp, 8+0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2539
    const Address  to_param  (rbp, 8+4);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2540
    const Address  key_param (rbp, 8+8);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2541
    const Address  rvec_param (rbp, 8+12);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2542
    const Address  len_param  (rbp, 8+16);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2543
    __ movptr(from , from_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2544
    __ movptr(to   , to_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2545
    __ movptr(key  , key_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2546
    __ movptr(rvec , rvec_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2547
    __ movptr(len_reg , len_param);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2548
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2549
    // the java expanded key ordering is rotated one position from what we want
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2550
    // so we start from 0x10 here and hit 0x00 last
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2551
    const XMMRegister xmm_key_shuf_mask = xmm1;  // used temporarily to swap key bytes up front
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2552
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2553
    // load up xmm regs 2 thru 6 with first 5 keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2554
    for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x10; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2555
      load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2556
      offset += 0x10;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2557
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2558
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2559
    // inside here, use the rvec register to point to previous block cipher
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2560
    // with which we xor at the end of each newly decrypted block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2561
    const Register  prev_block_cipher_ptr = rvec;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2562
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2563
    // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2564
    __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2565
    __ cmpl(rax, 44);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2566
    __ jcc(Assembler::notEqual, L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2567
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2568
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2569
    // 128-bit code follows here, parallelized
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2570
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2571
  __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2572
  __ BIND(L_singleBlock_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2573
    __ cmpptr(len_reg, 0);           // any blocks left??
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2574
    __ jcc(Assembler::equal, L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2575
    __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of cipher input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2576
    __ pxor  (xmm_result, xmm_key_first);                             // do the aes dec rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2577
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2578
      __ aesdec(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2579
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2580
    for (int key_offset = FIRST_NON_REG_KEY_offset; key_offset <= 0xa0; key_offset += 0x10) {   // 128-bit runs up to key offset a0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2581
      aes_dec_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2582
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2583
    load_key(xmm_temp, key, 0x00);                                     // final key is stored in java expanded array at offset 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2584
    __ aesdeclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2585
    __ movdqu(xmm_temp, Address(prev_block_cipher_ptr, 0x00));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2586
    __ pxor  (xmm_result, xmm_temp);                                  // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2587
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2588
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2589
    __ lea(prev_block_cipher_ptr, Address(from, pos, Address::times_1, 0));     // set up new ptr
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2590
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2591
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2592
    __ jmp(L_singleBlock_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2593
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2594
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2595
    __ BIND(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2596
    __ movdqu(xmm_temp, Address(prev_block_cipher_ptr, 0x00));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2597
    __ movptr(rvec , rvec_param);                                     // restore this since used in loop
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2598
    __ movdqu(Address(rvec, 0), xmm_temp);                            // final value of r stored in rvec of CipherBlockChaining object
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2599
    handleSOERegisters(false /*restoring*/);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2600
    __ movl(rax, 0);                                                  // return 0 (why?)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2601
    __ leave();                                                       // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2602
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2603
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2604
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2605
    __ BIND(L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2606
    // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2607
    __ cmpl(rax, 52);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2608
    __ jcc(Assembler::notEqual, L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2609
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2610
    // 192-bit code follows here (could be optimized to use parallelism)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2611
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2612
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2613
    __ BIND(L_singleBlock_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2614
    __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of cipher input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2615
    __ pxor  (xmm_result, xmm_key_first);                             // do the aes dec rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2616
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2617
      __ aesdec(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2618
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2619
    for (int key_offset = FIRST_NON_REG_KEY_offset; key_offset <= 0xc0; key_offset += 0x10) {   // 192-bit runs up to key offset c0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2620
      aes_dec_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2621
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2622
    load_key(xmm_temp, key, 0x00);                                     // final key is stored in java expanded array at offset 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2623
    __ aesdeclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2624
    __ movdqu(xmm_temp, Address(prev_block_cipher_ptr, 0x00));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2625
    __ pxor  (xmm_result, xmm_temp);                                  // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2626
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2627
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2628
    __ lea(prev_block_cipher_ptr, Address(from, pos, Address::times_1, 0));     // set up new ptr
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2629
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2630
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2631
    __ jcc(Assembler::notEqual,L_singleBlock_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2632
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2633
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2634
    __ BIND(L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2635
    // 256-bit code follows here (could be optimized to use parallelism)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2636
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2637
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2638
    __ BIND(L_singleBlock_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2639
    __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of cipher input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2640
    __ pxor  (xmm_result, xmm_key_first);                             // do the aes dec rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2641
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2642
      __ aesdec(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2643
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2644
    for (int key_offset = FIRST_NON_REG_KEY_offset; key_offset <= 0xe0; key_offset += 0x10) {   // 256-bit runs up to key offset e0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2645
      aes_dec_key(xmm_result, xmm_temp, key, key_offset);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2646
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2647
    load_key(xmm_temp, key, 0x00);                                     // final key is stored in java expanded array at offset 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2648
    __ aesdeclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2649
    __ movdqu(xmm_temp, Address(prev_block_cipher_ptr, 0x00));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2650
    __ pxor  (xmm_result, xmm_temp);                                  // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2651
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2652
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2653
    __ lea(prev_block_cipher_ptr, Address(from, pos, Address::times_1, 0));     // set up new ptr
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2654
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2655
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2656
    __ jcc(Assembler::notEqual,L_singleBlock_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2657
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2658
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2659
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2660
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2661
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2662
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2663
 public:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2664
  // Information about frame layout at time of blocking runtime call.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2665
  // Note that we only have to preserve callee-saved registers since
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2666
  // the compilers are responsible for supplying a continuation point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2667
  // if they expect all registers to be preserved.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2668
  enum layout {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2669
    thread_off,    // last_java_sp
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2670
    arg1_off,
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2671
    arg2_off,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2672
    rbp_off,       // callee saved register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2673
    ret_pc,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2674
    framesize
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2675
  };
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2676
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2677
 private:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2678
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2679
#undef  __
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2680
#define __ masm->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2681
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2682
  //------------------------------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2683
  // Continuation point for throwing of implicit exceptions that are not handled in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2684
  // the current activation. Fabricates an exception oop and initiates normal
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2685
  // exception dispatching in this frame.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2686
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2687
  // Previously the compiler (c2) allowed for callee save registers on Java calls.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2688
  // This is no longer true after adapter frames were removed but could possibly
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2689
  // be brought back in the future if the interpreter code was reworked and it
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2690
  // was deemed worthwhile. The comment below was left to describe what must
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2691
  // happen here if callee saves were resurrected. As it stands now this stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2692
  // could actually be a vanilla BufferBlob and have now oopMap at all.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2693
  // Since it doesn't make much difference we've chosen to leave it the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2694
  // way it was in the callee save days and keep the comment.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2695
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2696
  // If we need to preserve callee-saved values we need a callee-saved oop map and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2697
  // therefore have to make these stubs into RuntimeStubs rather than BufferBlobs.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2698
  // If the compiler needs all registers to be preserved between the fault
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2699
  // point and the exception handler then it must assume responsibility for that in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2700
  // AbstractCompiler::continuation_for_implicit_null_exception or
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2701
  // continuation_for_implicit_division_by_zero_exception. All other implicit
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2702
  // exceptions (e.g., NullPointerException or AbstractMethodError on entry) are
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2703
  // either at call sites or otherwise assume that stack unwinding will be initiated,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2704
  // so caller saved registers were assumed volatile in the compiler.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2705
  address generate_throw_exception(const char* name, address runtime_entry,
10545
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  2706
                                   Register arg1 = noreg, Register arg2 = noreg) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2707
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2708
    int insts_size = 256;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2709
    int locs_size  = 32;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2710
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2711
    CodeBuffer code(name, insts_size, locs_size);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2712
    OopMapSet* oop_maps  = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2713
    MacroAssembler* masm = new MacroAssembler(&code);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2714
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2715
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2716
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2717
    // This is an inlined and slightly modified version of call_VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2718
    // which has the ability to fetch the return PC out of
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2719
    // thread-local storage and also sets up last_Java_sp slightly
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2720
    // differently than the real call_VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2721
    Register java_thread = rbx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2722
    __ get_thread(java_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2723
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2724
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2725
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2726
    // pc and rbp, already pushed
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2727
    __ subptr(rsp, (framesize-2) * wordSize); // prolog
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2728
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2729
    // Frame is now completed as far as size and linkage.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2730
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2731
    int frame_complete = __ pc() - start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2732
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2733
    // push java thread (becomes first argument of C function)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2734
    __ movptr(Address(rsp, thread_off * wordSize), java_thread);
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2735
    if (arg1 != noreg) {
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2736
      __ movptr(Address(rsp, arg1_off * wordSize), arg1);
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2737
    }
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2738
    if (arg2 != noreg) {
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2739
      assert(arg1 != noreg, "missing reg arg");
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2740
      __ movptr(Address(rsp, arg2_off * wordSize), arg2);
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2741
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2742
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2743
    // Set up last_Java_sp and last_Java_fp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2744
    __ set_last_Java_frame(java_thread, rsp, rbp, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2745
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2746
    // Call runtime
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2747
    BLOCK_COMMENT("call runtime_entry");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2748
    __ call(RuntimeAddress(runtime_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2749
    // Generate oop map
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2750
    OopMap* map =  new OopMap(framesize, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2751
    oop_maps->add_gc_map(__ pc() - start, map);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2752
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2753
    // restore the thread (cannot use the pushed argument since arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2754
    // may be overwritten by C code generated by an optimizing compiler);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2755
    // however can use the register value directly if it is callee saved.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2756
    __ get_thread(java_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2757
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2758
    __ reset_last_Java_frame(java_thread, true, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2759
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2760
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2761
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2762
    // check for pending exceptions
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2763
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2764
    Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2765
    __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2766
    __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2767
    __ should_not_reach_here();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2768
    __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2769
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2770
    __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2771
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2772
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2773
    RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, framesize, oop_maps, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2774
    return stub->entry_point();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2775
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2776
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2777
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2778
  void create_control_words() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2779
    // Round to nearest, 53-bit mode, exceptions masked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2780
    StubRoutines::_fpu_cntrl_wrd_std   = 0x027F;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2781
    // Round to zero, 53-bit mode, exception mased
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2782
    StubRoutines::_fpu_cntrl_wrd_trunc = 0x0D7F;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2783
    // Round to nearest, 24-bit mode, exceptions masked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2784
    StubRoutines::_fpu_cntrl_wrd_24    = 0x007F;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2785
    // Round to nearest, 64-bit mode, exceptions masked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2786
    StubRoutines::_fpu_cntrl_wrd_64    = 0x037F;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2787
    // Round to nearest, 64-bit mode, exceptions masked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2788
    StubRoutines::_mxcsr_std           = 0x1F80;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2789
    // Note: the following two constants are 80-bit values
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2790
    //       layout is critical for correct loading by FPU.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2791
    // Bias for strict fp multiply/divide
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2792
    StubRoutines::_fpu_subnormal_bias1[0]= 0x00000000; // 2^(-15360) == 0x03ff 8000 0000 0000 0000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2793
    StubRoutines::_fpu_subnormal_bias1[1]= 0x80000000;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2794
    StubRoutines::_fpu_subnormal_bias1[2]= 0x03ff;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2795
    // Un-Bias for strict fp multiply/divide
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2796
    StubRoutines::_fpu_subnormal_bias2[0]= 0x00000000; // 2^(+15360) == 0x7bff 8000 0000 0000 0000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2797
    StubRoutines::_fpu_subnormal_bias2[1]= 0x80000000;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2798
    StubRoutines::_fpu_subnormal_bias2[2]= 0x7bff;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2799
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2800
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2801
  //---------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2802
  // Initialization
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2803
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2804
  void generate_initial() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2805
    // Generates all stubs and initializes the entry points
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2806
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2807
    //------------------------------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2808
    // entry points that exist in all platforms
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2809
    // Note: This is code that could be shared among different platforms - however the benefit seems to be smaller than
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2810
    //       the disadvantage of having a much more complicated generator structure. See also comment in stubRoutines.hpp.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2811
    StubRoutines::_forward_exception_entry      = generate_forward_exception();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2812
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2813
    StubRoutines::_call_stub_entry              =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2814
      generate_call_stub(StubRoutines::_call_stub_return_address);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2815
    // is referenced by megamorphic call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2816
    StubRoutines::_catch_exception_entry        = generate_catch_exception();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2817
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2818
    // These are currently used by Solaris/Intel
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2819
    StubRoutines::_atomic_xchg_entry            = generate_atomic_xchg();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2820
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2821
    StubRoutines::_handler_for_unsafe_access_entry =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2822
      generate_handler_for_unsafe_access();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2823
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2824
    // platform dependent
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2825
    create_control_words();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2826
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2827
    StubRoutines::x86::_verify_mxcsr_entry                 = generate_verify_mxcsr();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2828
    StubRoutines::x86::_verify_fpu_cntrl_wrd_entry         = generate_verify_fpu_cntrl_wrd();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2829
    StubRoutines::_d2i_wrapper                              = generate_d2i_wrapper(T_INT,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2830
                                                                                   CAST_FROM_FN_PTR(address, SharedRuntime::d2i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2831
    StubRoutines::_d2l_wrapper                              = generate_d2i_wrapper(T_LONG,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2832
                                                                                   CAST_FROM_FN_PTR(address, SharedRuntime::d2l));
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2833
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8498
diff changeset
  2834
    // Build this early so it's available for the interpreter
11411
16b151e1e088 7116216: StackOverflow GC crash
bdelsart
parents: 10565
diff changeset
  2835
    StubRoutines::_throw_StackOverflowError_entry          = generate_throw_exception("StackOverflowError throw_exception",           CAST_FROM_FN_PTR(address, SharedRuntime::throw_StackOverflowError));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2836
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2837
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2838
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2839
  void generate_all() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2840
    // Generates all stubs and initializes the entry points
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2841
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2842
    // These entry points require SharedInfo::stack0 to be set up in non-core builds
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2843
    // and need to be relocatable, so they each fabricate a RuntimeStub internally.
10545
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  2844
    StubRoutines::_throw_AbstractMethodError_entry         = generate_throw_exception("AbstractMethodError throw_exception",          CAST_FROM_FN_PTR(address, SharedRuntime::throw_AbstractMethodError));
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  2845
    StubRoutines::_throw_IncompatibleClassChangeError_entry= generate_throw_exception("IncompatibleClassChangeError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_IncompatibleClassChangeError));
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  2846
    StubRoutines::_throw_NullPointerException_at_call_entry= generate_throw_exception("NullPointerException at call throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_NullPointerException_at_call));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2847
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2848
    //------------------------------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2849
    // entry points that are platform specific
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2850
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2851
    // support for verify_oop (must happen after universe_init)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2852
    StubRoutines::_verify_oop_subroutine_entry     = generate_verify_oop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2853
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2854
    // arraycopy stubs used by compilers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2855
    generate_arraycopy_stubs();
2534
08dac9ce0cd7 6655638: dynamic languages need method handles
jrose
parents: 2259
diff changeset
  2856
4645
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 3262
diff changeset
  2857
    generate_math_stubs();
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2858
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2859
    // don't bother generating these AES intrinsic stubs unless global flag is set
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2860
    if (UseAESIntrinsics) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2861
      StubRoutines::x86::_key_shuffle_mask_addr = generate_key_shuffle_mask();  // might be needed by the others
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2862
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2863
      StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2864
      StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2865
      StubRoutines::_cipherBlockChaining_encryptAESCrypt = generate_cipherBlockChaining_encryptAESCrypt();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2866
      StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptAESCrypt();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2867
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2868
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2869
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2870
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2871
 public:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2872
  StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2873
    if (all) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2874
      generate_all();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2875
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2876
      generate_initial();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2877
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2878
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2879
}; // end class declaration
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2880
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2881
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2882
void StubGenerator_generate(CodeBuffer* code, bool all) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2883
  StubGenerator g(code, all);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2884
}