author | kvn |
Fri, 26 Aug 2011 08:52:22 -0700 | |
changeset 10501 | 5bce84af0883 |
parent 10267 | 8bdeec886dc4 |
child 10512 | 935fc9d89f08 |
permissions | -rw-r--r-- |
1 | 1 |
/* |
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* Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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||
7397 | 25 |
#include "precompiled.hpp" |
26 |
#include "assembler_sparc.inline.hpp" |
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#include "memory/resourceArea.hpp" |
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#include "runtime/java.hpp" |
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#include "runtime/stubCodeGenerator.hpp" |
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#include "vm_version_sparc.hpp" |
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#ifdef TARGET_OS_FAMILY_linux |
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# include "os_linux.inline.hpp" |
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33 |
#endif |
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#ifdef TARGET_OS_FAMILY_solaris |
|
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# include "os_solaris.inline.hpp" |
|
36 |
#endif |
|
1 | 37 |
|
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int VM_Version::_features = VM_Version::unknown_m; |
|
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const char* VM_Version::_features_str = ""; |
|
40 |
||
41 |
void VM_Version::initialize() { |
|
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_features = determine_features(); |
|
43 |
PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes(); |
|
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PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes(); |
|
45 |
PrefetchFieldsAhead = prefetch_fields_ahead(); |
|
46 |
||
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assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 1, "invalid value"); |
48 |
if( AllocatePrefetchInstr < 0 ) AllocatePrefetchInstr = 0; |
|
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if( AllocatePrefetchInstr > 1 ) AllocatePrefetchInstr = 0; |
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||
1 | 51 |
// Allocation prefetch settings |
10267 | 52 |
intx cache_line_size = prefetch_data_size(); |
1 | 53 |
if( cache_line_size > AllocatePrefetchStepSize ) |
54 |
AllocatePrefetchStepSize = cache_line_size; |
|
10267 | 55 |
|
56 |
assert(AllocatePrefetchLines > 0, "invalid value"); |
|
57 |
if( AllocatePrefetchLines < 1 ) // set valid value in product VM |
|
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AllocatePrefetchLines = 3; |
|
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assert(AllocateInstancePrefetchLines > 0, "invalid value"); |
|
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if( AllocateInstancePrefetchLines < 1 ) // set valid value in product VM |
|
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AllocateInstancePrefetchLines = 1; |
|
1 | 62 |
|
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AllocatePrefetchDistance = allocate_prefetch_distance(); |
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AllocatePrefetchStyle = allocate_prefetch_style(); |
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||
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assert((AllocatePrefetchDistance % AllocatePrefetchStepSize) == 0 && |
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(AllocatePrefetchDistance > 0), "invalid value"); |
|
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if ((AllocatePrefetchDistance % AllocatePrefetchStepSize) != 0 || |
|
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(AllocatePrefetchDistance <= 0)) { |
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AllocatePrefetchDistance = AllocatePrefetchStepSize; |
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} |
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1 | 72 |
|
10252 | 73 |
if (AllocatePrefetchStyle == 3 && !has_blk_init()) { |
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warning("BIS instructions are not available on this CPU"); |
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FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1); |
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} |
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||
1 | 78 |
UseSSE = 0; // Only on x86 and x64 |
79 |
||
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_supports_cx8 = has_v9(); |
1 | 81 |
|
7704 | 82 |
if (is_niagara()) { |
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// Indirect branch is the same cost as direct |
84 |
if (FLAG_IS_DEFAULT(UseInlineCaches)) { |
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2342 | 85 |
FLAG_SET_DEFAULT(UseInlineCaches, false); |
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} |
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// Align loops on a single instruction boundary. |
88 |
if (FLAG_IS_DEFAULT(OptoLoopAlignment)) { |
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FLAG_SET_DEFAULT(OptoLoopAlignment, 4); |
|
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} |
|
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// When using CMS, we cannot use memset() in BOT updates because |
|
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// the sun4v/CMT version in libc_psr uses BIS which exposes |
|
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// "phantom zeros" to concurrent readers. See 6948537. |
|
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if (FLAG_IS_DEFAULT(UseMemSetInBOT) && UseConcMarkSweepGC) { |
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FLAG_SET_DEFAULT(UseMemSetInBOT, false); |
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} |
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#ifdef _LP64 |
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// 32-bit oops don't make sense for the 64-bit VM on sparc |
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// since the 32-bit VM has the same registers and smaller objects. |
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Universe::set_narrow_oop_shift(LogMinObjAlignmentInBytes); |
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#endif // _LP64 |
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#ifdef COMPILER2 |
103 |
// Indirect branch is the same cost as direct |
|
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if (FLAG_IS_DEFAULT(UseJumpTables)) { |
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2342 | 105 |
FLAG_SET_DEFAULT(UseJumpTables, true); |
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} |
107 |
// Single-issue, so entry and loop tops are |
|
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// aligned on a single instruction boundary |
|
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if (FLAG_IS_DEFAULT(InteriorEntryAlignment)) { |
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FLAG_SET_DEFAULT(InteriorEntryAlignment, 4); |
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} |
7704 | 112 |
if (is_niagara_plus()) { |
10267 | 113 |
if (has_blk_init() && UseTLAB && |
114 |
FLAG_IS_DEFAULT(AllocatePrefetchInstr)) { |
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// Use BIS instruction for TLAB allocation prefetch. |
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FLAG_SET_ERGO(intx, AllocatePrefetchInstr, 1); |
|
117 |
if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { |
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FLAG_SET_ERGO(intx, AllocatePrefetchStyle, 3); |
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} |
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if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) { |
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// Use smaller prefetch distance with BIS |
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FLAG_SET_DEFAULT(AllocatePrefetchDistance, 64); |
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} |
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} |
10267 | 125 |
if (is_T4()) { |
126 |
// Double number of prefetched cache lines on T4 |
|
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// since L2 cache line size is smaller (32 bytes). |
|
128 |
if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) { |
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129 |
FLAG_SET_ERGO(intx, AllocatePrefetchLines, AllocatePrefetchLines*2); |
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} |
|
131 |
if (FLAG_IS_DEFAULT(AllocateInstancePrefetchLines)) { |
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FLAG_SET_ERGO(intx, AllocateInstancePrefetchLines, AllocateInstancePrefetchLines*2); |
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} |
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} |
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if (AllocatePrefetchStyle != 3 && FLAG_IS_DEFAULT(AllocatePrefetchDistance)) { |
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// Use different prefetch distance without BIS |
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FLAG_SET_DEFAULT(AllocatePrefetchDistance, 256); |
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} |
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if (AllocatePrefetchInstr == 1) { |
140 |
// Need a space at the end of TLAB for BIS since it |
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// will fault when accessing memory outside of heap. |
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||
143 |
// +1 for rounding up to next cache line, +1 to be safe |
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int lines = AllocatePrefetchLines + 2; |
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int step_size = AllocatePrefetchStepSize; |
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int distance = AllocatePrefetchDistance; |
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_reserve_for_allocation_prefetch = (distance + step_size*lines)/(int)HeapWordSize; |
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} |
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1 | 149 |
} |
150 |
#endif |
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} |
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||
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// Use hardware population count instruction if available. |
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if (has_hardware_popc()) { |
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|
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if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { |
2342 | 156 |
FLAG_SET_DEFAULT(UsePopCountInstruction, true); |
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} |
10252 | 158 |
} else if (UsePopCountInstruction) { |
159 |
warning("POPC instruction is not available on this CPU"); |
|
160 |
FLAG_SET_DEFAULT(UsePopCountInstruction, false); |
|
161 |
} |
|
162 |
||
163 |
// T4 and newer Sparc cpus have new compare and branch instruction. |
|
164 |
if (has_cbcond()) { |
|
165 |
if (FLAG_IS_DEFAULT(UseCBCond)) { |
|
166 |
FLAG_SET_DEFAULT(UseCBCond, true); |
|
167 |
} |
|
168 |
} else if (UseCBCond) { |
|
169 |
warning("CBCOND instruction is not available on this CPU"); |
|
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FLAG_SET_DEFAULT(UseCBCond, false); |
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} |
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172 |
|
10501 | 173 |
assert(BlockZeroingLowLimit > 0, "invalid value"); |
174 |
if (has_block_zeroing()) { |
|
175 |
if (FLAG_IS_DEFAULT(UseBlockZeroing)) { |
|
176 |
FLAG_SET_DEFAULT(UseBlockZeroing, true); |
|
177 |
} |
|
178 |
} else if (UseBlockZeroing) { |
|
179 |
warning("BIS zeroing instructions are not available on this CPU"); |
|
180 |
FLAG_SET_DEFAULT(UseBlockZeroing, false); |
|
181 |
} |
|
182 |
||
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#ifdef COMPILER2 |
10252 | 184 |
// T4 and newer Sparc cpus have fast RDPC. |
185 |
if (has_fast_rdpc() && FLAG_IS_DEFAULT(UseRDPCForConstantTableBase)) { |
|
186 |
// FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true); |
|
187 |
} |
|
188 |
||
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// Currently not supported anywhere. |
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FLAG_SET_DEFAULT(UseFPUForSpilling, false); |
10264 | 191 |
|
192 |
assert((InteriorEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
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#endif |
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194 |
|
10264 | 195 |
assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
196 |
assert((OptoLoopAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
|
197 |
||
1 | 198 |
char buf[512]; |
10252 | 199 |
jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s", |
200 |
(has_v9() ? ", v9" : (has_v8() ? ", v8" : "")), |
|
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201 |
(has_hardware_popc() ? ", popc" : ""), |
10252 | 202 |
(has_vis1() ? ", vis1" : ""), |
203 |
(has_vis2() ? ", vis2" : ""), |
|
204 |
(has_vis3() ? ", vis3" : ""), |
|
205 |
(has_blk_init() ? ", blk_init" : ""), |
|
206 |
(has_cbcond() ? ", cbcond" : ""), |
|
207 |
(is_ultra3() ? ", ultra3" : ""), |
|
208 |
(is_sun4v() ? ", sun4v" : ""), |
|
209 |
(is_niagara_plus() ? ", niagara_plus" : (is_niagara() ? ", niagara" : "")), |
|
210 |
(is_sparc64() ? ", sparc64" : ""), |
|
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(!has_hardware_mul32() ? ", no-mul32" : ""), |
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212 |
(!has_hardware_div32() ? ", no-div32" : ""), |
1 | 213 |
(!has_hardware_fsmuld() ? ", no-fsmuld" : "")); |
214 |
||
215 |
// buf is started with ", " or is empty |
|
216 |
_features_str = strdup(strlen(buf) > 2 ? buf + 2 : buf); |
|
217 |
||
10027 | 218 |
// UseVIS is set to the smallest of what hardware supports and what |
219 |
// the command line requires. I.e., you cannot set UseVIS to 3 on |
|
220 |
// older UltraSparc which do not support it. |
|
221 |
if (UseVIS > 3) UseVIS=3; |
|
222 |
if (UseVIS < 0) UseVIS=0; |
|
223 |
if (!has_vis3()) // Drop to 2 if no VIS3 support |
|
224 |
UseVIS = MIN2((intx)2,UseVIS); |
|
225 |
if (!has_vis2()) // Drop to 1 if no VIS2 support |
|
226 |
UseVIS = MIN2((intx)1,UseVIS); |
|
227 |
if (!has_vis1()) // Drop to 0 if no VIS1 support |
|
228 |
UseVIS = 0; |
|
229 |
||
1 | 230 |
#ifndef PRODUCT |
231 |
if (PrintMiscellaneous && Verbose) { |
|
10267 | 232 |
tty->print("Allocation"); |
1 | 233 |
if (AllocatePrefetchStyle <= 0) { |
10267 | 234 |
tty->print_cr(": no prefetching"); |
1 | 235 |
} else { |
10267 | 236 |
tty->print(" prefetching: "); |
237 |
if (AllocatePrefetchInstr == 0) { |
|
238 |
tty->print("PREFETCH"); |
|
239 |
} else if (AllocatePrefetchInstr == 1) { |
|
240 |
tty->print("BIS"); |
|
241 |
} |
|
1 | 242 |
if (AllocatePrefetchLines > 1) { |
10267 | 243 |
tty->print_cr(" at distance %d, %d lines of %d bytes", AllocatePrefetchDistance, AllocatePrefetchLines, AllocatePrefetchStepSize); |
1 | 244 |
} else { |
10267 | 245 |
tty->print_cr(" at distance %d, one line of %d bytes", AllocatePrefetchDistance, AllocatePrefetchStepSize); |
1 | 246 |
} |
247 |
} |
|
248 |
if (PrefetchCopyIntervalInBytes > 0) { |
|
249 |
tty->print_cr("PrefetchCopyIntervalInBytes %d", PrefetchCopyIntervalInBytes); |
|
250 |
} |
|
251 |
if (PrefetchScanIntervalInBytes > 0) { |
|
252 |
tty->print_cr("PrefetchScanIntervalInBytes %d", PrefetchScanIntervalInBytes); |
|
253 |
} |
|
254 |
if (PrefetchFieldsAhead > 0) { |
|
255 |
tty->print_cr("PrefetchFieldsAhead %d", PrefetchFieldsAhead); |
|
256 |
} |
|
257 |
} |
|
258 |
#endif // PRODUCT |
|
259 |
} |
|
260 |
||
261 |
void VM_Version::print_features() { |
|
262 |
tty->print_cr("Version:%s", cpu_features()); |
|
263 |
} |
|
264 |
||
265 |
int VM_Version::determine_features() { |
|
266 |
if (UseV8InstrsOnly) { |
|
267 |
NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-V8");) |
|
268 |
return generic_v8_m; |
|
269 |
} |
|
270 |
||
271 |
int features = platform_features(unknown_m); // platform_features() is os_arch specific |
|
272 |
||
273 |
if (features == unknown_m) { |
|
274 |
features = generic_v9_m; |
|
275 |
warning("Cannot recognize SPARC version. Default to V9"); |
|
276 |
} |
|
277 |
||
7704 | 278 |
assert(is_T_family(features) == is_niagara(features), "Niagara should be T series"); |
279 |
if (UseNiagaraInstrs) { // Force code generation for Niagara |
|
280 |
if (is_T_family(features)) { |
|
1 | 281 |
// Happy to accomodate... |
282 |
} else { |
|
283 |
NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-Niagara");) |
|
7704 | 284 |
features |= T_family_m; |
1 | 285 |
} |
286 |
} else { |
|
7704 | 287 |
if (is_T_family(features) && !FLAG_IS_DEFAULT(UseNiagaraInstrs)) { |
1 | 288 |
NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-Not-Niagara");) |
7704 | 289 |
features &= ~(T_family_m | T1_model_m); |
1 | 290 |
} else { |
291 |
// Happy to accomodate... |
|
292 |
} |
|
293 |
} |
|
294 |
||
295 |
return features; |
|
296 |
} |
|
297 |
||
298 |
static int saved_features = 0; |
|
299 |
||
300 |
void VM_Version::allow_all() { |
|
301 |
saved_features = _features; |
|
302 |
_features = all_features_m; |
|
303 |
} |
|
304 |
||
305 |
void VM_Version::revert() { |
|
306 |
_features = saved_features; |
|
307 |
} |
|
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308 |
|
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309 |
unsigned int VM_Version::calc_parallel_worker_threads() { |
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|
310 |
unsigned int result; |
7704 | 311 |
if (is_niagara_plus()) { |
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312 |
result = nof_parallel_worker_threads(5, 16, 8); |
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|
313 |
} else { |
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314 |
result = nof_parallel_worker_threads(5, 8, 8); |
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diff
changeset
|
315 |
} |
ba55c7f3fd45
6362677: Change parallel GC collector default number of parallel GC threads.
jmasa
parents:
1
diff
changeset
|
316 |
return result; |
ba55c7f3fd45
6362677: Change parallel GC collector default number of parallel GC threads.
jmasa
parents:
1
diff
changeset
|
317 |
} |