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7057978: improve robustness of c1 ARM back-end wrt non encodable constants
authorbdelsart
Wed, 14 Sep 2011 10:40:13 +0200
changeset 10550 0a3c7a00fdc1
parent 10549 76e964ccce5a
child 10551 095307d09cb3
7057978: improve robustness of c1 ARM back-end wrt non encodable constants Summary: ARM only, avoid assertion failures for huge constants generated by C1 shared code Reviewed-by: never, vladidan
hotspot/src/share/vm/c1/c1_LIR.cpp file | annotate | diff | comparison | revisions 
--- a/hotspot/src/share/vm/c1/c1_LIR.cpp	Tue Sep 13 11:46:51 2011 -0700
+++ b/hotspot/src/share/vm/c1/c1_LIR.cpp	Wed Sep 14 10:40:13 2011 +0200
@@ -142,7 +142,8 @@
 #endif
 #ifdef ARM
   assert(disp() == 0 || index()->is_illegal(), "can't have both");
-  assert(-4096 < disp() && disp() < 4096, "architecture constraint");
+  // Note: offsets higher than 4096 must not be rejected here. They can
+  // be handled by the back-end or will be rejected if not.
 #endif
 #ifdef _LP64
   assert(base()->is_cpu_register(), "wrong base operand");
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