# HG changeset patch
# User bdelsart
# Date 1315989613 -7200
# Node ID 0a3c7a00fdc1bb5427af3eb6b5ff39e0aa134408
# Parent  76e964ccce5acc15e9c460c9741dd162dca0b62c
7057978: improve robustness of c1 ARM back-end wrt non encodable constants
Summary: ARM only, avoid assertion failures for huge constants generated by C1 shared code
Reviewed-by: never, vladidan

diff -r 76e964ccce5a -r 0a3c7a00fdc1 hotspot/src/share/vm/c1/c1_LIR.cpp
--- a/hotspot/src/share/vm/c1/c1_LIR.cpp	Tue Sep 13 11:46:51 2011 -0700
+++ b/hotspot/src/share/vm/c1/c1_LIR.cpp	Wed Sep 14 10:40:13 2011 +0200
@@ -142,7 +142,8 @@
 #endif
 #ifdef ARM
   assert(disp() == 0 || index()->is_illegal(), "can't have both");
-  assert(-4096 < disp() && disp() < 4096, "architecture constraint");
+  // Note: offsets higher than 4096 must not be rejected here. They can
+  // be handled by the back-end or will be rejected if not.
 #endif
 #ifdef _LP64
   assert(base()->is_cpu_register(), "wrong base operand");