author | shade |
Mon, 26 Mar 2018 09:56:36 +0200 | |
branch | epsilon-gc-branch |
changeset 56348 | f3b0961adb3c |
parent 56276 | ee5e58456be5 |
parent 49347 | edb65305d3ac |
child 56406 | e629240491c7 |
permissions | -rw-r--r-- |
1 | 1 |
/* |
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* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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||
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#include "precompiled.hpp" |
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#include "asm/macroAssembler.inline.hpp" |
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#include "gc/shared/cardTable.hpp" |
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#include "gc/shared/cardTableModRefBS.hpp" |
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#include "interpreter/interpreter.hpp" |
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#include "nativeInst_sparc.hpp" |
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#include "oops/instanceOop.hpp" |
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#include "oops/method.hpp" |
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#include "oops/objArrayKlass.hpp" |
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#include "oops/oop.inline.hpp" |
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#include "prims/methodHandles.hpp" |
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#include "runtime/frame.inline.hpp" |
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#include "runtime/handles.inline.hpp" |
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#include "runtime/sharedRuntime.hpp" |
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#include "runtime/stubCodeGenerator.hpp" |
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#include "runtime/stubRoutines.hpp" |
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#include "runtime/thread.inline.hpp" |
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#ifdef COMPILER2 |
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#include "opto/runtime.hpp" |
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#endif |
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// Declaration and definition of StubGenerator (no .hpp file). |
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// For a more detailed description of the stub routine structure |
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// see the comment in stubRoutines.hpp. |
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#define __ _masm-> |
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||
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#ifdef PRODUCT |
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#define BLOCK_COMMENT(str) /* nothing */ |
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#else |
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#define BLOCK_COMMENT(str) __ block_comment(str) |
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#endif |
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||
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#define BIND(label) bind(label); BLOCK_COMMENT(#label ":") |
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||
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// Note: The register L7 is used as L7_thread_cache, and may not be used |
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// any other way within this module. |
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static const Register& Lstub_temp = L2; |
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// ------------------------------------------------------------------------------------------------------------------------- |
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// Stub Code definitions |
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class StubGenerator: public StubCodeGenerator { |
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private: |
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||
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#ifdef PRODUCT |
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#define inc_counter_np(a,b,c) |
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#else |
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#define inc_counter_np(counter, t1, t2) \ |
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BLOCK_COMMENT("inc_counter " #counter); \ |
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__ inc_counter(&counter, t1, t2); |
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#endif |
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||
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//---------------------------------------------------------------------------------------------------- |
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// Call stubs are used to call Java from C |
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81 |
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address generate_call_stub(address& return_pc) { |
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StubCodeMark mark(this, "StubRoutines", "call_stub"); |
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address start = __ pc(); |
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// Incoming arguments: |
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// |
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// o0 : call wrapper address |
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// o1 : result (address) |
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// o2 : result type |
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// o3 : method |
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// o4 : (interpreter) entry point |
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// o5 : parameters (address) |
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// [sp + 0x5c]: parameter size (in words) |
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// [sp + 0x60]: thread |
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// |
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// +---------------+ <--- sp + 0 |
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// | | |
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// . reg save area . |
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// | | |
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// +---------------+ <--- sp + 0x40 |
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// | | |
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// . extra 7 slots . |
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// | | |
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// +---------------+ <--- sp + 0x5c |
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// | param. size | |
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// +---------------+ <--- sp + 0x60 |
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// | thread | |
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// +---------------+ |
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// | | |
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// note: if the link argument position changes, adjust |
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// the code in frame::entry_frame_call_wrapper() |
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114 |
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const Argument link = Argument(0, false); // used only for GC |
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const Argument result = Argument(1, false); |
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const Argument result_type = Argument(2, false); |
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const Argument method = Argument(3, false); |
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const Argument entry_point = Argument(4, false); |
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const Argument parameters = Argument(5, false); |
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const Argument parameter_size = Argument(6, false); |
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const Argument thread = Argument(7, false); |
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// setup thread register |
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__ ld_ptr(thread.as_address(), G2_thread); |
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__ reinit_heapbase(); |
1 | 127 |
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#ifdef ASSERT |
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// make sure we have no pending exceptions |
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{ const Register t = G3_scratch; |
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Label L; |
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__ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), t); |
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10252 | 133 |
__ br_null_short(t, Assembler::pt, L); |
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__ stop("StubRoutines::call_stub: entered with pending exception"); |
135 |
__ bind(L); |
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} |
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#endif |
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// create activation frame & allocate space for parameters |
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{ const Register t = G3_scratch; |
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__ ld_ptr(parameter_size.as_address(), t); // get parameter size (in words) |
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__ add(t, frame::memory_parameter_word_sp_offset, t); // add space for save area (in words) |
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__ round_to(t, WordsPerLong); // make sure it is multiple of 2 (in words) |
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__ sll(t, Interpreter::logStackElementSize, t); // compute number of bytes |
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__ neg(t); // negate so it can be used with save |
146 |
__ save(SP, t, SP); // setup new frame |
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} |
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// +---------------+ <--- sp + 0 |
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// | | |
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// . reg save area . |
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// | | |
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// +---------------+ <--- sp + 0x40 |
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// | | |
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// . extra 7 slots . |
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// | | |
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// +---------------+ <--- sp + 0x5c |
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// | empty slot | (only if parameter size is even) |
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// +---------------+ |
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160 |
// | | |
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// . parameters . |
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// | | |
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// +---------------+ <--- fp + 0 |
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// | | |
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// . reg save area . |
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// | | |
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// +---------------+ <--- fp + 0x40 |
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// | | |
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// . extra 7 slots . |
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// | | |
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// +---------------+ <--- fp + 0x5c |
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// | param. size | |
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// +---------------+ <--- fp + 0x60 |
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// | thread | |
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// +---------------+ |
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// | | |
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// pass parameters if any |
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BLOCK_COMMENT("pass parameters if any"); |
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{ const Register src = parameters.as_in().as_register(); |
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const Register dst = Lentry_args; |
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const Register tmp = G3_scratch; |
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const Register cnt = G4_scratch; |
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// test if any parameters & setup of Lentry_args |
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Label exit; |
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__ ld_ptr(parameter_size.as_in().as_address(), cnt); // parameter counter |
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__ add( FP, STACK_BIAS, dst ); |
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10252 | 189 |
__ cmp_zero_and_br(Assembler::zero, cnt, exit); |
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__ delayed()->sub(dst, BytesPerWord, dst); // setup Lentry_args |
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// copy parameters if any |
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Label loop; |
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__ BIND(loop); |
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// Store parameter value |
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__ ld_ptr(src, 0, tmp); |
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__ add(src, BytesPerWord, src); |
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5419 | 198 |
__ st_ptr(tmp, dst, 0); |
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__ deccc(cnt); |
200 |
__ br(Assembler::greater, false, Assembler::pt, loop); |
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5419 | 201 |
__ delayed()->sub(dst, Interpreter::stackElementSize, dst); |
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// done |
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__ BIND(exit); |
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} |
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// setup parameters, method & call Java function |
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#ifdef ASSERT |
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// layout_activation_impl checks it's notion of saved SP against |
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// this register, so if this changes update it as well. |
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const Register saved_SP = Lscratch; |
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__ mov(SP, saved_SP); // keep track of SP before call |
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#endif |
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214 |
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// setup parameters |
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const Register t = G3_scratch; |
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__ ld_ptr(parameter_size.as_in().as_address(), t); // get parameter size (in words) |
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5419 | 218 |
__ sll(t, Interpreter::logStackElementSize, t); // compute number of bytes |
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__ sub(FP, t, Gargs); // setup parameter pointer |
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__ add( Gargs, STACK_BIAS, Gargs ); // Account for LP64 stack bias |
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__ mov(SP, O5_savedSP); |
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223 |
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// do the call |
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// |
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// the following register must be setup: |
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// |
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// G2_thread |
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// G5_method |
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// Gargs |
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BLOCK_COMMENT("call Java function"); |
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__ jmpl(entry_point.as_in().as_register(), G0, O7); |
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__ delayed()->mov(method.as_in().as_register(), G5_method); // setup method |
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234 |
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BLOCK_COMMENT("call_stub_return_address:"); |
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return_pc = __ pc(); |
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237 |
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238 |
// The callee, if it wasn't interpreted, can return with SP changed so |
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// we can no longer assert of change of SP. |
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240 |
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// store result depending on type |
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// (everything that is not T_OBJECT, T_LONG, T_FLOAT, or T_DOUBLE |
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// is treated as T_INT) |
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{ const Register addr = result .as_in().as_register(); |
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const Register type = result_type.as_in().as_register(); |
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Label is_long, is_float, is_double, is_object, exit; |
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__ cmp(type, T_OBJECT); __ br(Assembler::equal, false, Assembler::pn, is_object); |
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__ delayed()->cmp(type, T_FLOAT); __ br(Assembler::equal, false, Assembler::pn, is_float); |
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__ delayed()->cmp(type, T_DOUBLE); __ br(Assembler::equal, false, Assembler::pn, is_double); |
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__ delayed()->cmp(type, T_LONG); __ br(Assembler::equal, false, Assembler::pn, is_long); |
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__ delayed()->nop(); |
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252 |
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253 |
// store int result |
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__ st(O0, addr, G0); |
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255 |
||
256 |
__ BIND(exit); |
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257 |
__ ret(); |
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__ delayed()->restore(); |
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259 |
||
260 |
__ BIND(is_object); |
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10252 | 261 |
__ ba(exit); |
1 | 262 |
__ delayed()->st_ptr(O0, addr, G0); |
263 |
||
264 |
__ BIND(is_float); |
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10252 | 265 |
__ ba(exit); |
1 | 266 |
__ delayed()->stf(FloatRegisterImpl::S, F0, addr, G0); |
267 |
||
268 |
__ BIND(is_double); |
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10252 | 269 |
__ ba(exit); |
1 | 270 |
__ delayed()->stf(FloatRegisterImpl::D, F0, addr, G0); |
271 |
||
272 |
__ BIND(is_long); |
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10252 | 273 |
__ ba(exit); |
1 | 274 |
__ delayed()->st_long(O0, addr, G0); // store entire long |
275 |
} |
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276 |
return start; |
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} |
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278 |
||
279 |
||
280 |
//---------------------------------------------------------------------------------------------------- |
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281 |
// Return point for a Java call if there's an exception thrown in Java code. |
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282 |
// The exception is caught and transformed into a pending exception stored in |
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283 |
// JavaThread that can be tested from within the VM. |
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284 |
// |
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285 |
// Oexception: exception oop |
|
286 |
||
287 |
address generate_catch_exception() { |
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288 |
StubCodeMark mark(this, "StubRoutines", "catch_exception"); |
|
289 |
||
290 |
address start = __ pc(); |
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291 |
// verify that thread corresponds |
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292 |
__ verify_thread(); |
|
293 |
||
294 |
const Register& temp_reg = Gtemp; |
|
2571 | 295 |
Address pending_exception_addr (G2_thread, Thread::pending_exception_offset()); |
296 |
Address exception_file_offset_addr(G2_thread, Thread::exception_file_offset ()); |
|
297 |
Address exception_line_offset_addr(G2_thread, Thread::exception_line_offset ()); |
|
1 | 298 |
|
299 |
// set pending exception |
|
300 |
__ verify_oop(Oexception); |
|
301 |
__ st_ptr(Oexception, pending_exception_addr); |
|
302 |
__ set((intptr_t)__FILE__, temp_reg); |
|
303 |
__ st_ptr(temp_reg, exception_file_offset_addr); |
|
304 |
__ set((intptr_t)__LINE__, temp_reg); |
|
305 |
__ st(temp_reg, exception_line_offset_addr); |
|
306 |
||
307 |
// complete return to VM |
|
308 |
assert(StubRoutines::_call_stub_return_address != NULL, "must have been generated before"); |
|
309 |
||
2571 | 310 |
AddressLiteral stub_ret(StubRoutines::_call_stub_return_address); |
311 |
__ jump_to(stub_ret, temp_reg); |
|
1 | 312 |
__ delayed()->nop(); |
313 |
||
314 |
return start; |
|
315 |
} |
|
316 |
||
317 |
||
318 |
//---------------------------------------------------------------------------------------------------- |
|
319 |
// Continuation point for runtime calls returning with a pending exception |
|
320 |
// The pending exception check happened in the runtime or native call stub |
|
321 |
// The pending exception in Thread is converted into a Java-level exception |
|
322 |
// |
|
323 |
// Contract with Java-level exception handler: O0 = exception |
|
324 |
// O1 = throwing pc |
|
325 |
||
326 |
address generate_forward_exception() { |
|
327 |
StubCodeMark mark(this, "StubRoutines", "forward_exception"); |
|
328 |
address start = __ pc(); |
|
329 |
||
330 |
// Upon entry, O7 has the return address returning into Java |
|
331 |
// (interpreted or compiled) code; i.e. the return address |
|
332 |
// becomes the throwing pc. |
|
333 |
||
334 |
const Register& handler_reg = Gtemp; |
|
335 |
||
2571 | 336 |
Address exception_addr(G2_thread, Thread::pending_exception_offset()); |
1 | 337 |
|
338 |
#ifdef ASSERT |
|
339 |
// make sure that this code is only executed if there is a pending exception |
|
340 |
{ Label L; |
|
341 |
__ ld_ptr(exception_addr, Gtemp); |
|
10252 | 342 |
__ br_notnull_short(Gtemp, Assembler::pt, L); |
1 | 343 |
__ stop("StubRoutines::forward exception: no pending exception (1)"); |
344 |
__ bind(L); |
|
345 |
} |
|
346 |
#endif |
|
347 |
||
348 |
// compute exception handler into handler_reg |
|
349 |
__ get_thread(); |
|
350 |
__ ld_ptr(exception_addr, Oexception); |
|
351 |
__ verify_oop(Oexception); |
|
352 |
__ save_frame(0); // compensates for compiler weakness |
|
353 |
__ add(O7->after_save(), frame::pc_return_offset, Lscratch); // save the issuing PC |
|
354 |
BLOCK_COMMENT("call exception_handler_for_return_address"); |
|
5046 | 355 |
__ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), G2_thread, Lscratch); |
1 | 356 |
__ mov(O0, handler_reg); |
357 |
__ restore(); // compensates for compiler weakness |
|
358 |
||
359 |
__ ld_ptr(exception_addr, Oexception); |
|
360 |
__ add(O7, frame::pc_return_offset, Oissuing_pc); // save the issuing PC |
|
361 |
||
362 |
#ifdef ASSERT |
|
363 |
// make sure exception is set |
|
364 |
{ Label L; |
|
10252 | 365 |
__ br_notnull_short(Oexception, Assembler::pt, L); |
1 | 366 |
__ stop("StubRoutines::forward exception: no pending exception (2)"); |
367 |
__ bind(L); |
|
368 |
} |
|
369 |
#endif |
|
370 |
// jump to exception handler |
|
371 |
__ jmp(handler_reg, 0); |
|
372 |
// clear pending exception |
|
373 |
__ delayed()->st_ptr(G0, exception_addr); |
|
374 |
||
375 |
return start; |
|
376 |
} |
|
377 |
||
18740 | 378 |
// Safefetch stubs. |
379 |
void generate_safefetch(const char* name, int size, address* entry, |
|
380 |
address* fault_pc, address* continuation_pc) { |
|
381 |
// safefetch signatures: |
|
382 |
// int SafeFetch32(int* adr, int errValue); |
|
383 |
// intptr_t SafeFetchN (intptr_t* adr, intptr_t errValue); |
|
384 |
// |
|
385 |
// arguments: |
|
386 |
// o0 = adr |
|
387 |
// o1 = errValue |
|
388 |
// |
|
389 |
// result: |
|
390 |
// o0 = *adr or errValue |
|
391 |
||
392 |
StubCodeMark mark(this, "StubRoutines", name); |
|
393 |
||
394 |
// Entry point, pc or function descriptor. |
|
395 |
__ align(CodeEntryAlignment); |
|
396 |
*entry = __ pc(); |
|
397 |
||
398 |
__ mov(O0, G1); // g1 = o0 |
|
399 |
__ mov(O1, O0); // o0 = o1 |
|
400 |
// Load *adr into c_rarg1, may fault. |
|
401 |
*fault_pc = __ pc(); |
|
402 |
switch (size) { |
|
403 |
case 4: |
|
404 |
// int32_t |
|
405 |
__ ldsw(G1, 0, O0); // o0 = [g1] |
|
406 |
break; |
|
407 |
case 8: |
|
408 |
// int64_t |
|
409 |
__ ldx(G1, 0, O0); // o0 = [g1] |
|
410 |
break; |
|
411 |
default: |
|
412 |
ShouldNotReachHere(); |
|
413 |
} |
|
414 |
||
415 |
// return errValue or *adr |
|
416 |
*continuation_pc = __ pc(); |
|
417 |
// By convention with the trap handler we ensure there is a non-CTI |
|
418 |
// instruction in the trap shadow. |
|
419 |
__ nop(); |
|
420 |
__ retl(); |
|
421 |
__ delayed()->nop(); |
|
422 |
} |
|
1 | 423 |
|
424 |
//------------------------------------------------------------------------------------------------------------------------ |
|
425 |
// Continuation point for throwing of implicit exceptions that are not handled in |
|
426 |
// the current activation. Fabricates an exception oop and initiates normal |
|
427 |
// exception dispatching in this frame. Only callee-saved registers are preserved |
|
428 |
// (through the normal register window / RegisterMap handling). |
|
429 |
// If the compiler needs all registers to be preserved between the fault |
|
430 |
// point and the exception handler then it must assume responsibility for that in |
|
431 |
// AbstractCompiler::continuation_for_implicit_null_exception or |
|
432 |
// continuation_for_implicit_division_by_zero_exception. All other implicit |
|
433 |
// exceptions (e.g., NullPointerException or AbstractMethodError on entry) are |
|
434 |
// either at call sites or otherwise assume that stack unwinding will be initiated, |
|
435 |
// so caller saved registers were assumed volatile in the compiler. |
|
436 |
||
437 |
// Note that we generate only this stub into a RuntimeStub, because it needs to be |
|
438 |
// properly traversed and ignored during GC, so we change the meaning of the "__" |
|
439 |
// macro within this method. |
|
440 |
#undef __ |
|
441 |
#define __ masm-> |
|
442 |
||
10545 | 443 |
address generate_throw_exception(const char* name, address runtime_entry, |
10004
190e88f7edd1
7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents:
8498
diff
changeset
|
444 |
Register arg1 = noreg, Register arg2 = noreg) { |
1 | 445 |
#ifdef ASSERT |
446 |
int insts_size = VerifyThread ? 1 * K : 600; |
|
447 |
#else |
|
448 |
int insts_size = VerifyThread ? 1 * K : 256; |
|
449 |
#endif /* ASSERT */ |
|
450 |
int locs_size = 32; |
|
451 |
||
452 |
CodeBuffer code(name, insts_size, locs_size); |
|
453 |
MacroAssembler* masm = new MacroAssembler(&code); |
|
454 |
||
455 |
__ verify_thread(); |
|
456 |
||
457 |
// This is an inlined and slightly modified version of call_VM |
|
458 |
// which has the ability to fetch the return PC out of thread-local storage |
|
459 |
__ assert_not_delayed(); |
|
460 |
||
461 |
// Note that we always push a frame because on the SPARC |
|
462 |
// architecture, for all of our implicit exception kinds at call |
|
463 |
// sites, the implicit exception is taken before the callee frame |
|
464 |
// is pushed. |
|
465 |
__ save_frame(0); |
|
466 |
||
467 |
int frame_complete = __ offset(); |
|
468 |
||
469 |
// Note that we always have a runtime stub frame on the top of stack by this point |
|
470 |
Register last_java_sp = SP; |
|
471 |
// 64-bit last_java_sp is biased! |
|
472 |
__ set_last_Java_frame(last_java_sp, G0); |
|
473 |
if (VerifyThread) __ mov(G2_thread, O0); // about to be smashed; pass early |
|
474 |
__ save_thread(noreg); |
|
10004
190e88f7edd1
7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents:
8498
diff
changeset
|
475 |
if (arg1 != noreg) { |
190e88f7edd1
7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents:
8498
diff
changeset
|
476 |
assert(arg2 != O1, "clobbered"); |
190e88f7edd1
7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents:
8498
diff
changeset
|
477 |
__ mov(arg1, O1); |
190e88f7edd1
7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents:
8498
diff
changeset
|
478 |
} |
190e88f7edd1
7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents:
8498
diff
changeset
|
479 |
if (arg2 != noreg) { |
190e88f7edd1
7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents:
8498
diff
changeset
|
480 |
__ mov(arg2, O2); |
190e88f7edd1
7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents:
8498
diff
changeset
|
481 |
} |
1 | 482 |
// do the call |
483 |
BLOCK_COMMENT("call runtime_entry"); |
|
484 |
__ call(runtime_entry, relocInfo::runtime_call_type); |
|
485 |
if (!VerifyThread) |
|
486 |
__ delayed()->mov(G2_thread, O0); // pass thread as first argument |
|
487 |
else |
|
488 |
__ delayed()->nop(); // (thread already passed) |
|
489 |
__ restore_thread(noreg); |
|
490 |
__ reset_last_Java_frame(); |
|
491 |
||
492 |
// check for pending exceptions. use Gtemp as scratch register. |
|
493 |
#ifdef ASSERT |
|
494 |
Label L; |
|
495 |
||
2571 | 496 |
Address exception_addr(G2_thread, Thread::pending_exception_offset()); |
1 | 497 |
Register scratch_reg = Gtemp; |
498 |
__ ld_ptr(exception_addr, scratch_reg); |
|
10252 | 499 |
__ br_notnull_short(scratch_reg, Assembler::pt, L); |
1 | 500 |
__ should_not_reach_here(); |
501 |
__ bind(L); |
|
502 |
#endif // ASSERT |
|
503 |
BLOCK_COMMENT("call forward_exception_entry"); |
|
504 |
__ call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type); |
|
505 |
// we use O7 linkage so that forward_exception_entry has the issuing PC |
|
506 |
__ delayed()->restore(); |
|
507 |
||
508 |
RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, masm->total_frame_size_in_bytes(0), NULL, false); |
|
509 |
return stub->entry_point(); |
|
510 |
} |
|
511 |
||
512 |
#undef __ |
|
513 |
#define __ _masm-> |
|
514 |
||
515 |
||
516 |
// Generate a routine that sets all the registers so we |
|
517 |
// can tell if the stop routine prints them correctly. |
|
518 |
address generate_test_stop() { |
|
519 |
StubCodeMark mark(this, "StubRoutines", "test_stop"); |
|
520 |
address start = __ pc(); |
|
521 |
||
522 |
int i; |
|
523 |
||
524 |
__ save_frame(0); |
|
525 |
||
526 |
static jfloat zero = 0.0, one = 1.0; |
|
527 |
||
528 |
// put addr in L0, then load through L0 to F0 |
|
529 |
__ set((intptr_t)&zero, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F0); |
|
530 |
__ set((intptr_t)&one, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F1); // 1.0 to F1 |
|
531 |
||
532 |
// use add to put 2..18 in F2..F18 |
|
533 |
for ( i = 2; i <= 18; ++i ) { |
|
534 |
__ fadd( FloatRegisterImpl::S, F1, as_FloatRegister(i-1), as_FloatRegister(i)); |
|
535 |
} |
|
536 |
||
537 |
// Now put double 2 in F16, double 18 in F18 |
|
538 |
__ ftof( FloatRegisterImpl::S, FloatRegisterImpl::D, F2, F16 ); |
|
539 |
__ ftof( FloatRegisterImpl::S, FloatRegisterImpl::D, F18, F18 ); |
|
540 |
||
541 |
// use add to put 20..32 in F20..F32 |
|
542 |
for (i = 20; i < 32; i += 2) { |
|
543 |
__ fadd( FloatRegisterImpl::D, F16, as_FloatRegister(i-2), as_FloatRegister(i)); |
|
544 |
} |
|
545 |
||
546 |
// put 0..7 in i's, 8..15 in l's, 16..23 in o's, 24..31 in g's |
|
547 |
for ( i = 0; i < 8; ++i ) { |
|
548 |
if (i < 6) { |
|
549 |
__ set( i, as_iRegister(i)); |
|
550 |
__ set(16 + i, as_oRegister(i)); |
|
551 |
__ set(24 + i, as_gRegister(i)); |
|
552 |
} |
|
553 |
__ set( 8 + i, as_lRegister(i)); |
|
554 |
} |
|
555 |
||
556 |
__ stop("testing stop"); |
|
557 |
||
558 |
||
559 |
__ ret(); |
|
560 |
__ delayed()->restore(); |
|
561 |
||
562 |
return start; |
|
563 |
} |
|
564 |
||
565 |
||
566 |
address generate_stop_subroutine() { |
|
567 |
StubCodeMark mark(this, "StubRoutines", "stop_subroutine"); |
|
568 |
address start = __ pc(); |
|
569 |
||
570 |
__ stop_subroutine(); |
|
571 |
||
572 |
return start; |
|
573 |
} |
|
574 |
||
575 |
address generate_flush_callers_register_windows() { |
|
576 |
StubCodeMark mark(this, "StubRoutines", "flush_callers_register_windows"); |
|
577 |
address start = __ pc(); |
|
578 |
||
18097 | 579 |
__ flushw(); |
1 | 580 |
__ retl(false); |
581 |
__ delayed()->add( FP, STACK_BIAS, O0 ); |
|
582 |
// The returned value must be a stack pointer whose register save area |
|
583 |
// is flushed, and will stay flushed while the caller executes. |
|
584 |
||
585 |
return start; |
|
586 |
} |
|
587 |
||
588 |
// Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest). |
|
589 |
// |
|
18097 | 590 |
// Arguments: |
1 | 591 |
// |
592 |
// exchange_value: O0 |
|
593 |
// dest: O1 |
|
594 |
// |
|
595 |
// Results: |
|
596 |
// |
|
597 |
// O0: the value previously stored in dest |
|
598 |
// |
|
599 |
address generate_atomic_xchg() { |
|
600 |
StubCodeMark mark(this, "StubRoutines", "atomic_xchg"); |
|
601 |
address start = __ pc(); |
|
602 |
||
603 |
if (UseCASForSwap) { |
|
604 |
// Use CAS instead of swap, just in case the MP hardware |
|
605 |
// prefers to work with just one kind of synch. instruction. |
|
606 |
Label retry; |
|
607 |
__ BIND(retry); |
|
608 |
__ mov(O0, O3); // scratch copy of exchange value |
|
609 |
__ ld(O1, 0, O2); // observe the previous value |
|
610 |
// try to replace O2 with O3 |
|
18097 | 611 |
__ cas(O1, O2, O3); |
10252 | 612 |
__ cmp_and_br_short(O2, O3, Assembler::notEqual, Assembler::pn, retry); |
1 | 613 |
|
614 |
__ retl(false); |
|
615 |
__ delayed()->mov(O2, O0); // report previous value to caller |
|
616 |
} else { |
|
18097 | 617 |
__ retl(false); |
618 |
__ delayed()->swap(O1, 0, O0); |
|
1 | 619 |
} |
620 |
||
621 |
return start; |
|
622 |
} |
|
623 |
||
624 |
||
625 |
// Support for jint Atomic::cmpxchg(jint exchange_value, volatile jint* dest, jint compare_value) |
|
626 |
// |
|
18097 | 627 |
// Arguments: |
1 | 628 |
// |
629 |
// exchange_value: O0 |
|
630 |
// dest: O1 |
|
631 |
// compare_value: O2 |
|
632 |
// |
|
633 |
// Results: |
|
634 |
// |
|
635 |
// O0: the value previously stored in dest |
|
636 |
// |
|
637 |
address generate_atomic_cmpxchg() { |
|
638 |
StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg"); |
|
639 |
address start = __ pc(); |
|
640 |
||
641 |
// cmpxchg(dest, compare_value, exchange_value) |
|
18097 | 642 |
__ cas(O1, O2, O0); |
1 | 643 |
__ retl(false); |
644 |
__ delayed()->nop(); |
|
645 |
||
646 |
return start; |
|
647 |
} |
|
648 |
||
649 |
// Support for jlong Atomic::cmpxchg(jlong exchange_value, volatile jlong *dest, jlong compare_value) |
|
650 |
// |
|
18097 | 651 |
// Arguments: |
1 | 652 |
// |
653 |
// exchange_value: O1:O0 |
|
654 |
// dest: O2 |
|
655 |
// compare_value: O4:O3 |
|
656 |
// |
|
657 |
// Results: |
|
658 |
// |
|
659 |
// O1:O0: the value previously stored in dest |
|
660 |
// |
|
661 |
// Overwrites: G1,G2,G3 |
|
662 |
// |
|
663 |
address generate_atomic_cmpxchg_long() { |
|
664 |
StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long"); |
|
665 |
address start = __ pc(); |
|
666 |
||
667 |
__ sllx(O0, 32, O0); |
|
668 |
__ srl(O1, 0, O1); |
|
669 |
__ or3(O0,O1,O0); // O0 holds 64-bit value from compare_value |
|
670 |
__ sllx(O3, 32, O3); |
|
671 |
__ srl(O4, 0, O4); |
|
672 |
__ or3(O3,O4,O3); // O3 holds 64-bit value from exchange_value |
|
673 |
__ casx(O2, O3, O0); |
|
674 |
__ srl(O0, 0, O1); // unpacked return value in O1:O0 |
|
675 |
__ retl(false); |
|
676 |
__ delayed()->srlx(O0, 32, O0); |
|
677 |
||
678 |
return start; |
|
679 |
} |
|
680 |
||
681 |
||
682 |
// Support for jint Atomic::add(jint add_value, volatile jint* dest). |
|
683 |
// |
|
18097 | 684 |
// Arguments: |
1 | 685 |
// |
686 |
// add_value: O0 (e.g., +1 or -1) |
|
687 |
// dest: O1 |
|
688 |
// |
|
689 |
// Results: |
|
690 |
// |
|
691 |
// O0: the new value stored in dest |
|
692 |
// |
|
18097 | 693 |
// Overwrites: O3 |
1 | 694 |
// |
695 |
address generate_atomic_add() { |
|
696 |
StubCodeMark mark(this, "StubRoutines", "atomic_add"); |
|
697 |
address start = __ pc(); |
|
698 |
__ BIND(_atomic_add_stub); |
|
699 |
||
18097 | 700 |
Label(retry); |
701 |
__ BIND(retry); |
|
702 |
||
703 |
__ lduw(O1, 0, O2); |
|
704 |
__ add(O0, O2, O3); |
|
705 |
__ cas(O1, O2, O3); |
|
706 |
__ cmp_and_br_short(O2, O3, Assembler::notEqual, Assembler::pn, retry); |
|
707 |
__ retl(false); |
|
708 |
__ delayed()->add(O0, O2, O0); // note that cas made O2==O3 |
|
1 | 709 |
|
710 |
return start; |
|
711 |
} |
|
712 |
Label _atomic_add_stub; // called from other stubs |
|
713 |
||
714 |
||
715 |
// Support for uint StubRoutine::Sparc::partial_subtype_check( Klass sub, Klass super ); |
|
716 |
// Arguments : |
|
717 |
// |
|
718 |
// ret : O0, returned |
|
719 |
// icc/xcc: set as O0 (depending on wordSize) |
|
720 |
// sub : O1, argument, not changed |
|
721 |
// super: O2, argument, not changed |
|
722 |
// raddr: O7, blown by call |
|
723 |
address generate_partial_subtype_check() { |
|
360
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
189
diff
changeset
|
724 |
__ align(CodeEntryAlignment); |
1 | 725 |
StubCodeMark mark(this, "StubRoutines", "partial_subtype_check"); |
726 |
address start = __ pc(); |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
727 |
Label miss; |
1 | 728 |
|
729 |
__ save_frame(0); |
|
730 |
Register Rret = I0; |
|
731 |
Register Rsub = I1; |
|
732 |
Register Rsuper = I2; |
|
733 |
||
734 |
Register L0_ary_len = L0; |
|
735 |
Register L1_ary_ptr = L1; |
|
736 |
Register L2_super = L2; |
|
737 |
Register L3_index = L3; |
|
738 |
||
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
739 |
__ check_klass_subtype_slow_path(Rsub, Rsuper, |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
740 |
L0, L1, L2, L3, |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
741 |
NULL, &miss); |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
742 |
|
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
743 |
// Match falls through here. |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
744 |
__ addcc(G0,0,Rret); // set Z flags, Z result |
1 | 745 |
|
746 |
__ ret(); // Result in Rret is zero; flags set to Z |
|
747 |
__ delayed()->restore(); |
|
748 |
||
749 |
__ BIND(miss); |
|
750 |
__ addcc(G0,1,Rret); // set NZ flags, NZ result |
|
751 |
||
752 |
__ ret(); // Result in Rret is != 0; flags set to NZ |
|
753 |
__ delayed()->restore(); |
|
754 |
||
755 |
return start; |
|
756 |
} |
|
757 |
||
758 |
||
759 |
// Called from MacroAssembler::verify_oop |
|
760 |
// |
|
761 |
address generate_verify_oop_subroutine() { |
|
762 |
StubCodeMark mark(this, "StubRoutines", "verify_oop_stub"); |
|
763 |
||
764 |
address start = __ pc(); |
|
765 |
||
766 |
__ verify_oop_subroutine(); |
|
767 |
||
768 |
return start; |
|
769 |
} |
|
770 |
||
771 |
||
772 |
// |
|
773 |
// Verify that a register contains clean 32-bits positive value |
|
774 |
// (high 32-bits are 0) so it could be used in 64-bits shifts (sllx, srax). |
|
775 |
// |
|
776 |
// Input: |
|
777 |
// Rint - 32-bits value |
|
778 |
// Rtmp - scratch |
|
779 |
// |
|
780 |
void assert_clean_int(Register Rint, Register Rtmp) { |
|
46381 | 781 |
#if defined(ASSERT) |
1 | 782 |
__ signx(Rint, Rtmp); |
783 |
__ cmp(Rint, Rtmp); |
|
784 |
__ breakpoint_trap(Assembler::notEqual, Assembler::xcc); |
|
46381 | 785 |
#endif |
1 | 786 |
} |
787 |
||
788 |
// |
|
789 |
// Generate overlap test for array copy stubs |
|
790 |
// |
|
791 |
// Input: |
|
792 |
// O0 - array1 |
|
793 |
// O1 - array2 |
|
794 |
// O2 - element count |
|
795 |
// |
|
796 |
// Kills temps: O3, O4 |
|
797 |
// |
|
798 |
void array_overlap_test(address no_overlap_target, int log2_elem_size) { |
|
799 |
assert(no_overlap_target != NULL, "must be generated"); |
|
800 |
array_overlap_test(no_overlap_target, NULL, log2_elem_size); |
|
801 |
} |
|
802 |
void array_overlap_test(Label& L_no_overlap, int log2_elem_size) { |
|
803 |
array_overlap_test(NULL, &L_no_overlap, log2_elem_size); |
|
804 |
} |
|
805 |
void array_overlap_test(address no_overlap_target, Label* NOLp, int log2_elem_size) { |
|
806 |
const Register from = O0; |
|
807 |
const Register to = O1; |
|
808 |
const Register count = O2; |
|
809 |
const Register to_from = O3; // to - from |
|
810 |
const Register byte_count = O4; // count << log2_elem_size |
|
811 |
||
812 |
__ subcc(to, from, to_from); |
|
813 |
__ sll_ptr(count, log2_elem_size, byte_count); |
|
814 |
if (NOLp == NULL) |
|
815 |
__ brx(Assembler::lessEqualUnsigned, false, Assembler::pt, no_overlap_target); |
|
816 |
else |
|
817 |
__ brx(Assembler::lessEqualUnsigned, false, Assembler::pt, (*NOLp)); |
|
818 |
__ delayed()->cmp(to_from, byte_count); |
|
819 |
if (NOLp == NULL) |
|
6057
e660446e0804
6962569: assembler_sparc.cpp:1969: assert(false) failed: error
tonyp
parents:
5702
diff
changeset
|
820 |
__ brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, no_overlap_target); |
1 | 821 |
else |
6057
e660446e0804
6962569: assembler_sparc.cpp:1969: assert(false) failed: error
tonyp
parents:
5702
diff
changeset
|
822 |
__ brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, (*NOLp)); |
1 | 823 |
__ delayed()->nop(); |
824 |
} |
|
825 |
||
826 |
// |
|
827 |
// Generate pre-write barrier for array. |
|
828 |
// |
|
829 |
// Input: |
|
830 |
// addr - register containing starting address |
|
831 |
// count - register containing element count |
|
832 |
// tmp - scratch register |
|
833 |
// |
|
834 |
// The input registers are overwritten. |
|
835 |
// |
|
8498 | 836 |
void gen_write_ref_array_pre_barrier(Register addr, Register count, bool dest_uninitialized) { |
1 | 837 |
BarrierSet* bs = Universe::heap()->barrier_set(); |
8498 | 838 |
switch (bs->kind()) { |
49347
edb65305d3ac
8195148: Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet
eosterlund
parents:
49164
diff
changeset
|
839 |
case BarrierSet::G1BarrierSet: |
8498 | 840 |
// With G1, don't generate the call if we statically know that the target in uninitialized |
841 |
if (!dest_uninitialized) { |
|
48807
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
842 |
Register tmp = O5; |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
843 |
assert_different_registers(addr, count, tmp); |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
844 |
Label filtered; |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
845 |
// Is marking active? |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
846 |
if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
847 |
__ ld(G2, in_bytes(JavaThread::satb_mark_queue_offset() + SATBMarkQueue::byte_offset_of_active()), tmp); |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
848 |
} else { |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
849 |
guarantee(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
850 |
"Assumption"); |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
851 |
__ ldsb(G2, in_bytes(JavaThread::satb_mark_queue_offset() + SATBMarkQueue::byte_offset_of_active()), tmp); |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
852 |
} |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
853 |
// Is marking active? |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
854 |
__ cmp_and_br_short(tmp, G0, Assembler::equal, Assembler::pt, filtered); |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
855 |
|
8498 | 856 |
__ save_frame(0); |
857 |
// Save the necessary global regs... will be used after. |
|
858 |
if (addr->is_global()) { |
|
859 |
__ mov(addr, L0); |
|
860 |
} |
|
861 |
if (count->is_global()) { |
|
862 |
__ mov(count, L1); |
|
863 |
} |
|
864 |
__ mov(addr->after_save(), O0); |
|
865 |
// Get the count into O1 |
|
866 |
__ call(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre)); |
|
867 |
__ delayed()->mov(count->after_save(), O1); |
|
868 |
if (addr->is_global()) { |
|
869 |
__ mov(L0, addr); |
|
870 |
} |
|
871 |
if (count->is_global()) { |
|
872 |
__ mov(L1, count); |
|
873 |
} |
|
874 |
__ restore(); |
|
48807
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
875 |
|
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
876 |
__ bind(filtered); |
fd8ccb37fce9
8195776: [x86,sparc] A row of minor fixes and enhancements.
goetz
parents:
48304
diff
changeset
|
877 |
DEBUG_ONLY(__ set(0xDEADC0DE, tmp);) // we have killed tmp |
8498 | 878 |
} |
879 |
break; |
|
49164
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
48807
diff
changeset
|
880 |
case BarrierSet::CardTableModRef: |
55767
8e22715afabc
Initial import of Epsilon sources from jdk10/sandbox
shade
parents:
47561
diff
changeset
|
881 |
case BarrierSet::Epsilon: |
8498 | 882 |
break; |
883 |
default: |
|
884 |
ShouldNotReachHere(); |
|
1 | 885 |
} |
886 |
} |
|
887 |
// |
|
888 |
// Generate post-write barrier for array. |
|
889 |
// |
|
890 |
// Input: |
|
891 |
// addr - register containing starting address |
|
892 |
// count - register containing element count |
|
893 |
// tmp - scratch register |
|
894 |
// |
|
895 |
// The input registers are overwritten. |
|
896 |
// |
|
897 |
void gen_write_ref_array_post_barrier(Register addr, Register count, |
|
8498 | 898 |
Register tmp) { |
1 | 899 |
BarrierSet* bs = Universe::heap()->barrier_set(); |
900 |
||
901 |
switch (bs->kind()) { |
|
49347
edb65305d3ac
8195148: Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet
eosterlund
parents:
49164
diff
changeset
|
902 |
case BarrierSet::G1BarrierSet: |
1 | 903 |
{ |
904 |
// Get some new fresh output registers. |
|
905 |
__ save_frame(0); |
|
1374
4c24294029a9
6711316: Open source the Garbage-First garbage collector
ysr
parents:
360
diff
changeset
|
906 |
__ mov(addr->after_save(), O0); |
1 | 907 |
__ call(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post)); |
1374
4c24294029a9
6711316: Open source the Garbage-First garbage collector
ysr
parents:
360
diff
changeset
|
908 |
__ delayed()->mov(count->after_save(), O1); |
1 | 909 |
__ restore(); |
910 |
} |
|
911 |
break; |
|
49164
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
48807
diff
changeset
|
912 |
case BarrierSet::CardTableModRef: |
1 | 913 |
{ |
49164
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
48807
diff
changeset
|
914 |
CardTableModRefBS* ctbs = barrier_set_cast<CardTableModRefBS>(bs); |
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
48807
diff
changeset
|
915 |
CardTable* ct = ctbs->card_table(); |
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
48807
diff
changeset
|
916 |
assert(sizeof(*ct->byte_map_base()) == sizeof(jbyte), "adjust this code"); |
1 | 917 |
assert_different_registers(addr, count, tmp); |
918 |
||
48104
62d5973082e3
8185591: guarantee(_byte_map[_guard_index] == last_card) failed: card table guard has been modified
aharlap
parents:
47561
diff
changeset
|
919 |
Label L_loop, L_done; |
62d5973082e3
8185591: guarantee(_byte_map[_guard_index] == last_card) failed: card table guard has been modified
aharlap
parents:
47561
diff
changeset
|
920 |
|
62d5973082e3
8185591: guarantee(_byte_map[_guard_index] == last_card) failed: card table guard has been modified
aharlap
parents:
47561
diff
changeset
|
921 |
__ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_done); // zero count - nothing to do |
1 | 922 |
|
360
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
189
diff
changeset
|
923 |
__ sll_ptr(count, LogBytesPerHeapOop, count); |
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
189
diff
changeset
|
924 |
__ sub(count, BytesPerHeapOop, count); |
1 | 925 |
__ add(count, addr, count); |
926 |
// Use two shifts to clear out those low order two bits! (Cannot opt. into 1.) |
|
49164
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
48807
diff
changeset
|
927 |
__ srl_ptr(addr, CardTable::card_shift, addr); |
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
48807
diff
changeset
|
928 |
__ srl_ptr(count, CardTable::card_shift, count); |
1 | 929 |
__ sub(count, addr, count); |
49164
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
48807
diff
changeset
|
930 |
AddressLiteral rs(ct->byte_map_base()); |
2571 | 931 |
__ set(rs, tmp); |
1 | 932 |
__ BIND(L_loop); |
2571 | 933 |
__ stb(G0, tmp, addr); |
1 | 934 |
__ subcc(count, 1, count); |
935 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); |
|
936 |
__ delayed()->add(addr, 1, addr); |
|
48104
62d5973082e3
8185591: guarantee(_byte_map[_guard_index] == last_card) failed: card table guard has been modified
aharlap
parents:
47561
diff
changeset
|
937 |
__ BIND(L_done); |
2571 | 938 |
} |
1 | 939 |
break; |
940 |
case BarrierSet::ModRef: |
|
55767
8e22715afabc
Initial import of Epsilon sources from jdk10/sandbox
shade
parents:
47561
diff
changeset
|
941 |
case BarrierSet::Epsilon: |
1 | 942 |
break; |
2571 | 943 |
default: |
1 | 944 |
ShouldNotReachHere(); |
945 |
} |
|
946 |
} |
|
947 |
||
10512 | 948 |
// |
949 |
// Generate main code for disjoint arraycopy |
|
950 |
// |
|
951 |
typedef void (StubGenerator::*CopyLoopFunc)(Register from, Register to, Register count, int count_dec, |
|
952 |
Label& L_loop, bool use_prefetch, bool use_bis); |
|
953 |
||
954 |
void disjoint_copy_core(Register from, Register to, Register count, int log2_elem_size, |
|
24326
d3fdd5c16fe0
8022070: Compilation error in stubGenerator_sparc.cpp with some compilers
mikael
parents:
22505
diff
changeset
|
955 |
int iter_size, StubGenerator::CopyLoopFunc copy_loop_func) { |
10512 | 956 |
Label L_copy; |
957 |
||
958 |
assert(log2_elem_size <= 3, "the following code should be changed"); |
|
959 |
int count_dec = 16>>log2_elem_size; |
|
960 |
||
961 |
int prefetch_dist = MAX2(ArraycopySrcPrefetchDistance, ArraycopyDstPrefetchDistance); |
|
962 |
assert(prefetch_dist < 4096, "invalid value"); |
|
963 |
prefetch_dist = (prefetch_dist + (iter_size-1)) & (-iter_size); // round up to one iteration copy size |
|
964 |
int prefetch_count = (prefetch_dist >> log2_elem_size); // elements count |
|
965 |
||
966 |
if (UseBlockCopy) { |
|
967 |
Label L_block_copy, L_block_copy_prefetch, L_skip_block_copy; |
|
968 |
||
969 |
// 64 bytes tail + bytes copied in one loop iteration |
|
970 |
int tail_size = 64 + iter_size; |
|
971 |
int block_copy_count = (MAX2(tail_size, (int)BlockCopyLowLimit)) >> log2_elem_size; |
|
972 |
// Use BIS copy only for big arrays since it requires membar. |
|
973 |
__ set(block_copy_count, O4); |
|
974 |
__ cmp_and_br_short(count, O4, Assembler::lessUnsigned, Assembler::pt, L_skip_block_copy); |
|
975 |
// This code is for disjoint source and destination: |
|
976 |
// to <= from || to >= from+count |
|
977 |
// but BIS will stomp over 'from' if (to > from-tail_size && to <= from) |
|
978 |
__ sub(from, to, O4); |
|
979 |
__ srax(O4, 4, O4); // divide by 16 since following short branch have only 5 bits for imm. |
|
980 |
__ cmp_and_br_short(O4, (tail_size>>4), Assembler::lessEqualUnsigned, Assembler::pn, L_skip_block_copy); |
|
981 |
||
982 |
__ wrasi(G0, Assembler::ASI_ST_BLKINIT_PRIMARY); |
|
983 |
// BIS should not be used to copy tail (64 bytes+iter_size) |
|
984 |
// to avoid zeroing of following values. |
|
985 |
__ sub(count, (tail_size>>log2_elem_size), count); // count is still positive >= 0 |
|
986 |
||
987 |
if (prefetch_count > 0) { // rounded up to one iteration count |
|
988 |
// Do prefetching only if copy size is bigger |
|
989 |
// than prefetch distance. |
|
990 |
__ set(prefetch_count, O4); |
|
991 |
__ cmp_and_brx_short(count, O4, Assembler::less, Assembler::pt, L_block_copy); |
|
46422
6ecc7cc67619
8179019: Correct range checks for command-line options ArraycopySrcPrefetchDistance and ArraycopyDstPrefetchDistance
zmajo
parents:
46381
diff
changeset
|
992 |
__ sub(count, O4, count); |
10512 | 993 |
|
994 |
(this->*copy_loop_func)(from, to, count, count_dec, L_block_copy_prefetch, true, true); |
|
46422
6ecc7cc67619
8179019: Correct range checks for command-line options ArraycopySrcPrefetchDistance and ArraycopyDstPrefetchDistance
zmajo
parents:
46381
diff
changeset
|
995 |
__ set(prefetch_count, O4); |
6ecc7cc67619
8179019: Correct range checks for command-line options ArraycopySrcPrefetchDistance and ArraycopyDstPrefetchDistance
zmajo
parents:
46381
diff
changeset
|
996 |
__ add(count, O4, count); |
10512 | 997 |
|
998 |
} // prefetch_count > 0 |
|
999 |
||
1000 |
(this->*copy_loop_func)(from, to, count, count_dec, L_block_copy, false, true); |
|
1001 |
__ add(count, (tail_size>>log2_elem_size), count); // restore count |
|
1002 |
||
1003 |
__ wrasi(G0, Assembler::ASI_PRIMARY_NOFAULT); |
|
1004 |
// BIS needs membar. |
|
1005 |
__ membar(Assembler::StoreLoad); |
|
1006 |
// Copy tail |
|
1007 |
__ ba_short(L_copy); |
|
1008 |
||
1009 |
__ BIND(L_skip_block_copy); |
|
1010 |
} // UseBlockCopy |
|
1011 |
||
1012 |
if (prefetch_count > 0) { // rounded up to one iteration count |
|
1013 |
// Do prefetching only if copy size is bigger |
|
1014 |
// than prefetch distance. |
|
1015 |
__ set(prefetch_count, O4); |
|
1016 |
__ cmp_and_brx_short(count, O4, Assembler::lessUnsigned, Assembler::pt, L_copy); |
|
46422
6ecc7cc67619
8179019: Correct range checks for command-line options ArraycopySrcPrefetchDistance and ArraycopyDstPrefetchDistance
zmajo
parents:
46381
diff
changeset
|
1017 |
__ sub(count, O4, count); |
10512 | 1018 |
|
1019 |
Label L_copy_prefetch; |
|
1020 |
(this->*copy_loop_func)(from, to, count, count_dec, L_copy_prefetch, true, false); |
|
46422
6ecc7cc67619
8179019: Correct range checks for command-line options ArraycopySrcPrefetchDistance and ArraycopyDstPrefetchDistance
zmajo
parents:
46381
diff
changeset
|
1021 |
__ set(prefetch_count, O4); |
6ecc7cc67619
8179019: Correct range checks for command-line options ArraycopySrcPrefetchDistance and ArraycopyDstPrefetchDistance
zmajo
parents:
46381
diff
changeset
|
1022 |
__ add(count, O4, count); |
10512 | 1023 |
|
1024 |
} // prefetch_count > 0 |
|
1025 |
||
1026 |
(this->*copy_loop_func)(from, to, count, count_dec, L_copy, false, false); |
|
1027 |
} |
|
1028 |
||
1029 |
||
1030 |
||
1031 |
// |
|
1032 |
// Helper methods for copy_16_bytes_forward_with_shift() |
|
1033 |
// |
|
1034 |
void copy_16_bytes_shift_loop(Register from, Register to, Register count, int count_dec, |
|
1035 |
Label& L_loop, bool use_prefetch, bool use_bis) { |
|
1036 |
||
1037 |
const Register left_shift = G1; // left shift bit counter |
|
1038 |
const Register right_shift = G5; // right shift bit counter |
|
1039 |
||
1040 |
__ align(OptoLoopAlignment); |
|
1041 |
__ BIND(L_loop); |
|
1042 |
if (use_prefetch) { |
|
1043 |
if (ArraycopySrcPrefetchDistance > 0) { |
|
1044 |
__ prefetch(from, ArraycopySrcPrefetchDistance, Assembler::severalReads); |
|
1045 |
} |
|
1046 |
if (ArraycopyDstPrefetchDistance > 0) { |
|
1047 |
__ prefetch(to, ArraycopyDstPrefetchDistance, Assembler::severalWritesAndPossiblyReads); |
|
1048 |
} |
|
1049 |
} |
|
1050 |
__ ldx(from, 0, O4); |
|
1051 |
__ ldx(from, 8, G4); |
|
1052 |
__ inc(to, 16); |
|
1053 |
__ inc(from, 16); |
|
1054 |
__ deccc(count, count_dec); // Can we do next iteration after this one? |
|
1055 |
__ srlx(O4, right_shift, G3); |
|
1056 |
__ bset(G3, O3); |
|
1057 |
__ sllx(O4, left_shift, O4); |
|
1058 |
__ srlx(G4, right_shift, G3); |
|
1059 |
__ bset(G3, O4); |
|
1060 |
if (use_bis) { |
|
1061 |
__ stxa(O3, to, -16); |
|
1062 |
__ stxa(O4, to, -8); |
|
1063 |
} else { |
|
1064 |
__ stx(O3, to, -16); |
|
1065 |
__ stx(O4, to, -8); |
|
1066 |
} |
|
1067 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); |
|
1068 |
__ delayed()->sllx(G4, left_shift, O3); |
|
1069 |
} |
|
1 | 1070 |
|
1071 |
// Copy big chunks forward with shift |
|
1072 |
// |
|
1073 |
// Inputs: |
|
1074 |
// from - source arrays |
|
1075 |
// to - destination array aligned to 8-bytes |
|
1076 |
// count - elements count to copy >= the count equivalent to 16 bytes |
|
1077 |
// count_dec - elements count's decrement equivalent to 16 bytes |
|
1078 |
// L_copy_bytes - copy exit label |
|
1079 |
// |
|
1080 |
void copy_16_bytes_forward_with_shift(Register from, Register to, |
|
10512 | 1081 |
Register count, int log2_elem_size, Label& L_copy_bytes) { |
1082 |
Label L_aligned_copy, L_copy_last_bytes; |
|
1083 |
assert(log2_elem_size <= 3, "the following code should be changed"); |
|
1084 |
int count_dec = 16>>log2_elem_size; |
|
1 | 1085 |
|
1086 |
// if both arrays have the same alignment mod 8, do 8 bytes aligned copy |
|
10512 | 1087 |
__ andcc(from, 7, G1); // misaligned bytes |
1088 |
__ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); |
|
1089 |
__ delayed()->nop(); |
|
1 | 1090 |
|
1091 |
const Register left_shift = G1; // left shift bit counter |
|
1092 |
const Register right_shift = G5; // right shift bit counter |
|
1093 |
||
10512 | 1094 |
__ sll(G1, LogBitsPerByte, left_shift); |
1095 |
__ mov(64, right_shift); |
|
1096 |
__ sub(right_shift, left_shift, right_shift); |
|
1 | 1097 |
|
1098 |
// |
|
1099 |
// Load 2 aligned 8-bytes chunks and use one from previous iteration |
|
1100 |
// to form 2 aligned 8-bytes chunks to store. |
|
1101 |
// |
|
10512 | 1102 |
__ dec(count, count_dec); // Pre-decrement 'count' |
1103 |
__ andn(from, 7, from); // Align address |
|
1104 |
__ ldx(from, 0, O3); |
|
1105 |
__ inc(from, 8); |
|
1106 |
__ sllx(O3, left_shift, O3); |
|
1107 |
||
24326
d3fdd5c16fe0
8022070: Compilation error in stubGenerator_sparc.cpp with some compilers
mikael
parents:
22505
diff
changeset
|
1108 |
disjoint_copy_core(from, to, count, log2_elem_size, 16, &StubGenerator::copy_16_bytes_shift_loop); |
10512 | 1109 |
|
1110 |
__ inccc(count, count_dec>>1 ); // + 8 bytes |
|
1111 |
__ brx(Assembler::negative, true, Assembler::pn, L_copy_last_bytes); |
|
1112 |
__ delayed()->inc(count, count_dec>>1); // restore 'count' |
|
1113 |
||
1114 |
// copy 8 bytes, part of them already loaded in O3 |
|
1115 |
__ ldx(from, 0, O4); |
|
1116 |
__ inc(to, 8); |
|
1117 |
__ inc(from, 8); |
|
1118 |
__ srlx(O4, right_shift, G3); |
|
1119 |
__ bset(O3, G3); |
|
1120 |
__ stx(G3, to, -8); |
|
1 | 1121 |
|
1122 |
__ BIND(L_copy_last_bytes); |
|
10512 | 1123 |
__ srl(right_shift, LogBitsPerByte, right_shift); // misaligned bytes |
1124 |
__ br(Assembler::always, false, Assembler::pt, L_copy_bytes); |
|
1125 |
__ delayed()->sub(from, right_shift, from); // restore address |
|
1 | 1126 |
|
1127 |
__ BIND(L_aligned_copy); |
|
1128 |
} |
|
1129 |
||
1130 |
// Copy big chunks backward with shift |
|
1131 |
// |
|
1132 |
// Inputs: |
|
1133 |
// end_from - source arrays end address |
|
1134 |
// end_to - destination array end address aligned to 8-bytes |
|
1135 |
// count - elements count to copy >= the count equivalent to 16 bytes |
|
1136 |
// count_dec - elements count's decrement equivalent to 16 bytes |
|
1137 |
// L_aligned_copy - aligned copy exit label |
|
1138 |
// L_copy_bytes - copy exit label |
|
1139 |
// |
|
1140 |
void copy_16_bytes_backward_with_shift(Register end_from, Register end_to, |
|
1141 |
Register count, int count_dec, |
|
1142 |
Label& L_aligned_copy, Label& L_copy_bytes) { |
|
1143 |
Label L_loop, L_copy_last_bytes; |
|
1144 |
||
1145 |
// if both arrays have the same alignment mod 8, do 8 bytes aligned copy |
|
1146 |
__ andcc(end_from, 7, G1); // misaligned bytes |
|
1147 |
__ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); |
|
1148 |
__ delayed()->deccc(count, count_dec); // Pre-decrement 'count' |
|
1149 |
||
1150 |
const Register left_shift = G1; // left shift bit counter |
|
1151 |
const Register right_shift = G5; // right shift bit counter |
|
1152 |
||
1153 |
__ sll(G1, LogBitsPerByte, left_shift); |
|
1154 |
__ mov(64, right_shift); |
|
1155 |
__ sub(right_shift, left_shift, right_shift); |
|
1156 |
||
1157 |
// |
|
1158 |
// Load 2 aligned 8-bytes chunks and use one from previous iteration |
|
1159 |
// to form 2 aligned 8-bytes chunks to store. |
|
1160 |
// |
|
1161 |
__ andn(end_from, 7, end_from); // Align address |
|
1162 |
__ ldx(end_from, 0, O3); |
|
5249 | 1163 |
__ align(OptoLoopAlignment); |
1 | 1164 |
__ BIND(L_loop); |
1165 |
__ ldx(end_from, -8, O4); |
|
1166 |
__ deccc(count, count_dec); // Can we do next iteration after this one? |
|
1167 |
__ ldx(end_from, -16, G4); |
|
1168 |
__ dec(end_to, 16); |
|
1169 |
__ dec(end_from, 16); |
|
1170 |
__ srlx(O3, right_shift, O3); |
|
1171 |
__ sllx(O4, left_shift, G3); |
|
1172 |
__ bset(G3, O3); |
|
1173 |
__ stx(O3, end_to, 8); |
|
1174 |
__ srlx(O4, right_shift, O4); |
|
1175 |
__ sllx(G4, left_shift, G3); |
|
1176 |
__ bset(G3, O4); |
|
1177 |
__ stx(O4, end_to, 0); |
|
1178 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); |
|
1179 |
__ delayed()->mov(G4, O3); |
|
1180 |
||
1181 |
__ inccc(count, count_dec>>1 ); // + 8 bytes |
|
1182 |
__ brx(Assembler::negative, true, Assembler::pn, L_copy_last_bytes); |
|
1183 |
__ delayed()->inc(count, count_dec>>1); // restore 'count' |
|
1184 |
||
1185 |
// copy 8 bytes, part of them already loaded in O3 |
|
1186 |
__ ldx(end_from, -8, O4); |
|
1187 |
__ dec(end_to, 8); |
|
1188 |
__ dec(end_from, 8); |
|
1189 |
__ srlx(O3, right_shift, O3); |
|
1190 |
__ sllx(O4, left_shift, G3); |
|
1191 |
__ bset(O3, G3); |
|
1192 |
__ stx(G3, end_to, 0); |
|
1193 |
||
1194 |
__ BIND(L_copy_last_bytes); |
|
1195 |
__ srl(left_shift, LogBitsPerByte, left_shift); // misaligned bytes |
|
1196 |
__ br(Assembler::always, false, Assembler::pt, L_copy_bytes); |
|
1197 |
__ delayed()->add(end_from, left_shift, end_from); // restore address |
|
1198 |
} |
|
1199 |
||
1200 |
// |
|
1201 |
// Generate stub for disjoint byte copy. If "aligned" is true, the |
|
1202 |
// "from" and "to" addresses are assumed to be heapword aligned. |
|
1203 |
// |
|
1204 |
// Arguments for generated stub: |
|
1205 |
// from: O0 |
|
1206 |
// to: O1 |
|
1207 |
// count: O2 treated as signed |
|
1208 |
// |
|
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1209 |
address generate_disjoint_byte_copy(bool aligned, address *entry, const char *name) { |
1 | 1210 |
__ align(CodeEntryAlignment); |
1211 |
StubCodeMark mark(this, "StubRoutines", name); |
|
1212 |
address start = __ pc(); |
|
1213 |
||
1214 |
Label L_skip_alignment, L_align; |
|
1215 |
Label L_copy_byte, L_copy_byte_loop, L_exit; |
|
1216 |
||
1217 |
const Register from = O0; // source array address |
|
1218 |
const Register to = O1; // destination array address |
|
1219 |
const Register count = O2; // elements count |
|
1220 |
const Register offset = O5; // offset from start of arrays |
|
1221 |
// O3, O4, G3, G4 are used as temp registers |
|
1222 |
||
1223 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
|
1224 |
||
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1225 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1226 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1227 |
// caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1228 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1229 |
} |
1 | 1230 |
|
1231 |
// for short arrays, just do single element copy |
|
1232 |
__ cmp(count, 23); // 16 + 7 |
|
1233 |
__ brx(Assembler::less, false, Assembler::pn, L_copy_byte); |
|
1234 |
__ delayed()->mov(G0, offset); |
|
1235 |
||
1236 |
if (aligned) { |
|
1237 |
// 'aligned' == true when it is known statically during compilation |
|
1238 |
// of this arraycopy call site that both 'from' and 'to' addresses |
|
1239 |
// are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). |
|
1240 |
// |
|
1241 |
// Aligned arrays have 4 bytes alignment in 32-bits VM |
|
1242 |
// and 8 bytes - in 64-bits VM. So we do it only for 32-bits VM |
|
1243 |
// |
|
1244 |
} else { |
|
1245 |
// copy bytes to align 'to' on 8 byte boundary |
|
1246 |
__ andcc(to, 7, G1); // misaligned bytes |
|
1247 |
__ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); |
|
1248 |
__ delayed()->neg(G1); |
|
1249 |
__ inc(G1, 8); // bytes need to copy to next 8-bytes alignment |
|
1250 |
__ sub(count, G1, count); |
|
1251 |
__ BIND(L_align); |
|
1252 |
__ ldub(from, 0, O3); |
|
1253 |
__ deccc(G1); |
|
1254 |
__ inc(from); |
|
1255 |
__ stb(O3, to, 0); |
|
1256 |
__ br(Assembler::notZero, false, Assembler::pt, L_align); |
|
1257 |
__ delayed()->inc(to); |
|
1258 |
__ BIND(L_skip_alignment); |
|
1259 |
} |
|
46462 | 1260 |
if (!aligned) { |
1 | 1261 |
// Copy with shift 16 bytes per iteration if arrays do not have |
1262 |
// the same alignment mod 8, otherwise fall through to the next |
|
1263 |
// code for aligned copy. |
|
1264 |
// The compare above (count >= 23) guarantes 'count' >= 16 bytes. |
|
1265 |
// Also jump over aligned copy after the copy with shift completed. |
|
1266 |
||
10512 | 1267 |
copy_16_bytes_forward_with_shift(from, to, count, 0, L_copy_byte); |
1 | 1268 |
} |
1269 |
||
1270 |
// Both array are 8 bytes aligned, copy 16 bytes at a time |
|
1271 |
__ and3(count, 7, G4); // Save count |
|
1272 |
__ srl(count, 3, count); |
|
1273 |
generate_disjoint_long_copy_core(aligned); |
|
1274 |
__ mov(G4, count); // Restore count |
|
1275 |
||
1276 |
// copy tailing bytes |
|
1277 |
__ BIND(L_copy_byte); |
|
10252 | 1278 |
__ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
5249 | 1279 |
__ align(OptoLoopAlignment); |
1 | 1280 |
__ BIND(L_copy_byte_loop); |
1281 |
__ ldub(from, offset, O3); |
|
1282 |
__ deccc(count); |
|
1283 |
__ stb(O3, to, offset); |
|
1284 |
__ brx(Assembler::notZero, false, Assembler::pt, L_copy_byte_loop); |
|
1285 |
__ delayed()->inc(offset); |
|
1286 |
||
1287 |
__ BIND(L_exit); |
|
1288 |
// O3, O4 are used as temp registers |
|
1289 |
inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr, O3, O4); |
|
1290 |
__ retl(); |
|
1291 |
__ delayed()->mov(G0, O0); // return 0 |
|
1292 |
return start; |
|
1293 |
} |
|
1294 |
||
1295 |
// |
|
1296 |
// Generate stub for conjoint byte copy. If "aligned" is true, the |
|
1297 |
// "from" and "to" addresses are assumed to be heapword aligned. |
|
1298 |
// |
|
1299 |
// Arguments for generated stub: |
|
1300 |
// from: O0 |
|
1301 |
// to: O1 |
|
1302 |
// count: O2 treated as signed |
|
1303 |
// |
|
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1304 |
address generate_conjoint_byte_copy(bool aligned, address nooverlap_target, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1305 |
address *entry, const char *name) { |
1 | 1306 |
// Do reverse copy. |
1307 |
||
1308 |
__ align(CodeEntryAlignment); |
|
1309 |
StubCodeMark mark(this, "StubRoutines", name); |
|
1310 |
address start = __ pc(); |
|
1311 |
||
1312 |
Label L_skip_alignment, L_align, L_aligned_copy; |
|
1313 |
Label L_copy_byte, L_copy_byte_loop, L_exit; |
|
1314 |
||
1315 |
const Register from = O0; // source array address |
|
1316 |
const Register to = O1; // destination array address |
|
1317 |
const Register count = O2; // elements count |
|
1318 |
const Register end_from = from; // source array end address |
|
1319 |
const Register end_to = to; // destination array end address |
|
1320 |
||
1321 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
|
1322 |
||
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1323 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1324 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1325 |
// caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1326 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1327 |
} |
1 | 1328 |
|
1329 |
array_overlap_test(nooverlap_target, 0); |
|
1330 |
||
1331 |
__ add(to, count, end_to); // offset after last copied element |
|
1332 |
||
1333 |
// for short arrays, just do single element copy |
|
1334 |
__ cmp(count, 23); // 16 + 7 |
|
1335 |
__ brx(Assembler::less, false, Assembler::pn, L_copy_byte); |
|
1336 |
__ delayed()->add(from, count, end_from); |
|
1337 |
||
1338 |
{ |
|
1339 |
// Align end of arrays since they could be not aligned even |
|
1340 |
// when arrays itself are aligned. |
|
1341 |
||
1342 |
// copy bytes to align 'end_to' on 8 byte boundary |
|
1343 |
__ andcc(end_to, 7, G1); // misaligned bytes |
|
1344 |
__ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); |
|
1345 |
__ delayed()->nop(); |
|
1346 |
__ sub(count, G1, count); |
|
1347 |
__ BIND(L_align); |
|
1348 |
__ dec(end_from); |
|
1349 |
__ dec(end_to); |
|
1350 |
__ ldub(end_from, 0, O3); |
|
1351 |
__ deccc(G1); |
|
1352 |
__ brx(Assembler::notZero, false, Assembler::pt, L_align); |
|
1353 |
__ delayed()->stb(O3, end_to, 0); |
|
1354 |
__ BIND(L_skip_alignment); |
|
1355 |
} |
|
1356 |
if (aligned) { |
|
1357 |
// Both arrays are aligned to 8-bytes in 64-bits VM. |
|
1358 |
// The 'count' is decremented in copy_16_bytes_backward_with_shift() |
|
1359 |
// in unaligned case. |
|
1360 |
__ dec(count, 16); |
|
46462 | 1361 |
} else { |
1 | 1362 |
// Copy with shift 16 bytes per iteration if arrays do not have |
1363 |
// the same alignment mod 8, otherwise jump to the next |
|
1364 |
// code for aligned copy (and substracting 16 from 'count' before jump). |
|
1365 |
// The compare above (count >= 11) guarantes 'count' >= 16 bytes. |
|
1366 |
// Also jump over aligned copy after the copy with shift completed. |
|
1367 |
||
1368 |
copy_16_bytes_backward_with_shift(end_from, end_to, count, 16, |
|
1369 |
L_aligned_copy, L_copy_byte); |
|
1370 |
} |
|
1371 |
// copy 4 elements (16 bytes) at a time |
|
5249 | 1372 |
__ align(OptoLoopAlignment); |
1 | 1373 |
__ BIND(L_aligned_copy); |
1374 |
__ dec(end_from, 16); |
|
1375 |
__ ldx(end_from, 8, O3); |
|
1376 |
__ ldx(end_from, 0, O4); |
|
1377 |
__ dec(end_to, 16); |
|
1378 |
__ deccc(count, 16); |
|
1379 |
__ stx(O3, end_to, 8); |
|
1380 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); |
|
1381 |
__ delayed()->stx(O4, end_to, 0); |
|
1382 |
__ inc(count, 16); |
|
1383 |
||
1384 |
// copy 1 element (2 bytes) at a time |
|
1385 |
__ BIND(L_copy_byte); |
|
10252 | 1386 |
__ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
5249 | 1387 |
__ align(OptoLoopAlignment); |
1 | 1388 |
__ BIND(L_copy_byte_loop); |
1389 |
__ dec(end_from); |
|
1390 |
__ dec(end_to); |
|
1391 |
__ ldub(end_from, 0, O4); |
|
1392 |
__ deccc(count); |
|
1393 |
__ brx(Assembler::greater, false, Assembler::pt, L_copy_byte_loop); |
|
1394 |
__ delayed()->stb(O4, end_to, 0); |
|
1395 |
||
1396 |
__ BIND(L_exit); |
|
1397 |
// O3, O4 are used as temp registers |
|
1398 |
inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr, O3, O4); |
|
1399 |
__ retl(); |
|
1400 |
__ delayed()->mov(G0, O0); // return 0 |
|
1401 |
return start; |
|
1402 |
} |
|
1403 |
||
1404 |
// |
|
1405 |
// Generate stub for disjoint short copy. If "aligned" is true, the |
|
1406 |
// "from" and "to" addresses are assumed to be heapword aligned. |
|
1407 |
// |
|
1408 |
// Arguments for generated stub: |
|
1409 |
// from: O0 |
|
1410 |
// to: O1 |
|
1411 |
// count: O2 treated as signed |
|
1412 |
// |
|
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1413 |
address generate_disjoint_short_copy(bool aligned, address *entry, const char * name) { |
1 | 1414 |
__ align(CodeEntryAlignment); |
1415 |
StubCodeMark mark(this, "StubRoutines", name); |
|
1416 |
address start = __ pc(); |
|
1417 |
||
1418 |
Label L_skip_alignment, L_skip_alignment2; |
|
1419 |
Label L_copy_2_bytes, L_copy_2_bytes_loop, L_exit; |
|
1420 |
||
1421 |
const Register from = O0; // source array address |
|
1422 |
const Register to = O1; // destination array address |
|
1423 |
const Register count = O2; // elements count |
|
1424 |
const Register offset = O5; // offset from start of arrays |
|
1425 |
// O3, O4, G3, G4 are used as temp registers |
|
1426 |
||
1427 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
|
1428 |
||
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1429 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1430 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1431 |
// caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1432 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1433 |
} |
1 | 1434 |
|
1435 |
// for short arrays, just do single element copy |
|
1436 |
__ cmp(count, 11); // 8 + 3 (22 bytes) |
|
1437 |
__ brx(Assembler::less, false, Assembler::pn, L_copy_2_bytes); |
|
1438 |
__ delayed()->mov(G0, offset); |
|
1439 |
||
1440 |
if (aligned) { |
|
1441 |
// 'aligned' == true when it is known statically during compilation |
|
1442 |
// of this arraycopy call site that both 'from' and 'to' addresses |
|
1443 |
// are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). |
|
1444 |
// |
|
1445 |
// Aligned arrays have 4 bytes alignment in 32-bits VM |
|
1446 |
// and 8 bytes - in 64-bits VM. |
|
1447 |
// |
|
1448 |
} else { |
|
1449 |
// copy 1 element if necessary to align 'to' on an 4 bytes |
|
1450 |
__ andcc(to, 3, G0); |
|
1451 |
__ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); |
|
1452 |
__ delayed()->lduh(from, 0, O3); |
|
1453 |
__ inc(from, 2); |
|
1454 |
__ inc(to, 2); |
|
1455 |
__ dec(count); |
|
1456 |
__ sth(O3, to, -2); |
|
1457 |
__ BIND(L_skip_alignment); |
|
1458 |
||
1459 |
// copy 2 elements to align 'to' on an 8 byte boundary |
|
1460 |
__ andcc(to, 7, G0); |
|
1461 |
__ br(Assembler::zero, false, Assembler::pn, L_skip_alignment2); |
|
1462 |
__ delayed()->lduh(from, 0, O3); |
|
1463 |
__ dec(count, 2); |
|
1464 |
__ lduh(from, 2, O4); |
|
1465 |
__ inc(from, 4); |
|
1466 |
__ inc(to, 4); |
|
1467 |
__ sth(O3, to, -4); |
|
1468 |
__ sth(O4, to, -2); |
|
1469 |
__ BIND(L_skip_alignment2); |
|
1470 |
} |
|
46462 | 1471 |
if (!aligned) { |
1 | 1472 |
// Copy with shift 16 bytes per iteration if arrays do not have |
1473 |
// the same alignment mod 8, otherwise fall through to the next |
|
1474 |
// code for aligned copy. |
|
1475 |
// The compare above (count >= 11) guarantes 'count' >= 16 bytes. |
|
1476 |
// Also jump over aligned copy after the copy with shift completed. |
|
1477 |
||
10512 | 1478 |
copy_16_bytes_forward_with_shift(from, to, count, 1, L_copy_2_bytes); |
1 | 1479 |
} |
1480 |
||
1481 |
// Both array are 8 bytes aligned, copy 16 bytes at a time |
|
1482 |
__ and3(count, 3, G4); // Save |
|
1483 |
__ srl(count, 2, count); |
|
1484 |
generate_disjoint_long_copy_core(aligned); |
|
1485 |
__ mov(G4, count); // restore |
|
1486 |
||
1487 |
// copy 1 element at a time |
|
1488 |
__ BIND(L_copy_2_bytes); |
|
10252 | 1489 |
__ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
5249 | 1490 |
__ align(OptoLoopAlignment); |
1 | 1491 |
__ BIND(L_copy_2_bytes_loop); |
1492 |
__ lduh(from, offset, O3); |
|
1493 |
__ deccc(count); |
|
1494 |
__ sth(O3, to, offset); |
|
1495 |
__ brx(Assembler::notZero, false, Assembler::pt, L_copy_2_bytes_loop); |
|
1496 |
__ delayed()->inc(offset, 2); |
|
1497 |
||
1498 |
__ BIND(L_exit); |
|
1499 |
// O3, O4 are used as temp registers |
|
1500 |
inc_counter_np(SharedRuntime::_jshort_array_copy_ctr, O3, O4); |
|
1501 |
__ retl(); |
|
1502 |
__ delayed()->mov(G0, O0); // return 0 |
|
1503 |
return start; |
|
1504 |
} |
|
1505 |
||
1506 |
// |
|
6433 | 1507 |
// Generate stub for disjoint short fill. If "aligned" is true, the |
1508 |
// "to" address is assumed to be heapword aligned. |
|
1509 |
// |
|
1510 |
// Arguments for generated stub: |
|
1511 |
// to: O0 |
|
1512 |
// value: O1 |
|
1513 |
// count: O2 treated as signed |
|
1514 |
// |
|
1515 |
address generate_fill(BasicType t, bool aligned, const char* name) { |
|
1516 |
__ align(CodeEntryAlignment); |
|
1517 |
StubCodeMark mark(this, "StubRoutines", name); |
|
1518 |
address start = __ pc(); |
|
1519 |
||
1520 |
const Register to = O0; // source array address |
|
1521 |
const Register value = O1; // fill value |
|
1522 |
const Register count = O2; // elements count |
|
1523 |
// O3 is used as a temp register |
|
1524 |
||
1525 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
|
1526 |
||
1527 |
Label L_exit, L_skip_align1, L_skip_align2, L_fill_byte; |
|
6464 | 1528 |
Label L_fill_2_bytes, L_fill_elements, L_fill_32_bytes; |
6433 | 1529 |
|
1530 |
int shift = -1; |
|
1531 |
switch (t) { |
|
1532 |
case T_BYTE: |
|
1533 |
shift = 2; |
|
1534 |
break; |
|
1535 |
case T_SHORT: |
|
1536 |
shift = 1; |
|
1537 |
break; |
|
1538 |
case T_INT: |
|
1539 |
shift = 0; |
|
1540 |
break; |
|
1541 |
default: ShouldNotReachHere(); |
|
1542 |
} |
|
1543 |
||
1544 |
BLOCK_COMMENT("Entry:"); |
|
1545 |
||
1546 |
if (t == T_BYTE) { |
|
1547 |
// Zero extend value |
|
1548 |
__ and3(value, 0xff, value); |
|
1549 |
__ sllx(value, 8, O3); |
|
1550 |
__ or3(value, O3, value); |
|
1551 |
} |
|
1552 |
if (t == T_SHORT) { |
|
1553 |
// Zero extend value |
|
6464 | 1554 |
__ sllx(value, 48, value); |
1555 |
__ srlx(value, 48, value); |
|
6433 | 1556 |
} |
1557 |
if (t == T_BYTE || t == T_SHORT) { |
|
1558 |
__ sllx(value, 16, O3); |
|
1559 |
__ or3(value, O3, value); |
|
1560 |
} |
|
1561 |
||
1562 |
__ cmp(count, 2<<shift); // Short arrays (< 8 bytes) fill by element |
|
6464 | 1563 |
__ brx(Assembler::lessUnsigned, false, Assembler::pn, L_fill_elements); // use unsigned cmp |
1564 |
__ delayed()->andcc(count, 1, G0); |
|
6433 | 1565 |
|
1566 |
if (!aligned && (t == T_BYTE || t == T_SHORT)) { |
|
1567 |
// align source address at 4 bytes address boundary |
|
1568 |
if (t == T_BYTE) { |
|
1569 |
// One byte misalignment happens only for byte arrays |
|
1570 |
__ andcc(to, 1, G0); |
|
1571 |
__ br(Assembler::zero, false, Assembler::pt, L_skip_align1); |
|
1572 |
__ delayed()->nop(); |
|
1573 |
__ stb(value, to, 0); |
|
1574 |
__ inc(to, 1); |
|
1575 |
__ dec(count, 1); |
|
1576 |
__ BIND(L_skip_align1); |
|
1577 |
} |
|
1578 |
// Two bytes misalignment happens only for byte and short (char) arrays |
|
1579 |
__ andcc(to, 2, G0); |
|
1580 |
__ br(Assembler::zero, false, Assembler::pt, L_skip_align2); |
|
1581 |
__ delayed()->nop(); |
|
1582 |
__ sth(value, to, 0); |
|
1583 |
__ inc(to, 2); |
|
1584 |
__ dec(count, 1 << (shift - 1)); |
|
1585 |
__ BIND(L_skip_align2); |
|
1586 |
} |
|
1587 |
if (!aligned) { |
|
46462 | 1588 |
// align to 8 bytes, we know we are 4 byte aligned to start |
1589 |
__ andcc(to, 7, G0); |
|
1590 |
__ br(Assembler::zero, false, Assembler::pt, L_fill_32_bytes); |
|
1591 |
__ delayed()->nop(); |
|
1592 |
__ stw(value, to, 0); |
|
1593 |
__ inc(to, 4); |
|
1594 |
__ dec(count, 1 << shift); |
|
1595 |
__ BIND(L_fill_32_bytes); |
|
6433 | 1596 |
} |
1597 |
||
1598 |
if (t == T_INT) { |
|
1599 |
// Zero extend value |
|
1600 |
__ srl(value, 0, value); |
|
1601 |
} |
|
1602 |
if (t == T_BYTE || t == T_SHORT || t == T_INT) { |
|
1603 |
__ sllx(value, 32, O3); |
|
1604 |
__ or3(value, O3, value); |
|
1605 |
} |
|
1606 |
||
6452 | 1607 |
Label L_check_fill_8_bytes; |
1608 |
// Fill 32-byte chunks |
|
1609 |
__ subcc(count, 8 << shift, count); |
|
1610 |
__ brx(Assembler::less, false, Assembler::pt, L_check_fill_8_bytes); |
|
1611 |
__ delayed()->nop(); |
|
1612 |
||
6464 | 1613 |
Label L_fill_32_bytes_loop, L_fill_4_bytes; |
6433 | 1614 |
__ align(16); |
1615 |
__ BIND(L_fill_32_bytes_loop); |
|
1616 |
||
1617 |
__ stx(value, to, 0); |
|
1618 |
__ stx(value, to, 8); |
|
1619 |
__ stx(value, to, 16); |
|
1620 |
__ stx(value, to, 24); |
|
1621 |
||
1622 |
__ subcc(count, 8 << shift, count); |
|
1623 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_fill_32_bytes_loop); |
|
1624 |
__ delayed()->add(to, 32, to); |
|
1625 |
||
1626 |
__ BIND(L_check_fill_8_bytes); |
|
1627 |
__ addcc(count, 8 << shift, count); |
|
1628 |
__ brx(Assembler::zero, false, Assembler::pn, L_exit); |
|
1629 |
__ delayed()->subcc(count, 1 << (shift + 1), count); |
|
1630 |
__ brx(Assembler::less, false, Assembler::pn, L_fill_4_bytes); |
|
1631 |
__ delayed()->andcc(count, 1<<shift, G0); |
|
1632 |
||
1633 |
// |
|
1634 |
// length is too short, just fill 8 bytes at a time |
|
1635 |
// |
|
1636 |
Label L_fill_8_bytes_loop; |
|
1637 |
__ BIND(L_fill_8_bytes_loop); |
|
1638 |
__ stx(value, to, 0); |
|
1639 |
__ subcc(count, 1 << (shift + 1), count); |
|
1640 |
__ brx(Assembler::greaterEqual, false, Assembler::pn, L_fill_8_bytes_loop); |
|
1641 |
__ delayed()->add(to, 8, to); |
|
1642 |
||
1643 |
// fill trailing 4 bytes |
|
1644 |
__ andcc(count, 1<<shift, G0); // in delay slot of branches |
|
6464 | 1645 |
if (t == T_INT) { |
1646 |
__ BIND(L_fill_elements); |
|
1647 |
} |
|
6433 | 1648 |
__ BIND(L_fill_4_bytes); |
1649 |
__ brx(Assembler::zero, false, Assembler::pt, L_fill_2_bytes); |
|
1650 |
if (t == T_BYTE || t == T_SHORT) { |
|
1651 |
__ delayed()->andcc(count, 1<<(shift-1), G0); |
|
1652 |
} else { |
|
1653 |
__ delayed()->nop(); |
|
1654 |
} |
|
1655 |
__ stw(value, to, 0); |
|
1656 |
if (t == T_BYTE || t == T_SHORT) { |
|
1657 |
__ inc(to, 4); |
|
1658 |
// fill trailing 2 bytes |
|
1659 |
__ andcc(count, 1<<(shift-1), G0); // in delay slot of branches |
|
1660 |
__ BIND(L_fill_2_bytes); |
|
1661 |
__ brx(Assembler::zero, false, Assembler::pt, L_fill_byte); |
|
1662 |
__ delayed()->andcc(count, 1, count); |
|
1663 |
__ sth(value, to, 0); |
|
1664 |
if (t == T_BYTE) { |
|
1665 |
__ inc(to, 2); |
|
1666 |
// fill trailing byte |
|
1667 |
__ andcc(count, 1, count); // in delay slot of branches |
|
1668 |
__ BIND(L_fill_byte); |
|
1669 |
__ brx(Assembler::zero, false, Assembler::pt, L_exit); |
|
1670 |
__ delayed()->nop(); |
|
1671 |
__ stb(value, to, 0); |
|
1672 |
} else { |
|
1673 |
__ BIND(L_fill_byte); |
|
1674 |
} |
|
1675 |
} else { |
|
1676 |
__ BIND(L_fill_2_bytes); |
|
1677 |
} |
|
1678 |
__ BIND(L_exit); |
|
1679 |
__ retl(); |
|
6464 | 1680 |
__ delayed()->nop(); |
1681 |
||
1682 |
// Handle copies less than 8 bytes. Int is handled elsewhere. |
|
1683 |
if (t == T_BYTE) { |
|
1684 |
__ BIND(L_fill_elements); |
|
1685 |
Label L_fill_2, L_fill_4; |
|
1686 |
// in delay slot __ andcc(count, 1, G0); |
|
1687 |
__ brx(Assembler::zero, false, Assembler::pt, L_fill_2); |
|
1688 |
__ delayed()->andcc(count, 2, G0); |
|
1689 |
__ stb(value, to, 0); |
|
1690 |
__ inc(to, 1); |
|
1691 |
__ BIND(L_fill_2); |
|
1692 |
__ brx(Assembler::zero, false, Assembler::pt, L_fill_4); |
|
1693 |
__ delayed()->andcc(count, 4, G0); |
|
1694 |
__ stb(value, to, 0); |
|
1695 |
__ stb(value, to, 1); |
|
1696 |
__ inc(to, 2); |
|
1697 |
__ BIND(L_fill_4); |
|
1698 |
__ brx(Assembler::zero, false, Assembler::pt, L_exit); |
|
1699 |
__ delayed()->nop(); |
|
1700 |
__ stb(value, to, 0); |
|
1701 |
__ stb(value, to, 1); |
|
1702 |
__ stb(value, to, 2); |
|
1703 |
__ retl(); |
|
1704 |
__ delayed()->stb(value, to, 3); |
|
1705 |
} |
|
1706 |
||
1707 |
if (t == T_SHORT) { |
|
1708 |
Label L_fill_2; |
|
1709 |
__ BIND(L_fill_elements); |
|
1710 |
// in delay slot __ andcc(count, 1, G0); |
|
1711 |
__ brx(Assembler::zero, false, Assembler::pt, L_fill_2); |
|
1712 |
__ delayed()->andcc(count, 2, G0); |
|
1713 |
__ sth(value, to, 0); |
|
1714 |
__ inc(to, 2); |
|
1715 |
__ BIND(L_fill_2); |
|
1716 |
__ brx(Assembler::zero, false, Assembler::pt, L_exit); |
|
1717 |
__ delayed()->nop(); |
|
1718 |
__ sth(value, to, 0); |
|
1719 |
__ retl(); |
|
1720 |
__ delayed()->sth(value, to, 2); |
|
1721 |
} |
|
6433 | 1722 |
return start; |
1723 |
} |
|
1724 |
||
1725 |
// |
|
1 | 1726 |
// Generate stub for conjoint short copy. If "aligned" is true, the |
1727 |
// "from" and "to" addresses are assumed to be heapword aligned. |
|
1728 |
// |
|
1729 |
// Arguments for generated stub: |
|
1730 |
// from: O0 |
|
1731 |
// to: O1 |
|
1732 |
// count: O2 treated as signed |
|
1733 |
// |
|
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1734 |
address generate_conjoint_short_copy(bool aligned, address nooverlap_target, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1735 |
address *entry, const char *name) { |
1 | 1736 |
// Do reverse copy. |
1737 |
||
1738 |
__ align(CodeEntryAlignment); |
|
1739 |
StubCodeMark mark(this, "StubRoutines", name); |
|
1740 |
address start = __ pc(); |
|
1741 |
||
1742 |
Label L_skip_alignment, L_skip_alignment2, L_aligned_copy; |
|
1743 |
Label L_copy_2_bytes, L_copy_2_bytes_loop, L_exit; |
|
1744 |
||
1745 |
const Register from = O0; // source array address |
|
1746 |
const Register to = O1; // destination array address |
|
1747 |
const Register count = O2; // elements count |
|
1748 |
const Register end_from = from; // source array end address |
|
1749 |
const Register end_to = to; // destination array end address |
|
1750 |
||
1751 |
const Register byte_count = O3; // bytes count to copy |
|
1752 |
||
1753 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
|
1754 |
||
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1755 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1756 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1757 |
// caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1758 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1759 |
} |
1 | 1760 |
|
1761 |
array_overlap_test(nooverlap_target, 1); |
|
1762 |
||
1763 |
__ sllx(count, LogBytesPerShort, byte_count); |
|
1764 |
__ add(to, byte_count, end_to); // offset after last copied element |
|
1765 |
||
1766 |
// for short arrays, just do single element copy |
|
1767 |
__ cmp(count, 11); // 8 + 3 (22 bytes) |
|
1768 |
__ brx(Assembler::less, false, Assembler::pn, L_copy_2_bytes); |
|
1769 |
__ delayed()->add(from, byte_count, end_from); |
|
1770 |
||
1771 |
{ |
|
1772 |
// Align end of arrays since they could be not aligned even |
|
1773 |
// when arrays itself are aligned. |
|
1774 |
||
1775 |
// copy 1 element if necessary to align 'end_to' on an 4 bytes |
|
1776 |
__ andcc(end_to, 3, G0); |
|
1777 |
__ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); |
|
1778 |
__ delayed()->lduh(end_from, -2, O3); |
|
1779 |
__ dec(end_from, 2); |
|
1780 |
__ dec(end_to, 2); |
|
1781 |
__ dec(count); |
|
1782 |
__ sth(O3, end_to, 0); |
|
1783 |
__ BIND(L_skip_alignment); |
|
1784 |
||
1785 |
// copy 2 elements to align 'end_to' on an 8 byte boundary |
|
1786 |
__ andcc(end_to, 7, G0); |
|
1787 |
__ br(Assembler::zero, false, Assembler::pn, L_skip_alignment2); |
|
1788 |
__ delayed()->lduh(end_from, -2, O3); |
|
1789 |
__ dec(count, 2); |
|
1790 |
__ lduh(end_from, -4, O4); |
|
1791 |
__ dec(end_from, 4); |
|
1792 |
__ dec(end_to, 4); |
|
1793 |
__ sth(O3, end_to, 2); |
|
1794 |
__ sth(O4, end_to, 0); |
|
1795 |
__ BIND(L_skip_alignment2); |
|
1796 |
} |
|
1797 |
if (aligned) { |
|
1798 |
// Both arrays are aligned to 8-bytes in 64-bits VM. |
|
1799 |
// The 'count' is decremented in copy_16_bytes_backward_with_shift() |
|
1800 |
// in unaligned case. |
|
1801 |
__ dec(count, 8); |
|
46462 | 1802 |
} else { |
1 | 1803 |
// Copy with shift 16 bytes per iteration if arrays do not have |
1804 |
// the same alignment mod 8, otherwise jump to the next |
|
1805 |
// code for aligned copy (and substracting 8 from 'count' before jump). |
|
1806 |
// The compare above (count >= 11) guarantes 'count' >= 16 bytes. |
|
1807 |
// Also jump over aligned copy after the copy with shift completed. |
|
1808 |
||
1809 |
copy_16_bytes_backward_with_shift(end_from, end_to, count, 8, |
|
1810 |
L_aligned_copy, L_copy_2_bytes); |
|
1811 |
} |
|
1812 |
// copy 4 elements (16 bytes) at a time |
|
5249 | 1813 |
__ align(OptoLoopAlignment); |
1 | 1814 |
__ BIND(L_aligned_copy); |
1815 |
__ dec(end_from, 16); |
|
1816 |
__ ldx(end_from, 8, O3); |
|
1817 |
__ ldx(end_from, 0, O4); |
|
1818 |
__ dec(end_to, 16); |
|
1819 |
__ deccc(count, 8); |
|
1820 |
__ stx(O3, end_to, 8); |
|
1821 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); |
|
1822 |
__ delayed()->stx(O4, end_to, 0); |
|
1823 |
__ inc(count, 8); |
|
1824 |
||
1825 |
// copy 1 element (2 bytes) at a time |
|
1826 |
__ BIND(L_copy_2_bytes); |
|
10252 | 1827 |
__ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
1 | 1828 |
__ BIND(L_copy_2_bytes_loop); |
1829 |
__ dec(end_from, 2); |
|
1830 |
__ dec(end_to, 2); |
|
1831 |
__ lduh(end_from, 0, O4); |
|
1832 |
__ deccc(count); |
|
1833 |
__ brx(Assembler::greater, false, Assembler::pt, L_copy_2_bytes_loop); |
|
1834 |
__ delayed()->sth(O4, end_to, 0); |
|
1835 |
||
1836 |
__ BIND(L_exit); |
|
1837 |
// O3, O4 are used as temp registers |
|
1838 |
inc_counter_np(SharedRuntime::_jshort_array_copy_ctr, O3, O4); |
|
1839 |
__ retl(); |
|
1840 |
__ delayed()->mov(G0, O0); // return 0 |
|
1841 |
return start; |
|
1842 |
} |
|
1843 |
||
1844 |
// |
|
10512 | 1845 |
// Helper methods for generate_disjoint_int_copy_core() |
1846 |
// |
|
1847 |
void copy_16_bytes_loop(Register from, Register to, Register count, int count_dec, |
|
1848 |
Label& L_loop, bool use_prefetch, bool use_bis) { |
|
1849 |
||
1850 |
__ align(OptoLoopAlignment); |
|
1851 |
__ BIND(L_loop); |
|
1852 |
if (use_prefetch) { |
|
1853 |
if (ArraycopySrcPrefetchDistance > 0) { |
|
1854 |
__ prefetch(from, ArraycopySrcPrefetchDistance, Assembler::severalReads); |
|
1855 |
} |
|
1856 |
if (ArraycopyDstPrefetchDistance > 0) { |
|
1857 |
__ prefetch(to, ArraycopyDstPrefetchDistance, Assembler::severalWritesAndPossiblyReads); |
|
1858 |
} |
|
1859 |
} |
|
1860 |
__ ldx(from, 4, O4); |
|
1861 |
__ ldx(from, 12, G4); |
|
1862 |
__ inc(to, 16); |
|
1863 |
__ inc(from, 16); |
|
1864 |
__ deccc(count, 4); // Can we do next iteration after this one? |
|
1865 |
||
1866 |
__ srlx(O4, 32, G3); |
|
1867 |
__ bset(G3, O3); |
|
1868 |
__ sllx(O4, 32, O4); |
|
1869 |
__ srlx(G4, 32, G3); |
|
1870 |
__ bset(G3, O4); |
|
1871 |
if (use_bis) { |
|
1872 |
__ stxa(O3, to, -16); |
|
1873 |
__ stxa(O4, to, -8); |
|
1874 |
} else { |
|
1875 |
__ stx(O3, to, -16); |
|
1876 |
__ stx(O4, to, -8); |
|
1877 |
} |
|
1878 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); |
|
1879 |
__ delayed()->sllx(G4, 32, O3); |
|
1880 |
||
1881 |
} |
|
1882 |
||
1883 |
// |
|
1 | 1884 |
// Generate core code for disjoint int copy (and oop copy on 32-bit). |
1885 |
// If "aligned" is true, the "from" and "to" addresses are assumed |
|
1886 |
// to be heapword aligned. |
|
1887 |
// |
|
1888 |
// Arguments: |
|
1889 |
// from: O0 |
|
1890 |
// to: O1 |
|
1891 |
// count: O2 treated as signed |
|
1892 |
// |
|
1893 |
void generate_disjoint_int_copy_core(bool aligned) { |
|
1894 |
||
1895 |
Label L_skip_alignment, L_aligned_copy; |
|
10512 | 1896 |
Label L_copy_4_bytes, L_copy_4_bytes_loop, L_exit; |
1 | 1897 |
|
1898 |
const Register from = O0; // source array address |
|
1899 |
const Register to = O1; // destination array address |
|
1900 |
const Register count = O2; // elements count |
|
1901 |
const Register offset = O5; // offset from start of arrays |
|
1902 |
// O3, O4, G3, G4 are used as temp registers |
|
1903 |
||
1904 |
// 'aligned' == true when it is known statically during compilation |
|
1905 |
// of this arraycopy call site that both 'from' and 'to' addresses |
|
1906 |
// are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). |
|
1907 |
// |
|
1908 |
// Aligned arrays have 4 bytes alignment in 32-bits VM |
|
1909 |
// and 8 bytes - in 64-bits VM. |
|
1910 |
// |
|
46462 | 1911 |
if (!aligned) { |
1 | 1912 |
// The next check could be put under 'ifndef' since the code in |
1913 |
// generate_disjoint_long_copy_core() has own checks and set 'offset'. |
|
1914 |
||
1915 |
// for short arrays, just do single element copy |
|
1916 |
__ cmp(count, 5); // 4 + 1 (20 bytes) |
|
1917 |
__ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_4_bytes); |
|
1918 |
__ delayed()->mov(G0, offset); |
|
1919 |
||
1920 |
// copy 1 element to align 'to' on an 8 byte boundary |
|
1921 |
__ andcc(to, 7, G0); |
|
1922 |
__ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); |
|
1923 |
__ delayed()->ld(from, 0, O3); |
|
1924 |
__ inc(from, 4); |
|
1925 |
__ inc(to, 4); |
|
1926 |
__ dec(count); |
|
1927 |
__ st(O3, to, -4); |
|
1928 |
__ BIND(L_skip_alignment); |
|
1929 |
||
1930 |
// if arrays have same alignment mod 8, do 4 elements copy |
|
1931 |
__ andcc(from, 7, G0); |
|
1932 |
__ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); |
|
1933 |
__ delayed()->ld(from, 0, O3); |
|
1934 |
||
1935 |
// |
|
1936 |
// Load 2 aligned 8-bytes chunks and use one from previous iteration |
|
1937 |
// to form 2 aligned 8-bytes chunks to store. |
|
1938 |
// |
|
1939 |
// copy_16_bytes_forward_with_shift() is not used here since this |
|
1940 |
// code is more optimal. |
|
1941 |
||
1942 |
// copy with shift 4 elements (16 bytes) at a time |
|
1943 |
__ dec(count, 4); // The cmp at the beginning guaranty count >= 4 |
|
10512 | 1944 |
__ sllx(O3, 32, O3); |
1945 |
||
24326
d3fdd5c16fe0
8022070: Compilation error in stubGenerator_sparc.cpp with some compilers
mikael
parents:
22505
diff
changeset
|
1946 |
disjoint_copy_core(from, to, count, 2, 16, &StubGenerator::copy_16_bytes_loop); |
1 | 1947 |
|
1948 |
__ br(Assembler::always, false, Assembler::pt, L_copy_4_bytes); |
|
1949 |
__ delayed()->inc(count, 4); // restore 'count' |
|
1950 |
||
1951 |
__ BIND(L_aligned_copy); |
|
10512 | 1952 |
} // !aligned |
1953 |
||
1 | 1954 |
// copy 4 elements (16 bytes) at a time |
1955 |
__ and3(count, 1, G4); // Save |
|
1956 |
__ srl(count, 1, count); |
|
1957 |
generate_disjoint_long_copy_core(aligned); |
|
1958 |
__ mov(G4, count); // Restore |
|
1959 |
||
1960 |
// copy 1 element at a time |
|
1961 |
__ BIND(L_copy_4_bytes); |
|
10252 | 1962 |
__ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
1 | 1963 |
__ BIND(L_copy_4_bytes_loop); |
1964 |
__ ld(from, offset, O3); |
|
1965 |
__ deccc(count); |
|
1966 |
__ st(O3, to, offset); |
|
1967 |
__ brx(Assembler::notZero, false, Assembler::pt, L_copy_4_bytes_loop); |
|
1968 |
__ delayed()->inc(offset, 4); |
|
1969 |
__ BIND(L_exit); |
|
1970 |
} |
|
1971 |
||
1972 |
// |
|
1973 |
// Generate stub for disjoint int copy. If "aligned" is true, the |
|
1974 |
// "from" and "to" addresses are assumed to be heapword aligned. |
|
1975 |
// |
|
1976 |
// Arguments for generated stub: |
|
1977 |
// from: O0 |
|
1978 |
// to: O1 |
|
1979 |
// count: O2 treated as signed |
|
1980 |
// |
|
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1981 |
address generate_disjoint_int_copy(bool aligned, address *entry, const char *name) { |
1 | 1982 |
__ align(CodeEntryAlignment); |
1983 |
StubCodeMark mark(this, "StubRoutines", name); |
|
1984 |
address start = __ pc(); |
|
1985 |
||
1986 |
const Register count = O2; |
|
1987 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
|
1988 |
||
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1989 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1990 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1991 |
// caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1992 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
1993 |
} |
1 | 1994 |
|
1995 |
generate_disjoint_int_copy_core(aligned); |
|
1996 |
||
1997 |
// O3, O4 are used as temp registers |
|
1998 |
inc_counter_np(SharedRuntime::_jint_array_copy_ctr, O3, O4); |
|
1999 |
__ retl(); |
|
2000 |
__ delayed()->mov(G0, O0); // return 0 |
|
2001 |
return start; |
|
2002 |
} |
|
2003 |
||
2004 |
// |
|
2005 |
// Generate core code for conjoint int copy (and oop copy on 32-bit). |
|
2006 |
// If "aligned" is true, the "from" and "to" addresses are assumed |
|
2007 |
// to be heapword aligned. |
|
2008 |
// |
|
2009 |
// Arguments: |
|
2010 |
// from: O0 |
|
2011 |
// to: O1 |
|
2012 |
// count: O2 treated as signed |
|
2013 |
// |
|
2014 |
void generate_conjoint_int_copy_core(bool aligned) { |
|
2015 |
// Do reverse copy. |
|
2016 |
||
2017 |
Label L_skip_alignment, L_aligned_copy; |
|
2018 |
Label L_copy_16_bytes, L_copy_4_bytes, L_copy_4_bytes_loop, L_exit; |
|
2019 |
||
2020 |
const Register from = O0; // source array address |
|
2021 |
const Register to = O1; // destination array address |
|
2022 |
const Register count = O2; // elements count |
|
2023 |
const Register end_from = from; // source array end address |
|
2024 |
const Register end_to = to; // destination array end address |
|
2025 |
// O3, O4, O5, G3 are used as temp registers |
|
2026 |
||
2027 |
const Register byte_count = O3; // bytes count to copy |
|
2028 |
||
2029 |
__ sllx(count, LogBytesPerInt, byte_count); |
|
2030 |
__ add(to, byte_count, end_to); // offset after last copied element |
|
2031 |
||
2032 |
__ cmp(count, 5); // for short arrays, just do single element copy |
|
2033 |
__ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_4_bytes); |
|
2034 |
__ delayed()->add(from, byte_count, end_from); |
|
2035 |
||
2036 |
// copy 1 element to align 'to' on an 8 byte boundary |
|
2037 |
__ andcc(end_to, 7, G0); |
|
2038 |
__ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); |
|
2039 |
__ delayed()->nop(); |
|
2040 |
__ dec(count); |
|
2041 |
__ dec(end_from, 4); |
|
2042 |
__ dec(end_to, 4); |
|
2043 |
__ ld(end_from, 0, O4); |
|
2044 |
__ st(O4, end_to, 0); |
|
2045 |
__ BIND(L_skip_alignment); |
|
2046 |
||
2047 |
// Check if 'end_from' and 'end_to' has the same alignment. |
|
2048 |
__ andcc(end_from, 7, G0); |
|
2049 |
__ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); |
|
2050 |
__ delayed()->dec(count, 4); // The cmp at the start guaranty cnt >= 4 |
|
2051 |
||
2052 |
// copy with shift 4 elements (16 bytes) at a time |
|
2053 |
// |
|
2054 |
// Load 2 aligned 8-bytes chunks and use one from previous iteration |
|
2055 |
// to form 2 aligned 8-bytes chunks to store. |
|
2056 |
// |
|
2057 |
__ ldx(end_from, -4, O3); |
|
5249 | 2058 |
__ align(OptoLoopAlignment); |
1 | 2059 |
__ BIND(L_copy_16_bytes); |
2060 |
__ ldx(end_from, -12, O4); |
|
2061 |
__ deccc(count, 4); |
|
2062 |
__ ldx(end_from, -20, O5); |
|
2063 |
__ dec(end_to, 16); |
|
2064 |
__ dec(end_from, 16); |
|
2065 |
__ srlx(O3, 32, O3); |
|
2066 |
__ sllx(O4, 32, G3); |
|
2067 |
__ bset(G3, O3); |
|
2068 |
__ stx(O3, end_to, 8); |
|
2069 |
__ srlx(O4, 32, O4); |
|
2070 |
__ sllx(O5, 32, G3); |
|
2071 |
__ bset(O4, G3); |
|
2072 |
__ stx(G3, end_to, 0); |
|
2073 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_copy_16_bytes); |
|
2074 |
__ delayed()->mov(O5, O3); |
|
2075 |
||
2076 |
__ br(Assembler::always, false, Assembler::pt, L_copy_4_bytes); |
|
2077 |
__ delayed()->inc(count, 4); |
|
2078 |
||
2079 |
// copy 4 elements (16 bytes) at a time |
|
5249 | 2080 |
__ align(OptoLoopAlignment); |
1 | 2081 |
__ BIND(L_aligned_copy); |
2082 |
__ dec(end_from, 16); |
|
2083 |
__ ldx(end_from, 8, O3); |
|
2084 |
__ ldx(end_from, 0, O4); |
|
2085 |
__ dec(end_to, 16); |
|
2086 |
__ deccc(count, 4); |
|
2087 |
__ stx(O3, end_to, 8); |
|
2088 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); |
|
2089 |
__ delayed()->stx(O4, end_to, 0); |
|
2090 |
__ inc(count, 4); |
|
2091 |
||
2092 |
// copy 1 element (4 bytes) at a time |
|
2093 |
__ BIND(L_copy_4_bytes); |
|
10252 | 2094 |
__ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
1 | 2095 |
__ BIND(L_copy_4_bytes_loop); |
2096 |
__ dec(end_from, 4); |
|
2097 |
__ dec(end_to, 4); |
|
2098 |
__ ld(end_from, 0, O4); |
|
2099 |
__ deccc(count); |
|
2100 |
__ brx(Assembler::greater, false, Assembler::pt, L_copy_4_bytes_loop); |
|
2101 |
__ delayed()->st(O4, end_to, 0); |
|
2102 |
__ BIND(L_exit); |
|
2103 |
} |
|
2104 |
||
2105 |
// |
|
2106 |
// Generate stub for conjoint int copy. If "aligned" is true, the |
|
2107 |
// "from" and "to" addresses are assumed to be heapword aligned. |
|
2108 |
// |
|
2109 |
// Arguments for generated stub: |
|
2110 |
// from: O0 |
|
2111 |
// to: O1 |
|
2112 |
// count: O2 treated as signed |
|
2113 |
// |
|
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2114 |
address generate_conjoint_int_copy(bool aligned, address nooverlap_target, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2115 |
address *entry, const char *name) { |
1 | 2116 |
__ align(CodeEntryAlignment); |
2117 |
StubCodeMark mark(this, "StubRoutines", name); |
|
2118 |
address start = __ pc(); |
|
2119 |
||
2120 |
assert_clean_int(O2, O3); // Make sure 'count' is clean int. |
|
2121 |
||
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2122 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2123 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2124 |
// caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2125 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2126 |
} |
1 | 2127 |
|
2128 |
array_overlap_test(nooverlap_target, 2); |
|
2129 |
||
2130 |
generate_conjoint_int_copy_core(aligned); |
|
2131 |
||
2132 |
// O3, O4 are used as temp registers |
|
2133 |
inc_counter_np(SharedRuntime::_jint_array_copy_ctr, O3, O4); |
|
2134 |
__ retl(); |
|
2135 |
__ delayed()->mov(G0, O0); // return 0 |
|
2136 |
return start; |
|
2137 |
} |
|
2138 |
||
2139 |
// |
|
10512 | 2140 |
// Helper methods for generate_disjoint_long_copy_core() |
2141 |
// |
|
2142 |
void copy_64_bytes_loop(Register from, Register to, Register count, int count_dec, |
|
2143 |
Label& L_loop, bool use_prefetch, bool use_bis) { |
|
2144 |
__ align(OptoLoopAlignment); |
|
2145 |
__ BIND(L_loop); |
|
2146 |
for (int off = 0; off < 64; off += 16) { |
|
2147 |
if (use_prefetch && (off & 31) == 0) { |
|
2148 |
if (ArraycopySrcPrefetchDistance > 0) { |
|
10566
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10545
diff
changeset
|
2149 |
__ prefetch(from, ArraycopySrcPrefetchDistance+off, Assembler::severalReads); |
10512 | 2150 |
} |
2151 |
if (ArraycopyDstPrefetchDistance > 0) { |
|
10566
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10545
diff
changeset
|
2152 |
__ prefetch(to, ArraycopyDstPrefetchDistance+off, Assembler::severalWritesAndPossiblyReads); |
10512 | 2153 |
} |
2154 |
} |
|
2155 |
__ ldx(from, off+0, O4); |
|
2156 |
__ ldx(from, off+8, O5); |
|
2157 |
if (use_bis) { |
|
2158 |
__ stxa(O4, to, off+0); |
|
2159 |
__ stxa(O5, to, off+8); |
|
2160 |
} else { |
|
2161 |
__ stx(O4, to, off+0); |
|
2162 |
__ stx(O5, to, off+8); |
|
2163 |
} |
|
2164 |
} |
|
2165 |
__ deccc(count, 8); |
|
2166 |
__ inc(from, 64); |
|
2167 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); |
|
2168 |
__ delayed()->inc(to, 64); |
|
2169 |
} |
|
2170 |
||
2171 |
// |
|
1 | 2172 |
// Generate core code for disjoint long copy (and oop copy on 64-bit). |
2173 |
// "aligned" is ignored, because we must make the stronger |
|
2174 |
// assumption that both addresses are always 64-bit aligned. |
|
2175 |
// |
|
2176 |
// Arguments: |
|
2177 |
// from: O0 |
|
2178 |
// to: O1 |
|
2179 |
// count: O2 treated as signed |
|
2180 |
// |
|
5248
5eddf88cc3c9
6940677: Use 64 bytes chunk copy for arraycopy on Sparc
kvn
parents:
5046
diff
changeset
|
2181 |
// count -= 2; |
5eddf88cc3c9
6940677: Use 64 bytes chunk copy for arraycopy on Sparc
kvn
parents:
5046
diff
changeset
|
2182 |
// if ( count >= 0 ) { // >= 2 elements |
5eddf88cc3c9
6940677: Use 64 bytes chunk copy for arraycopy on Sparc
kvn
parents:
5046
diff
changeset
|
2183 |
// if ( count > 6) { // >= 8 elements |
5eddf88cc3c9
6940677: Use 64 bytes chunk copy for arraycopy on Sparc
kvn
parents:
5046
diff
changeset
|
2184 |
// count -= 6; // original count - 8 |
5eddf88cc3c9
6940677: Use 64 bytes chunk copy for arraycopy on Sparc
kvn
parents:
5046
diff
changeset
|
2185 |
// do { |
5eddf88cc3c9
6940677: Use 64 bytes chunk copy for arraycopy on Sparc
kvn
parents:
5046
diff
changeset
|
2186 |
// copy_8_elements; |
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|
2187 |
// count -= 8; |
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|
2188 |
// } while ( count >= 0 ); |
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|
2189 |
// count += 6; |
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changeset
|
2190 |
// } |
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changeset
|
2191 |
// if ( count >= 0 ) { // >= 2 elements |
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changeset
|
2192 |
// do { |
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diff
changeset
|
2193 |
// copy_2_elements; |
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changeset
|
2194 |
// } while ( (count=count-2) >= 0 ); |
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changeset
|
2195 |
// } |
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changeset
|
2196 |
// } |
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diff
changeset
|
2197 |
// count += 2; |
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diff
changeset
|
2198 |
// if ( count != 0 ) { // 1 element left |
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changeset
|
2199 |
// copy_1_element; |
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changeset
|
2200 |
// } |
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changeset
|
2201 |
// |
1 | 2202 |
void generate_disjoint_long_copy_core(bool aligned) { |
2203 |
Label L_copy_8_bytes, L_copy_16_bytes, L_exit; |
|
2204 |
const Register from = O0; // source array address |
|
2205 |
const Register to = O1; // destination array address |
|
2206 |
const Register count = O2; // elements count |
|
2207 |
const Register offset0 = O4; // element offset |
|
2208 |
const Register offset8 = O5; // next element offset |
|
2209 |
||
10512 | 2210 |
__ deccc(count, 2); |
2211 |
__ mov(G0, offset0); // offset from start of arrays (0) |
|
2212 |
__ brx(Assembler::negative, false, Assembler::pn, L_copy_8_bytes ); |
|
2213 |
__ delayed()->add(offset0, 8, offset8); |
|
5248
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changeset
|
2214 |
|
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changeset
|
2215 |
// Copy by 64 bytes chunks |
10512 | 2216 |
|
5248
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|
2217 |
const Register from64 = O3; // source address |
5eddf88cc3c9
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changeset
|
2218 |
const Register to64 = G3; // destination address |
10512 | 2219 |
__ subcc(count, 6, O3); |
2220 |
__ brx(Assembler::negative, false, Assembler::pt, L_copy_16_bytes ); |
|
2221 |
__ delayed()->mov(to, to64); |
|
2222 |
// Now we can use O4(offset0), O5(offset8) as temps |
|
2223 |
__ mov(O3, count); |
|
2224 |
// count >= 0 (original count - 8) |
|
2225 |
__ mov(from, from64); |
|
2226 |
||
24326
d3fdd5c16fe0
8022070: Compilation error in stubGenerator_sparc.cpp with some compilers
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parents:
22505
diff
changeset
|
2227 |
disjoint_copy_core(from64, to64, count, 3, 64, &StubGenerator::copy_64_bytes_loop); |
5248
5eddf88cc3c9
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changeset
|
2228 |
|
5eddf88cc3c9
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changeset
|
2229 |
// Restore O4(offset0), O5(offset8) |
5eddf88cc3c9
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changeset
|
2230 |
__ sub(from64, from, offset0); |
10512 | 2231 |
__ inccc(count, 6); // restore count |
5248
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changeset
|
2232 |
__ brx(Assembler::negative, false, Assembler::pn, L_copy_8_bytes ); |
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changeset
|
2233 |
__ delayed()->add(offset0, 8, offset8); |
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changeset
|
2234 |
|
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changeset
|
2235 |
// Copy by 16 bytes chunks |
5249 | 2236 |
__ align(OptoLoopAlignment); |
1 | 2237 |
__ BIND(L_copy_16_bytes); |
2238 |
__ ldx(from, offset0, O3); |
|
2239 |
__ ldx(from, offset8, G3); |
|
2240 |
__ deccc(count, 2); |
|
2241 |
__ stx(O3, to, offset0); |
|
2242 |
__ inc(offset0, 16); |
|
2243 |
__ stx(G3, to, offset8); |
|
2244 |
__ brx(Assembler::greaterEqual, false, Assembler::pt, L_copy_16_bytes); |
|
2245 |
__ delayed()->inc(offset8, 16); |
|
2246 |
||
5248
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changeset
|
2247 |
// Copy last 8 bytes |
1 | 2248 |
__ BIND(L_copy_8_bytes); |
2249 |
__ inccc(count, 2); |
|
2250 |
__ brx(Assembler::zero, true, Assembler::pn, L_exit ); |
|
2251 |
__ delayed()->mov(offset0, offset8); // Set O5 used by other stubs |
|
2252 |
__ ldx(from, offset0, O3); |
|
2253 |
__ stx(O3, to, offset0); |
|
2254 |
__ BIND(L_exit); |
|
2255 |
} |
|
2256 |
||
2257 |
// |
|
2258 |
// Generate stub for disjoint long copy. |
|
2259 |
// "aligned" is ignored, because we must make the stronger |
|
2260 |
// assumption that both addresses are always 64-bit aligned. |
|
2261 |
// |
|
2262 |
// Arguments for generated stub: |
|
2263 |
// from: O0 |
|
2264 |
// to: O1 |
|
2265 |
// count: O2 treated as signed |
|
2266 |
// |
|
8487
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changeset
|
2267 |
address generate_disjoint_long_copy(bool aligned, address *entry, const char *name) { |
1 | 2268 |
__ align(CodeEntryAlignment); |
2269 |
StubCodeMark mark(this, "StubRoutines", name); |
|
2270 |
address start = __ pc(); |
|
2271 |
||
2272 |
assert_clean_int(O2, O3); // Make sure 'count' is clean int. |
|
2273 |
||
8487
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changeset
|
2274 |
if (entry != NULL) { |
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diff
changeset
|
2275 |
*entry = __ pc(); |
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diff
changeset
|
2276 |
// caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
bf96596f06d2
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diff
changeset
|
2277 |
BLOCK_COMMENT("Entry:"); |
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changeset
|
2278 |
} |
1 | 2279 |
|
2280 |
generate_disjoint_long_copy_core(aligned); |
|
2281 |
||
2282 |
// O3, O4 are used as temp registers |
|
2283 |
inc_counter_np(SharedRuntime::_jlong_array_copy_ctr, O3, O4); |
|
2284 |
__ retl(); |
|
2285 |
__ delayed()->mov(G0, O0); // return 0 |
|
2286 |
return start; |
|
2287 |
} |
|
2288 |
||
2289 |
// |
|
2290 |
// Generate core code for conjoint long copy (and oop copy on 64-bit). |
|
2291 |
// "aligned" is ignored, because we must make the stronger |
|
2292 |
// assumption that both addresses are always 64-bit aligned. |
|
2293 |
// |
|
2294 |
// Arguments: |
|
2295 |
// from: O0 |
|
2296 |
// to: O1 |
|
2297 |
// count: O2 treated as signed |
|
2298 |
// |
|
2299 |
void generate_conjoint_long_copy_core(bool aligned) { |
|
2300 |
// Do reverse copy. |
|
2301 |
Label L_copy_8_bytes, L_copy_16_bytes, L_exit; |
|
2302 |
const Register from = O0; // source array address |
|
2303 |
const Register to = O1; // destination array address |
|
2304 |
const Register count = O2; // elements count |
|
2305 |
const Register offset8 = O4; // element offset |
|
2306 |
const Register offset0 = O5; // previous element offset |
|
2307 |
||
2308 |
__ subcc(count, 1, count); |
|
2309 |
__ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_8_bytes ); |
|
2310 |
__ delayed()->sllx(count, LogBytesPerLong, offset8); |
|
2311 |
__ sub(offset8, 8, offset0); |
|
5249 | 2312 |
__ align(OptoLoopAlignment); |
1 | 2313 |
__ BIND(L_copy_16_bytes); |
2314 |
__ ldx(from, offset8, O2); |
|
2315 |
__ ldx(from, offset0, O3); |
|
2316 |
__ stx(O2, to, offset8); |
|
2317 |
__ deccc(offset8, 16); // use offset8 as counter |
|
2318 |
__ stx(O3, to, offset0); |
|
2319 |
__ brx(Assembler::greater, false, Assembler::pt, L_copy_16_bytes); |
|
2320 |
__ delayed()->dec(offset0, 16); |
|
2321 |
||
2322 |
__ BIND(L_copy_8_bytes); |
|
2323 |
__ brx(Assembler::negative, false, Assembler::pn, L_exit ); |
|
2324 |
__ delayed()->nop(); |
|
2325 |
__ ldx(from, 0, O3); |
|
2326 |
__ stx(O3, to, 0); |
|
2327 |
__ BIND(L_exit); |
|
2328 |
} |
|
2329 |
||
2330 |
// Generate stub for conjoint long copy. |
|
2331 |
// "aligned" is ignored, because we must make the stronger |
|
2332 |
// assumption that both addresses are always 64-bit aligned. |
|
2333 |
// |
|
2334 |
// Arguments for generated stub: |
|
2335 |
// from: O0 |
|
2336 |
// to: O1 |
|
2337 |
// count: O2 treated as signed |
|
2338 |
// |
|
8487
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7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2339 |
address generate_conjoint_long_copy(bool aligned, address nooverlap_target, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2340 |
address *entry, const char *name) { |
1 | 2341 |
__ align(CodeEntryAlignment); |
2342 |
StubCodeMark mark(this, "StubRoutines", name); |
|
2343 |
address start = __ pc(); |
|
2344 |
||
8498 | 2345 |
assert(aligned, "Should always be aligned"); |
1 | 2346 |
|
2347 |
assert_clean_int(O2, O3); // Make sure 'count' is clean int. |
|
2348 |
||
8487
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7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2349 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2350 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
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diff
changeset
|
2351 |
// caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2352 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2353 |
} |
1 | 2354 |
|
2355 |
array_overlap_test(nooverlap_target, 3); |
|
2356 |
||
2357 |
generate_conjoint_long_copy_core(aligned); |
|
2358 |
||
2359 |
// O3, O4 are used as temp registers |
|
2360 |
inc_counter_np(SharedRuntime::_jlong_array_copy_ctr, O3, O4); |
|
2361 |
__ retl(); |
|
2362 |
__ delayed()->mov(G0, O0); // return 0 |
|
2363 |
return start; |
|
2364 |
} |
|
2365 |
||
2366 |
// Generate stub for disjoint oop copy. If "aligned" is true, the |
|
2367 |
// "from" and "to" addresses are assumed to be heapword aligned. |
|
2368 |
// |
|
2369 |
// Arguments for generated stub: |
|
2370 |
// from: O0 |
|
2371 |
// to: O1 |
|
2372 |
// count: O2 treated as signed |
|
2373 |
// |
|
8498 | 2374 |
address generate_disjoint_oop_copy(bool aligned, address *entry, const char *name, |
2375 |
bool dest_uninitialized = false) { |
|
1 | 2376 |
|
2377 |
const Register from = O0; // source array address |
|
2378 |
const Register to = O1; // destination array address |
|
2379 |
const Register count = O2; // elements count |
|
2380 |
||
2381 |
__ align(CodeEntryAlignment); |
|
2382 |
StubCodeMark mark(this, "StubRoutines", name); |
|
2383 |
address start = __ pc(); |
|
2384 |
||
2385 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
|
2386 |
||
8487
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7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2387 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2388 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2389 |
// caller can pass a 64-bit byte count here |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2390 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2391 |
} |
1 | 2392 |
|
2393 |
// save arguments for barrier generation |
|
2394 |
__ mov(to, G1); |
|
2395 |
__ mov(count, G5); |
|
8498 | 2396 |
gen_write_ref_array_pre_barrier(G1, G5, dest_uninitialized); |
360
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diff
changeset
|
2397 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
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diff
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|
2398 |
if (UseCompressedOops) { |
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|
2399 |
generate_disjoint_int_copy_core(aligned); |
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|
2400 |
} else { |
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|
2401 |
generate_disjoint_long_copy_core(aligned); |
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|
2402 |
} |
1 | 2403 |
// O0 is used as temp register |
2404 |
gen_write_ref_array_post_barrier(G1, G5, O0); |
|
2405 |
||
2406 |
// O3, O4 are used as temp registers |
|
2407 |
inc_counter_np(SharedRuntime::_oop_array_copy_ctr, O3, O4); |
|
2408 |
__ retl(); |
|
2409 |
__ delayed()->mov(G0, O0); // return 0 |
|
2410 |
return start; |
|
2411 |
} |
|
2412 |
||
2413 |
// Generate stub for conjoint oop copy. If "aligned" is true, the |
|
2414 |
// "from" and "to" addresses are assumed to be heapword aligned. |
|
2415 |
// |
|
2416 |
// Arguments for generated stub: |
|
2417 |
// from: O0 |
|
2418 |
// to: O1 |
|
2419 |
// count: O2 treated as signed |
|
2420 |
// |
|
8487
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7020521: arraycopy stubs place prebarriers incorrectly
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parents:
7397
diff
changeset
|
2421 |
address generate_conjoint_oop_copy(bool aligned, address nooverlap_target, |
8498 | 2422 |
address *entry, const char *name, |
2423 |
bool dest_uninitialized = false) { |
|
1 | 2424 |
|
2425 |
const Register from = O0; // source array address |
|
2426 |
const Register to = O1; // destination array address |
|
2427 |
const Register count = O2; // elements count |
|
2428 |
||
2429 |
__ align(CodeEntryAlignment); |
|
2430 |
StubCodeMark mark(this, "StubRoutines", name); |
|
2431 |
address start = __ pc(); |
|
2432 |
||
2433 |
assert_clean_int(count, O3); // Make sure 'count' is clean int. |
|
2434 |
||
8487
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7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2435 |
if (entry != NULL) { |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2436 |
*entry = __ pc(); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2437 |
// caller can pass a 64-bit byte count here |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2438 |
BLOCK_COMMENT("Entry:"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2439 |
} |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
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7397
diff
changeset
|
2440 |
|
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
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7397
diff
changeset
|
2441 |
array_overlap_test(nooverlap_target, LogBytesPerHeapOop); |
1 | 2442 |
|
2443 |
// save arguments for barrier generation |
|
2444 |
__ mov(to, G1); |
|
2445 |
__ mov(count, G5); |
|
8498 | 2446 |
gen_write_ref_array_pre_barrier(G1, G5, dest_uninitialized); |
1 | 2447 |
|
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|
2448 |
if (UseCompressedOops) { |
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|
2449 |
generate_conjoint_int_copy_core(aligned); |
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diff
changeset
|
2450 |
} else { |
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|
2451 |
generate_conjoint_long_copy_core(aligned); |
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|
2452 |
} |
1 | 2453 |
|
2454 |
// O0 is used as temp register |
|
2455 |
gen_write_ref_array_post_barrier(G1, G5, O0); |
|
2456 |
||
2457 |
// O3, O4 are used as temp registers |
|
2458 |
inc_counter_np(SharedRuntime::_oop_array_copy_ctr, O3, O4); |
|
2459 |
__ retl(); |
|
2460 |
__ delayed()->mov(G0, O0); // return 0 |
|
2461 |
return start; |
|
2462 |
} |
|
2463 |
||
2464 |
||
2465 |
// Helper for generating a dynamic type check. |
|
2466 |
// Smashes only the given temp registers. |
|
2467 |
void generate_type_check(Register sub_klass, |
|
2468 |
Register super_check_offset, |
|
2469 |
Register super_klass, |
|
2470 |
Register temp, |
|
2256
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diff
changeset
|
2471 |
Label& L_success) { |
1 | 2472 |
assert_different_registers(sub_klass, super_check_offset, super_klass, temp); |
2473 |
||
2474 |
BLOCK_COMMENT("type_check:"); |
|
2475 |
||
2256
82d4e10b7c6b
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diff
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|
2476 |
Label L_miss, L_pop_to_miss; |
1 | 2477 |
|
2478 |
assert_clean_int(super_check_offset, temp); |
|
2479 |
||
2256
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6813212: factor duplicated assembly code for general subclass check (for 6655638)
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diff
changeset
|
2480 |
__ check_klass_subtype_fast_path(sub_klass, super_klass, temp, noreg, |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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diff
changeset
|
2481 |
&L_success, &L_miss, NULL, |
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changeset
|
2482 |
super_check_offset); |
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diff
changeset
|
2483 |
|
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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diff
changeset
|
2484 |
BLOCK_COMMENT("type_check_slow_path:"); |
1 | 2485 |
__ save_frame(0); |
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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diff
changeset
|
2486 |
__ check_klass_subtype_slow_path(sub_klass->after_save(), |
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diff
changeset
|
2487 |
super_klass->after_save(), |
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6813212: factor duplicated assembly code for general subclass check (for 6655638)
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diff
changeset
|
2488 |
L0, L1, L2, L4, |
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6813212: factor duplicated assembly code for general subclass check (for 6655638)
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2254
diff
changeset
|
2489 |
NULL, &L_pop_to_miss); |
10252 | 2490 |
__ ba(L_success); |
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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diff
changeset
|
2491 |
__ delayed()->restore(); |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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diff
changeset
|
2492 |
|
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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diff
changeset
|
2493 |
__ bind(L_pop_to_miss); |
1 | 2494 |
__ restore(); |
2495 |
||
2496 |
// Fall through on failure! |
|
2497 |
__ BIND(L_miss); |
|
2498 |
} |
|
2499 |
||
2500 |
||
2501 |
// Generate stub for checked oop copy. |
|
2502 |
// |
|
2503 |
// Arguments for generated stub: |
|
2504 |
// from: O0 |
|
2505 |
// to: O1 |
|
2506 |
// count: O2 treated as signed |
|
2507 |
// ckoff: O3 (super_check_offset) |
|
2508 |
// ckval: O4 (super_klass) |
|
2509 |
// ret: O0 zero for success; (-1^K) where K is partial transfer count |
|
2510 |
// |
|
8498 | 2511 |
address generate_checkcast_copy(const char *name, address *entry, bool dest_uninitialized = false) { |
1 | 2512 |
|
2513 |
const Register O0_from = O0; // source array address |
|
2514 |
const Register O1_to = O1; // destination array address |
|
2515 |
const Register O2_count = O2; // elements count |
|
2516 |
const Register O3_ckoff = O3; // super_check_offset |
|
2517 |
const Register O4_ckval = O4; // super_klass |
|
2518 |
||
2519 |
const Register O5_offset = O5; // loop var, with stride wordSize |
|
2520 |
const Register G1_remain = G1; // loop var, with stride -1 |
|
2521 |
const Register G3_oop = G3; // actual oop copied |
|
2522 |
const Register G4_klass = G4; // oop._klass |
|
2523 |
const Register G5_super = G5; // oop._klass._primary_supers[ckval] |
|
2524 |
||
2525 |
__ align(CodeEntryAlignment); |
|
2526 |
StubCodeMark mark(this, "StubRoutines", name); |
|
2527 |
address start = __ pc(); |
|
2528 |
||
2529 |
#ifdef ASSERT |
|
2256
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|
2530 |
// We sometimes save a frame (see generate_type_check below). |
1 | 2531 |
// If this will cause trouble, let's fail now instead of later. |
2532 |
__ save_frame(0); |
|
2533 |
__ restore(); |
|
2534 |
#endif |
|
2535 |
||
6770
a67870aaedb3
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never
parents:
6464
diff
changeset
|
2536 |
assert_clean_int(O2_count, G1); // Make sure 'count' is clean int. |
a67870aaedb3
6980792: Crash "exception happened outside interpreter, nmethods and vtable stubs (1)"
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parents:
6464
diff
changeset
|
2537 |
|
1 | 2538 |
#ifdef ASSERT |
2539 |
// caller guarantees that the arrays really are different |
|
2540 |
// otherwise, we would have to make conjoint checks |
|
2541 |
{ Label L; |
|
2542 |
__ mov(O3, G1); // spill: overlap test smashes O3 |
|
2543 |
__ mov(O4, G4); // spill: overlap test smashes O4 |
|
360
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|
2544 |
array_overlap_test(L, LogBytesPerHeapOop); |
1 | 2545 |
__ stop("checkcast_copy within a single array"); |
2546 |
__ bind(L); |
|
2547 |
__ mov(G1, O3); |
|
2548 |
__ mov(G4, O4); |
|
2549 |
} |
|
2550 |
#endif //ASSERT |
|
2551 |
||
8487
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|
2552 |
if (entry != NULL) { |
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7020521: arraycopy stubs place prebarriers incorrectly
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diff
changeset
|
2553 |
*entry = __ pc(); |
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diff
changeset
|
2554 |
// caller can pass a 64-bit byte count here (from generic stub) |
bf96596f06d2
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diff
changeset
|
2555 |
BLOCK_COMMENT("Entry:"); |
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7397
diff
changeset
|
2556 |
} |
8498 | 2557 |
gen_write_ref_array_pre_barrier(O1_to, O2_count, dest_uninitialized); |
1 | 2558 |
|
2559 |
Label load_element, store_element, do_card_marks, fail, done; |
|
2560 |
__ addcc(O2_count, 0, G1_remain); // initialize loop index, and test it |
|
2561 |
__ brx(Assembler::notZero, false, Assembler::pt, load_element); |
|
2562 |
__ delayed()->mov(G0, O5_offset); // offset from start of arrays |
|
2563 |
||
2564 |
// Empty array: Nothing to do. |
|
2565 |
inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr, O3, O4); |
|
2566 |
__ retl(); |
|
2567 |
__ delayed()->set(0, O0); // return 0 on (trivial) success |
|
2568 |
||
2569 |
// ======== begin loop ======== |
|
2570 |
// (Loop is rotated; its entry is load_element.) |
|
2571 |
// Loop variables: |
|
2572 |
// (O5 = 0; ; O5 += wordSize) --- offset from src, dest arrays |
|
2573 |
// (O2 = len; O2 != 0; O2--) --- number of oops *remaining* |
|
2574 |
// G3, G4, G5 --- current oop, oop.klass, oop.klass.super |
|
5249 | 2575 |
__ align(OptoLoopAlignment); |
1 | 2576 |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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parents:
2254
diff
changeset
|
2577 |
__ BIND(store_element); |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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parents:
2254
diff
changeset
|
2578 |
__ deccc(G1_remain); // decrement the count |
360
21d113ecbf6a
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189
diff
changeset
|
2579 |
__ store_heap_oop(G3_oop, O1_to, O5_offset); // store the oop |
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diff
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|
2580 |
__ inc(O5_offset, heapOopSize); // step to next offset |
1 | 2581 |
__ brx(Assembler::zero, true, Assembler::pt, do_card_marks); |
2582 |
__ delayed()->set(0, O0); // return -1 on success |
|
2583 |
||
2584 |
// ======== loop entry is here ======== |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
2585 |
__ BIND(load_element); |
360
21d113ecbf6a
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189
diff
changeset
|
2586 |
__ load_heap_oop(O0_from, O5_offset, G3_oop); // load the oop |
10252 | 2587 |
__ br_null_short(G3_oop, Assembler::pt, store_element); |
1 | 2588 |
|
360
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|
2589 |
__ load_klass(G3_oop, G4_klass); // query the object klass |
1 | 2590 |
|
2591 |
generate_type_check(G4_klass, O3_ckoff, O4_ckval, G5_super, |
|
2592 |
// branch to this on success: |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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parents:
2254
diff
changeset
|
2593 |
store_element); |
1 | 2594 |
// ======== end loop ======== |
2595 |
||
2596 |
// It was a real error; we must depend on the caller to finish the job. |
|
2597 |
// Register G1 has number of *remaining* oops, O2 number of *total* oops. |
|
2598 |
// Emit GC store barriers for the oops we have copied (O2 minus G1), |
|
2599 |
// and report their number to the caller. |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
2254
diff
changeset
|
2600 |
__ BIND(fail); |
1 | 2601 |
__ subcc(O2_count, G1_remain, O2_count); |
2602 |
__ brx(Assembler::zero, false, Assembler::pt, done); |
|
2603 |
__ delayed()->not1(O2_count, O0); // report (-1^K) to caller |
|
2604 |
||
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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parents:
2254
diff
changeset
|
2605 |
__ BIND(do_card_marks); |
1 | 2606 |
gen_write_ref_array_post_barrier(O1_to, O2_count, O3); // store check on O1[0..O2] |
2607 |
||
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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parents:
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diff
changeset
|
2608 |
__ BIND(done); |
1 | 2609 |
inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr, O3, O4); |
2610 |
__ retl(); |
|
2611 |
__ delayed()->nop(); // return value in 00 |
|
2612 |
||
2613 |
return start; |
|
2614 |
} |
|
2615 |
||
2616 |
||
2617 |
// Generate 'unsafe' array copy stub |
|
2618 |
// Though just as safe as the other stubs, it takes an unscaled |
|
2619 |
// size_t argument instead of an element count. |
|
2620 |
// |
|
2621 |
// Arguments for generated stub: |
|
2622 |
// from: O0 |
|
2623 |
// to: O1 |
|
2624 |
// count: O2 byte count, treated as ssize_t, can be zero |
|
2625 |
// |
|
2626 |
// Examines the alignment of the operands and dispatches |
|
2627 |
// to a long, int, short, or byte copy loop. |
|
2628 |
// |
|
8487
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7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2629 |
address generate_unsafe_copy(const char* name, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2630 |
address byte_copy_entry, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2631 |
address short_copy_entry, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
2632 |
address int_copy_entry, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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parents:
7397
diff
changeset
|
2633 |
address long_copy_entry) { |
1 | 2634 |
|
2635 |
const Register O0_from = O0; // source array address |
|
2636 |
const Register O1_to = O1; // destination array address |
|
2637 |
const Register O2_count = O2; // elements count |
|
2638 |
||
2639 |
const Register G1_bits = G1; // test copy of low bits |
|
2640 |
||
2641 |
__ align(CodeEntryAlignment); |
|
2642 |
StubCodeMark mark(this, "StubRoutines", name); |
|
2643 |
address start = __ pc(); |
|
2644 |
||
2645 |
// bump this on entry, not on exit: |
|
2646 |
inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr, G1, G3); |
|
2647 |
||
2648 |
__ or3(O0_from, O1_to, G1_bits); |
|
2649 |
__ or3(O2_count, G1_bits, G1_bits); |
|
2650 |
||
2651 |
__ btst(BytesPerLong-1, G1_bits); |
|
2652 |
__ br(Assembler::zero, true, Assembler::pt, |
|
2653 |
long_copy_entry, relocInfo::runtime_call_type); |
|
2654 |
// scale the count on the way out: |
|
2655 |
__ delayed()->srax(O2_count, LogBytesPerLong, O2_count); |
|
2656 |
||
2657 |
__ btst(BytesPerInt-1, G1_bits); |
|
2658 |
__ br(Assembler::zero, true, Assembler::pt, |
|
2659 |
int_copy_entry, relocInfo::runtime_call_type); |
|
2660 |
// scale the count on the way out: |
|
2661 |
__ delayed()->srax(O2_count, LogBytesPerInt, O2_count); |
|
2662 |
||
2663 |
__ btst(BytesPerShort-1, G1_bits); |
|
2664 |
__ br(Assembler::zero, true, Assembler::pt, |
|
2665 |
short_copy_entry, relocInfo::runtime_call_type); |
|
2666 |
// scale the count on the way out: |
|
2667 |
__ delayed()->srax(O2_count, LogBytesPerShort, O2_count); |
|
2668 |
||
2669 |
__ br(Assembler::always, false, Assembler::pt, |
|
2670 |
byte_copy_entry, relocInfo::runtime_call_type); |
|
2671 |
__ delayed()->nop(); |
|
2672 |
||
2673 |
return start; |
|
2674 |
} |
|
2675 |
||
2676 |
||
2677 |
// Perform range checks on the proposed arraycopy. |
|
2678 |
// Kills the two temps, but nothing else. |
|
2679 |
// Also, clean the sign bits of src_pos and dst_pos. |
|
2680 |
void arraycopy_range_checks(Register src, // source array oop (O0) |
|
2681 |
Register src_pos, // source position (O1) |
|
2682 |
Register dst, // destination array oo (O2) |
|
2683 |
Register dst_pos, // destination position (O3) |
|
2684 |
Register length, // length of copy (O4) |
|
2685 |
Register temp1, Register temp2, |
|
2686 |
Label& L_failed) { |
|
2687 |
BLOCK_COMMENT("arraycopy_range_checks:"); |
|
2688 |
||
2689 |
// if (src_pos + length > arrayOop(src)->length() ) FAIL; |
|
2690 |
||
2691 |
const Register array_length = temp1; // scratch |
|
2692 |
const Register end_pos = temp2; // scratch |
|
2693 |
||
2694 |
// Note: This next instruction may be in the delay slot of a branch: |
|
2695 |
__ add(length, src_pos, end_pos); // src_pos + length |
|
2696 |
__ lduw(src, arrayOopDesc::length_offset_in_bytes(), array_length); |
|
2697 |
__ cmp(end_pos, array_length); |
|
2698 |
__ br(Assembler::greater, false, Assembler::pn, L_failed); |
|
2699 |
||
2700 |
// if (dst_pos + length > arrayOop(dst)->length() ) FAIL; |
|
2701 |
__ delayed()->add(length, dst_pos, end_pos); // dst_pos + length |
|
2702 |
__ lduw(dst, arrayOopDesc::length_offset_in_bytes(), array_length); |
|
2703 |
__ cmp(end_pos, array_length); |
|
2704 |
__ br(Assembler::greater, false, Assembler::pn, L_failed); |
|
2705 |
||
2706 |
// Have to clean up high 32-bits of 'src_pos' and 'dst_pos'. |
|
2707 |
// Move with sign extension can be used since they are positive. |
|
2708 |
__ delayed()->signx(src_pos, src_pos); |
|
2709 |
__ signx(dst_pos, dst_pos); |
|
2710 |
||
2711 |
BLOCK_COMMENT("arraycopy_range_checks done"); |
|
2712 |
} |
|
2713 |
||
2714 |
||
2715 |
// |
|
2716 |
// Generate generic array copy stubs |
|
2717 |
// |
|
2718 |
// Input: |
|
2719 |
// O0 - src oop |
|
2720 |
// O1 - src_pos |
|
2721 |
// O2 - dst oop |
|
2722 |
// O3 - dst_pos |
|
2723 |
// O4 - element count |
|
2724 |
// |
|
2725 |
// Output: |
|
2726 |
// O0 == 0 - success |
|
2727 |
// O0 == -1 - need to call System.arraycopy |
|
2728 |
// |
|
8487
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7020521: arraycopy stubs place prebarriers incorrectly
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diff
changeset
|
2729 |
address generate_generic_copy(const char *name, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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diff
changeset
|
2730 |
address entry_jbyte_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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parents:
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diff
changeset
|
2731 |
address entry_jshort_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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parents:
7397
diff
changeset
|
2732 |
address entry_jint_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
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diff
changeset
|
2733 |
address entry_oop_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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diff
changeset
|
2734 |
address entry_jlong_arraycopy, |
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|
2735 |
address entry_checkcast_arraycopy) { |
1 | 2736 |
Label L_failed, L_objArray; |
2737 |
||
2738 |
// Input registers |
|
2739 |
const Register src = O0; // source array oop |
|
2740 |
const Register src_pos = O1; // source position |
|
2741 |
const Register dst = O2; // destination array oop |
|
2742 |
const Register dst_pos = O3; // destination position |
|
2743 |
const Register length = O4; // elements count |
|
2744 |
||
2745 |
// registers used as temp |
|
2746 |
const Register G3_src_klass = G3; // source array klass |
|
2747 |
const Register G4_dst_klass = G4; // destination array klass |
|
2748 |
const Register G5_lh = G5; // layout handler |
|
2749 |
const Register O5_temp = O5; |
|
2750 |
||
2751 |
__ align(CodeEntryAlignment); |
|
2752 |
StubCodeMark mark(this, "StubRoutines", name); |
|
2753 |
address start = __ pc(); |
|
2754 |
||
2755 |
// bump this on entry, not on exit: |
|
2756 |
inc_counter_np(SharedRuntime::_generic_array_copy_ctr, G1, G3); |
|
2757 |
||
2758 |
// In principle, the int arguments could be dirty. |
|
2759 |
//assert_clean_int(src_pos, G1); |
|
2760 |
//assert_clean_int(dst_pos, G1); |
|
2761 |
//assert_clean_int(length, G1); |
|
2762 |
||
2763 |
//----------------------------------------------------------------------- |
|
2764 |
// Assembler stubs will be used for this call to arraycopy |
|
2765 |
// if the following conditions are met: |
|
2766 |
// |
|
2767 |
// (1) src and dst must not be null. |
|
2768 |
// (2) src_pos must not be negative. |
|
2769 |
// (3) dst_pos must not be negative. |
|
2770 |
// (4) length must not be negative. |
|
2771 |
// (5) src klass and dst klass should be the same and not NULL. |
|
2772 |
// (6) src and dst should be arrays. |
|
2773 |
// (7) src_pos + length must not exceed length of src. |
|
2774 |
// (8) dst_pos + length must not exceed length of dst. |
|
2775 |
BLOCK_COMMENT("arraycopy initial argument checks"); |
|
2776 |
||
2777 |
// if (src == NULL) return -1; |
|
2778 |
__ br_null(src, false, Assembler::pn, L_failed); |
|
2779 |
||
2780 |
// if (src_pos < 0) return -1; |
|
2781 |
__ delayed()->tst(src_pos); |
|
2782 |
__ br(Assembler::negative, false, Assembler::pn, L_failed); |
|
2783 |
__ delayed()->nop(); |
|
2784 |
||
2785 |
// if (dst == NULL) return -1; |
|
2786 |
__ br_null(dst, false, Assembler::pn, L_failed); |
|
2787 |
||
2788 |
// if (dst_pos < 0) return -1; |
|
2789 |
__ delayed()->tst(dst_pos); |
|
2790 |
__ br(Assembler::negative, false, Assembler::pn, L_failed); |
|
2791 |
||
2792 |
// if (length < 0) return -1; |
|
2793 |
__ delayed()->tst(length); |
|
2794 |
__ br(Assembler::negative, false, Assembler::pn, L_failed); |
|
2795 |
||
2796 |
BLOCK_COMMENT("arraycopy argument klass checks"); |
|
2797 |
// get src->klass() |
|
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|
2798 |
if (UseCompressedClassPointers) { |
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|
2799 |
__ delayed()->nop(); // ??? not good |
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|
2800 |
__ load_klass(src, G3_src_klass); |
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|
2801 |
} else { |
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|
2802 |
__ delayed()->ld_ptr(src, oopDesc::klass_offset_in_bytes(), G3_src_klass); |
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|
2803 |
} |
1 | 2804 |
|
2805 |
#ifdef ASSERT |
|
2806 |
// assert(src->klass() != NULL); |
|
2807 |
BLOCK_COMMENT("assert klasses not null"); |
|
2808 |
{ Label L_a, L_b; |
|
10252 | 2809 |
__ br_notnull_short(G3_src_klass, Assembler::pt, L_b); // it is broken if klass is NULL |
1 | 2810 |
__ bind(L_a); |
2811 |
__ stop("broken null klass"); |
|
2812 |
__ bind(L_b); |
|
360
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|
2813 |
__ load_klass(dst, G4_dst_klass); |
1 | 2814 |
__ br_null(G4_dst_klass, false, Assembler::pn, L_a); // this would be broken also |
2815 |
__ delayed()->mov(G0, G4_dst_klass); // scribble the temp |
|
2816 |
BLOCK_COMMENT("assert done"); |
|
2817 |
} |
|
2818 |
#endif |
|
2819 |
||
2820 |
// Load layout helper |
|
2821 |
// |
|
2822 |
// |array_tag| | header_size | element_type | |log2_element_size| |
|
2823 |
// 32 30 24 16 8 2 0 |
|
2824 |
// |
|
2825 |
// array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0 |
|
2826 |
// |
|
2827 |
||
11430
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diff
changeset
|
2828 |
int lh_offset = in_bytes(Klass::layout_helper_offset()); |
1 | 2829 |
|
2830 |
// Load 32-bits signed value. Use br() instruction with it to check icc. |
|
2831 |
__ lduw(G3_src_klass, lh_offset, G5_lh); |
|
2832 |
||
19979
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parents:
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diff
changeset
|
2833 |
if (UseCompressedClassPointers) { |
360
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diff
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|
2834 |
__ load_klass(dst, G4_dst_klass); |
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|
2835 |
} |
1 | 2836 |
// Handle objArrays completely differently... |
2837 |
juint objArray_lh = Klass::array_layout_helper(T_OBJECT); |
|
2838 |
__ set(objArray_lh, O5_temp); |
|
2839 |
__ cmp(G5_lh, O5_temp); |
|
2840 |
__ br(Assembler::equal, false, Assembler::pt, L_objArray); |
|
19979
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diff
changeset
|
2841 |
if (UseCompressedClassPointers) { |
360
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|
2842 |
__ delayed()->nop(); |
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|
2843 |
} else { |
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diff
changeset
|
2844 |
__ delayed()->ld_ptr(dst, oopDesc::klass_offset_in_bytes(), G4_dst_klass); |
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|
2845 |
} |
1 | 2846 |
|
2847 |
// if (src->klass() != dst->klass()) return -1; |
|
10252 | 2848 |
__ cmp_and_brx_short(G3_src_klass, G4_dst_klass, Assembler::notEqual, Assembler::pn, L_failed); |
1 | 2849 |
|
2850 |
// if (!src->is_Array()) return -1; |
|
2851 |
__ cmp(G5_lh, Klass::_lh_neutral_value); // < 0 |
|
2852 |
__ br(Assembler::greaterEqual, false, Assembler::pn, L_failed); |
|
2853 |
||
2854 |
// At this point, it is known to be a typeArray (array_tag 0x3). |
|
2855 |
#ifdef ASSERT |
|
2856 |
__ delayed()->nop(); |
|
2857 |
{ Label L; |
|
2858 |
jint lh_prim_tag_in_place = (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift); |
|
2859 |
__ set(lh_prim_tag_in_place, O5_temp); |
|
2860 |
__ cmp(G5_lh, O5_temp); |
|
2861 |
__ br(Assembler::greaterEqual, false, Assembler::pt, L); |
|
2862 |
__ delayed()->nop(); |
|
2863 |
__ stop("must be a primitive array"); |
|
2864 |
__ bind(L); |
|
2865 |
} |
|
2866 |
#else |
|
2867 |
__ delayed(); // match next insn to prev branch |
|
2868 |
#endif |
|
2869 |
||
2870 |
arraycopy_range_checks(src, src_pos, dst, dst_pos, length, |
|
2871 |
O5_temp, G4_dst_klass, L_failed); |
|
2872 |
||
13952
e3cf184080bc
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13728
diff
changeset
|
2873 |
// TypeArrayKlass |
1 | 2874 |
// |
2875 |
// src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize); |
|
2876 |
// dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize); |
|
2877 |
// |
|
2878 |
||
2879 |
const Register G4_offset = G4_dst_klass; // array offset |
|
2880 |
const Register G3_elsize = G3_src_klass; // log2 element size |
|
2881 |
||
2882 |
__ srl(G5_lh, Klass::_lh_header_size_shift, G4_offset); |
|
2883 |
__ and3(G4_offset, Klass::_lh_header_size_mask, G4_offset); // array_offset |
|
2884 |
__ add(src, G4_offset, src); // src array offset |
|
2885 |
__ add(dst, G4_offset, dst); // dst array offset |
|
2886 |
__ and3(G5_lh, Klass::_lh_log2_element_size_mask, G3_elsize); // log2 element size |
|
2887 |
||
2888 |
// next registers should be set before the jump to corresponding stub |
|
2889 |
const Register from = O0; // source array address |
|
2890 |
const Register to = O1; // destination array address |
|
2891 |
const Register count = O2; // elements count |
|
2892 |
||
2893 |
// 'from', 'to', 'count' registers should be set in this order |
|
2894 |
// since they are the same as 'src', 'src_pos', 'dst'. |
|
2895 |
||
2896 |
BLOCK_COMMENT("scale indexes to element size"); |
|
2897 |
__ sll_ptr(src_pos, G3_elsize, src_pos); |
|
2898 |
__ sll_ptr(dst_pos, G3_elsize, dst_pos); |
|
2899 |
__ add(src, src_pos, from); // src_addr |
|
2900 |
__ add(dst, dst_pos, to); // dst_addr |
|
2901 |
||
2902 |
BLOCK_COMMENT("choose copy loop based on element size"); |
|
2903 |
__ cmp(G3_elsize, 0); |
|
8487
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diff
changeset
|
2904 |
__ br(Assembler::equal, true, Assembler::pt, entry_jbyte_arraycopy); |
1 | 2905 |
__ delayed()->signx(length, count); // length |
2906 |
||
2907 |
__ cmp(G3_elsize, LogBytesPerShort); |
|
8487
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7397
diff
changeset
|
2908 |
__ br(Assembler::equal, true, Assembler::pt, entry_jshort_arraycopy); |
1 | 2909 |
__ delayed()->signx(length, count); // length |
2910 |
||
2911 |
__ cmp(G3_elsize, LogBytesPerInt); |
|
8487
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diff
changeset
|
2912 |
__ br(Assembler::equal, true, Assembler::pt, entry_jint_arraycopy); |
1 | 2913 |
__ delayed()->signx(length, count); // length |
2914 |
#ifdef ASSERT |
|
2915 |
{ Label L; |
|
10252 | 2916 |
__ cmp_and_br_short(G3_elsize, LogBytesPerLong, Assembler::equal, Assembler::pt, L); |
1 | 2917 |
__ stop("must be long copy, but elsize is wrong"); |
2918 |
__ bind(L); |
|
2919 |
} |
|
2920 |
#endif |
|
8487
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diff
changeset
|
2921 |
__ br(Assembler::always, false, Assembler::pt, entry_jlong_arraycopy); |
1 | 2922 |
__ delayed()->signx(length, count); // length |
2923 |
||
13952
e3cf184080bc
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diff
changeset
|
2924 |
// ObjArrayKlass |
1 | 2925 |
__ BIND(L_objArray); |
2926 |
// live at this point: G3_src_klass, G4_dst_klass, src[_pos], dst[_pos], length |
|
2927 |
||
2928 |
Label L_plain_copy, L_checkcast_copy; |
|
2929 |
// test array classes for subtyping |
|
2930 |
__ cmp(G3_src_klass, G4_dst_klass); // usual case is exact equality |
|
2931 |
__ brx(Assembler::notEqual, true, Assembler::pn, L_checkcast_copy); |
|
2932 |
__ delayed()->lduw(G4_dst_klass, lh_offset, O5_temp); // hoisted from below |
|
2933 |
||
2934 |
// Identically typed arrays can be copied without element-wise checks. |
|
2935 |
arraycopy_range_checks(src, src_pos, dst, dst_pos, length, |
|
2936 |
O5_temp, G5_lh, L_failed); |
|
2937 |
||
2938 |
__ add(src, arrayOopDesc::base_offset_in_bytes(T_OBJECT), src); //src offset |
|
2939 |
__ add(dst, arrayOopDesc::base_offset_in_bytes(T_OBJECT), dst); //dst offset |
|
360
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diff
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|
2940 |
__ sll_ptr(src_pos, LogBytesPerHeapOop, src_pos); |
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|
2941 |
__ sll_ptr(dst_pos, LogBytesPerHeapOop, dst_pos); |
1 | 2942 |
__ add(src, src_pos, from); // src_addr |
2943 |
__ add(dst, dst_pos, to); // dst_addr |
|
2944 |
__ BIND(L_plain_copy); |
|
8487
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diff
changeset
|
2945 |
__ br(Assembler::always, false, Assembler::pt, entry_oop_arraycopy); |
1 | 2946 |
__ delayed()->signx(length, count); // length |
2947 |
||
2948 |
__ BIND(L_checkcast_copy); |
|
2949 |
// live at this point: G3_src_klass, G4_dst_klass |
|
2950 |
{ |
|
2951 |
// Before looking at dst.length, make sure dst is also an objArray. |
|
2952 |
// lduw(G4_dst_klass, lh_offset, O5_temp); // hoisted to delay slot |
|
2953 |
__ cmp(G5_lh, O5_temp); |
|
2954 |
__ br(Assembler::notEqual, false, Assembler::pn, L_failed); |
|
2955 |
||
2956 |
// It is safe to examine both src.length and dst.length. |
|
2957 |
__ delayed(); // match next insn to prev branch |
|
2958 |
arraycopy_range_checks(src, src_pos, dst, dst_pos, length, |
|
2959 |
O5_temp, G5_lh, L_failed); |
|
2960 |
||
2961 |
// Marshal the base address arguments now, freeing registers. |
|
2962 |
__ add(src, arrayOopDesc::base_offset_in_bytes(T_OBJECT), src); //src offset |
|
2963 |
__ add(dst, arrayOopDesc::base_offset_in_bytes(T_OBJECT), dst); //dst offset |
|
360
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diff
changeset
|
2964 |
__ sll_ptr(src_pos, LogBytesPerHeapOop, src_pos); |
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diff
changeset
|
2965 |
__ sll_ptr(dst_pos, LogBytesPerHeapOop, dst_pos); |
1 | 2966 |
__ add(src, src_pos, from); // src_addr |
2967 |
__ add(dst, dst_pos, to); // dst_addr |
|
2968 |
__ signx(length, count); // length (reloaded) |
|
2969 |
||
2970 |
Register sco_temp = O3; // this register is free now |
|
2971 |
assert_different_registers(from, to, count, sco_temp, |
|
2972 |
G4_dst_klass, G3_src_klass); |
|
2973 |
||
2974 |
// Generate the type check. |
|
11430
718fc06da49a
7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
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parents:
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diff
changeset
|
2975 |
int sco_offset = in_bytes(Klass::super_check_offset_offset()); |
1 | 2976 |
__ lduw(G4_dst_klass, sco_offset, sco_temp); |
2977 |
generate_type_check(G3_src_klass, sco_temp, G4_dst_klass, |
|
2978 |
O5_temp, L_plain_copy); |
|
2979 |
||
13952
e3cf184080bc
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diff
changeset
|
2980 |
// Fetch destination element klass from the ObjArrayKlass header. |
e3cf184080bc
8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
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parents:
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diff
changeset
|
2981 |
int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset()); |
1 | 2982 |
|
2983 |
// the checkcast_copy loop needs two extra arguments: |
|
2984 |
__ ld_ptr(G4_dst_klass, ek_offset, O4); // dest elem klass |
|
2985 |
// lduw(O4, sco_offset, O3); // sco of elem klass |
|
2986 |
||
8487
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diff
changeset
|
2987 |
__ br(Assembler::always, false, Assembler::pt, entry_checkcast_arraycopy); |
1 | 2988 |
__ delayed()->lduw(O4, sco_offset, O3); |
2989 |
} |
|
2990 |
||
2991 |
__ BIND(L_failed); |
|
2992 |
__ retl(); |
|
2993 |
__ delayed()->sub(G0, 1, O0); // return -1 |
|
2994 |
return start; |
|
2995 |
} |
|
2996 |
||
10501 | 2997 |
// |
2998 |
// Generate stub for heap zeroing. |
|
2999 |
// "to" address is aligned to jlong (8 bytes). |
|
3000 |
// |
|
3001 |
// Arguments for generated stub: |
|
3002 |
// to: O0 |
|
3003 |
// count: O1 treated as signed (count of HeapWord) |
|
3004 |
// count could be 0 |
|
3005 |
// |
|
3006 |
address generate_zero_aligned_words(const char* name) { |
|
3007 |
__ align(CodeEntryAlignment); |
|
3008 |
StubCodeMark mark(this, "StubRoutines", name); |
|
3009 |
address start = __ pc(); |
|
3010 |
||
3011 |
const Register to = O0; // source array address |
|
3012 |
const Register count = O1; // HeapWords count |
|
3013 |
const Register temp = O2; // scratch |
|
3014 |
||
3015 |
Label Ldone; |
|
3016 |
__ sllx(count, LogHeapWordSize, count); // to bytes count |
|
3017 |
// Use BIS for zeroing |
|
3018 |
__ bis_zeroing(to, count, temp, Ldone); |
|
3019 |
__ bind(Ldone); |
|
3020 |
__ retl(); |
|
3021 |
__ delayed()->nop(); |
|
3022 |
return start; |
|
3023 |
} |
|
3024 |
||
1 | 3025 |
void generate_arraycopy_stubs() { |
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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7397
diff
changeset
|
3026 |
address entry; |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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diff
changeset
|
3027 |
address entry_jbyte_arraycopy; |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3028 |
address entry_jshort_arraycopy; |
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7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3029 |
address entry_jint_arraycopy; |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3030 |
address entry_oop_arraycopy; |
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7020521: arraycopy stubs place prebarriers incorrectly
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parents:
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diff
changeset
|
3031 |
address entry_jlong_arraycopy; |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3032 |
address entry_checkcast_arraycopy; |
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7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3033 |
|
8498 | 3034 |
//*** jbyte |
3035 |
// Always need aligned and unaligned versions |
|
3036 |
StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, &entry, |
|
3037 |
"jbyte_disjoint_arraycopy"); |
|
3038 |
StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, entry, |
|
3039 |
&entry_jbyte_arraycopy, |
|
3040 |
"jbyte_arraycopy"); |
|
3041 |
StubRoutines::_arrayof_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(true, &entry, |
|
3042 |
"arrayof_jbyte_disjoint_arraycopy"); |
|
3043 |
StubRoutines::_arrayof_jbyte_arraycopy = generate_conjoint_byte_copy(true, entry, NULL, |
|
3044 |
"arrayof_jbyte_arraycopy"); |
|
3045 |
||
3046 |
//*** jshort |
|
3047 |
// Always need aligned and unaligned versions |
|
3048 |
StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry, |
|
3049 |
"jshort_disjoint_arraycopy"); |
|
3050 |
StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, entry, |
|
3051 |
&entry_jshort_arraycopy, |
|
3052 |
"jshort_arraycopy"); |
|
8487
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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parents:
7397
diff
changeset
|
3053 |
StubRoutines::_arrayof_jshort_disjoint_arraycopy = generate_disjoint_short_copy(true, &entry, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3054 |
"arrayof_jshort_disjoint_arraycopy"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3055 |
StubRoutines::_arrayof_jshort_arraycopy = generate_conjoint_short_copy(true, entry, NULL, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3056 |
"arrayof_jshort_arraycopy"); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3057 |
|
8498 | 3058 |
//*** jint |
3059 |
// Aligned versions |
|
3060 |
StubRoutines::_arrayof_jint_disjoint_arraycopy = generate_disjoint_int_copy(true, &entry, |
|
3061 |
"arrayof_jint_disjoint_arraycopy"); |
|
3062 |
StubRoutines::_arrayof_jint_arraycopy = generate_conjoint_int_copy(true, entry, &entry_jint_arraycopy, |
|
3063 |
"arrayof_jint_arraycopy"); |
|
3064 |
// In 64 bit we need both aligned and unaligned versions of jint arraycopy. |
|
3065 |
// entry_jint_arraycopy always points to the unaligned version (notice that we overwrite it). |
|
3066 |
StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_copy(false, &entry, |
|
3067 |
"jint_disjoint_arraycopy"); |
|
3068 |
StubRoutines::_jint_arraycopy = generate_conjoint_int_copy(false, entry, |
|
3069 |
&entry_jint_arraycopy, |
|
3070 |
"jint_arraycopy"); |
|
3071 |
||
3072 |
//*** jlong |
|
3073 |
// It is always aligned |
|
3074 |
StubRoutines::_arrayof_jlong_disjoint_arraycopy = generate_disjoint_long_copy(true, &entry, |
|
3075 |
"arrayof_jlong_disjoint_arraycopy"); |
|
3076 |
StubRoutines::_arrayof_jlong_arraycopy = generate_conjoint_long_copy(true, entry, &entry_jlong_arraycopy, |
|
3077 |
"arrayof_jlong_arraycopy"); |
|
3078 |
StubRoutines::_jlong_disjoint_arraycopy = StubRoutines::_arrayof_jlong_disjoint_arraycopy; |
|
3079 |
StubRoutines::_jlong_arraycopy = StubRoutines::_arrayof_jlong_arraycopy; |
|
3080 |
||
3081 |
||
3082 |
//*** oops |
|
3083 |
// Aligned versions |
|
3084 |
StubRoutines::_arrayof_oop_disjoint_arraycopy = generate_disjoint_oop_copy(true, &entry, |
|
3085 |
"arrayof_oop_disjoint_arraycopy"); |
|
3086 |
StubRoutines::_arrayof_oop_arraycopy = generate_conjoint_oop_copy(true, entry, &entry_oop_arraycopy, |
|
3087 |
"arrayof_oop_arraycopy"); |
|
3088 |
// Aligned versions without pre-barriers |
|
3089 |
StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = generate_disjoint_oop_copy(true, &entry, |
|
3090 |
"arrayof_oop_disjoint_arraycopy_uninit", |
|
3091 |
/*dest_uninitialized*/true); |
|
3092 |
StubRoutines::_arrayof_oop_arraycopy_uninit = generate_conjoint_oop_copy(true, entry, NULL, |
|
3093 |
"arrayof_oop_arraycopy_uninit", |
|
3094 |
/*dest_uninitialized*/true); |
|
3095 |
if (UseCompressedOops) { |
|
3096 |
// With compressed oops we need unaligned versions, notice that we overwrite entry_oop_arraycopy. |
|
3097 |
StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_oop_copy(false, &entry, |
|
3098 |
"oop_disjoint_arraycopy"); |
|
3099 |
StubRoutines::_oop_arraycopy = generate_conjoint_oop_copy(false, entry, &entry_oop_arraycopy, |
|
3100 |
"oop_arraycopy"); |
|
3101 |
// Unaligned versions without pre-barriers |
|
3102 |
StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_oop_copy(false, &entry, |
|
3103 |
"oop_disjoint_arraycopy_uninit", |
|
3104 |
/*dest_uninitialized*/true); |
|
3105 |
StubRoutines::_oop_arraycopy_uninit = generate_conjoint_oop_copy(false, entry, NULL, |
|
3106 |
"oop_arraycopy_uninit", |
|
3107 |
/*dest_uninitialized*/true); |
|
46462 | 3108 |
} else { |
8498 | 3109 |
// oop arraycopy is always aligned on 32bit and 64bit without compressed oops |
3110 |
StubRoutines::_oop_disjoint_arraycopy = StubRoutines::_arrayof_oop_disjoint_arraycopy; |
|
3111 |
StubRoutines::_oop_arraycopy = StubRoutines::_arrayof_oop_arraycopy; |
|
3112 |
StubRoutines::_oop_disjoint_arraycopy_uninit = StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit; |
|
3113 |
StubRoutines::_oop_arraycopy_uninit = StubRoutines::_arrayof_oop_arraycopy_uninit; |
|
3114 |
} |
|
3115 |
||
3116 |
StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy); |
|
3117 |
StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL, |
|
3118 |
/*dest_uninitialized*/true); |
|
3119 |
||
8487
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parents:
7397
diff
changeset
|
3120 |
StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy", |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3121 |
entry_jbyte_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3122 |
entry_jshort_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3123 |
entry_jint_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3124 |
entry_jlong_arraycopy); |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
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parents:
7397
diff
changeset
|
3125 |
StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy", |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3126 |
entry_jbyte_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3127 |
entry_jshort_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3128 |
entry_jint_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3129 |
entry_oop_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3130 |
entry_jlong_arraycopy, |
bf96596f06d2
7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents:
7397
diff
changeset
|
3131 |
entry_checkcast_arraycopy); |
6433 | 3132 |
|
3133 |
StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill"); |
|
3134 |
StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill"); |
|
3135 |
StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill"); |
|
3136 |
StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill"); |
|
3137 |
StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill"); |
|
3138 |
StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill"); |
|
10501 | 3139 |
|
3140 |
if (UseBlockZeroing) { |
|
3141 |
StubRoutines::_zero_aligned_words = generate_zero_aligned_words("zero_aligned_words"); |
|
3142 |
} |
|
1 | 3143 |
} |
3144 |
||
22505 | 3145 |
address generate_aescrypt_encryptBlock() { |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3146 |
// required since we read expanded key 'int' array starting first element without alignment considerations |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3147 |
assert((arrayOopDesc::base_offset_in_bytes(T_INT) & 7) == 0, |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3148 |
"the following code assumes that first element of an int array is aligned to 8 bytes"); |
22505 | 3149 |
__ align(CodeEntryAlignment); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3150 |
StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock"); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3151 |
Label L_load_misaligned_input, L_load_expanded_key, L_doLast128bit, L_storeOutput, L_store_misaligned_output; |
22505 | 3152 |
address start = __ pc(); |
3153 |
Register from = O0; // source byte array |
|
3154 |
Register to = O1; // destination byte array |
|
3155 |
Register key = O2; // expanded key array |
|
3156 |
const Register keylen = O4; //reg for storing expanded key array length |
|
3157 |
||
3158 |
// read expanded key length |
|
3159 |
__ ldsw(Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)), keylen, 0); |
|
3160 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3161 |
// Method to address arbitrary alignment for load instructions: |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3162 |
// Check last 3 bits of 'from' address to see if it is aligned to 8-byte boundary |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3163 |
// If zero/aligned then continue with double FP load instructions |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3164 |
// If not zero/mis-aligned then alignaddr will set GSR.align with number of bytes to skip during faligndata |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3165 |
// alignaddr will also convert arbitrary aligned 'from' address to nearest 8-byte aligned address |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3166 |
// load 3 * 8-byte components (to read 16 bytes input) in 3 different FP regs starting at this aligned address |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3167 |
// faligndata will then extract (based on GSR.align value) the appropriate 8 bytes from the 2 source regs |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3168 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3169 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3170 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3171 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_input); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3172 |
__ delayed()->alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3173 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3174 |
// aligned case: load input into F54-F56 |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3175 |
__ ldf(FloatRegisterImpl::D, from, 0, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3176 |
__ ldf(FloatRegisterImpl::D, from, 8, F56); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3177 |
__ ba_short(L_load_expanded_key); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3178 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3179 |
__ BIND(L_load_misaligned_input); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3180 |
__ ldf(FloatRegisterImpl::D, from, 0, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3181 |
__ ldf(FloatRegisterImpl::D, from, 8, F56); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3182 |
__ ldf(FloatRegisterImpl::D, from, 16, F58); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3183 |
__ faligndata(F54, F56, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3184 |
__ faligndata(F56, F58, F56); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3185 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3186 |
__ BIND(L_load_expanded_key); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3187 |
// Since we load expanded key buffers starting first element, 8-byte alignment is guaranteed |
22505 | 3188 |
for ( int i = 0; i <= 38; i += 2 ) { |
3189 |
__ ldf(FloatRegisterImpl::D, key, i*4, as_FloatRegister(i)); |
|
3190 |
} |
|
3191 |
||
3192 |
// perform cipher transformation |
|
3193 |
__ fxor(FloatRegisterImpl::D, F0, F54, F54); |
|
3194 |
__ fxor(FloatRegisterImpl::D, F2, F56, F56); |
|
3195 |
// rounds 1 through 8 |
|
3196 |
for ( int i = 4; i <= 28; i += 8 ) { |
|
3197 |
__ aes_eround01(as_FloatRegister(i), F54, F56, F58); |
|
3198 |
__ aes_eround23(as_FloatRegister(i+2), F54, F56, F60); |
|
3199 |
__ aes_eround01(as_FloatRegister(i+4), F58, F60, F54); |
|
3200 |
__ aes_eround23(as_FloatRegister(i+6), F58, F60, F56); |
|
3201 |
} |
|
3202 |
__ aes_eround01(F36, F54, F56, F58); //round 9 |
|
3203 |
__ aes_eround23(F38, F54, F56, F60); |
|
3204 |
||
3205 |
// 128-bit original key size |
|
3206 |
__ cmp_and_brx_short(keylen, 44, Assembler::equal, Assembler::pt, L_doLast128bit); |
|
3207 |
||
3208 |
for ( int i = 40; i <= 50; i += 2 ) { |
|
3209 |
__ ldf(FloatRegisterImpl::D, key, i*4, as_FloatRegister(i) ); |
|
3210 |
} |
|
3211 |
__ aes_eround01(F40, F58, F60, F54); //round 10 |
|
3212 |
__ aes_eround23(F42, F58, F60, F56); |
|
3213 |
__ aes_eround01(F44, F54, F56, F58); //round 11 |
|
3214 |
__ aes_eround23(F46, F54, F56, F60); |
|
3215 |
||
3216 |
// 192-bit original key size |
|
3217 |
__ cmp_and_brx_short(keylen, 52, Assembler::equal, Assembler::pt, L_storeOutput); |
|
3218 |
||
3219 |
__ ldf(FloatRegisterImpl::D, key, 208, F52); |
|
3220 |
__ aes_eround01(F48, F58, F60, F54); //round 12 |
|
3221 |
__ aes_eround23(F50, F58, F60, F56); |
|
3222 |
__ ldf(FloatRegisterImpl::D, key, 216, F46); |
|
3223 |
__ ldf(FloatRegisterImpl::D, key, 224, F48); |
|
3224 |
__ ldf(FloatRegisterImpl::D, key, 232, F50); |
|
3225 |
__ aes_eround01(F52, F54, F56, F58); //round 13 |
|
3226 |
__ aes_eround23(F46, F54, F56, F60); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3227 |
__ ba_short(L_storeOutput); |
22505 | 3228 |
|
3229 |
__ BIND(L_doLast128bit); |
|
3230 |
__ ldf(FloatRegisterImpl::D, key, 160, F48); |
|
3231 |
__ ldf(FloatRegisterImpl::D, key, 168, F50); |
|
3232 |
||
3233 |
__ BIND(L_storeOutput); |
|
3234 |
// perform last round of encryption common for all key sizes |
|
3235 |
__ aes_eround01_l(F48, F58, F60, F54); //last round |
|
3236 |
__ aes_eround23_l(F50, F58, F60, F56); |
|
3237 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3238 |
// Method to address arbitrary alignment for store instructions: |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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diff
changeset
|
3239 |
// Check last 3 bits of 'dest' address to see if it is aligned to 8-byte boundary |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3240 |
// If zero/aligned then continue with double FP store instructions |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3241 |
// If not zero/mis-aligned then edge8n will generate edge mask in result reg (O3 in below case) |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3242 |
// Example: If dest address is 0x07 and nearest 8-byte aligned address is 0x00 then edge mask will be 00000001 |
bddefb356fba
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diff
changeset
|
3243 |
// Compute (8-n) where n is # of bytes skipped by partial store(stpartialf) inst from edge mask, n=7 in this case |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3244 |
// We get the value of n from the andcc that checks 'dest' alignment. n is available in O5 in below case. |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
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diff
changeset
|
3245 |
// Set GSR.align to (8-n) using alignaddr |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3246 |
// Circular byte shift store values by n places so that the original bytes are at correct position for stpartialf |
bddefb356fba
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kvn
parents:
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diff
changeset
|
3247 |
// Set the arbitrarily aligned 'dest' address to nearest 8-byte aligned address |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3248 |
// Store (partial) the original first (8-n) bytes starting at the original 'dest' address |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3249 |
// Negate the edge mask so that the subsequent stpartialf can store the original (8-n-1)th through 8th bytes at appropriate address |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3250 |
// We need to execute this process for both the 8-byte result values |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3251 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3252 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3253 |
__ andcc(to, 7, O5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3254 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3255 |
__ delayed()->edge8n(to, G0, O3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3256 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3257 |
// aligned case: store output into the destination array |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3258 |
__ stf(FloatRegisterImpl::D, F54, to, 0); |
22505 | 3259 |
__ retl(); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3260 |
__ delayed()->stf(FloatRegisterImpl::D, F56, to, 8); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3261 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3262 |
__ BIND(L_store_misaligned_output); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3263 |
__ add(to, 8, O4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3264 |
__ mov(8, O2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3265 |
__ sub(O2, O5, O2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3266 |
__ alignaddr(O2, G0, O2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3267 |
__ faligndata(F54, F54, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3268 |
__ faligndata(F56, F56, F56); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3269 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3270 |
__ and3(O4, -8, O4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3271 |
__ stpartialf(to, O3, F54, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3272 |
__ stpartialf(O4, O3, F56, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3273 |
__ add(to, 8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3274 |
__ add(O4, 8, O4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3275 |
__ orn(G0, O3, O3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3276 |
__ stpartialf(to, O3, F54, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3277 |
__ retl(); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3278 |
__ delayed()->stpartialf(O4, O3, F56, Assembler::ASI_PST8_PRIMARY); |
22505 | 3279 |
|
3280 |
return start; |
|
3281 |
} |
|
3282 |
||
3283 |
address generate_aescrypt_decryptBlock() { |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3284 |
assert((arrayOopDesc::base_offset_in_bytes(T_INT) & 7) == 0, |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3285 |
"the following code assumes that first element of an int array is aligned to 8 bytes"); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3286 |
// required since we read original key 'byte' array as well in the decryption stubs |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3287 |
assert((arrayOopDesc::base_offset_in_bytes(T_BYTE) & 7) == 0, |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3288 |
"the following code assumes that first element of a byte array is aligned to 8 bytes"); |
22505 | 3289 |
__ align(CodeEntryAlignment); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3290 |
StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock"); |
22505 | 3291 |
address start = __ pc(); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3292 |
Label L_load_misaligned_input, L_load_original_key, L_expand192bit, L_expand256bit, L_reload_misaligned_input; |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3293 |
Label L_256bit_transform, L_common_transform, L_store_misaligned_output; |
22505 | 3294 |
Register from = O0; // source byte array |
3295 |
Register to = O1; // destination byte array |
|
3296 |
Register key = O2; // expanded key array |
|
3297 |
Register original_key = O3; // original key array only required during decryption |
|
3298 |
const Register keylen = O4; // reg for storing expanded key array length |
|
3299 |
||
3300 |
// read expanded key array length |
|
3301 |
__ ldsw(Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)), keylen, 0); |
|
3302 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3303 |
// save 'from' since we may need to recheck alignment in case of 256-bit decryption |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3304 |
__ mov(from, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3305 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3306 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3307 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3308 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_input); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3309 |
__ delayed()->alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3310 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3311 |
// aligned case: load input into F52-F54 |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3312 |
__ ldf(FloatRegisterImpl::D, from, 0, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3313 |
__ ldf(FloatRegisterImpl::D, from, 8, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3314 |
__ ba_short(L_load_original_key); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3315 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3316 |
__ BIND(L_load_misaligned_input); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3317 |
__ ldf(FloatRegisterImpl::D, from, 0, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3318 |
__ ldf(FloatRegisterImpl::D, from, 8, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3319 |
__ ldf(FloatRegisterImpl::D, from, 16, F56); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3320 |
__ faligndata(F52, F54, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3321 |
__ faligndata(F54, F56, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3322 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3323 |
__ BIND(L_load_original_key); |
22505 | 3324 |
// load original key from SunJCE expanded decryption key |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3325 |
// Since we load original key buffer starting first element, 8-byte alignment is guaranteed |
22505 | 3326 |
for ( int i = 0; i <= 3; i++ ) { |
3327 |
__ ldf(FloatRegisterImpl::S, original_key, i*4, as_FloatRegister(i)); |
|
3328 |
} |
|
3329 |
||
3330 |
// 256-bit original key size |
|
3331 |
__ cmp_and_brx_short(keylen, 60, Assembler::equal, Assembler::pn, L_expand256bit); |
|
3332 |
||
3333 |
// 192-bit original key size |
|
3334 |
__ cmp_and_brx_short(keylen, 52, Assembler::equal, Assembler::pn, L_expand192bit); |
|
3335 |
||
3336 |
// 128-bit original key size |
|
3337 |
// perform key expansion since SunJCE decryption-key expansion is not compatible with SPARC crypto instructions |
|
3338 |
for ( int i = 0; i <= 36; i += 4 ) { |
|
3339 |
__ aes_kexpand1(as_FloatRegister(i), as_FloatRegister(i+2), i/4, as_FloatRegister(i+4)); |
|
3340 |
__ aes_kexpand2(as_FloatRegister(i+2), as_FloatRegister(i+4), as_FloatRegister(i+6)); |
|
3341 |
} |
|
3342 |
||
3343 |
// perform 128-bit key specific inverse cipher transformation |
|
3344 |
__ fxor(FloatRegisterImpl::D, F42, F54, F54); |
|
3345 |
__ fxor(FloatRegisterImpl::D, F40, F52, F52); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3346 |
__ ba_short(L_common_transform); |
22505 | 3347 |
|
3348 |
__ BIND(L_expand192bit); |
|
3349 |
||
3350 |
// start loading rest of the 192-bit key |
|
3351 |
__ ldf(FloatRegisterImpl::S, original_key, 16, F4); |
|
3352 |
__ ldf(FloatRegisterImpl::S, original_key, 20, F5); |
|
3353 |
||
3354 |
// perform key expansion since SunJCE decryption-key expansion is not compatible with SPARC crypto instructions |
|
3355 |
for ( int i = 0; i <= 36; i += 6 ) { |
|
3356 |
__ aes_kexpand1(as_FloatRegister(i), as_FloatRegister(i+4), i/6, as_FloatRegister(i+6)); |
|
3357 |
__ aes_kexpand2(as_FloatRegister(i+2), as_FloatRegister(i+6), as_FloatRegister(i+8)); |
|
3358 |
__ aes_kexpand2(as_FloatRegister(i+4), as_FloatRegister(i+8), as_FloatRegister(i+10)); |
|
3359 |
} |
|
3360 |
__ aes_kexpand1(F42, F46, 7, F48); |
|
3361 |
__ aes_kexpand2(F44, F48, F50); |
|
3362 |
||
3363 |
// perform 192-bit key specific inverse cipher transformation |
|
3364 |
__ fxor(FloatRegisterImpl::D, F50, F54, F54); |
|
3365 |
__ fxor(FloatRegisterImpl::D, F48, F52, F52); |
|
3366 |
__ aes_dround23(F46, F52, F54, F58); |
|
3367 |
__ aes_dround01(F44, F52, F54, F56); |
|
3368 |
__ aes_dround23(F42, F56, F58, F54); |
|
3369 |
__ aes_dround01(F40, F56, F58, F52); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3370 |
__ ba_short(L_common_transform); |
22505 | 3371 |
|
3372 |
__ BIND(L_expand256bit); |
|
3373 |
||
3374 |
// load rest of the 256-bit key |
|
3375 |
for ( int i = 4; i <= 7; i++ ) { |
|
3376 |
__ ldf(FloatRegisterImpl::S, original_key, i*4, as_FloatRegister(i)); |
|
3377 |
} |
|
3378 |
||
3379 |
// perform key expansion since SunJCE decryption-key expansion is not compatible with SPARC crypto instructions |
|
3380 |
for ( int i = 0; i <= 40; i += 8 ) { |
|
3381 |
__ aes_kexpand1(as_FloatRegister(i), as_FloatRegister(i+6), i/8, as_FloatRegister(i+8)); |
|
3382 |
__ aes_kexpand2(as_FloatRegister(i+2), as_FloatRegister(i+8), as_FloatRegister(i+10)); |
|
3383 |
__ aes_kexpand0(as_FloatRegister(i+4), as_FloatRegister(i+10), as_FloatRegister(i+12)); |
|
3384 |
__ aes_kexpand2(as_FloatRegister(i+6), as_FloatRegister(i+12), as_FloatRegister(i+14)); |
|
3385 |
} |
|
3386 |
__ aes_kexpand1(F48, F54, 6, F56); |
|
3387 |
__ aes_kexpand2(F50, F56, F58); |
|
3388 |
||
3389 |
for ( int i = 0; i <= 6; i += 2 ) { |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3390 |
__ fsrc2(FloatRegisterImpl::D, as_FloatRegister(58-i), as_FloatRegister(i)); |
22505 | 3391 |
} |
3392 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3393 |
// reload original 'from' address |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3394 |
__ mov(G1, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3395 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3396 |
// re-check 8-byte alignment |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3397 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3398 |
__ br(Assembler::notZero, true, Assembler::pn, L_reload_misaligned_input); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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changeset
|
3399 |
__ delayed()->alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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diff
changeset
|
3400 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3401 |
// aligned case: load input into F52-F54 |
22505 | 3402 |
__ ldf(FloatRegisterImpl::D, from, 0, F52); |
3403 |
__ ldf(FloatRegisterImpl::D, from, 8, F54); |
|
24328
bddefb356fba
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parents:
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diff
changeset
|
3404 |
__ ba_short(L_256bit_transform); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3405 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3406 |
__ BIND(L_reload_misaligned_input); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
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diff
changeset
|
3407 |
__ ldf(FloatRegisterImpl::D, from, 0, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3408 |
__ ldf(FloatRegisterImpl::D, from, 8, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3409 |
__ ldf(FloatRegisterImpl::D, from, 16, F56); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3410 |
__ faligndata(F52, F54, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3411 |
__ faligndata(F54, F56, F54); |
22505 | 3412 |
|
3413 |
// perform 256-bit key specific inverse cipher transformation |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
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diff
changeset
|
3414 |
__ BIND(L_256bit_transform); |
22505 | 3415 |
__ fxor(FloatRegisterImpl::D, F0, F54, F54); |
3416 |
__ fxor(FloatRegisterImpl::D, F2, F52, F52); |
|
3417 |
__ aes_dround23(F4, F52, F54, F58); |
|
3418 |
__ aes_dround01(F6, F52, F54, F56); |
|
3419 |
__ aes_dround23(F50, F56, F58, F54); |
|
3420 |
__ aes_dround01(F48, F56, F58, F52); |
|
3421 |
__ aes_dround23(F46, F52, F54, F58); |
|
3422 |
__ aes_dround01(F44, F52, F54, F56); |
|
3423 |
__ aes_dround23(F42, F56, F58, F54); |
|
3424 |
__ aes_dround01(F40, F56, F58, F52); |
|
3425 |
||
3426 |
for ( int i = 0; i <= 7; i++ ) { |
|
3427 |
__ ldf(FloatRegisterImpl::S, original_key, i*4, as_FloatRegister(i)); |
|
3428 |
} |
|
3429 |
||
3430 |
// perform inverse cipher transformations common for all key sizes |
|
3431 |
__ BIND(L_common_transform); |
|
3432 |
for ( int i = 38; i >= 6; i -= 8 ) { |
|
3433 |
__ aes_dround23(as_FloatRegister(i), F52, F54, F58); |
|
3434 |
__ aes_dround01(as_FloatRegister(i-2), F52, F54, F56); |
|
3435 |
if ( i != 6) { |
|
3436 |
__ aes_dround23(as_FloatRegister(i-4), F56, F58, F54); |
|
3437 |
__ aes_dround01(as_FloatRegister(i-6), F56, F58, F52); |
|
3438 |
} else { |
|
3439 |
__ aes_dround23_l(as_FloatRegister(i-4), F56, F58, F54); |
|
3440 |
__ aes_dround01_l(as_FloatRegister(i-6), F56, F58, F52); |
|
3441 |
} |
|
3442 |
} |
|
3443 |
||
24328
bddefb356fba
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kvn
parents:
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diff
changeset
|
3444 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
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kvn
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changeset
|
3445 |
__ andcc(to, 7, O5); |
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parents:
24326
diff
changeset
|
3446 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3447 |
__ delayed()->edge8n(to, G0, O3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3448 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3449 |
// aligned case: store output into the destination array |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3450 |
__ stf(FloatRegisterImpl::D, F52, to, 0); |
22505 | 3451 |
__ retl(); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3452 |
__ delayed()->stf(FloatRegisterImpl::D, F54, to, 8); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3453 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3454 |
__ BIND(L_store_misaligned_output); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3455 |
__ add(to, 8, O4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3456 |
__ mov(8, O2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3457 |
__ sub(O2, O5, O2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3458 |
__ alignaddr(O2, G0, O2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3459 |
__ faligndata(F52, F52, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3460 |
__ faligndata(F54, F54, F54); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3461 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3462 |
__ and3(O4, -8, O4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3463 |
__ stpartialf(to, O3, F52, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3464 |
__ stpartialf(O4, O3, F54, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3465 |
__ add(to, 8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3466 |
__ add(O4, 8, O4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3467 |
__ orn(G0, O3, O3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3468 |
__ stpartialf(to, O3, F52, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3469 |
__ retl(); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3470 |
__ delayed()->stpartialf(O4, O3, F54, Assembler::ASI_PST8_PRIMARY); |
22505 | 3471 |
|
3472 |
return start; |
|
3473 |
} |
|
3474 |
||
3475 |
address generate_cipherBlockChaining_encryptAESCrypt() { |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3476 |
assert((arrayOopDesc::base_offset_in_bytes(T_INT) & 7) == 0, |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3477 |
"the following code assumes that first element of an int array is aligned to 8 bytes"); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3478 |
assert((arrayOopDesc::base_offset_in_bytes(T_BYTE) & 7) == 0, |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3479 |
"the following code assumes that first element of a byte array is aligned to 8 bytes"); |
22505 | 3480 |
__ align(CodeEntryAlignment); |
3481 |
StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt"); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3482 |
Label L_cbcenc128, L_load_misaligned_input_128bit, L_128bit_transform, L_store_misaligned_output_128bit; |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3483 |
Label L_check_loop_end_128bit, L_cbcenc192, L_load_misaligned_input_192bit, L_192bit_transform; |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3484 |
Label L_store_misaligned_output_192bit, L_check_loop_end_192bit, L_cbcenc256, L_load_misaligned_input_256bit; |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3485 |
Label L_256bit_transform, L_store_misaligned_output_256bit, L_check_loop_end_256bit; |
22505 | 3486 |
address start = __ pc(); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3487 |
Register from = I0; // source byte array |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3488 |
Register to = I1; // destination byte array |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3489 |
Register key = I2; // expanded key array |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3490 |
Register rvec = I3; // init vector |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3491 |
const Register len_reg = I4; // cipher length |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3492 |
const Register keylen = I5; // reg for storing expanded key array length |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3493 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3494 |
__ save_frame(0); |
24488
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3495 |
// save cipher len to return in the end |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3496 |
__ mov(len_reg, L0); |
22505 | 3497 |
|
3498 |
// read expanded key length |
|
3499 |
__ ldsw(Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)), keylen, 0); |
|
3500 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3501 |
// load initial vector, 8-byte alignment is guranteed |
22505 | 3502 |
__ ldf(FloatRegisterImpl::D, rvec, 0, F60); |
3503 |
__ ldf(FloatRegisterImpl::D, rvec, 8, F62); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3504 |
// load key, 8-byte alignment is guranteed |
22505 | 3505 |
__ ldx(key,0,G1); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3506 |
__ ldx(key,8,G5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3507 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3508 |
// start loading expanded key, 8-byte alignment is guranteed |
22505 | 3509 |
for ( int i = 0, j = 16; i <= 38; i += 2, j += 8 ) { |
3510 |
__ ldf(FloatRegisterImpl::D, key, j, as_FloatRegister(i)); |
|
3511 |
} |
|
3512 |
||
3513 |
// 128-bit original key size |
|
3514 |
__ cmp_and_brx_short(keylen, 44, Assembler::equal, Assembler::pt, L_cbcenc128); |
|
3515 |
||
3516 |
for ( int i = 40, j = 176; i <= 46; i += 2, j += 8 ) { |
|
3517 |
__ ldf(FloatRegisterImpl::D, key, j, as_FloatRegister(i)); |
|
3518 |
} |
|
3519 |
||
3520 |
// 192-bit original key size |
|
3521 |
__ cmp_and_brx_short(keylen, 52, Assembler::equal, Assembler::pt, L_cbcenc192); |
|
3522 |
||
3523 |
for ( int i = 48, j = 208; i <= 54; i += 2, j += 8 ) { |
|
3524 |
__ ldf(FloatRegisterImpl::D, key, j, as_FloatRegister(i)); |
|
3525 |
} |
|
3526 |
||
3527 |
// 256-bit original key size |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3528 |
__ ba_short(L_cbcenc256); |
22505 | 3529 |
|
3530 |
__ align(OptoLoopAlignment); |
|
3531 |
__ BIND(L_cbcenc128); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3532 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3533 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3534 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_input_128bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3535 |
__ delayed()->mov(from, L1); // save original 'from' address before alignaddr |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3536 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3537 |
// aligned case: load input into G3 and G4 |
22505 | 3538 |
__ ldx(from,0,G3); |
3539 |
__ ldx(from,8,G4); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3540 |
__ ba_short(L_128bit_transform); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3541 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3542 |
__ BIND(L_load_misaligned_input_128bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3543 |
// can clobber F48, F50 and F52 as they are not used in 128 and 192-bit key encryption |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3544 |
__ alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3545 |
__ ldf(FloatRegisterImpl::D, from, 0, F48); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3546 |
__ ldf(FloatRegisterImpl::D, from, 8, F50); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3547 |
__ ldf(FloatRegisterImpl::D, from, 16, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3548 |
__ faligndata(F48, F50, F48); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3549 |
__ faligndata(F50, F52, F50); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3550 |
__ movdtox(F48, G3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3551 |
__ movdtox(F50, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3552 |
__ mov(L1, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3553 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3554 |
__ BIND(L_128bit_transform); |
22505 | 3555 |
__ xor3(G1,G3,G3); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3556 |
__ xor3(G5,G4,G4); |
22505 | 3557 |
__ movxtod(G3,F56); |
3558 |
__ movxtod(G4,F58); |
|
3559 |
__ fxor(FloatRegisterImpl::D, F60, F56, F60); |
|
3560 |
__ fxor(FloatRegisterImpl::D, F62, F58, F62); |
|
3561 |
||
3562 |
// TEN_EROUNDS |
|
3563 |
for ( int i = 0; i <= 32; i += 8 ) { |
|
3564 |
__ aes_eround01(as_FloatRegister(i), F60, F62, F56); |
|
3565 |
__ aes_eround23(as_FloatRegister(i+2), F60, F62, F58); |
|
3566 |
if (i != 32 ) { |
|
3567 |
__ aes_eround01(as_FloatRegister(i+4), F56, F58, F60); |
|
3568 |
__ aes_eround23(as_FloatRegister(i+6), F56, F58, F62); |
|
3569 |
} else { |
|
3570 |
__ aes_eround01_l(as_FloatRegister(i+4), F56, F58, F60); |
|
3571 |
__ aes_eround23_l(as_FloatRegister(i+6), F56, F58, F62); |
|
3572 |
} |
|
3573 |
} |
|
3574 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3575 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3576 |
__ andcc(to, 7, L1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3577 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output_128bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3578 |
__ delayed()->edge8n(to, G0, L2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3579 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3580 |
// aligned case: store output into the destination array |
22505 | 3581 |
__ stf(FloatRegisterImpl::D, F60, to, 0); |
3582 |
__ stf(FloatRegisterImpl::D, F62, to, 8); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3583 |
__ ba_short(L_check_loop_end_128bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3584 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3585 |
__ BIND(L_store_misaligned_output_128bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3586 |
__ add(to, 8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3587 |
__ mov(8, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3588 |
__ sub(L4, L1, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3589 |
__ alignaddr(L4, G0, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3590 |
// save cipher text before circular right shift |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3591 |
// as it needs to be stored as iv for next block (see code before next retl) |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3592 |
__ movdtox(F60, L6); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3593 |
__ movdtox(F62, L7); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3594 |
__ faligndata(F60, F60, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3595 |
__ faligndata(F62, F62, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3596 |
__ mov(to, L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3597 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3598 |
__ and3(L3, -8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3599 |
__ stpartialf(to, L2, F60, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3600 |
__ stpartialf(L3, L2, F62, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3601 |
__ add(to, 8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3602 |
__ add(L3, 8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3603 |
__ orn(G0, L2, L2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3604 |
__ stpartialf(to, L2, F60, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3605 |
__ stpartialf(L3, L2, F62, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3606 |
__ mov(L5, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3607 |
__ movxtod(L6, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3608 |
__ movxtod(L7, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3609 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3610 |
__ BIND(L_check_loop_end_128bit); |
22505 | 3611 |
__ add(from, 16, from); |
3612 |
__ add(to, 16, to); |
|
3613 |
__ subcc(len_reg, 16, len_reg); |
|
3614 |
__ br(Assembler::notEqual, false, Assembler::pt, L_cbcenc128); |
|
3615 |
__ delayed()->nop(); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3616 |
// re-init intial vector for next block, 8-byte alignment is guaranteed |
22505 | 3617 |
__ stf(FloatRegisterImpl::D, F60, rvec, 0); |
3618 |
__ stf(FloatRegisterImpl::D, F62, rvec, 8); |
|
24488
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3619 |
__ mov(L0, I0); |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3620 |
__ ret(); |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3621 |
__ delayed()->restore(); |
22505 | 3622 |
|
3623 |
__ align(OptoLoopAlignment); |
|
3624 |
__ BIND(L_cbcenc192); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3625 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3626 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3627 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_input_192bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3628 |
__ delayed()->mov(from, L1); // save original 'from' address before alignaddr |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3629 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3630 |
// aligned case: load input into G3 and G4 |
22505 | 3631 |
__ ldx(from,0,G3); |
3632 |
__ ldx(from,8,G4); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3633 |
__ ba_short(L_192bit_transform); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3634 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3635 |
__ BIND(L_load_misaligned_input_192bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3636 |
// can clobber F48, F50 and F52 as they are not used in 128 and 192-bit key encryption |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3637 |
__ alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3638 |
__ ldf(FloatRegisterImpl::D, from, 0, F48); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3639 |
__ ldf(FloatRegisterImpl::D, from, 8, F50); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3640 |
__ ldf(FloatRegisterImpl::D, from, 16, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3641 |
__ faligndata(F48, F50, F48); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3642 |
__ faligndata(F50, F52, F50); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3643 |
__ movdtox(F48, G3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3644 |
__ movdtox(F50, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3645 |
__ mov(L1, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3646 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3647 |
__ BIND(L_192bit_transform); |
22505 | 3648 |
__ xor3(G1,G3,G3); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3649 |
__ xor3(G5,G4,G4); |
22505 | 3650 |
__ movxtod(G3,F56); |
3651 |
__ movxtod(G4,F58); |
|
3652 |
__ fxor(FloatRegisterImpl::D, F60, F56, F60); |
|
3653 |
__ fxor(FloatRegisterImpl::D, F62, F58, F62); |
|
3654 |
||
3655 |
// TWELEVE_EROUNDS |
|
3656 |
for ( int i = 0; i <= 40; i += 8 ) { |
|
3657 |
__ aes_eround01(as_FloatRegister(i), F60, F62, F56); |
|
3658 |
__ aes_eround23(as_FloatRegister(i+2), F60, F62, F58); |
|
3659 |
if (i != 40 ) { |
|
3660 |
__ aes_eround01(as_FloatRegister(i+4), F56, F58, F60); |
|
3661 |
__ aes_eround23(as_FloatRegister(i+6), F56, F58, F62); |
|
3662 |
} else { |
|
3663 |
__ aes_eround01_l(as_FloatRegister(i+4), F56, F58, F60); |
|
3664 |
__ aes_eround23_l(as_FloatRegister(i+6), F56, F58, F62); |
|
3665 |
} |
|
3666 |
} |
|
3667 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3668 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3669 |
__ andcc(to, 7, L1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3670 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output_192bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3671 |
__ delayed()->edge8n(to, G0, L2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3672 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3673 |
// aligned case: store output into the destination array |
22505 | 3674 |
__ stf(FloatRegisterImpl::D, F60, to, 0); |
3675 |
__ stf(FloatRegisterImpl::D, F62, to, 8); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3676 |
__ ba_short(L_check_loop_end_192bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3677 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3678 |
__ BIND(L_store_misaligned_output_192bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3679 |
__ add(to, 8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3680 |
__ mov(8, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3681 |
__ sub(L4, L1, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3682 |
__ alignaddr(L4, G0, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3683 |
__ movdtox(F60, L6); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3684 |
__ movdtox(F62, L7); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3685 |
__ faligndata(F60, F60, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3686 |
__ faligndata(F62, F62, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3687 |
__ mov(to, L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3688 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3689 |
__ and3(L3, -8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3690 |
__ stpartialf(to, L2, F60, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3691 |
__ stpartialf(L3, L2, F62, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3692 |
__ add(to, 8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3693 |
__ add(L3, 8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3694 |
__ orn(G0, L2, L2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3695 |
__ stpartialf(to, L2, F60, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3696 |
__ stpartialf(L3, L2, F62, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3697 |
__ mov(L5, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3698 |
__ movxtod(L6, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3699 |
__ movxtod(L7, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3700 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3701 |
__ BIND(L_check_loop_end_192bit); |
22505 | 3702 |
__ add(from, 16, from); |
3703 |
__ subcc(len_reg, 16, len_reg); |
|
3704 |
__ add(to, 16, to); |
|
3705 |
__ br(Assembler::notEqual, false, Assembler::pt, L_cbcenc192); |
|
3706 |
__ delayed()->nop(); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3707 |
// re-init intial vector for next block, 8-byte alignment is guaranteed |
22505 | 3708 |
__ stf(FloatRegisterImpl::D, F60, rvec, 0); |
3709 |
__ stf(FloatRegisterImpl::D, F62, rvec, 8); |
|
24488
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3710 |
__ mov(L0, I0); |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3711 |
__ ret(); |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3712 |
__ delayed()->restore(); |
22505 | 3713 |
|
3714 |
__ align(OptoLoopAlignment); |
|
3715 |
__ BIND(L_cbcenc256); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3716 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3717 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3718 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_input_256bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3719 |
__ delayed()->mov(from, L1); // save original 'from' address before alignaddr |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3720 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3721 |
// aligned case: load input into G3 and G4 |
22505 | 3722 |
__ ldx(from,0,G3); |
3723 |
__ ldx(from,8,G4); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3724 |
__ ba_short(L_256bit_transform); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3725 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3726 |
__ BIND(L_load_misaligned_input_256bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3727 |
// cannot clobber F48, F50 and F52. F56, F58 can be used though |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3728 |
__ alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3729 |
__ movdtox(F60, L2); // save F60 before overwriting |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3730 |
__ ldf(FloatRegisterImpl::D, from, 0, F56); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3731 |
__ ldf(FloatRegisterImpl::D, from, 8, F58); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3732 |
__ ldf(FloatRegisterImpl::D, from, 16, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3733 |
__ faligndata(F56, F58, F56); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3734 |
__ faligndata(F58, F60, F58); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3735 |
__ movdtox(F56, G3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3736 |
__ movdtox(F58, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3737 |
__ mov(L1, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3738 |
__ movxtod(L2, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3739 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3740 |
__ BIND(L_256bit_transform); |
22505 | 3741 |
__ xor3(G1,G3,G3); |
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3742 |
__ xor3(G5,G4,G4); |
22505 | 3743 |
__ movxtod(G3,F56); |
3744 |
__ movxtod(G4,F58); |
|
3745 |
__ fxor(FloatRegisterImpl::D, F60, F56, F60); |
|
3746 |
__ fxor(FloatRegisterImpl::D, F62, F58, F62); |
|
3747 |
||
3748 |
// FOURTEEN_EROUNDS |
|
3749 |
for ( int i = 0; i <= 48; i += 8 ) { |
|
3750 |
__ aes_eround01(as_FloatRegister(i), F60, F62, F56); |
|
3751 |
__ aes_eround23(as_FloatRegister(i+2), F60, F62, F58); |
|
3752 |
if (i != 48 ) { |
|
3753 |
__ aes_eround01(as_FloatRegister(i+4), F56, F58, F60); |
|
3754 |
__ aes_eround23(as_FloatRegister(i+6), F56, F58, F62); |
|
3755 |
} else { |
|
3756 |
__ aes_eround01_l(as_FloatRegister(i+4), F56, F58, F60); |
|
3757 |
__ aes_eround23_l(as_FloatRegister(i+6), F56, F58, F62); |
|
3758 |
} |
|
3759 |
} |
|
3760 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3761 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3762 |
__ andcc(to, 7, L1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3763 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output_256bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3764 |
__ delayed()->edge8n(to, G0, L2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3765 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3766 |
// aligned case: store output into the destination array |
22505 | 3767 |
__ stf(FloatRegisterImpl::D, F60, to, 0); |
3768 |
__ stf(FloatRegisterImpl::D, F62, to, 8); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3769 |
__ ba_short(L_check_loop_end_256bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3770 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3771 |
__ BIND(L_store_misaligned_output_256bit); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3772 |
__ add(to, 8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3773 |
__ mov(8, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3774 |
__ sub(L4, L1, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3775 |
__ alignaddr(L4, G0, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3776 |
__ movdtox(F60, L6); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3777 |
__ movdtox(F62, L7); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3778 |
__ faligndata(F60, F60, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3779 |
__ faligndata(F62, F62, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3780 |
__ mov(to, L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3781 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3782 |
__ and3(L3, -8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3783 |
__ stpartialf(to, L2, F60, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3784 |
__ stpartialf(L3, L2, F62, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3785 |
__ add(to, 8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3786 |
__ add(L3, 8, L3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3787 |
__ orn(G0, L2, L2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3788 |
__ stpartialf(to, L2, F60, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3789 |
__ stpartialf(L3, L2, F62, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3790 |
__ mov(L5, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3791 |
__ movxtod(L6, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3792 |
__ movxtod(L7, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3793 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3794 |
__ BIND(L_check_loop_end_256bit); |
22505 | 3795 |
__ add(from, 16, from); |
3796 |
__ subcc(len_reg, 16, len_reg); |
|
3797 |
__ add(to, 16, to); |
|
3798 |
__ br(Assembler::notEqual, false, Assembler::pt, L_cbcenc256); |
|
3799 |
__ delayed()->nop(); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3800 |
// re-init intial vector for next block, 8-byte alignment is guaranteed |
22505 | 3801 |
__ stf(FloatRegisterImpl::D, F60, rvec, 0); |
3802 |
__ stf(FloatRegisterImpl::D, F62, rvec, 8); |
|
24488
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3803 |
__ mov(L0, I0); |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3804 |
__ ret(); |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3805 |
__ delayed()->restore(); |
22505 | 3806 |
|
3807 |
return start; |
|
3808 |
} |
|
3809 |
||
3810 |
address generate_cipherBlockChaining_decryptAESCrypt_Parallel() { |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3811 |
assert((arrayOopDesc::base_offset_in_bytes(T_INT) & 7) == 0, |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3812 |
"the following code assumes that first element of an int array is aligned to 8 bytes"); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3813 |
assert((arrayOopDesc::base_offset_in_bytes(T_BYTE) & 7) == 0, |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3814 |
"the following code assumes that first element of a byte array is aligned to 8 bytes"); |
22505 | 3815 |
__ align(CodeEntryAlignment); |
3816 |
StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt"); |
|
3817 |
Label L_cbcdec_end, L_expand192bit, L_expand256bit, L_dec_first_block_start; |
|
3818 |
Label L_dec_first_block128, L_dec_first_block192, L_dec_next2_blocks128, L_dec_next2_blocks192, L_dec_next2_blocks256; |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3819 |
Label L_load_misaligned_input_first_block, L_transform_first_block, L_load_misaligned_next2_blocks128, L_transform_next2_blocks128; |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3820 |
Label L_load_misaligned_next2_blocks192, L_transform_next2_blocks192, L_load_misaligned_next2_blocks256, L_transform_next2_blocks256; |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3821 |
Label L_store_misaligned_output_first_block, L_check_decrypt_end, L_store_misaligned_output_next2_blocks128; |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3822 |
Label L_check_decrypt_loop_end128, L_store_misaligned_output_next2_blocks192, L_check_decrypt_loop_end192; |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3823 |
Label L_store_misaligned_output_next2_blocks256, L_check_decrypt_loop_end256; |
22505 | 3824 |
address start = __ pc(); |
3825 |
Register from = I0; // source byte array |
|
3826 |
Register to = I1; // destination byte array |
|
3827 |
Register key = I2; // expanded key array |
|
3828 |
Register rvec = I3; // init vector |
|
3829 |
const Register len_reg = I4; // cipher length |
|
3830 |
const Register original_key = I5; // original key array only required during decryption |
|
3831 |
const Register keylen = L6; // reg for storing expanded key array length |
|
3832 |
||
3833 |
__ save_frame(0); //args are read from I* registers since we save the frame in the beginning |
|
24488
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3834 |
// save cipher len to return in the end |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
3835 |
__ mov(len_reg, L7); |
22505 | 3836 |
|
3837 |
// load original key from SunJCE expanded decryption key |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3838 |
// Since we load original key buffer starting first element, 8-byte alignment is guaranteed |
22505 | 3839 |
for ( int i = 0; i <= 3; i++ ) { |
3840 |
__ ldf(FloatRegisterImpl::S, original_key, i*4, as_FloatRegister(i)); |
|
3841 |
} |
|
3842 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3843 |
// load initial vector, 8-byte alignment is guaranteed |
22505 | 3844 |
__ ldx(rvec,0,L0); |
3845 |
__ ldx(rvec,8,L1); |
|
3846 |
||
3847 |
// read expanded key array length |
|
3848 |
__ ldsw(Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)), keylen, 0); |
|
3849 |
||
3850 |
// 256-bit original key size |
|
3851 |
__ cmp_and_brx_short(keylen, 60, Assembler::equal, Assembler::pn, L_expand256bit); |
|
3852 |
||
3853 |
// 192-bit original key size |
|
3854 |
__ cmp_and_brx_short(keylen, 52, Assembler::equal, Assembler::pn, L_expand192bit); |
|
3855 |
||
3856 |
// 128-bit original key size |
|
3857 |
// perform key expansion since SunJCE decryption-key expansion is not compatible with SPARC crypto instructions |
|
3858 |
for ( int i = 0; i <= 36; i += 4 ) { |
|
3859 |
__ aes_kexpand1(as_FloatRegister(i), as_FloatRegister(i+2), i/4, as_FloatRegister(i+4)); |
|
3860 |
__ aes_kexpand2(as_FloatRegister(i+2), as_FloatRegister(i+4), as_FloatRegister(i+6)); |
|
3861 |
} |
|
3862 |
||
3863 |
// load expanded key[last-1] and key[last] elements |
|
3864 |
__ movdtox(F40,L2); |
|
3865 |
__ movdtox(F42,L3); |
|
3866 |
||
3867 |
__ and3(len_reg, 16, L4); |
|
24328
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changeset
|
3868 |
__ br_null_short(L4, Assembler::pt, L_dec_next2_blocks128); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3869 |
__ nop(); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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diff
changeset
|
3870 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3871 |
__ ba_short(L_dec_first_block_start); |
22505 | 3872 |
|
3873 |
__ BIND(L_expand192bit); |
|
3874 |
// load rest of the 192-bit key |
|
3875 |
__ ldf(FloatRegisterImpl::S, original_key, 16, F4); |
|
3876 |
__ ldf(FloatRegisterImpl::S, original_key, 20, F5); |
|
3877 |
||
3878 |
// perform key expansion since SunJCE decryption-key expansion is not compatible with SPARC crypto instructions |
|
3879 |
for ( int i = 0; i <= 36; i += 6 ) { |
|
3880 |
__ aes_kexpand1(as_FloatRegister(i), as_FloatRegister(i+4), i/6, as_FloatRegister(i+6)); |
|
3881 |
__ aes_kexpand2(as_FloatRegister(i+2), as_FloatRegister(i+6), as_FloatRegister(i+8)); |
|
3882 |
__ aes_kexpand2(as_FloatRegister(i+4), as_FloatRegister(i+8), as_FloatRegister(i+10)); |
|
3883 |
} |
|
3884 |
__ aes_kexpand1(F42, F46, 7, F48); |
|
3885 |
__ aes_kexpand2(F44, F48, F50); |
|
3886 |
||
3887 |
// load expanded key[last-1] and key[last] elements |
|
3888 |
__ movdtox(F48,L2); |
|
3889 |
__ movdtox(F50,L3); |
|
3890 |
||
3891 |
__ and3(len_reg, 16, L4); |
|
24328
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diff
changeset
|
3892 |
__ br_null_short(L4, Assembler::pt, L_dec_next2_blocks192); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
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diff
changeset
|
3893 |
__ nop(); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3894 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3895 |
__ ba_short(L_dec_first_block_start); |
22505 | 3896 |
|
3897 |
__ BIND(L_expand256bit); |
|
3898 |
// load rest of the 256-bit key |
|
3899 |
for ( int i = 4; i <= 7; i++ ) { |
|
3900 |
__ ldf(FloatRegisterImpl::S, original_key, i*4, as_FloatRegister(i)); |
|
3901 |
} |
|
3902 |
||
3903 |
// perform key expansion since SunJCE decryption-key expansion is not compatible with SPARC crypto instructions |
|
3904 |
for ( int i = 0; i <= 40; i += 8 ) { |
|
3905 |
__ aes_kexpand1(as_FloatRegister(i), as_FloatRegister(i+6), i/8, as_FloatRegister(i+8)); |
|
3906 |
__ aes_kexpand2(as_FloatRegister(i+2), as_FloatRegister(i+8), as_FloatRegister(i+10)); |
|
3907 |
__ aes_kexpand0(as_FloatRegister(i+4), as_FloatRegister(i+10), as_FloatRegister(i+12)); |
|
3908 |
__ aes_kexpand2(as_FloatRegister(i+6), as_FloatRegister(i+12), as_FloatRegister(i+14)); |
|
3909 |
} |
|
3910 |
__ aes_kexpand1(F48, F54, 6, F56); |
|
3911 |
__ aes_kexpand2(F50, F56, F58); |
|
3912 |
||
3913 |
// load expanded key[last-1] and key[last] elements |
|
3914 |
__ movdtox(F56,L2); |
|
3915 |
__ movdtox(F58,L3); |
|
3916 |
||
3917 |
__ and3(len_reg, 16, L4); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3918 |
__ br_null_short(L4, Assembler::pt, L_dec_next2_blocks256); |
22505 | 3919 |
|
3920 |
__ BIND(L_dec_first_block_start); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3921 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3922 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3923 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_input_first_block); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3924 |
__ delayed()->mov(from, G1); // save original 'from' address before alignaddr |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3925 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3926 |
// aligned case: load input into L4 and L5 |
22505 | 3927 |
__ ldx(from,0,L4); |
3928 |
__ ldx(from,8,L5); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3929 |
__ ba_short(L_transform_first_block); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3930 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3931 |
__ BIND(L_load_misaligned_input_first_block); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3932 |
__ alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3933 |
// F58, F60, F62 can be clobbered |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3934 |
__ ldf(FloatRegisterImpl::D, from, 0, F58); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3935 |
__ ldf(FloatRegisterImpl::D, from, 8, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3936 |
__ ldf(FloatRegisterImpl::D, from, 16, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3937 |
__ faligndata(F58, F60, F58); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3938 |
__ faligndata(F60, F62, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3939 |
__ movdtox(F58, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3940 |
__ movdtox(F60, L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
3941 |
__ mov(G1, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3942 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3943 |
__ BIND(L_transform_first_block); |
22505 | 3944 |
__ xor3(L2,L4,G1); |
3945 |
__ movxtod(G1,F60); |
|
3946 |
__ xor3(L3,L5,G1); |
|
3947 |
__ movxtod(G1,F62); |
|
3948 |
||
3949 |
// 128-bit original key size |
|
3950 |
__ cmp_and_brx_short(keylen, 44, Assembler::equal, Assembler::pn, L_dec_first_block128); |
|
3951 |
||
3952 |
// 192-bit original key size |
|
3953 |
__ cmp_and_brx_short(keylen, 52, Assembler::equal, Assembler::pn, L_dec_first_block192); |
|
3954 |
||
3955 |
__ aes_dround23(F54, F60, F62, F58); |
|
3956 |
__ aes_dround01(F52, F60, F62, F56); |
|
3957 |
__ aes_dround23(F50, F56, F58, F62); |
|
3958 |
__ aes_dround01(F48, F56, F58, F60); |
|
3959 |
||
3960 |
__ BIND(L_dec_first_block192); |
|
3961 |
__ aes_dround23(F46, F60, F62, F58); |
|
3962 |
__ aes_dround01(F44, F60, F62, F56); |
|
3963 |
__ aes_dround23(F42, F56, F58, F62); |
|
3964 |
__ aes_dround01(F40, F56, F58, F60); |
|
3965 |
||
3966 |
__ BIND(L_dec_first_block128); |
|
3967 |
for ( int i = 38; i >= 6; i -= 8 ) { |
|
3968 |
__ aes_dround23(as_FloatRegister(i), F60, F62, F58); |
|
3969 |
__ aes_dround01(as_FloatRegister(i-2), F60, F62, F56); |
|
3970 |
if ( i != 6) { |
|
3971 |
__ aes_dround23(as_FloatRegister(i-4), F56, F58, F62); |
|
3972 |
__ aes_dround01(as_FloatRegister(i-6), F56, F58, F60); |
|
3973 |
} else { |
|
3974 |
__ aes_dround23_l(as_FloatRegister(i-4), F56, F58, F62); |
|
3975 |
__ aes_dround01_l(as_FloatRegister(i-6), F56, F58, F60); |
|
3976 |
} |
|
3977 |
} |
|
3978 |
||
3979 |
__ movxtod(L0,F56); |
|
3980 |
__ movxtod(L1,F58); |
|
3981 |
__ mov(L4,L0); |
|
3982 |
__ mov(L5,L1); |
|
3983 |
__ fxor(FloatRegisterImpl::D, F56, F60, F60); |
|
3984 |
__ fxor(FloatRegisterImpl::D, F58, F62, F62); |
|
3985 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3986 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
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diff
changeset
|
3987 |
__ andcc(to, 7, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3988 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output_first_block); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3989 |
__ delayed()->edge8n(to, G0, G2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3990 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3991 |
// aligned case: store output into the destination array |
22505 | 3992 |
__ stf(FloatRegisterImpl::D, F60, to, 0); |
3993 |
__ stf(FloatRegisterImpl::D, F62, to, 8); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3994 |
__ ba_short(L_check_decrypt_end); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3995 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3996 |
__ BIND(L_store_misaligned_output_first_block); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3997 |
__ add(to, 8, G3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3998 |
__ mov(8, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
3999 |
__ sub(G4, G1, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4000 |
__ alignaddr(G4, G0, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4001 |
__ faligndata(F60, F60, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4002 |
__ faligndata(F62, F62, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4003 |
__ mov(to, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4004 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4005 |
__ and3(G3, -8, G3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4006 |
__ stpartialf(to, G2, F60, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4007 |
__ stpartialf(G3, G2, F62, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4008 |
__ add(to, 8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4009 |
__ add(G3, 8, G3); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4010 |
__ orn(G0, G2, G2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4011 |
__ stpartialf(to, G2, F60, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4012 |
__ stpartialf(G3, G2, F62, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4013 |
__ mov(G1, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4014 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4015 |
__ BIND(L_check_decrypt_end); |
22505 | 4016 |
__ add(from, 16, from); |
4017 |
__ add(to, 16, to); |
|
4018 |
__ subcc(len_reg, 16, len_reg); |
|
4019 |
__ br(Assembler::equal, false, Assembler::pt, L_cbcdec_end); |
|
4020 |
__ delayed()->nop(); |
|
4021 |
||
4022 |
// 256-bit original key size |
|
4023 |
__ cmp_and_brx_short(keylen, 60, Assembler::equal, Assembler::pn, L_dec_next2_blocks256); |
|
4024 |
||
4025 |
// 192-bit original key size |
|
4026 |
__ cmp_and_brx_short(keylen, 52, Assembler::equal, Assembler::pn, L_dec_next2_blocks192); |
|
4027 |
||
4028 |
__ align(OptoLoopAlignment); |
|
4029 |
__ BIND(L_dec_next2_blocks128); |
|
4030 |
__ nop(); |
|
4031 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4032 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4033 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4034 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_next2_blocks128); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4035 |
__ delayed()->mov(from, G1); // save original 'from' address before alignaddr |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4036 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4037 |
// aligned case: load input into G4, G5, L4 and L5 |
22505 | 4038 |
__ ldx(from,0,G4); |
4039 |
__ ldx(from,8,G5); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4040 |
__ ldx(from,16,L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4041 |
__ ldx(from,24,L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4042 |
__ ba_short(L_transform_next2_blocks128); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4043 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4044 |
__ BIND(L_load_misaligned_next2_blocks128); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4045 |
__ alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4046 |
// F40, F42, F58, F60, F62 can be clobbered |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4047 |
__ ldf(FloatRegisterImpl::D, from, 0, F40); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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diff
changeset
|
4048 |
__ ldf(FloatRegisterImpl::D, from, 8, F42); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
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parents:
24326
diff
changeset
|
4049 |
__ ldf(FloatRegisterImpl::D, from, 16, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4050 |
__ ldf(FloatRegisterImpl::D, from, 24, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4051 |
__ ldf(FloatRegisterImpl::D, from, 32, F58); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4052 |
__ faligndata(F40, F42, F40); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4053 |
__ faligndata(F42, F60, F42); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4054 |
__ faligndata(F60, F62, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4055 |
__ faligndata(F62, F58, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4056 |
__ movdtox(F40, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4057 |
__ movdtox(F42, G5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4058 |
__ movdtox(F60, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4059 |
__ movdtox(F62, L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4060 |
__ mov(G1, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4061 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4062 |
__ BIND(L_transform_next2_blocks128); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4063 |
// F40:F42 used for first 16-bytes |
22505 | 4064 |
__ xor3(L2,G4,G1); |
4065 |
__ movxtod(G1,F40); |
|
4066 |
__ xor3(L3,G5,G1); |
|
4067 |
__ movxtod(G1,F42); |
|
4068 |
||
4069 |
// F60:F62 used for next 16-bytes |
|
4070 |
__ xor3(L2,L4,G1); |
|
4071 |
__ movxtod(G1,F60); |
|
4072 |
__ xor3(L3,L5,G1); |
|
4073 |
__ movxtod(G1,F62); |
|
4074 |
||
4075 |
for ( int i = 38; i >= 6; i -= 8 ) { |
|
4076 |
__ aes_dround23(as_FloatRegister(i), F40, F42, F44); |
|
4077 |
__ aes_dround01(as_FloatRegister(i-2), F40, F42, F46); |
|
4078 |
__ aes_dround23(as_FloatRegister(i), F60, F62, F58); |
|
4079 |
__ aes_dround01(as_FloatRegister(i-2), F60, F62, F56); |
|
4080 |
if (i != 6 ) { |
|
4081 |
__ aes_dround23(as_FloatRegister(i-4), F46, F44, F42); |
|
4082 |
__ aes_dround01(as_FloatRegister(i-6), F46, F44, F40); |
|
4083 |
__ aes_dround23(as_FloatRegister(i-4), F56, F58, F62); |
|
4084 |
__ aes_dround01(as_FloatRegister(i-6), F56, F58, F60); |
|
4085 |
} else { |
|
4086 |
__ aes_dround23_l(as_FloatRegister(i-4), F46, F44, F42); |
|
4087 |
__ aes_dround01_l(as_FloatRegister(i-6), F46, F44, F40); |
|
4088 |
__ aes_dround23_l(as_FloatRegister(i-4), F56, F58, F62); |
|
4089 |
__ aes_dround01_l(as_FloatRegister(i-6), F56, F58, F60); |
|
4090 |
} |
|
4091 |
} |
|
4092 |
||
4093 |
__ movxtod(L0,F46); |
|
4094 |
__ movxtod(L1,F44); |
|
4095 |
__ fxor(FloatRegisterImpl::D, F46, F40, F40); |
|
4096 |
__ fxor(FloatRegisterImpl::D, F44, F42, F42); |
|
4097 |
||
4098 |
__ movxtod(G4,F56); |
|
4099 |
__ movxtod(G5,F58); |
|
4100 |
__ mov(L4,L0); |
|
4101 |
__ mov(L5,L1); |
|
4102 |
__ fxor(FloatRegisterImpl::D, F56, F60, F60); |
|
4103 |
__ fxor(FloatRegisterImpl::D, F58, F62, F62); |
|
4104 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4105 |
// For mis-aligned store of 32 bytes of result we can do: |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4106 |
// Circular right-shift all 4 FP registers so that 'head' and 'tail' |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4107 |
// parts that need to be stored starting at mis-aligned address are in a FP reg |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4108 |
// the other 3 FP regs can thus be stored using regular store |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4109 |
// we then use the edge + partial-store mechanism to store the 'head' and 'tail' parts |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4110 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4111 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4112 |
__ andcc(to, 7, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4113 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output_next2_blocks128); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4114 |
__ delayed()->edge8n(to, G0, G2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4115 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4116 |
// aligned case: store output into the destination array |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4117 |
__ stf(FloatRegisterImpl::D, F40, to, 0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4118 |
__ stf(FloatRegisterImpl::D, F42, to, 8); |
22505 | 4119 |
__ stf(FloatRegisterImpl::D, F60, to, 16); |
4120 |
__ stf(FloatRegisterImpl::D, F62, to, 24); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4121 |
__ ba_short(L_check_decrypt_loop_end128); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4122 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4123 |
__ BIND(L_store_misaligned_output_next2_blocks128); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4124 |
__ mov(8, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4125 |
__ sub(G4, G1, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4126 |
__ alignaddr(G4, G0, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4127 |
__ faligndata(F40, F42, F56); // F56 can be clobbered |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4128 |
__ faligndata(F42, F60, F42); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4129 |
__ faligndata(F60, F62, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4130 |
__ faligndata(F62, F40, F40); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4131 |
__ mov(to, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4132 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4133 |
__ stpartialf(to, G2, F40, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4134 |
__ stf(FloatRegisterImpl::D, F56, to, 8); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4135 |
__ stf(FloatRegisterImpl::D, F42, to, 16); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4136 |
__ stf(FloatRegisterImpl::D, F60, to, 24); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4137 |
__ add(to, 32, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4138 |
__ orn(G0, G2, G2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4139 |
__ stpartialf(to, G2, F40, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4140 |
__ mov(G1, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4141 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4142 |
__ BIND(L_check_decrypt_loop_end128); |
22505 | 4143 |
__ add(from, 32, from); |
4144 |
__ add(to, 32, to); |
|
4145 |
__ subcc(len_reg, 32, len_reg); |
|
4146 |
__ br(Assembler::notEqual, false, Assembler::pt, L_dec_next2_blocks128); |
|
4147 |
__ delayed()->nop(); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4148 |
__ ba_short(L_cbcdec_end); |
22505 | 4149 |
|
4150 |
__ align(OptoLoopAlignment); |
|
4151 |
__ BIND(L_dec_next2_blocks192); |
|
4152 |
__ nop(); |
|
4153 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4154 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4155 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4156 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_next2_blocks192); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4157 |
__ delayed()->mov(from, G1); // save original 'from' address before alignaddr |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4158 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4159 |
// aligned case: load input into G4, G5, L4 and L5 |
22505 | 4160 |
__ ldx(from,0,G4); |
4161 |
__ ldx(from,8,G5); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4162 |
__ ldx(from,16,L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4163 |
__ ldx(from,24,L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4164 |
__ ba_short(L_transform_next2_blocks192); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4165 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4166 |
__ BIND(L_load_misaligned_next2_blocks192); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4167 |
__ alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4168 |
// F48, F50, F52, F60, F62 can be clobbered |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4169 |
__ ldf(FloatRegisterImpl::D, from, 0, F48); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4170 |
__ ldf(FloatRegisterImpl::D, from, 8, F50); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4171 |
__ ldf(FloatRegisterImpl::D, from, 16, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4172 |
__ ldf(FloatRegisterImpl::D, from, 24, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4173 |
__ ldf(FloatRegisterImpl::D, from, 32, F52); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4174 |
__ faligndata(F48, F50, F48); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4175 |
__ faligndata(F50, F60, F50); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4176 |
__ faligndata(F60, F62, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4177 |
__ faligndata(F62, F52, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4178 |
__ movdtox(F48, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4179 |
__ movdtox(F50, G5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4180 |
__ movdtox(F60, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4181 |
__ movdtox(F62, L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4182 |
__ mov(G1, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4183 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4184 |
__ BIND(L_transform_next2_blocks192); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4185 |
// F48:F50 used for first 16-bytes |
22505 | 4186 |
__ xor3(L2,G4,G1); |
4187 |
__ movxtod(G1,F48); |
|
4188 |
__ xor3(L3,G5,G1); |
|
4189 |
__ movxtod(G1,F50); |
|
4190 |
||
4191 |
// F60:F62 used for next 16-bytes |
|
4192 |
__ xor3(L2,L4,G1); |
|
4193 |
__ movxtod(G1,F60); |
|
4194 |
__ xor3(L3,L5,G1); |
|
4195 |
__ movxtod(G1,F62); |
|
4196 |
||
4197 |
for ( int i = 46; i >= 6; i -= 8 ) { |
|
4198 |
__ aes_dround23(as_FloatRegister(i), F48, F50, F52); |
|
4199 |
__ aes_dround01(as_FloatRegister(i-2), F48, F50, F54); |
|
4200 |
__ aes_dround23(as_FloatRegister(i), F60, F62, F58); |
|
4201 |
__ aes_dround01(as_FloatRegister(i-2), F60, F62, F56); |
|
4202 |
if (i != 6 ) { |
|
4203 |
__ aes_dround23(as_FloatRegister(i-4), F54, F52, F50); |
|
4204 |
__ aes_dround01(as_FloatRegister(i-6), F54, F52, F48); |
|
4205 |
__ aes_dround23(as_FloatRegister(i-4), F56, F58, F62); |
|
4206 |
__ aes_dround01(as_FloatRegister(i-6), F56, F58, F60); |
|
4207 |
} else { |
|
4208 |
__ aes_dround23_l(as_FloatRegister(i-4), F54, F52, F50); |
|
4209 |
__ aes_dround01_l(as_FloatRegister(i-6), F54, F52, F48); |
|
4210 |
__ aes_dround23_l(as_FloatRegister(i-4), F56, F58, F62); |
|
4211 |
__ aes_dround01_l(as_FloatRegister(i-6), F56, F58, F60); |
|
4212 |
} |
|
4213 |
} |
|
4214 |
||
4215 |
__ movxtod(L0,F54); |
|
4216 |
__ movxtod(L1,F52); |
|
4217 |
__ fxor(FloatRegisterImpl::D, F54, F48, F48); |
|
4218 |
__ fxor(FloatRegisterImpl::D, F52, F50, F50); |
|
4219 |
||
4220 |
__ movxtod(G4,F56); |
|
4221 |
__ movxtod(G5,F58); |
|
4222 |
__ mov(L4,L0); |
|
4223 |
__ mov(L5,L1); |
|
4224 |
__ fxor(FloatRegisterImpl::D, F56, F60, F60); |
|
4225 |
__ fxor(FloatRegisterImpl::D, F58, F62, F62); |
|
4226 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4227 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4228 |
__ andcc(to, 7, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4229 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output_next2_blocks192); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4230 |
__ delayed()->edge8n(to, G0, G2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4231 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4232 |
// aligned case: store output into the destination array |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4233 |
__ stf(FloatRegisterImpl::D, F48, to, 0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4234 |
__ stf(FloatRegisterImpl::D, F50, to, 8); |
22505 | 4235 |
__ stf(FloatRegisterImpl::D, F60, to, 16); |
4236 |
__ stf(FloatRegisterImpl::D, F62, to, 24); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4237 |
__ ba_short(L_check_decrypt_loop_end192); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4238 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4239 |
__ BIND(L_store_misaligned_output_next2_blocks192); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4240 |
__ mov(8, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4241 |
__ sub(G4, G1, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4242 |
__ alignaddr(G4, G0, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4243 |
__ faligndata(F48, F50, F56); // F56 can be clobbered |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4244 |
__ faligndata(F50, F60, F50); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4245 |
__ faligndata(F60, F62, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4246 |
__ faligndata(F62, F48, F48); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4247 |
__ mov(to, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4248 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4249 |
__ stpartialf(to, G2, F48, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4250 |
__ stf(FloatRegisterImpl::D, F56, to, 8); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4251 |
__ stf(FloatRegisterImpl::D, F50, to, 16); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4252 |
__ stf(FloatRegisterImpl::D, F60, to, 24); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4253 |
__ add(to, 32, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4254 |
__ orn(G0, G2, G2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4255 |
__ stpartialf(to, G2, F48, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4256 |
__ mov(G1, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4257 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4258 |
__ BIND(L_check_decrypt_loop_end192); |
22505 | 4259 |
__ add(from, 32, from); |
4260 |
__ add(to, 32, to); |
|
4261 |
__ subcc(len_reg, 32, len_reg); |
|
4262 |
__ br(Assembler::notEqual, false, Assembler::pt, L_dec_next2_blocks192); |
|
4263 |
__ delayed()->nop(); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4264 |
__ ba_short(L_cbcdec_end); |
22505 | 4265 |
|
4266 |
__ align(OptoLoopAlignment); |
|
4267 |
__ BIND(L_dec_next2_blocks256); |
|
4268 |
__ nop(); |
|
4269 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4270 |
// check for 8-byte alignment since source byte array may have an arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4271 |
__ andcc(from, 7, G0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4272 |
__ br(Assembler::notZero, true, Assembler::pn, L_load_misaligned_next2_blocks256); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4273 |
__ delayed()->mov(from, G1); // save original 'from' address before alignaddr |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4274 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4275 |
// aligned case: load input into G4, G5, L4 and L5 |
22505 | 4276 |
__ ldx(from,0,G4); |
4277 |
__ ldx(from,8,G5); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4278 |
__ ldx(from,16,L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4279 |
__ ldx(from,24,L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4280 |
__ ba_short(L_transform_next2_blocks256); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4281 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4282 |
__ BIND(L_load_misaligned_next2_blocks256); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4283 |
__ alignaddr(from, G0, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4284 |
// F0, F2, F4, F60, F62 can be clobbered |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4285 |
__ ldf(FloatRegisterImpl::D, from, 0, F0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4286 |
__ ldf(FloatRegisterImpl::D, from, 8, F2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4287 |
__ ldf(FloatRegisterImpl::D, from, 16, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4288 |
__ ldf(FloatRegisterImpl::D, from, 24, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4289 |
__ ldf(FloatRegisterImpl::D, from, 32, F4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4290 |
__ faligndata(F0, F2, F0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4291 |
__ faligndata(F2, F60, F2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4292 |
__ faligndata(F60, F62, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4293 |
__ faligndata(F62, F4, F62); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4294 |
__ movdtox(F0, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4295 |
__ movdtox(F2, G5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4296 |
__ movdtox(F60, L4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4297 |
__ movdtox(F62, L5); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4298 |
__ mov(G1, from); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4299 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4300 |
__ BIND(L_transform_next2_blocks256); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4301 |
// F0:F2 used for first 16-bytes |
22505 | 4302 |
__ xor3(L2,G4,G1); |
4303 |
__ movxtod(G1,F0); |
|
4304 |
__ xor3(L3,G5,G1); |
|
4305 |
__ movxtod(G1,F2); |
|
4306 |
||
4307 |
// F60:F62 used for next 16-bytes |
|
4308 |
__ xor3(L2,L4,G1); |
|
4309 |
__ movxtod(G1,F60); |
|
4310 |
__ xor3(L3,L5,G1); |
|
4311 |
__ movxtod(G1,F62); |
|
4312 |
||
4313 |
__ aes_dround23(F54, F0, F2, F4); |
|
4314 |
__ aes_dround01(F52, F0, F2, F6); |
|
4315 |
__ aes_dround23(F54, F60, F62, F58); |
|
4316 |
__ aes_dround01(F52, F60, F62, F56); |
|
4317 |
__ aes_dround23(F50, F6, F4, F2); |
|
4318 |
__ aes_dround01(F48, F6, F4, F0); |
|
4319 |
__ aes_dround23(F50, F56, F58, F62); |
|
4320 |
__ aes_dround01(F48, F56, F58, F60); |
|
4321 |
// save F48:F54 in temp registers |
|
4322 |
__ movdtox(F54,G2); |
|
4323 |
__ movdtox(F52,G3); |
|
4324 |
__ movdtox(F50,G6); |
|
4325 |
__ movdtox(F48,G1); |
|
4326 |
for ( int i = 46; i >= 14; i -= 8 ) { |
|
4327 |
__ aes_dround23(as_FloatRegister(i), F0, F2, F4); |
|
4328 |
__ aes_dround01(as_FloatRegister(i-2), F0, F2, F6); |
|
4329 |
__ aes_dround23(as_FloatRegister(i), F60, F62, F58); |
|
4330 |
__ aes_dround01(as_FloatRegister(i-2), F60, F62, F56); |
|
4331 |
__ aes_dround23(as_FloatRegister(i-4), F6, F4, F2); |
|
4332 |
__ aes_dround01(as_FloatRegister(i-6), F6, F4, F0); |
|
4333 |
__ aes_dround23(as_FloatRegister(i-4), F56, F58, F62); |
|
4334 |
__ aes_dround01(as_FloatRegister(i-6), F56, F58, F60); |
|
4335 |
} |
|
4336 |
// init F48:F54 with F0:F6 values (original key) |
|
4337 |
__ ldf(FloatRegisterImpl::D, original_key, 0, F48); |
|
4338 |
__ ldf(FloatRegisterImpl::D, original_key, 8, F50); |
|
4339 |
__ ldf(FloatRegisterImpl::D, original_key, 16, F52); |
|
4340 |
__ ldf(FloatRegisterImpl::D, original_key, 24, F54); |
|
4341 |
__ aes_dround23(F54, F0, F2, F4); |
|
4342 |
__ aes_dround01(F52, F0, F2, F6); |
|
4343 |
__ aes_dround23(F54, F60, F62, F58); |
|
4344 |
__ aes_dround01(F52, F60, F62, F56); |
|
4345 |
__ aes_dround23_l(F50, F6, F4, F2); |
|
4346 |
__ aes_dround01_l(F48, F6, F4, F0); |
|
4347 |
__ aes_dround23_l(F50, F56, F58, F62); |
|
4348 |
__ aes_dround01_l(F48, F56, F58, F60); |
|
4349 |
// re-init F48:F54 with their original values |
|
4350 |
__ movxtod(G2,F54); |
|
4351 |
__ movxtod(G3,F52); |
|
4352 |
__ movxtod(G6,F50); |
|
4353 |
__ movxtod(G1,F48); |
|
4354 |
||
4355 |
__ movxtod(L0,F6); |
|
4356 |
__ movxtod(L1,F4); |
|
4357 |
__ fxor(FloatRegisterImpl::D, F6, F0, F0); |
|
4358 |
__ fxor(FloatRegisterImpl::D, F4, F2, F2); |
|
4359 |
||
4360 |
__ movxtod(G4,F56); |
|
4361 |
__ movxtod(G5,F58); |
|
4362 |
__ mov(L4,L0); |
|
4363 |
__ mov(L5,L1); |
|
4364 |
__ fxor(FloatRegisterImpl::D, F56, F60, F60); |
|
4365 |
__ fxor(FloatRegisterImpl::D, F58, F62, F62); |
|
4366 |
||
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4367 |
// check for 8-byte alignment since dest byte array may have arbitrary alignment if offset mod 8 is non-zero |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4368 |
__ andcc(to, 7, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4369 |
__ br(Assembler::notZero, true, Assembler::pn, L_store_misaligned_output_next2_blocks256); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4370 |
__ delayed()->edge8n(to, G0, G2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4371 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4372 |
// aligned case: store output into the destination array |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4373 |
__ stf(FloatRegisterImpl::D, F0, to, 0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4374 |
__ stf(FloatRegisterImpl::D, F2, to, 8); |
22505 | 4375 |
__ stf(FloatRegisterImpl::D, F60, to, 16); |
4376 |
__ stf(FloatRegisterImpl::D, F62, to, 24); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4377 |
__ ba_short(L_check_decrypt_loop_end256); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4378 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4379 |
__ BIND(L_store_misaligned_output_next2_blocks256); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4380 |
__ mov(8, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4381 |
__ sub(G4, G1, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4382 |
__ alignaddr(G4, G0, G4); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4383 |
__ faligndata(F0, F2, F56); // F56 can be clobbered |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4384 |
__ faligndata(F2, F60, F2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4385 |
__ faligndata(F60, F62, F60); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4386 |
__ faligndata(F62, F0, F0); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4387 |
__ mov(to, G1); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4388 |
__ and3(to, -8, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4389 |
__ stpartialf(to, G2, F0, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4390 |
__ stf(FloatRegisterImpl::D, F56, to, 8); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4391 |
__ stf(FloatRegisterImpl::D, F2, to, 16); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4392 |
__ stf(FloatRegisterImpl::D, F60, to, 24); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4393 |
__ add(to, 32, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4394 |
__ orn(G0, G2, G2); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4395 |
__ stpartialf(to, G2, F0, Assembler::ASI_PST8_PRIMARY); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4396 |
__ mov(G1, to); |
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4397 |
|
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4398 |
__ BIND(L_check_decrypt_loop_end256); |
22505 | 4399 |
__ add(from, 32, from); |
4400 |
__ add(to, 32, to); |
|
4401 |
__ subcc(len_reg, 32, len_reg); |
|
4402 |
__ br(Assembler::notEqual, false, Assembler::pt, L_dec_next2_blocks256); |
|
4403 |
__ delayed()->nop(); |
|
4404 |
||
4405 |
__ BIND(L_cbcdec_end); |
|
24328
bddefb356fba
8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc
kvn
parents:
24326
diff
changeset
|
4406 |
// re-init intial vector for next block, 8-byte alignment is guaranteed |
22505 | 4407 |
__ stx(L0, rvec, 0); |
4408 |
__ stx(L1, rvec, 8); |
|
24488
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
4409 |
__ mov(L7, I0); |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
4410 |
__ ret(); |
6872367f4335
8043274: Test compiler/7184394/TestAESMain.java gets NPE on solaris
kvn
parents:
24328
diff
changeset
|
4411 |
__ delayed()->restore(); |
22505 | 4412 |
|
4413 |
return start; |
|
4414 |
} |
|
4415 |
||
24953
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4416 |
address generate_sha1_implCompress(bool multi_block, const char *name) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4417 |
__ align(CodeEntryAlignment); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4418 |
StubCodeMark mark(this, "StubRoutines", name); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4419 |
address start = __ pc(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4420 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4421 |
Label L_sha1_loop, L_sha1_unaligned_input, L_sha1_unaligned_input_loop; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4422 |
int i; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4423 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4424 |
Register buf = O0; // byte[] source+offset |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4425 |
Register state = O1; // int[] SHA.state |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4426 |
Register ofs = O2; // int offset |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4427 |
Register limit = O3; // int limit |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4428 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4429 |
// load state into F0-F4 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4430 |
for (i = 0; i < 5; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4431 |
__ ldf(FloatRegisterImpl::S, state, i*4, as_FloatRegister(i)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4432 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4433 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4434 |
__ andcc(buf, 7, G0); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4435 |
__ br(Assembler::notZero, false, Assembler::pn, L_sha1_unaligned_input); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4436 |
__ delayed()->nop(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4437 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4438 |
__ BIND(L_sha1_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4439 |
// load buf into F8-F22 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4440 |
for (i = 0; i < 8; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4441 |
__ ldf(FloatRegisterImpl::D, buf, i*8, as_FloatRegister(i*2 + 8)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4442 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4443 |
__ sha1(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4444 |
if (multi_block) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4445 |
__ add(ofs, 64, ofs); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4446 |
__ add(buf, 64, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4447 |
__ cmp_and_brx_short(ofs, limit, Assembler::lessEqual, Assembler::pt, L_sha1_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4448 |
__ mov(ofs, O0); // to be returned |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4449 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4450 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4451 |
// store F0-F4 into state and return |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4452 |
for (i = 0; i < 4; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4453 |
__ stf(FloatRegisterImpl::S, as_FloatRegister(i), state, i*4); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4454 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4455 |
__ retl(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4456 |
__ delayed()->stf(FloatRegisterImpl::S, F4, state, 0x10); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4457 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4458 |
__ BIND(L_sha1_unaligned_input); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4459 |
__ alignaddr(buf, G0, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4460 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4461 |
__ BIND(L_sha1_unaligned_input_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4462 |
// load buf into F8-F22 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4463 |
for (i = 0; i < 9; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4464 |
__ ldf(FloatRegisterImpl::D, buf, i*8, as_FloatRegister(i*2 + 8)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4465 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4466 |
for (i = 0; i < 8; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4467 |
__ faligndata(as_FloatRegister(i*2 + 8), as_FloatRegister(i*2 + 10), as_FloatRegister(i*2 + 8)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4468 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4469 |
__ sha1(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4470 |
if (multi_block) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4471 |
__ add(ofs, 64, ofs); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4472 |
__ add(buf, 64, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4473 |
__ cmp_and_brx_short(ofs, limit, Assembler::lessEqual, Assembler::pt, L_sha1_unaligned_input_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4474 |
__ mov(ofs, O0); // to be returned |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4475 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4476 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4477 |
// store F0-F4 into state and return |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4478 |
for (i = 0; i < 4; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4479 |
__ stf(FloatRegisterImpl::S, as_FloatRegister(i), state, i*4); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4480 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4481 |
__ retl(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4482 |
__ delayed()->stf(FloatRegisterImpl::S, F4, state, 0x10); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4483 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4484 |
return start; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4485 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4486 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4487 |
address generate_sha256_implCompress(bool multi_block, const char *name) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4488 |
__ align(CodeEntryAlignment); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4489 |
StubCodeMark mark(this, "StubRoutines", name); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4490 |
address start = __ pc(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4491 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4492 |
Label L_sha256_loop, L_sha256_unaligned_input, L_sha256_unaligned_input_loop; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4493 |
int i; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4494 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4495 |
Register buf = O0; // byte[] source+offset |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4496 |
Register state = O1; // int[] SHA2.state |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4497 |
Register ofs = O2; // int offset |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4498 |
Register limit = O3; // int limit |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4499 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4500 |
// load state into F0-F7 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4501 |
for (i = 0; i < 8; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4502 |
__ ldf(FloatRegisterImpl::S, state, i*4, as_FloatRegister(i)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4503 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4504 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4505 |
__ andcc(buf, 7, G0); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4506 |
__ br(Assembler::notZero, false, Assembler::pn, L_sha256_unaligned_input); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4507 |
__ delayed()->nop(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4508 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4509 |
__ BIND(L_sha256_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4510 |
// load buf into F8-F22 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4511 |
for (i = 0; i < 8; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4512 |
__ ldf(FloatRegisterImpl::D, buf, i*8, as_FloatRegister(i*2 + 8)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4513 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4514 |
__ sha256(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4515 |
if (multi_block) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4516 |
__ add(ofs, 64, ofs); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4517 |
__ add(buf, 64, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4518 |
__ cmp_and_brx_short(ofs, limit, Assembler::lessEqual, Assembler::pt, L_sha256_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4519 |
__ mov(ofs, O0); // to be returned |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4520 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4521 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4522 |
// store F0-F7 into state and return |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4523 |
for (i = 0; i < 7; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4524 |
__ stf(FloatRegisterImpl::S, as_FloatRegister(i), state, i*4); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4525 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4526 |
__ retl(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4527 |
__ delayed()->stf(FloatRegisterImpl::S, F7, state, 0x1c); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4528 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4529 |
__ BIND(L_sha256_unaligned_input); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4530 |
__ alignaddr(buf, G0, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4531 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4532 |
__ BIND(L_sha256_unaligned_input_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4533 |
// load buf into F8-F22 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4534 |
for (i = 0; i < 9; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4535 |
__ ldf(FloatRegisterImpl::D, buf, i*8, as_FloatRegister(i*2 + 8)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4536 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4537 |
for (i = 0; i < 8; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4538 |
__ faligndata(as_FloatRegister(i*2 + 8), as_FloatRegister(i*2 + 10), as_FloatRegister(i*2 + 8)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4539 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4540 |
__ sha256(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4541 |
if (multi_block) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4542 |
__ add(ofs, 64, ofs); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4543 |
__ add(buf, 64, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4544 |
__ cmp_and_brx_short(ofs, limit, Assembler::lessEqual, Assembler::pt, L_sha256_unaligned_input_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4545 |
__ mov(ofs, O0); // to be returned |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4546 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4547 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4548 |
// store F0-F7 into state and return |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4549 |
for (i = 0; i < 7; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4550 |
__ stf(FloatRegisterImpl::S, as_FloatRegister(i), state, i*4); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4551 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4552 |
__ retl(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4553 |
__ delayed()->stf(FloatRegisterImpl::S, F7, state, 0x1c); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4554 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4555 |
return start; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4556 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4557 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4558 |
address generate_sha512_implCompress(bool multi_block, const char *name) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4559 |
__ align(CodeEntryAlignment); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4560 |
StubCodeMark mark(this, "StubRoutines", name); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4561 |
address start = __ pc(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4562 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4563 |
Label L_sha512_loop, L_sha512_unaligned_input, L_sha512_unaligned_input_loop; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4564 |
int i; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4565 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4566 |
Register buf = O0; // byte[] source+offset |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4567 |
Register state = O1; // long[] SHA5.state |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4568 |
Register ofs = O2; // int offset |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4569 |
Register limit = O3; // int limit |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4570 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4571 |
// load state into F0-F14 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4572 |
for (i = 0; i < 8; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4573 |
__ ldf(FloatRegisterImpl::D, state, i*8, as_FloatRegister(i*2)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4574 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4575 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4576 |
__ andcc(buf, 7, G0); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4577 |
__ br(Assembler::notZero, false, Assembler::pn, L_sha512_unaligned_input); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4578 |
__ delayed()->nop(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4579 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4580 |
__ BIND(L_sha512_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4581 |
// load buf into F16-F46 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4582 |
for (i = 0; i < 16; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4583 |
__ ldf(FloatRegisterImpl::D, buf, i*8, as_FloatRegister(i*2 + 16)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4584 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4585 |
__ sha512(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4586 |
if (multi_block) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4587 |
__ add(ofs, 128, ofs); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4588 |
__ add(buf, 128, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4589 |
__ cmp_and_brx_short(ofs, limit, Assembler::lessEqual, Assembler::pt, L_sha512_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4590 |
__ mov(ofs, O0); // to be returned |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4591 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4592 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4593 |
// store F0-F14 into state and return |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4594 |
for (i = 0; i < 7; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4595 |
__ stf(FloatRegisterImpl::D, as_FloatRegister(i*2), state, i*8); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4596 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4597 |
__ retl(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4598 |
__ delayed()->stf(FloatRegisterImpl::D, F14, state, 0x38); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4599 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4600 |
__ BIND(L_sha512_unaligned_input); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4601 |
__ alignaddr(buf, G0, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4602 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4603 |
__ BIND(L_sha512_unaligned_input_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4604 |
// load buf into F16-F46 |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4605 |
for (i = 0; i < 17; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4606 |
__ ldf(FloatRegisterImpl::D, buf, i*8, as_FloatRegister(i*2 + 16)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4607 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4608 |
for (i = 0; i < 16; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4609 |
__ faligndata(as_FloatRegister(i*2 + 16), as_FloatRegister(i*2 + 18), as_FloatRegister(i*2 + 16)); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4610 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4611 |
__ sha512(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4612 |
if (multi_block) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4613 |
__ add(ofs, 128, ofs); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4614 |
__ add(buf, 128, buf); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4615 |
__ cmp_and_brx_short(ofs, limit, Assembler::lessEqual, Assembler::pt, L_sha512_unaligned_input_loop); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4616 |
__ mov(ofs, O0); // to be returned |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4617 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4618 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4619 |
// store F0-F14 into state and return |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4620 |
for (i = 0; i < 7; i++) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4621 |
__ stf(FloatRegisterImpl::D, as_FloatRegister(i*2), state, i*8); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4622 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4623 |
__ retl(); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4624 |
__ delayed()->stf(FloatRegisterImpl::D, F14, state, 0x38); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4625 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4626 |
return start; |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4627 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
4628 |
|
31404
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4629 |
/* Single and multi-block ghash operations */ |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
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diff
changeset
|
4630 |
address generate_ghash_processBlocks() { |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
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diff
changeset
|
4631 |
__ align(CodeEntryAlignment); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
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diff
changeset
|
4632 |
Label L_ghash_loop, L_aligned, L_main; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4633 |
StubCodeMark mark(this, "StubRoutines", "ghash_processBlocks"); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
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diff
changeset
|
4634 |
address start = __ pc(); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4635 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4636 |
Register state = I0; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4637 |
Register subkeyH = I1; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4638 |
Register data = I2; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4639 |
Register len = I3; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4640 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4641 |
__ save_frame(0); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4642 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4643 |
__ ldx(state, 0, O0); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4644 |
__ ldx(state, 8, O1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4645 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4646 |
// Loop label for multiblock operations |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4647 |
__ BIND(L_ghash_loop); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4648 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4649 |
// Check if 'data' is unaligned |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4650 |
__ andcc(data, 7, G1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4651 |
__ br(Assembler::zero, false, Assembler::pt, L_aligned); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4652 |
__ delayed()->nop(); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4653 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4654 |
Register left_shift = L1; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4655 |
Register right_shift = L2; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4656 |
Register data_ptr = L3; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4657 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4658 |
// Get left and right shift values in bits |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4659 |
__ sll(G1, LogBitsPerByte, left_shift); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4660 |
__ mov(64, right_shift); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4661 |
__ sub(right_shift, left_shift, right_shift); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4662 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4663 |
// Align to read 'data' |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4664 |
__ sub(data, G1, data_ptr); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4665 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4666 |
// Load first 8 bytes of 'data' |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4667 |
__ ldx(data_ptr, 0, O4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4668 |
__ sllx(O4, left_shift, O4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4669 |
__ ldx(data_ptr, 8, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4670 |
__ srlx(O5, right_shift, G4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4671 |
__ bset(G4, O4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4672 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4673 |
// Load second 8 bytes of 'data' |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4674 |
__ sllx(O5, left_shift, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4675 |
__ ldx(data_ptr, 16, G4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4676 |
__ srlx(G4, right_shift, G4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4677 |
__ ba(L_main); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4678 |
__ delayed()->bset(G4, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4679 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4680 |
// If 'data' is aligned, load normally |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4681 |
__ BIND(L_aligned); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4682 |
__ ldx(data, 0, O4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4683 |
__ ldx(data, 8, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4684 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4685 |
__ BIND(L_main); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4686 |
__ ldx(subkeyH, 0, O2); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4687 |
__ ldx(subkeyH, 8, O3); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4688 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4689 |
__ xor3(O0, O4, O0); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4690 |
__ xor3(O1, O5, O1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4691 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4692 |
__ xmulxhi(O0, O3, G3); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4693 |
__ xmulx(O0, O2, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4694 |
__ xmulxhi(O1, O2, G4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4695 |
__ xmulxhi(O1, O3, G5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4696 |
__ xmulx(O0, O3, G1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4697 |
__ xmulx(O1, O3, G2); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4698 |
__ xmulx(O1, O2, O3); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4699 |
__ xmulxhi(O0, O2, O4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4700 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4701 |
__ mov(0xE1, O0); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4702 |
__ sllx(O0, 56, O0); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4703 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4704 |
__ xor3(O5, G3, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4705 |
__ xor3(O5, G4, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4706 |
__ xor3(G5, G1, G1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4707 |
__ xor3(G1, O3, G1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4708 |
__ srlx(G2, 63, O1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4709 |
__ srlx(G1, 63, G3); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4710 |
__ sllx(G2, 63, O3); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4711 |
__ sllx(G2, 58, O2); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4712 |
__ xor3(O3, O2, O2); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4713 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4714 |
__ sllx(G1, 1, G1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4715 |
__ or3(G1, O1, G1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4716 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4717 |
__ xor3(G1, O2, G1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4718 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4719 |
__ sllx(G2, 1, G2); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4720 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4721 |
__ xmulxhi(G1, O0, O1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4722 |
__ xmulx(G1, O0, O2); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4723 |
__ xmulxhi(G2, O0, O3); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4724 |
__ xmulx(G2, O0, G1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4725 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4726 |
__ xor3(O4, O1, O4); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4727 |
__ xor3(O5, O2, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4728 |
__ xor3(O5, O3, O5); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4729 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4730 |
__ sllx(O4, 1, O2); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4731 |
__ srlx(O5, 63, O3); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4732 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4733 |
__ or3(O2, O3, O0); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4734 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4735 |
__ sllx(O5, 1, O1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4736 |
__ srlx(G1, 63, O2); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4737 |
__ or3(O1, O2, O1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4738 |
__ xor3(O1, G3, O1); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4739 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4740 |
__ deccc(len); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4741 |
__ br(Assembler::notZero, true, Assembler::pt, L_ghash_loop); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4742 |
__ delayed()->add(data, 16, data); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4743 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4744 |
__ stx(O0, I0, 0); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4745 |
__ stx(O1, I0, 8); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4746 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4747 |
__ ret(); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4748 |
__ delayed()->restore(); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4749 |
|
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4750 |
return start; |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4751 |
} |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
4752 |
|
31515 | 4753 |
/** |
4754 |
* Arguments: |
|
4755 |
* |
|
4756 |
* Inputs: |
|
4757 |
* O0 - int crc |
|
4758 |
* O1 - byte* buf |
|
4759 |
* O2 - int len |
|
4760 |
* O3 - int* table |
|
4761 |
* |
|
4762 |
* Output: |
|
4763 |
* O0 - int crc result |
|
4764 |
*/ |
|
4765 |
address generate_updateBytesCRC32C() { |
|
4766 |
assert(UseCRC32CIntrinsics, "need CRC32C instruction"); |
|
4767 |
||
4768 |
__ align(CodeEntryAlignment); |
|
4769 |
StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32C"); |
|
4770 |
address start = __ pc(); |
|
4771 |
||
4772 |
const Register crc = O0; // crc |
|
4773 |
const Register buf = O1; // source java byte array address |
|
4774 |
const Register len = O2; // number of bytes |
|
4775 |
const Register table = O3; // byteTable |
|
4776 |
||
38237
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
37466
diff
changeset
|
4777 |
__ kernel_crc32c(crc, buf, len, table); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
37466
diff
changeset
|
4778 |
|
31515 | 4779 |
__ retl(); |
4780 |
__ delayed()->nop(); |
|
4781 |
||
4782 |
return start; |
|
4783 |
} |
|
4784 |
||
32581 | 4785 |
#define ADLER32_NUM_TEMPS 16 |
4786 |
||
4787 |
/** |
|
4788 |
* Arguments: |
|
4789 |
* |
|
4790 |
* Inputs: |
|
4791 |
* O0 - int adler |
|
4792 |
* O1 - byte* buff |
|
4793 |
* O2 - int len |
|
4794 |
* |
|
4795 |
* Output: |
|
4796 |
* O0 - int adler result |
|
4797 |
*/ |
|
4798 |
address generate_updateBytesAdler32() { |
|
4799 |
__ align(CodeEntryAlignment); |
|
4800 |
StubCodeMark mark(this, "StubRoutines", "updateBytesAdler32"); |
|
4801 |
address start = __ pc(); |
|
4802 |
||
4803 |
Label L_cleanup_loop, L_cleanup_loop_check; |
|
4804 |
Label L_main_loop_check, L_main_loop, L_inner_loop, L_inner_loop_check; |
|
4805 |
Label L_nmax_check_done; |
|
4806 |
||
4807 |
// Aliases |
|
4808 |
Register s1 = O0; |
|
4809 |
Register s2 = O3; |
|
4810 |
Register buff = O1; |
|
4811 |
Register len = O2; |
|
4812 |
Register temp[ADLER32_NUM_TEMPS] = {L0, L1, L2, L3, L4, L5, L6, L7, I0, I1, I2, I3, I4, I5, G3, I7}; |
|
4813 |
||
4814 |
// Max number of bytes we can process before having to take the mod |
|
4815 |
// 0x15B0 is 5552 in decimal, the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 |
|
4816 |
unsigned long NMAX = 0x15B0; |
|
4817 |
||
4818 |
// Zero-out the upper bits of len |
|
4819 |
__ clruwu(len); |
|
4820 |
||
4821 |
// Create the mask 0xFFFF |
|
4822 |
__ set64(0x00FFFF, O4, O5); // O5 is the temp register |
|
4823 |
||
4824 |
// s1 is initialized to the lower 16 bits of adler |
|
4825 |
// s2 is initialized to the upper 16 bits of adler |
|
4826 |
__ srlx(O0, 16, O5); // adler >> 16 |
|
4827 |
__ and3(O0, O4, s1); // s1 = (adler & 0xFFFF) |
|
4828 |
__ and3(O5, O4, s2); // s2 = ((adler >> 16) & 0xFFFF) |
|
4829 |
||
4830 |
// The pipelined loop needs at least 16 elements for 1 iteration |
|
4831 |
// It does check this, but it is more effective to skip to the cleanup loop |
|
4832 |
// Setup the constant for cutoff checking |
|
4833 |
__ mov(15, O4); |
|
4834 |
||
4835 |
// Check if we are above the cutoff, if not go to the cleanup loop immediately |
|
4836 |
__ cmp_and_br_short(len, O4, Assembler::lessEqualUnsigned, Assembler::pt, L_cleanup_loop_check); |
|
4837 |
||
4838 |
// Free up some registers for our use |
|
4839 |
for (int i = 0; i < ADLER32_NUM_TEMPS; i++) { |
|
4840 |
__ movxtod(temp[i], as_FloatRegister(2*i)); |
|
4841 |
} |
|
4842 |
||
4843 |
// Loop maintenance stuff is done at the end of the loop, so skip to there |
|
4844 |
__ ba_short(L_main_loop_check); |
|
4845 |
||
4846 |
__ BIND(L_main_loop); |
|
4847 |
||
4848 |
// Prologue for inner loop |
|
4849 |
__ ldub(buff, 0, L0); |
|
4850 |
__ dec(O5); |
|
4851 |
||
4852 |
for (int i = 1; i < 8; i++) { |
|
4853 |
__ ldub(buff, i, temp[i]); |
|
4854 |
} |
|
4855 |
||
4856 |
__ inc(buff, 8); |
|
4857 |
||
4858 |
// Inner loop processes 16 elements at a time, might never execute if only 16 elements |
|
4859 |
// to be processed by the outter loop |
|
4860 |
__ ba_short(L_inner_loop_check); |
|
4861 |
||
4862 |
__ BIND(L_inner_loop); |
|
4863 |
||
4864 |
for (int i = 0; i < 8; i++) { |
|
4865 |
__ ldub(buff, (2*i), temp[(8+(2*i)) % ADLER32_NUM_TEMPS]); |
|
4866 |
__ add(s1, temp[i], s1); |
|
4867 |
__ ldub(buff, (2*i)+1, temp[(8+(2*i)+1) % ADLER32_NUM_TEMPS]); |
|
4868 |
__ add(s2, s1, s2); |
|
4869 |
} |
|
4870 |
||
4871 |
// Original temp 0-7 used and new loads to temp 0-7 issued |
|
4872 |
// temp 8-15 ready to be consumed |
|
4873 |
__ add(s1, I0, s1); |
|
4874 |
__ dec(O5); |
|
4875 |
__ add(s2, s1, s2); |
|
4876 |
__ add(s1, I1, s1); |
|
4877 |
__ inc(buff, 16); |
|
4878 |
__ add(s2, s1, s2); |
|
4879 |
||
4880 |
for (int i = 0; i < 6; i++) { |
|
4881 |
__ add(s1, temp[10+i], s1); |
|
4882 |
__ add(s2, s1, s2); |
|
4883 |
} |
|
4884 |
||
4885 |
__ BIND(L_inner_loop_check); |
|
4886 |
__ nop(); |
|
4887 |
__ cmp_and_br_short(O5, 0, Assembler::notEqual, Assembler::pt, L_inner_loop); |
|
4888 |
||
4889 |
// Epilogue |
|
4890 |
for (int i = 0; i < 4; i++) { |
|
4891 |
__ ldub(buff, (2*i), temp[8+(2*i)]); |
|
4892 |
__ add(s1, temp[i], s1); |
|
4893 |
__ ldub(buff, (2*i)+1, temp[8+(2*i)+1]); |
|
4894 |
__ add(s2, s1, s2); |
|
4895 |
} |
|
4896 |
||
4897 |
__ add(s1, temp[4], s1); |
|
4898 |
__ inc(buff, 8); |
|
4899 |
||
4900 |
for (int i = 0; i < 11; i++) { |
|
4901 |
__ add(s2, s1, s2); |
|
4902 |
__ add(s1, temp[5+i], s1); |
|
4903 |
} |
|
4904 |
||
4905 |
__ add(s2, s1, s2); |
|
4906 |
||
4907 |
// Take the mod for s1 and s2 |
|
4908 |
__ set64(0xFFF1, L0, L1); |
|
4909 |
__ udivx(s1, L0, L1); |
|
4910 |
__ udivx(s2, L0, L2); |
|
4911 |
__ mulx(L0, L1, L1); |
|
4912 |
__ mulx(L0, L2, L2); |
|
4913 |
__ sub(s1, L1, s1); |
|
4914 |
__ sub(s2, L2, s2); |
|
4915 |
||
4916 |
// Make sure there is something left to process |
|
4917 |
__ BIND(L_main_loop_check); |
|
4918 |
__ set64(NMAX, L0, L1); |
|
4919 |
// k = len < NMAX ? len : NMAX |
|
4920 |
__ cmp_and_br_short(len, L0, Assembler::greaterEqualUnsigned, Assembler::pt, L_nmax_check_done); |
|
4921 |
__ andn(len, 0x0F, L0); // only loop a multiple of 16 times |
|
4922 |
__ BIND(L_nmax_check_done); |
|
4923 |
__ mov(L0, O5); |
|
4924 |
__ sub(len, L0, len); // len -= k |
|
4925 |
||
4926 |
__ srlx(O5, 4, O5); // multiplies of 16 |
|
4927 |
__ cmp_and_br_short(O5, 0, Assembler::notEqual, Assembler::pt, L_main_loop); |
|
4928 |
||
4929 |
// Restore anything we used, take the mod one last time, combine and return |
|
4930 |
// Restore any registers we saved |
|
4931 |
for (int i = 0; i < ADLER32_NUM_TEMPS; i++) { |
|
4932 |
__ movdtox(as_FloatRegister(2*i), temp[i]); |
|
4933 |
} |
|
4934 |
||
4935 |
// There might be nothing left to process |
|
4936 |
__ ba_short(L_cleanup_loop_check); |
|
4937 |
||
4938 |
__ BIND(L_cleanup_loop); |
|
4939 |
__ ldub(buff, 0, O4); // load single byte form buffer |
|
4940 |
__ inc(buff); // buff++ |
|
4941 |
__ add(s1, O4, s1); // s1 += *buff++; |
|
4942 |
__ dec(len); // len-- |
|
4943 |
__ add(s1, s2, s2); // s2 += s1; |
|
4944 |
__ BIND(L_cleanup_loop_check); |
|
4945 |
__ nop(); |
|
4946 |
__ cmp_and_br_short(len, 0, Assembler::notEqual, Assembler::pt, L_cleanup_loop); |
|
4947 |
||
4948 |
// Take the mod one last time |
|
4949 |
__ set64(0xFFF1, O1, O2); |
|
4950 |
__ udivx(s1, O1, O2); |
|
4951 |
__ udivx(s2, O1, O5); |
|
4952 |
__ mulx(O1, O2, O2); |
|
4953 |
__ mulx(O1, O5, O5); |
|
4954 |
__ sub(s1, O2, s1); |
|
4955 |
__ sub(s2, O5, s2); |
|
4956 |
||
4957 |
// Combine lower bits and higher bits |
|
4958 |
__ sllx(s2, 16, s2); // s2 = s2 << 16 |
|
4959 |
__ or3(s1, s2, s1); // adler = s2 | s1 |
|
4960 |
// Final return value is in O0 |
|
4961 |
__ retl(); |
|
4962 |
__ delayed()->nop(); |
|
4963 |
||
4964 |
return start; |
|
4965 |
} |
|
4966 |
||
47561
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
4967 |
/** |
34205 | 4968 |
* Arguments: |
4969 |
* |
|
4970 |
* Inputs: |
|
4971 |
* O0 - int crc |
|
4972 |
* O1 - byte* buf |
|
4973 |
* O2 - int len |
|
4974 |
* O3 - int* table |
|
4975 |
* |
|
4976 |
* Output: |
|
4977 |
* O0 - int crc result |
|
4978 |
*/ |
|
4979 |
address generate_updateBytesCRC32() { |
|
4980 |
assert(UseCRC32Intrinsics, "need VIS3 instructions"); |
|
4981 |
||
4982 |
__ align(CodeEntryAlignment); |
|
4983 |
StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32"); |
|
4984 |
address start = __ pc(); |
|
4985 |
||
4986 |
const Register crc = O0; // crc |
|
4987 |
const Register buf = O1; // source java byte array address |
|
4988 |
const Register len = O2; // length |
|
4989 |
const Register table = O3; // crc_table address (reuse register) |
|
4990 |
||
4991 |
__ kernel_crc32(crc, buf, len, table); |
|
4992 |
||
4993 |
__ retl(); |
|
4994 |
__ delayed()->nop(); |
|
4995 |
||
4996 |
return start; |
|
4997 |
} |
|
4998 |
||
47561
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
4999 |
/** |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5000 |
* Arguments: |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5001 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5002 |
* Inputs: |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5003 |
* I0 - int* x-addr |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5004 |
* I1 - int x-len |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5005 |
* I2 - int* y-addr |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5006 |
* I3 - int y-len |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5007 |
* I4 - int* z-addr (output vector) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5008 |
* I5 - int z-len |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5009 |
*/ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5010 |
address generate_multiplyToLen() { |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5011 |
assert(UseMultiplyToLenIntrinsic, "need VIS3 instructions"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5012 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5013 |
__ align(CodeEntryAlignment); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5014 |
StubCodeMark mark(this, "StubRoutines", "multiplyToLen"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5015 |
address start = __ pc(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5016 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5017 |
__ save_frame(0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5018 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5019 |
const Register xptr = I0; // input address |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5020 |
const Register xlen = I1; // ...and length in 32b-words |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5021 |
const Register yptr = I2; // |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5022 |
const Register ylen = I3; // |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5023 |
const Register zptr = I4; // output address |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5024 |
const Register zlen = I5; // ...and length in 32b-words |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5025 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5026 |
/* The minimal "limb" representation suggest that odd length vectors are as |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5027 |
* likely as even length dittos. This in turn suggests that we need to cope |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5028 |
* with odd/even length arrays and data not aligned properly for 64-bit read |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5029 |
* and write operations. We thus use a number of different kernels: |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5030 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5031 |
* if (is_even(x.len) && is_even(y.len)) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5032 |
* if (is_align64(x) && is_align64(y) && is_align64(z)) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5033 |
* if (x.len == y.len && 16 <= x.len && x.len <= 64) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5034 |
* memv_mult_mpmul(...) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5035 |
* else |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5036 |
* memv_mult_64x64(...) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5037 |
* else |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5038 |
* memv_mult_64x64u(...) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5039 |
* else |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5040 |
* memv_mult_32x32(...) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5041 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5042 |
* Here we assume VIS3 support (for 'umulxhi', 'addxc' and 'addxccc'). |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5043 |
* In case CBCOND instructions are supported, we will use 'cxbX'. If the |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5044 |
* MPMUL instruction is supported, we will generate a kernel using 'mpmul' |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5045 |
* (for vectors with proper characteristics). |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5046 |
*/ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5047 |
const Register tmp0 = L0; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5048 |
const Register tmp1 = L1; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5049 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5050 |
Label L_mult_32x32; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5051 |
Label L_mult_64x64u; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5052 |
Label L_mult_64x64; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5053 |
Label L_exit; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5054 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5055 |
if_both_even(xlen, ylen, tmp0, false, L_mult_32x32); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5056 |
if_all3_aligned(xptr, yptr, zptr, tmp1, 64, false, L_mult_64x64u); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5057 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5058 |
if (UseMPMUL) { |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5059 |
if_eq(xlen, ylen, false, L_mult_64x64); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5060 |
if_in_rng(xlen, 16, 64, tmp0, tmp1, false, L_mult_64x64); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5061 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5062 |
// 1. Multiply naturally aligned 64b-datums using a generic 'mpmul' kernel, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5063 |
// operating on equal length vectors of size [16..64]. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5064 |
gen_mult_mpmul(xlen, xptr, yptr, zptr, L_exit); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5065 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5066 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5067 |
// 2. Multiply naturally aligned 64-bit datums (64x64). |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5068 |
__ bind(L_mult_64x64); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5069 |
gen_mult_64x64(xptr, xlen, yptr, ylen, zptr, zlen, L_exit); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5070 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5071 |
// 3. Multiply unaligned 64-bit datums (64x64). |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5072 |
__ bind(L_mult_64x64u); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5073 |
gen_mult_64x64_unaligned(xptr, xlen, yptr, ylen, zptr, zlen, L_exit); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5074 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5075 |
// 4. Multiply naturally aligned 32-bit datums (32x32). |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5076 |
__ bind(L_mult_32x32); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5077 |
gen_mult_32x32(xptr, xlen, yptr, ylen, zptr, zlen, L_exit); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5078 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5079 |
__ bind(L_exit); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5080 |
__ ret(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5081 |
__ delayed()->restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5082 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5083 |
return start; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5084 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5085 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5086 |
// Additional help functions used by multiplyToLen generation. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5087 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5088 |
void if_both_even(Register r1, Register r2, Register tmp, bool iseven, Label &L) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5089 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5090 |
__ or3(r1, r2, tmp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5091 |
__ andcc(tmp, 0x1, tmp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5092 |
__ br_icc_zero(iseven, Assembler::pn, L); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5093 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5094 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5095 |
void if_all3_aligned(Register r1, Register r2, Register r3, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5096 |
Register tmp, uint align, bool isalign, Label &L) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5097 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5098 |
__ or3(r1, r2, tmp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5099 |
__ or3(r3, tmp, tmp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5100 |
__ andcc(tmp, (align - 1), tmp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5101 |
__ br_icc_zero(isalign, Assembler::pn, L); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5102 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5103 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5104 |
void if_eq(Register x, Register y, bool iseq, Label &L) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5105 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5106 |
Assembler::Condition cf = (iseq ? Assembler::equal : Assembler::notEqual); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5107 |
__ cmp_and_br_short(x, y, cf, Assembler::pt, L); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5108 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5109 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5110 |
void if_in_rng(Register x, int lb, int ub, Register t1, Register t2, bool inrng, Label &L) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5111 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5112 |
assert(Assembler::is_simm13(lb), "Small ints only!"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5113 |
assert(Assembler::is_simm13(ub), "Small ints only!"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5114 |
// Compute (x - lb) * (ub - x) >= 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5115 |
// NOTE: With the local use of this routine, we rely on small integers to |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5116 |
// guarantee that we do not overflow in the multiplication. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5117 |
__ add(G0, ub, t2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5118 |
__ sub(x, lb, t1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5119 |
__ sub(t2, x, t2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5120 |
__ mulx(t1, t2, t1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5121 |
Assembler::Condition cf = (inrng ? Assembler::greaterEqual : Assembler::less); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5122 |
__ cmp_and_br_short(t1, G0, cf, Assembler::pt, L); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5123 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5124 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5125 |
void ldd_entry(Register base, Register offs, FloatRegister dest) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5126 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5127 |
__ ldd(base, offs, dest); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5128 |
__ inc(offs, 8); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5129 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5130 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5131 |
void ldx_entry(Register base, Register offs, Register dest) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5132 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5133 |
__ ldx(base, offs, dest); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5134 |
__ inc(offs, 8); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5135 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5136 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5137 |
void mpmul_entry(int m, Label &next) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5138 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5139 |
__ mpmul(m); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5140 |
__ cbcond(Assembler::equal, Assembler::icc, G0, G0, next); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5141 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5142 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5143 |
void stx_entry(Label &L, Register r1, Register r2, Register base, Register offs) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5144 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5145 |
__ bind(L); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5146 |
__ stx(r1, base, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5147 |
__ inc(offs, 8); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5148 |
__ stx(r2, base, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5149 |
__ inc(offs, 8); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5150 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5151 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5152 |
void offs_entry(Label &Lbl0, Label &Lbl1) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5153 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5154 |
assert(Lbl0.is_bound(), "must be"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5155 |
assert(Lbl1.is_bound(), "must be"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5156 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5157 |
int offset = Lbl0.loc_pos() - Lbl1.loc_pos(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5158 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5159 |
__ emit_data(offset); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5160 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5161 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5162 |
/* Generate the actual multiplication kernels for BigInteger vectors: |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5163 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5164 |
* 1. gen_mult_mpmul(...) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5165 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5166 |
* 2. gen_mult_64x64(...) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5167 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5168 |
* 3. gen_mult_64x64_unaligned(...) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5169 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5170 |
* 4. gen_mult_32x32(...) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5171 |
*/ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5172 |
void gen_mult_mpmul(Register len, Register xptr, Register yptr, Register zptr, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5173 |
Label &L_exit) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5174 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5175 |
const Register zero = G0; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5176 |
const Register gxp = G1; // Need to use global registers across RWs. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5177 |
const Register gyp = G2; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5178 |
const Register gzp = G3; |
48304
600997105565
8191232: compiler/intrinsics/bigInteger/TestMultiplyToLen.java fails with java.lang.Exception: Failed
phedlin
parents:
48104
diff
changeset
|
5179 |
const Register disp = G4; |
600997105565
8191232: compiler/intrinsics/bigInteger/TestMultiplyToLen.java fails with java.lang.Exception: Failed
phedlin
parents:
48104
diff
changeset
|
5180 |
const Register offs = G5; |
47561
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5181 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5182 |
__ mov(xptr, gxp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5183 |
__ mov(yptr, gyp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5184 |
__ mov(zptr, gzp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5185 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5186 |
/* Compute jump vector entry: |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5187 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5188 |
* 1. mpmul input size (0..31) x 64b |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5189 |
* 2. vector input size in 32b limbs (even number) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5190 |
* 3. branch entries in reverse order (31..0), using two |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5191 |
* instructions per entry (2 * 4 bytes). |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5192 |
* |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5193 |
* displacement = byte_offset(bra_offset(len)) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5194 |
* = byte_offset((64 - len)/2) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5195 |
* = 8 * (64 - len)/2 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5196 |
* = 4 * (64 - len) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5197 |
*/ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5198 |
Register temp = I5; // Alright to use input regs. in first batch. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5199 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5200 |
__ sub(zero, len, temp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5201 |
__ add(temp, 64, temp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5202 |
__ sllx(temp, 2, disp); // disp := (64 - len) << 2 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5203 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5204 |
// Dispatch relative current PC, into instruction table below. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5205 |
__ rdpc(temp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5206 |
__ add(temp, 16, temp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5207 |
__ jmp(temp, disp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5208 |
__ delayed()->clr(offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5209 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5210 |
ldd_entry(gxp, offs, F22); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5211 |
ldd_entry(gxp, offs, F20); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5212 |
ldd_entry(gxp, offs, F18); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5213 |
ldd_entry(gxp, offs, F16); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5214 |
ldd_entry(gxp, offs, F14); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5215 |
ldd_entry(gxp, offs, F12); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5216 |
ldd_entry(gxp, offs, F10); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5217 |
ldd_entry(gxp, offs, F8); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5218 |
ldd_entry(gxp, offs, F6); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5219 |
ldd_entry(gxp, offs, F4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5220 |
ldx_entry(gxp, offs, I5); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5221 |
ldx_entry(gxp, offs, I4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5222 |
ldx_entry(gxp, offs, I3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5223 |
ldx_entry(gxp, offs, I2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5224 |
ldx_entry(gxp, offs, I1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5225 |
ldx_entry(gxp, offs, I0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5226 |
ldx_entry(gxp, offs, L7); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5227 |
ldx_entry(gxp, offs, L6); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5228 |
ldx_entry(gxp, offs, L5); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5229 |
ldx_entry(gxp, offs, L4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5230 |
ldx_entry(gxp, offs, L3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5231 |
ldx_entry(gxp, offs, L2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5232 |
ldx_entry(gxp, offs, L1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5233 |
ldx_entry(gxp, offs, L0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5234 |
ldd_entry(gxp, offs, F2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5235 |
ldd_entry(gxp, offs, F0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5236 |
ldx_entry(gxp, offs, O5); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5237 |
ldx_entry(gxp, offs, O4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5238 |
ldx_entry(gxp, offs, O3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5239 |
ldx_entry(gxp, offs, O2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5240 |
ldx_entry(gxp, offs, O1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5241 |
ldx_entry(gxp, offs, O0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5242 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5243 |
__ save(SP, -176, SP); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5244 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5245 |
const Register addr = gxp; // Alright to reuse 'gxp'. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5246 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5247 |
// Dispatch relative current PC, into instruction table below. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5248 |
__ rdpc(addr); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5249 |
__ add(addr, 16, addr); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5250 |
__ jmp(addr, disp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5251 |
__ delayed()->clr(offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5252 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5253 |
ldd_entry(gyp, offs, F58); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5254 |
ldd_entry(gyp, offs, F56); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5255 |
ldd_entry(gyp, offs, F54); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5256 |
ldd_entry(gyp, offs, F52); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5257 |
ldd_entry(gyp, offs, F50); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5258 |
ldd_entry(gyp, offs, F48); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5259 |
ldd_entry(gyp, offs, F46); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5260 |
ldd_entry(gyp, offs, F44); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5261 |
ldd_entry(gyp, offs, F42); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5262 |
ldd_entry(gyp, offs, F40); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5263 |
ldd_entry(gyp, offs, F38); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5264 |
ldd_entry(gyp, offs, F36); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5265 |
ldd_entry(gyp, offs, F34); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5266 |
ldd_entry(gyp, offs, F32); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5267 |
ldd_entry(gyp, offs, F30); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5268 |
ldd_entry(gyp, offs, F28); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5269 |
ldd_entry(gyp, offs, F26); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5270 |
ldd_entry(gyp, offs, F24); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5271 |
ldx_entry(gyp, offs, O5); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5272 |
ldx_entry(gyp, offs, O4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5273 |
ldx_entry(gyp, offs, O3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5274 |
ldx_entry(gyp, offs, O2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5275 |
ldx_entry(gyp, offs, O1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5276 |
ldx_entry(gyp, offs, O0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5277 |
ldx_entry(gyp, offs, L7); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5278 |
ldx_entry(gyp, offs, L6); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5279 |
ldx_entry(gyp, offs, L5); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5280 |
ldx_entry(gyp, offs, L4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5281 |
ldx_entry(gyp, offs, L3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5282 |
ldx_entry(gyp, offs, L2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5283 |
ldx_entry(gyp, offs, L1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5284 |
ldx_entry(gyp, offs, L0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5285 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5286 |
__ save(SP, -176, SP); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5287 |
__ save(SP, -176, SP); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5288 |
__ save(SP, -176, SP); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5289 |
__ save(SP, -176, SP); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5290 |
__ save(SP, -176, SP); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5291 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5292 |
Label L_mpmul_restore_4, L_mpmul_restore_3, L_mpmul_restore_2; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5293 |
Label L_mpmul_restore_1, L_mpmul_restore_0; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5294 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5295 |
// Dispatch relative current PC, into instruction table below. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5296 |
__ rdpc(addr); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5297 |
__ add(addr, 16, addr); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5298 |
__ jmp(addr, disp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5299 |
__ delayed()->clr(offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5300 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5301 |
mpmul_entry(31, L_mpmul_restore_0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5302 |
mpmul_entry(30, L_mpmul_restore_0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5303 |
mpmul_entry(29, L_mpmul_restore_0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5304 |
mpmul_entry(28, L_mpmul_restore_0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5305 |
mpmul_entry(27, L_mpmul_restore_1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5306 |
mpmul_entry(26, L_mpmul_restore_1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5307 |
mpmul_entry(25, L_mpmul_restore_1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5308 |
mpmul_entry(24, L_mpmul_restore_1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5309 |
mpmul_entry(23, L_mpmul_restore_1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5310 |
mpmul_entry(22, L_mpmul_restore_1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5311 |
mpmul_entry(21, L_mpmul_restore_1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5312 |
mpmul_entry(20, L_mpmul_restore_2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5313 |
mpmul_entry(19, L_mpmul_restore_2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5314 |
mpmul_entry(18, L_mpmul_restore_2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5315 |
mpmul_entry(17, L_mpmul_restore_2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5316 |
mpmul_entry(16, L_mpmul_restore_2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5317 |
mpmul_entry(15, L_mpmul_restore_2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5318 |
mpmul_entry(14, L_mpmul_restore_2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5319 |
mpmul_entry(13, L_mpmul_restore_3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5320 |
mpmul_entry(12, L_mpmul_restore_3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5321 |
mpmul_entry(11, L_mpmul_restore_3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5322 |
mpmul_entry(10, L_mpmul_restore_3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5323 |
mpmul_entry( 9, L_mpmul_restore_3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5324 |
mpmul_entry( 8, L_mpmul_restore_3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5325 |
mpmul_entry( 7, L_mpmul_restore_3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5326 |
mpmul_entry( 6, L_mpmul_restore_4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5327 |
mpmul_entry( 5, L_mpmul_restore_4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5328 |
mpmul_entry( 4, L_mpmul_restore_4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5329 |
mpmul_entry( 3, L_mpmul_restore_4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5330 |
mpmul_entry( 2, L_mpmul_restore_4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5331 |
mpmul_entry( 1, L_mpmul_restore_4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5332 |
mpmul_entry( 0, L_mpmul_restore_4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5333 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5334 |
Label L_z31, L_z30, L_z29, L_z28, L_z27, L_z26, L_z25, L_z24; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5335 |
Label L_z23, L_z22, L_z21, L_z20, L_z19, L_z18, L_z17, L_z16; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5336 |
Label L_z15, L_z14, L_z13, L_z12, L_z11, L_z10, L_z09, L_z08; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5337 |
Label L_z07, L_z06, L_z05, L_z04, L_z03, L_z02, L_z01, L_z00; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5338 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5339 |
Label L_zst_base; // Store sequence base address. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5340 |
__ bind(L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5341 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5342 |
stx_entry(L_z31, L7, L6, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5343 |
stx_entry(L_z30, L5, L4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5344 |
stx_entry(L_z29, L3, L2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5345 |
stx_entry(L_z28, L1, L0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5346 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5347 |
stx_entry(L_z27, O5, O4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5348 |
stx_entry(L_z26, O3, O2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5349 |
stx_entry(L_z25, O1, O0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5350 |
stx_entry(L_z24, L7, L6, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5351 |
stx_entry(L_z23, L5, L4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5352 |
stx_entry(L_z22, L3, L2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5353 |
stx_entry(L_z21, L1, L0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5354 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5355 |
stx_entry(L_z20, O5, O4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5356 |
stx_entry(L_z19, O3, O2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5357 |
stx_entry(L_z18, O1, O0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5358 |
stx_entry(L_z17, L7, L6, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5359 |
stx_entry(L_z16, L5, L4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5360 |
stx_entry(L_z15, L3, L2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5361 |
stx_entry(L_z14, L1, L0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5362 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5363 |
stx_entry(L_z13, O5, O4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5364 |
stx_entry(L_z12, O3, O2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5365 |
stx_entry(L_z11, O1, O0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5366 |
stx_entry(L_z10, L7, L6, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5367 |
stx_entry(L_z09, L5, L4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5368 |
stx_entry(L_z08, L3, L2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5369 |
stx_entry(L_z07, L1, L0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5370 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5371 |
stx_entry(L_z06, O5, O4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5372 |
stx_entry(L_z05, O3, O2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5373 |
stx_entry(L_z04, O1, O0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5374 |
stx_entry(L_z03, L7, L6, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5375 |
stx_entry(L_z02, L5, L4, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5376 |
stx_entry(L_z01, L3, L2, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5377 |
stx_entry(L_z00, L1, L0, gzp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5378 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5379 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5380 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5381 |
// Exit out of 'mpmul' routine, back to multiplyToLen. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5382 |
__ ba_short(L_exit); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5383 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5384 |
Label L_zst_offs; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5385 |
__ bind(L_zst_offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5386 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5387 |
offs_entry(L_z31, L_zst_base); // index 31: 2048x2048 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5388 |
offs_entry(L_z30, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5389 |
offs_entry(L_z29, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5390 |
offs_entry(L_z28, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5391 |
offs_entry(L_z27, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5392 |
offs_entry(L_z26, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5393 |
offs_entry(L_z25, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5394 |
offs_entry(L_z24, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5395 |
offs_entry(L_z23, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5396 |
offs_entry(L_z22, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5397 |
offs_entry(L_z21, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5398 |
offs_entry(L_z20, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5399 |
offs_entry(L_z19, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5400 |
offs_entry(L_z18, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5401 |
offs_entry(L_z17, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5402 |
offs_entry(L_z16, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5403 |
offs_entry(L_z15, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5404 |
offs_entry(L_z14, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5405 |
offs_entry(L_z13, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5406 |
offs_entry(L_z12, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5407 |
offs_entry(L_z11, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5408 |
offs_entry(L_z10, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5409 |
offs_entry(L_z09, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5410 |
offs_entry(L_z08, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5411 |
offs_entry(L_z07, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5412 |
offs_entry(L_z06, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5413 |
offs_entry(L_z05, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5414 |
offs_entry(L_z04, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5415 |
offs_entry(L_z03, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5416 |
offs_entry(L_z02, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5417 |
offs_entry(L_z01, L_zst_base); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5418 |
offs_entry(L_z00, L_zst_base); // index 0: 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5419 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5420 |
__ bind(L_mpmul_restore_4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5421 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5422 |
__ bind(L_mpmul_restore_3); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5423 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5424 |
__ bind(L_mpmul_restore_2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5425 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5426 |
__ bind(L_mpmul_restore_1); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5427 |
__ restore(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5428 |
__ bind(L_mpmul_restore_0); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5429 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5430 |
// Dispatch via offset vector entry, into z-store sequence. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5431 |
Label L_zst_rdpc; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5432 |
__ bind(L_zst_rdpc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5433 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5434 |
assert(L_zst_base.is_bound(), "must be"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5435 |
assert(L_zst_offs.is_bound(), "must be"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5436 |
assert(L_zst_rdpc.is_bound(), "must be"); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5437 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5438 |
int dbase = L_zst_rdpc.loc_pos() - L_zst_base.loc_pos(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5439 |
int doffs = L_zst_rdpc.loc_pos() - L_zst_offs.loc_pos(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5440 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5441 |
temp = gyp; // Alright to reuse 'gyp'. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5442 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5443 |
__ rdpc(addr); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5444 |
__ sub(addr, doffs, temp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5445 |
__ srlx(disp, 1, disp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5446 |
__ lduw(temp, disp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5447 |
__ sub(addr, dbase, temp); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5448 |
__ jmp(temp, offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5449 |
__ delayed()->clr(offs); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5450 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5451 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5452 |
void gen_mult_64x64(Register xp, Register xn, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5453 |
Register yp, Register yn, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5454 |
Register zp, Register zn, Label &L_exit) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5455 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5456 |
// Assuming that a stack frame has already been created, i.e. local and |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5457 |
// output registers are available for immediate use. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5458 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5459 |
const Register ri = L0; // Outer loop index, xv[i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5460 |
const Register rj = L1; // Inner loop index, yv[j] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5461 |
const Register rk = L2; // Output loop index, zv[k] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5462 |
const Register rx = L4; // x-vector datum [i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5463 |
const Register ry = L5; // y-vector datum [j] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5464 |
const Register rz = L6; // z-vector datum [k] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5465 |
const Register rc = L7; // carry over (to z-vector datum [k-1]) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5466 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5467 |
const Register lop = O0; // lo-64b product |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5468 |
const Register hip = O1; // hi-64b product |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5469 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5470 |
const Register zero = G0; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5471 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5472 |
Label L_loop_i, L_exit_loop_i; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5473 |
Label L_loop_j; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5474 |
Label L_loop_i2, L_exit_loop_i2; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5475 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5476 |
__ srlx(xn, 1, xn); // index for u32 to u64 ditto |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5477 |
__ srlx(yn, 1, yn); // index for u32 to u64 ditto |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5478 |
__ srlx(zn, 1, zn); // index for u32 to u64 ditto |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5479 |
__ dec(xn); // Adjust [0..(N/2)-1] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5480 |
__ dec(yn); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5481 |
__ dec(zn); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5482 |
__ clr(rc); // u64 c = 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5483 |
__ sllx(xn, 3, ri); // int i = xn (byte offset i = 8*xn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5484 |
__ sllx(yn, 3, rj); // int j = yn (byte offset i = 8*xn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5485 |
__ sllx(zn, 3, rk); // int k = zn (byte offset k = 8*zn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5486 |
__ ldx(yp, rj, ry); // u64 y = yp[yn] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5487 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5488 |
// for (int i = xn; i >= 0; i--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5489 |
__ bind(L_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5490 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5491 |
__ cmp_and_br_short(ri, 0, // i >= 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5492 |
Assembler::less, Assembler::pn, L_exit_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5493 |
__ ldx(xp, ri, rx); // x = xp[i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5494 |
__ mulx(rx, ry, lop); // lo-64b-part of result 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5495 |
__ umulxhi(rx, ry, hip); // hi-64b-part of result 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5496 |
__ addcc(rc, lop, lop); // Accumulate lower order bits (producing carry) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5497 |
__ addxc(hip, zero, rc); // carry over to next datum [k-1] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5498 |
__ stx(lop, zp, rk); // z[k] = lop |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5499 |
__ dec(rk, 8); // k-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5500 |
__ dec(ri, 8); // i-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5501 |
__ ba_short(L_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5502 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5503 |
__ bind(L_exit_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5504 |
__ stx(rc, zp, rk); // z[k] = c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5505 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5506 |
// for (int j = yn - 1; j >= 0; j--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5507 |
__ sllx(yn, 3, rj); // int j = yn - 1 (byte offset j = 8*yn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5508 |
__ dec(rj, 8); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5509 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5510 |
__ bind(L_loop_j); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5511 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5512 |
__ cmp_and_br_short(rj, 0, // j >= 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5513 |
Assembler::less, Assembler::pn, L_exit); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5514 |
__ clr(rc); // u64 c = 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5515 |
__ ldx(yp, rj, ry); // u64 y = yp[j] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5516 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5517 |
// for (int i = xn, k = --zn; i >= 0; i--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5518 |
__ dec(zn); // --zn |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5519 |
__ sllx(xn, 3, ri); // int i = xn (byte offset i = 8*xn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5520 |
__ sllx(zn, 3, rk); // int k = zn (byte offset k = 8*zn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5521 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5522 |
__ bind(L_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5523 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5524 |
__ cmp_and_br_short(ri, 0, // i >= 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5525 |
Assembler::less, Assembler::pn, L_exit_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5526 |
__ ldx(xp, ri, rx); // x = xp[i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5527 |
__ ldx(zp, rk, rz); // z = zp[k], accumulator |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5528 |
__ mulx(rx, ry, lop); // lo-64b-part of result 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5529 |
__ umulxhi(rx, ry, hip); // hi-64b-part of result 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5530 |
__ addcc(rz, rc, rz); // Accumulate lower order bits, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5531 |
__ addxc(hip, zero, rc); // Accumulate higher order bits to carry |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5532 |
__ addcc(rz, lop, rz); // z += lo(p) + c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5533 |
__ addxc(rc, zero, rc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5534 |
__ stx(rz, zp, rk); // zp[k] = z |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5535 |
__ dec(rk, 8); // k-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5536 |
__ dec(ri, 8); // i-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5537 |
__ ba_short(L_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5538 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5539 |
__ bind(L_exit_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5540 |
__ stx(rc, zp, rk); // z[k] = c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5541 |
__ dec(rj, 8); // j-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5542 |
__ ba_short(L_loop_j); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5543 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5544 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5545 |
void gen_mult_64x64_unaligned(Register xp, Register xn, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5546 |
Register yp, Register yn, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5547 |
Register zp, Register zn, Label &L_exit) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5548 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5549 |
// Assuming that a stack frame has already been created, i.e. local and |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5550 |
// output registers are available for use. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5551 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5552 |
const Register xpc = L0; // Outer loop cursor, xp[i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5553 |
const Register ypc = L1; // Inner loop cursor, yp[j] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5554 |
const Register zpc = L2; // Output loop cursor, zp[k] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5555 |
const Register rx = L4; // x-vector datum [i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5556 |
const Register ry = L5; // y-vector datum [j] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5557 |
const Register rz = L6; // z-vector datum [k] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5558 |
const Register rc = L7; // carry over (to z-vector datum [k-1]) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5559 |
const Register rt = O2; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5560 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5561 |
const Register lop = O0; // lo-64b product |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5562 |
const Register hip = O1; // hi-64b product |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5563 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5564 |
const Register zero = G0; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5565 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5566 |
Label L_loop_i, L_exit_loop_i; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5567 |
Label L_loop_j; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5568 |
Label L_loop_i2, L_exit_loop_i2; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5569 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5570 |
__ srlx(xn, 1, xn); // index for u32 to u64 ditto |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5571 |
__ srlx(yn, 1, yn); // index for u32 to u64 ditto |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5572 |
__ srlx(zn, 1, zn); // index for u32 to u64 ditto |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5573 |
__ dec(xn); // Adjust [0..(N/2)-1] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5574 |
__ dec(yn); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5575 |
__ dec(zn); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5576 |
__ clr(rc); // u64 c = 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5577 |
__ sllx(xn, 3, xpc); // u32* xpc = &xp[xn] (byte offset 8*xn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5578 |
__ add(xp, xpc, xpc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5579 |
__ sllx(yn, 3, ypc); // u32* ypc = &yp[yn] (byte offset 8*yn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5580 |
__ add(yp, ypc, ypc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5581 |
__ sllx(zn, 3, zpc); // u32* zpc = &zp[zn] (byte offset 8*zn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5582 |
__ add(zp, zpc, zpc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5583 |
__ lduw(ypc, 0, rt); // u64 y = yp[yn] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5584 |
__ lduw(ypc, 4, ry); // ... |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5585 |
__ sllx(rt, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5586 |
__ or3(rt, ry, ry); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5587 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5588 |
// for (int i = xn; i >= 0; i--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5589 |
__ bind(L_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5590 |
|
48304
600997105565
8191232: compiler/intrinsics/bigInteger/TestMultiplyToLen.java fails with java.lang.Exception: Failed
phedlin
parents:
48104
diff
changeset
|
5591 |
__ cmp_and_brx_short(xpc, xp,// i >= 0 |
600997105565
8191232: compiler/intrinsics/bigInteger/TestMultiplyToLen.java fails with java.lang.Exception: Failed
phedlin
parents:
48104
diff
changeset
|
5592 |
Assembler::lessUnsigned, Assembler::pn, L_exit_loop_i); |
47561
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5593 |
__ lduw(xpc, 0, rt); // u64 x = xp[i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5594 |
__ lduw(xpc, 4, rx); // ... |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5595 |
__ sllx(rt, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5596 |
__ or3(rt, rx, rx); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5597 |
__ mulx(rx, ry, lop); // lo-64b-part of result 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5598 |
__ umulxhi(rx, ry, hip); // hi-64b-part of result 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5599 |
__ addcc(rc, lop, lop); // Accumulate lower order bits (producing carry) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5600 |
__ addxc(hip, zero, rc); // carry over to next datum [k-1] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5601 |
__ srlx(lop, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5602 |
__ stw(rt, zpc, 0); // z[k] = lop |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5603 |
__ stw(lop, zpc, 4); // ... |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5604 |
__ dec(zpc, 8); // k-- (zpc--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5605 |
__ dec(xpc, 8); // i-- (xpc--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5606 |
__ ba_short(L_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5607 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5608 |
__ bind(L_exit_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5609 |
__ srlx(rc, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5610 |
__ stw(rt, zpc, 0); // z[k] = c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5611 |
__ stw(rc, zpc, 4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5612 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5613 |
// for (int j = yn - 1; j >= 0; j--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5614 |
__ sllx(yn, 3, ypc); // u32* ypc = &yp[yn] (byte offset 8*yn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5615 |
__ add(yp, ypc, ypc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5616 |
__ dec(ypc, 8); // yn - 1 (ypc--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5617 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5618 |
__ bind(L_loop_j); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5619 |
|
48304
600997105565
8191232: compiler/intrinsics/bigInteger/TestMultiplyToLen.java fails with java.lang.Exception: Failed
phedlin
parents:
48104
diff
changeset
|
5620 |
__ cmp_and_brx_short(ypc, yp,// j >= 0 |
600997105565
8191232: compiler/intrinsics/bigInteger/TestMultiplyToLen.java fails with java.lang.Exception: Failed
phedlin
parents:
48104
diff
changeset
|
5621 |
Assembler::lessUnsigned, Assembler::pn, L_exit); |
47561
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5622 |
__ clr(rc); // u64 c = 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5623 |
__ lduw(ypc, 0, rt); // u64 y = yp[j] (= *ypc) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5624 |
__ lduw(ypc, 4, ry); // ... |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5625 |
__ sllx(rt, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5626 |
__ or3(rt, ry, ry); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5627 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5628 |
// for (int i = xn, k = --zn; i >= 0; i--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5629 |
__ sllx(xn, 3, xpc); // u32* xpc = &xp[xn] (byte offset 8*xn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5630 |
__ add(xp, xpc, xpc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5631 |
__ dec(zn); // --zn |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5632 |
__ sllx(zn, 3, zpc); // u32* zpc = &zp[zn] (byte offset 8*zn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5633 |
__ add(zp, zpc, zpc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5634 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5635 |
__ bind(L_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5636 |
|
48304
600997105565
8191232: compiler/intrinsics/bigInteger/TestMultiplyToLen.java fails with java.lang.Exception: Failed
phedlin
parents:
48104
diff
changeset
|
5637 |
__ cmp_and_brx_short(xpc, xp,// i >= 0 |
600997105565
8191232: compiler/intrinsics/bigInteger/TestMultiplyToLen.java fails with java.lang.Exception: Failed
phedlin
parents:
48104
diff
changeset
|
5638 |
Assembler::lessUnsigned, Assembler::pn, L_exit_loop_i2); |
47561
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5639 |
__ lduw(xpc, 0, rt); // u64 x = xp[i] (= *xpc) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5640 |
__ lduw(xpc, 4, rx); // ... |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5641 |
__ sllx(rt, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5642 |
__ or3(rt, rx, rx); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5643 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5644 |
__ lduw(zpc, 0, rt); // u64 z = zp[k] (= *zpc) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5645 |
__ lduw(zpc, 4, rz); // ... |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5646 |
__ sllx(rt, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5647 |
__ or3(rt, rz, rz); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5648 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5649 |
__ mulx(rx, ry, lop); // lo-64b-part of result 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5650 |
__ umulxhi(rx, ry, hip); // hi-64b-part of result 64x64 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5651 |
__ addcc(rz, rc, rz); // Accumulate lower order bits... |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5652 |
__ addxc(hip, zero, rc); // Accumulate higher order bits to carry |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5653 |
__ addcc(rz, lop, rz); // ... z += lo(p) + c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5654 |
__ addxccc(rc, zero, rc); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5655 |
__ srlx(rz, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5656 |
__ stw(rt, zpc, 0); // zp[k] = z (*zpc = z) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5657 |
__ stw(rz, zpc, 4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5658 |
__ dec(zpc, 8); // k-- (zpc--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5659 |
__ dec(xpc, 8); // i-- (xpc--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5660 |
__ ba_short(L_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5661 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5662 |
__ bind(L_exit_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5663 |
__ srlx(rc, 32, rt); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5664 |
__ stw(rt, zpc, 0); // z[k] = c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5665 |
__ stw(rc, zpc, 4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5666 |
__ dec(ypc, 8); // j-- (ypc--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5667 |
__ ba_short(L_loop_j); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5668 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5669 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5670 |
void gen_mult_32x32(Register xp, Register xn, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5671 |
Register yp, Register yn, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5672 |
Register zp, Register zn, Label &L_exit) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5673 |
{ |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5674 |
// Assuming that a stack frame has already been created, i.e. local and |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5675 |
// output registers are available for use. |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5676 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5677 |
const Register ri = L0; // Outer loop index, xv[i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5678 |
const Register rj = L1; // Inner loop index, yv[j] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5679 |
const Register rk = L2; // Output loop index, zv[k] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5680 |
const Register rx = L4; // x-vector datum [i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5681 |
const Register ry = L5; // y-vector datum [j] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5682 |
const Register rz = L6; // z-vector datum [k] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5683 |
const Register rc = L7; // carry over (to z-vector datum [k-1]) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5684 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5685 |
const Register p64 = O0; // 64b product |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5686 |
const Register z65 = O1; // carry+64b accumulator |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5687 |
const Register c65 = O2; // carry at bit 65 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5688 |
const Register c33 = O2; // carry at bit 33 (after shift) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5689 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5690 |
const Register zero = G0; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5691 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5692 |
Label L_loop_i, L_exit_loop_i; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5693 |
Label L_loop_j; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5694 |
Label L_loop_i2, L_exit_loop_i2; |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5695 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5696 |
__ dec(xn); // Adjust [0..N-1] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5697 |
__ dec(yn); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5698 |
__ dec(zn); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5699 |
__ clr(rc); // u32 c = 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5700 |
__ sllx(xn, 2, ri); // int i = xn (byte offset i = 4*xn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5701 |
__ sllx(yn, 2, rj); // int j = yn (byte offset i = 4*xn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5702 |
__ sllx(zn, 2, rk); // int k = zn (byte offset k = 4*zn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5703 |
__ lduw(yp, rj, ry); // u32 y = yp[yn] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5704 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5705 |
// for (int i = xn; i >= 0; i--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5706 |
__ bind(L_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5707 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5708 |
__ cmp_and_br_short(ri, 0, // i >= 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5709 |
Assembler::less, Assembler::pn, L_exit_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5710 |
__ lduw(xp, ri, rx); // x = xp[i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5711 |
__ mulx(rx, ry, p64); // 64b result of 32x32 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5712 |
__ addcc(rc, p64, z65); // Accumulate to 65 bits (producing carry) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5713 |
__ addxc(zero, zero, c65); // Materialise carry (in bit 65) into lsb, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5714 |
__ sllx(c65, 32, c33); // and shift into bit 33 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5715 |
__ srlx(z65, 32, rc); // carry = c33 | hi(z65) >> 32 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5716 |
__ add(c33, rc, rc); // carry over to next datum [k-1] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5717 |
__ stw(z65, zp, rk); // z[k] = lo(z65) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5718 |
__ dec(rk, 4); // k-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5719 |
__ dec(ri, 4); // i-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5720 |
__ ba_short(L_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5721 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5722 |
__ bind(L_exit_loop_i); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5723 |
__ stw(rc, zp, rk); // z[k] = c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5724 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5725 |
// for (int j = yn - 1; j >= 0; j--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5726 |
__ sllx(yn, 2, rj); // int j = yn - 1 (byte offset j = 4*yn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5727 |
__ dec(rj, 4); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5728 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5729 |
__ bind(L_loop_j); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5730 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5731 |
__ cmp_and_br_short(rj, 0, // j >= 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5732 |
Assembler::less, Assembler::pn, L_exit); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5733 |
__ clr(rc); // u32 c = 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5734 |
__ lduw(yp, rj, ry); // u32 y = yp[j] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5735 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5736 |
// for (int i = xn, k = --zn; i >= 0; i--) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5737 |
__ dec(zn); // --zn |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5738 |
__ sllx(xn, 2, ri); // int i = xn (byte offset i = 4*xn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5739 |
__ sllx(zn, 2, rk); // int k = zn (byte offset k = 4*zn) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5740 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5741 |
__ bind(L_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5742 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5743 |
__ cmp_and_br_short(ri, 0, // i >= 0 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5744 |
Assembler::less, Assembler::pn, L_exit_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5745 |
__ lduw(xp, ri, rx); // x = xp[i] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5746 |
__ lduw(zp, rk, rz); // z = zp[k], accumulator |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5747 |
__ mulx(rx, ry, p64); // 64b result of 32x32 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5748 |
__ add(rz, rc, rz); // Accumulate lower order bits, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5749 |
__ addcc(rz, p64, z65); // z += lo(p64) + c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5750 |
__ addxc(zero, zero, c65); // Materialise carry (in bit 65) into lsb, |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5751 |
__ sllx(c65, 32, c33); // and shift into bit 33 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5752 |
__ srlx(z65, 32, rc); // carry = c33 | hi(z65) >> 32 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5753 |
__ add(c33, rc, rc); // carry over to next datum [k-1] |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5754 |
__ stw(z65, zp, rk); // zp[k] = lo(z65) |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5755 |
__ dec(rk, 4); // k-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5756 |
__ dec(ri, 4); // i-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5757 |
__ ba_short(L_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5758 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5759 |
__ bind(L_exit_loop_i2); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5760 |
__ stw(rc, zp, rk); // z[k] = c |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5761 |
__ dec(rj, 4); // j-- |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5762 |
__ ba_short(L_loop_j); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5763 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5764 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5765 |
|
1 | 5766 |
void generate_initial() { |
5767 |
// Generates all stubs and initializes the entry points |
|
5768 |
||
5769 |
//------------------------------------------------------------------------------------------------------------------------ |
|
5770 |
// entry points that exist in all platforms |
|
5771 |
// Note: This is code that could be shared among different platforms - however the benefit seems to be smaller than |
|
5772 |
// the disadvantage of having a much more complicated generator structure. See also comment in stubRoutines.hpp. |
|
5773 |
StubRoutines::_forward_exception_entry = generate_forward_exception(); |
|
5774 |
||
5775 |
StubRoutines::_call_stub_entry = generate_call_stub(StubRoutines::_call_stub_return_address); |
|
5776 |
StubRoutines::_catch_exception_entry = generate_catch_exception(); |
|
5777 |
||
5778 |
//------------------------------------------------------------------------------------------------------------------------ |
|
5779 |
// entry points that are platform specific |
|
5780 |
StubRoutines::Sparc::_test_stop_entry = generate_test_stop(); |
|
5781 |
||
5782 |
StubRoutines::Sparc::_stop_subroutine_entry = generate_stop_subroutine(); |
|
5783 |
StubRoutines::Sparc::_flush_callers_register_windows_entry = generate_flush_callers_register_windows(); |
|
5784 |
||
11411 | 5785 |
// Build this early so it's available for the interpreter. |
35071
a0910b1d3e0d
8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents:
34205
diff
changeset
|
5786 |
StubRoutines::_throw_StackOverflowError_entry = |
a0910b1d3e0d
8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents:
34205
diff
changeset
|
5787 |
generate_throw_exception("StackOverflowError throw_exception", |
a0910b1d3e0d
8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents:
34205
diff
changeset
|
5788 |
CAST_FROM_FN_PTR(address, SharedRuntime::throw_StackOverflowError)); |
a0910b1d3e0d
8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents:
34205
diff
changeset
|
5789 |
StubRoutines::_throw_delayed_StackOverflowError_entry = |
a0910b1d3e0d
8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents:
34205
diff
changeset
|
5790 |
generate_throw_exception("delayed StackOverflowError throw_exception", |
a0910b1d3e0d
8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents:
34205
diff
changeset
|
5791 |
CAST_FROM_FN_PTR(address, SharedRuntime::throw_delayed_StackOverflowError)); |
34205 | 5792 |
|
5793 |
if (UseCRC32Intrinsics) { |
|
5794 |
// set table address before stub generation which use it |
|
5795 |
StubRoutines::_crc_table_adr = (address)StubRoutines::Sparc::_crc_table; |
|
5796 |
StubRoutines::_updateBytesCRC32 = generate_updateBytesCRC32(); |
|
5797 |
} |
|
38237
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
37466
diff
changeset
|
5798 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
37466
diff
changeset
|
5799 |
if (UseCRC32CIntrinsics) { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
37466
diff
changeset
|
5800 |
// set table address before stub generation which use it |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
37466
diff
changeset
|
5801 |
StubRoutines::_crc32c_table_addr = (address)StubRoutines::Sparc::_crc32c_table; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
37466
diff
changeset
|
5802 |
StubRoutines::_updateBytesCRC32C = generate_updateBytesCRC32C(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
37466
diff
changeset
|
5803 |
} |
1 | 5804 |
} |
5805 |
||
5806 |
||
5807 |
void generate_all() { |
|
5808 |
// Generates all stubs and initializes the entry points |
|
5809 |
||
2254
f13dda645a4b
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
1502
diff
changeset
|
5810 |
// Generate partial_subtype_check first here since its code depends on |
f13dda645a4b
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
1502
diff
changeset
|
5811 |
// UseZeroBaseCompressedOops which is defined after heap initialization. |
f13dda645a4b
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
1502
diff
changeset
|
5812 |
StubRoutines::Sparc::_partial_subtype_check = generate_partial_subtype_check(); |
1 | 5813 |
// These entry points require SharedInfo::stack0 to be set up in non-core builds |
10545 | 5814 |
StubRoutines::_throw_AbstractMethodError_entry = generate_throw_exception("AbstractMethodError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_AbstractMethodError)); |
5815 |
StubRoutines::_throw_IncompatibleClassChangeError_entry= generate_throw_exception("IncompatibleClassChangeError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_IncompatibleClassChangeError)); |
|
5816 |
StubRoutines::_throw_NullPointerException_at_call_entry= generate_throw_exception("NullPointerException at call throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_NullPointerException_at_call)); |
|
1 | 5817 |
|
5818 |
// support for verify_oop (must happen after universe_init) |
|
5819 |
StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop_subroutine(); |
|
5820 |
||
5821 |
// arraycopy stubs used by compilers |
|
5822 |
generate_arraycopy_stubs(); |
|
4645
0c5f5b94e93a
6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents:
2571
diff
changeset
|
5823 |
|
0c5f5b94e93a
6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents:
2571
diff
changeset
|
5824 |
// Don't initialize the platform math functions since sparc |
0c5f5b94e93a
6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents:
2571
diff
changeset
|
5825 |
// doesn't have intrinsics for these operations. |
18740 | 5826 |
|
5827 |
// Safefetch stubs. |
|
5828 |
generate_safefetch("SafeFetch32", sizeof(int), &StubRoutines::_safefetch32_entry, |
|
5829 |
&StubRoutines::_safefetch32_fault_pc, |
|
5830 |
&StubRoutines::_safefetch32_continuation_pc); |
|
5831 |
generate_safefetch("SafeFetchN", sizeof(intptr_t), &StubRoutines::_safefetchN_entry, |
|
5832 |
&StubRoutines::_safefetchN_fault_pc, |
|
5833 |
&StubRoutines::_safefetchN_continuation_pc); |
|
22505 | 5834 |
|
5835 |
// generate AES intrinsics code |
|
5836 |
if (UseAESIntrinsics) { |
|
5837 |
StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock(); |
|
5838 |
StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock(); |
|
5839 |
StubRoutines::_cipherBlockChaining_encryptAESCrypt = generate_cipherBlockChaining_encryptAESCrypt(); |
|
5840 |
StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptAESCrypt_Parallel(); |
|
5841 |
} |
|
31404
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
5842 |
// generate GHASH intrinsics code |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
5843 |
if (UseGHASHIntrinsics) { |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
5844 |
StubRoutines::_ghash_processBlocks = generate_ghash_processBlocks(); |
63e8fcd70bfc
8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
ascarpino
parents:
29695
diff
changeset
|
5845 |
} |
24953
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5846 |
|
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5847 |
// generate SHA1/SHA256/SHA512 intrinsics code |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5848 |
if (UseSHA1Intrinsics) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5849 |
StubRoutines::_sha1_implCompress = generate_sha1_implCompress(false, "sha1_implCompress"); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5850 |
StubRoutines::_sha1_implCompressMB = generate_sha1_implCompress(true, "sha1_implCompressMB"); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5851 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5852 |
if (UseSHA256Intrinsics) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5853 |
StubRoutines::_sha256_implCompress = generate_sha256_implCompress(false, "sha256_implCompress"); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5854 |
StubRoutines::_sha256_implCompressMB = generate_sha256_implCompress(true, "sha256_implCompressMB"); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5855 |
} |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5856 |
if (UseSHA512Intrinsics) { |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5857 |
StubRoutines::_sha512_implCompress = generate_sha512_implCompress(false, "sha512_implCompress"); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5858 |
StubRoutines::_sha512_implCompressMB = generate_sha512_implCompress(true, "sha512_implCompressMB"); |
9680119572be
8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents:
24488
diff
changeset
|
5859 |
} |
32581 | 5860 |
// generate Adler32 intrinsics code |
5861 |
if (UseAdler32Intrinsics) { |
|
5862 |
StubRoutines::_updateBytesAdler32 = generate_updateBytesAdler32(); |
|
5863 |
} |
|
47561
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5864 |
|
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5865 |
#ifdef COMPILER2 |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5866 |
// Intrinsics supported by C2 only: |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5867 |
if (UseMultiplyToLenIntrinsic) { |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5868 |
StubRoutines::_multiplyToLen = generate_multiplyToLen(); |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5869 |
} |
f59f0e51ef8a
8167199: Add C2 SPARC intrinsic for BigInteger::multiplyToLen() method.
neliasso
parents:
47216
diff
changeset
|
5870 |
#endif // COMPILER2 |
1 | 5871 |
} |
5872 |
||
5873 |
public: |
|
5874 |
StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) { |
|
5875 |
// replace the standard masm with a special one: |
|
5876 |
_masm = new MacroAssembler(code); |
|
5877 |
||
5878 |
_stub_count = !all ? 0x100 : 0x200; |
|
5879 |
if (all) { |
|
5880 |
generate_all(); |
|
5881 |
} else { |
|
5882 |
generate_initial(); |
|
5883 |
} |
|
5884 |
||
5885 |
// make sure this stub is available for all local calls |
|
5886 |
if (_atomic_add_stub.is_unbound()) { |
|
5887 |
// generate a second time, if necessary |
|
5888 |
(void) generate_atomic_add(); |
|
5889 |
} |
|
5890 |
} |
|
5891 |
||
5892 |
||
5893 |
private: |
|
5894 |
int _stub_count; |
|
5895 |
void stub_prolog(StubCodeDesc* cdesc) { |
|
5896 |
# ifdef ASSERT |
|
5897 |
// put extra information in the stub code, to make it more readable |
|
46462 | 5898 |
// Write the high part of the address |
5899 |
// [RGV] Check if there is a dependency on the size of this prolog |
|
1 | 5900 |
__ emit_data((intptr_t)cdesc >> 32, relocInfo::none); |
5901 |
__ emit_data((intptr_t)cdesc, relocInfo::none); |
|
5902 |
__ emit_data(++_stub_count, relocInfo::none); |
|
5903 |
# endif |
|
5904 |
align(true); |
|
5905 |
} |
|
5906 |
||
5907 |
void align(bool at_header = false) { |
|
5908 |
// %%%%% move this constant somewhere else |
|
5909 |
// UltraSPARC cache line size is 8 instructions: |
|
5910 |
const unsigned int icache_line_size = 32; |
|
5911 |
const unsigned int icache_half_line_size = 16; |
|
5912 |
||
5913 |
if (at_header) { |
|
5914 |
while ((intptr_t)(__ pc()) % icache_line_size != 0) { |
|
5915 |
__ emit_data(0, relocInfo::none); |
|
5916 |
} |
|
5917 |
} else { |
|
5918 |
while ((intptr_t)(__ pc()) % icache_half_line_size != 0) { |
|
5919 |
__ nop(); |
|
5920 |
} |
|
5921 |
} |
|
5922 |
} |
|
5923 |
||
5924 |
}; // end class declaration |
|
5925 |
||
5926 |
void StubGenerator_generate(CodeBuffer* code, bool all) { |
|
5927 |
StubGenerator g(code, all); |
|
5928 |
} |