src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp
author fyang
Thu, 14 Nov 2019 15:07:37 +0800
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child 59122 5d73255c2d52
permissions -rw-r--r--
8233912: aarch64: minor improvements of atomic operations Reviewed-by: aph
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/*
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 * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
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 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef OS_CPU_LINUX_AARCH64_ATOMIC_LINUX_AARCH64_HPP
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#define OS_CPU_LINUX_AARCH64_ATOMIC_LINUX_AARCH64_HPP
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#include "vm_version_aarch64.hpp"
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// Implementation of class atomic
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// Note that memory_order_conservative requires a full barrier after atomic stores.
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// See https://patchwork.kernel.org/patch/3575821/
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#define FULL_MEM_BARRIER  __sync_synchronize()
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#define READ_MEM_BARRIER  __atomic_thread_fence(__ATOMIC_ACQUIRE);
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#define WRITE_MEM_BARRIER __atomic_thread_fence(__ATOMIC_RELEASE);
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template<size_t byte_size>
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struct Atomic::PlatformAdd
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  : Atomic::AddAndFetch<Atomic::PlatformAdd<byte_size> >
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{
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  template<typename I, typename D>
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  D add_and_fetch(I add_value, D volatile* dest, atomic_memory_order order) const {
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    D res = __atomic_add_fetch(dest, add_value, __ATOMIC_RELEASE);
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    FULL_MEM_BARRIER;
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    return res;
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  }
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};
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template<size_t byte_size>
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template<typename T>
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inline T Atomic::PlatformXchg<byte_size>::operator()(T exchange_value,
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                                                     T volatile* dest,
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                                                     atomic_memory_order order) const {
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  STATIC_ASSERT(byte_size == sizeof(T));
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  T res = __atomic_exchange_n(dest, exchange_value, __ATOMIC_RELEASE);
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  FULL_MEM_BARRIER;
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  return res;
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}
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template<size_t byte_size>
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template<typename T>
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inline T Atomic::PlatformCmpxchg<byte_size>::operator()(T exchange_value,
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                                                        T volatile* dest,
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                                                        T compare_value,
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                                                        atomic_memory_order order) const {
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  STATIC_ASSERT(byte_size == sizeof(T));
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  if (order == memory_order_relaxed) {
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    T value = compare_value;
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    __atomic_compare_exchange(dest, &value, &exchange_value, /*weak*/false,
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                              __ATOMIC_RELAXED, __ATOMIC_RELAXED);
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    return value;
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  } else {
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    T value = compare_value;
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    FULL_MEM_BARRIER;
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    __atomic_compare_exchange(dest, &value, &exchange_value, /*weak*/false,
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                              __ATOMIC_RELAXED, __ATOMIC_RELAXED);
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    FULL_MEM_BARRIER;
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    return value;
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  }
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}
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#endif // OS_CPU_LINUX_AARCH64_ATOMIC_LINUX_AARCH64_HPP