author | iveresov |
Wed, 16 May 2018 15:19:28 -0700 | |
changeset 50153 | 9010b580d8a9 |
parent 49933 | c63bdf53a1a7 |
child 50380 | bec342339138 |
permissions | -rw-r--r-- |
1 | 1 |
/* |
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* Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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||
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#include "precompiled.hpp" |
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#include "c1/c1_Compilation.hpp" |
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#include "c1/c1_FrameMap.hpp" |
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#include "c1/c1_Instruction.hpp" |
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#include "c1/c1_LIRAssembler.hpp" |
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#include "c1/c1_LIRGenerator.hpp" |
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#include "c1/c1_Runtime1.hpp" |
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#include "c1/c1_ValueStack.hpp" |
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#include "ci/ciArray.hpp" |
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#include "ci/ciObjArrayKlass.hpp" |
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#include "ci/ciTypeArrayKlass.hpp" |
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#include "runtime/safepointMechanism.hpp" |
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#include "runtime/sharedRuntime.hpp" |
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#include "runtime/stubRoutines.hpp" |
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#include "vmreg_sparc.inline.hpp" |
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#ifdef ASSERT |
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#define __ gen()->lir(__FILE__, __LINE__)-> |
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#else |
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#define __ gen()->lir()-> |
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#endif |
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void LIRItem::load_byte_item() { |
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// byte loads use same registers as other loads |
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load_item(); |
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} |
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void LIRItem::load_nonconstant() { |
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LIR_Opr r = value()->operand(); |
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if (_gen->can_inline_as_constant(value())) { |
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if (!r->is_constant()) { |
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r = LIR_OprFact::value_type(value()->type()); |
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} |
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_result = r; |
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} else { |
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load_item(); |
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} |
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} |
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//-------------------------------------------------------------- |
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// LIRGenerator |
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//-------------------------------------------------------------- |
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LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; } |
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LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; } |
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LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); } |
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LIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); } |
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LIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(T_LONG); } |
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LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { |
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LIR_Opr opr; |
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switch (type->tag()) { |
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case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break; |
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case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break; |
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case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break; |
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case floatTag: opr = FrameMap::F0_opr; break; |
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case doubleTag: opr = FrameMap::F0_double_opr; break; |
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case addressTag: |
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default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; |
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} |
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assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); |
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return opr; |
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} |
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LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) { |
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LIR_Opr reg = new_register(type); |
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set_vreg_flag(reg, callee_saved); |
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return reg; |
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} |
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LIR_Opr LIRGenerator::rlock_byte(BasicType type) { |
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return new_register(T_INT); |
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} |
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//--------- loading items into registers -------------------------------- |
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// SPARC cannot inline all constants |
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bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { |
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if (v->type()->as_IntConstant() != NULL) { |
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return v->type()->as_IntConstant()->value() == 0; |
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} else if (v->type()->as_LongConstant() != NULL) { |
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return v->type()->as_LongConstant()->value() == 0L; |
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} else if (v->type()->as_ObjectConstant() != NULL) { |
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return v->type()->as_ObjectConstant()->value()->is_null_object(); |
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} else { |
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return false; |
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} |
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} |
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// only simm13 constants can be inlined |
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bool LIRGenerator:: can_inline_as_constant(Value i) const { |
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if (i->type()->as_IntConstant() != NULL) { |
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return Assembler::is_simm13(i->type()->as_IntConstant()->value()); |
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128 |
} else { |
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return can_store_as_constant(i, as_BasicType(i->type())); |
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} |
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} |
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bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const { |
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if (c->type() == T_INT) { |
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return Assembler::is_simm13(c->as_jint()); |
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} |
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return false; |
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} |
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LIR_Opr LIRGenerator::safepoint_poll_register() { |
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return new_register(T_INT); |
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} |
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LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, |
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int shift, int disp, BasicType type) { |
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assert(base->is_register(), "must be"); |
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intx large_disp = disp; |
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// accumulate fixed displacements |
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if (index->is_constant()) { |
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large_disp += (intx)(index->as_constant_ptr()->as_jint()) << shift; |
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index = LIR_OprFact::illegalOpr; |
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} |
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159 |
if (index->is_register()) { |
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// apply the shift and accumulate the displacement |
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if (shift > 0) { |
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LIR_Opr tmp = new_pointer_register(); |
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__ shift_left(index, shift, tmp); |
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index = tmp; |
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} |
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if (large_disp != 0) { |
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LIR_Opr tmp = new_pointer_register(); |
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if (Assembler::is_simm13(large_disp)) { |
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__ add(tmp, LIR_OprFact::intptrConst(large_disp), tmp); |
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index = tmp; |
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} else { |
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__ move(LIR_OprFact::intptrConst(large_disp), tmp); |
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__ add(tmp, index, tmp); |
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index = tmp; |
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} |
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large_disp = 0; |
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} |
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} else if (large_disp != 0 && !Assembler::is_simm13(large_disp)) { |
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// index is illegal so replace it with the displacement loaded into a register |
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index = new_pointer_register(); |
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__ move(LIR_OprFact::intptrConst(large_disp), index); |
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large_disp = 0; |
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} |
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// at this point we either have base + index or base + displacement |
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if (large_disp == 0) { |
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return new LIR_Address(base, index, type); |
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} else { |
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assert(Assembler::is_simm13(large_disp), "must be"); |
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return new LIR_Address(base, large_disp, type); |
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} |
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} |
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LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, |
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BasicType type) { |
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int elem_size = type2aelembytes(type); |
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int shift = exact_log2(elem_size); |
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LIR_Opr base_opr; |
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intx offset = arrayOopDesc::base_offset_in_bytes(type); |
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if (index_opr->is_constant()) { |
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intx i = index_opr->as_constant_ptr()->as_jint(); |
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intx array_offset = i * elem_size; |
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if (Assembler::is_simm13(array_offset + offset)) { |
207 |
base_opr = array_opr; |
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offset = array_offset + offset; |
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} else { |
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base_opr = new_pointer_register(); |
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if (Assembler::is_simm13(array_offset)) { |
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__ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr); |
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} else { |
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__ move(LIR_OprFact::intptrConst(array_offset), base_opr); |
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__ add(base_opr, array_opr, base_opr); |
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} |
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} |
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} else { |
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if (index_opr->type() == T_INT) { |
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LIR_Opr tmp = new_register(T_LONG); |
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__ convert(Bytecodes::_i2l, index_opr, tmp); |
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index_opr = tmp; |
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} |
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224 |
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225 |
base_opr = new_pointer_register(); |
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226 |
assert (index_opr->is_register(), "Must be register"); |
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227 |
if (shift > 0) { |
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__ shift_left(index_opr, shift, base_opr); |
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__ add(base_opr, array_opr, base_opr); |
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230 |
} else { |
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231 |
__ add(index_opr, array_opr, base_opr); |
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232 |
} |
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233 |
} |
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return new LIR_Address(base_opr, offset, type); |
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1 | 236 |
} |
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6453 | 238 |
LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { |
239 |
LIR_Opr r; |
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240 |
if (type == T_LONG) { |
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241 |
r = LIR_OprFact::longConst(x); |
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242 |
} else if (type == T_INT) { |
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r = LIR_OprFact::intConst(x); |
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244 |
} else { |
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245 |
ShouldNotReachHere(); |
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246 |
} |
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247 |
if (!Assembler::is_simm13(x)) { |
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248 |
LIR_Opr tmp = new_register(type); |
|
249 |
__ move(r, tmp); |
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250 |
return tmp; |
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251 |
} |
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252 |
return r; |
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253 |
} |
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1 | 254 |
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6453 | 255 |
void LIRGenerator::increment_counter(address counter, BasicType type, int step) { |
1 | 256 |
LIR_Opr pointer = new_pointer_register(); |
257 |
__ move(LIR_OprFact::intptrConst(counter), pointer); |
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6453 | 258 |
LIR_Address* addr = new LIR_Address(pointer, type); |
1 | 259 |
increment_counter(addr, step); |
260 |
} |
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261 |
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262 |
void LIRGenerator::increment_counter(LIR_Address* addr, int step) { |
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6453 | 263 |
LIR_Opr temp = new_register(addr->type()); |
1 | 264 |
__ move(addr, temp); |
6453 | 265 |
__ add(temp, load_immediate(step, addr->type()), temp); |
1 | 266 |
__ move(temp, addr); |
267 |
} |
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268 |
||
269 |
void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { |
|
270 |
LIR_Opr o7opr = FrameMap::O7_opr; |
|
271 |
__ load(new LIR_Address(base, disp, T_INT), o7opr, info); |
|
272 |
__ cmp(condition, o7opr, c); |
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273 |
} |
|
274 |
||
275 |
||
276 |
void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { |
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277 |
LIR_Opr o7opr = FrameMap::O7_opr; |
|
278 |
__ load(new LIR_Address(base, disp, type), o7opr, info); |
|
279 |
__ cmp(condition, reg, o7opr); |
|
280 |
} |
|
281 |
||
282 |
||
283 |
bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { |
|
284 |
assert(left != result, "should be different registers"); |
|
285 |
if (is_power_of_2(c + 1)) { |
|
286 |
__ shift_left(left, log2_intptr(c + 1), result); |
|
287 |
__ sub(result, left, result); |
|
288 |
return true; |
|
289 |
} else if (is_power_of_2(c - 1)) { |
|
290 |
__ shift_left(left, log2_intptr(c - 1), result); |
|
291 |
__ add(result, left, result); |
|
292 |
return true; |
|
293 |
} |
|
294 |
return false; |
|
295 |
} |
|
296 |
||
297 |
||
298 |
void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { |
|
299 |
BasicType t = item->type(); |
|
300 |
LIR_Opr sp_opr = FrameMap::SP_opr; |
|
301 |
if ((t == T_LONG || t == T_DOUBLE) && |
|
302 |
((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) { |
|
303 |
__ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t)); |
|
304 |
} else { |
|
305 |
__ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t)); |
|
306 |
} |
|
307 |
} |
|
308 |
||
49906 | 309 |
void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) { |
310 |
LIR_Opr tmp1 = FrameMap::G1_opr; |
|
311 |
LIR_Opr tmp2 = FrameMap::G3_opr; |
|
312 |
LIR_Opr tmp3 = FrameMap::G5_opr; |
|
313 |
__ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci); |
|
314 |
} |
|
315 |
||
1 | 316 |
//---------------------------------------------------------------------- |
317 |
// visitor functions |
|
318 |
//---------------------------------------------------------------------- |
|
319 |
||
320 |
void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { |
|
6745 | 321 |
assert(x->is_pinned(),""); |
1 | 322 |
LIRItem obj(x->obj(), this); |
323 |
obj.load_item(); |
|
324 |
||
325 |
set_no_result(x); |
|
326 |
||
327 |
LIR_Opr lock = FrameMap::G1_opr; |
|
328 |
LIR_Opr scratch = FrameMap::G3_opr; |
|
329 |
LIR_Opr hdr = FrameMap::G4_opr; |
|
330 |
||
331 |
CodeEmitInfo* info_for_exception = NULL; |
|
332 |
if (x->needs_null_check()) { |
|
6745 | 333 |
info_for_exception = state_for(x); |
1 | 334 |
} |
335 |
||
336 |
// this CodeEmitInfo must not have the xhandlers because here the |
|
337 |
// object is already locked (xhandlers expects object to be unlocked) |
|
338 |
CodeEmitInfo* info = state_for(x, x->state(), true); |
|
339 |
monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info); |
|
340 |
} |
|
341 |
||
342 |
||
343 |
void LIRGenerator::do_MonitorExit(MonitorExit* x) { |
|
6745 | 344 |
assert(x->is_pinned(),""); |
1 | 345 |
LIRItem obj(x->obj(), this); |
346 |
obj.dont_load_item(); |
|
347 |
||
348 |
set_no_result(x); |
|
349 |
LIR_Opr lock = FrameMap::G1_opr; |
|
350 |
LIR_Opr hdr = FrameMap::G3_opr; |
|
351 |
LIR_Opr obj_temp = FrameMap::G4_opr; |
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monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no()); |
1 | 353 |
} |
354 |
||
355 |
||
356 |
// _ineg, _lneg, _fneg, _dneg |
|
357 |
void LIRGenerator::do_NegateOp(NegateOp* x) { |
|
358 |
LIRItem value(x->x(), this); |
|
359 |
value.load_item(); |
|
360 |
LIR_Opr reg = rlock_result(x); |
|
361 |
__ negate(value.result(), reg); |
|
362 |
} |
|
363 |
||
364 |
||
365 |
||
366 |
// for _fadd, _fmul, _fsub, _fdiv, _frem |
|
367 |
// _dadd, _dmul, _dsub, _ddiv, _drem |
|
368 |
void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { |
|
369 |
switch (x->op()) { |
|
370 |
case Bytecodes::_fadd: |
|
371 |
case Bytecodes::_fmul: |
|
372 |
case Bytecodes::_fsub: |
|
373 |
case Bytecodes::_fdiv: |
|
374 |
case Bytecodes::_dadd: |
|
375 |
case Bytecodes::_dmul: |
|
376 |
case Bytecodes::_dsub: |
|
377 |
case Bytecodes::_ddiv: { |
|
378 |
LIRItem left(x->x(), this); |
|
379 |
LIRItem right(x->y(), this); |
|
380 |
left.load_item(); |
|
381 |
right.load_item(); |
|
382 |
rlock_result(x); |
|
383 |
arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp()); |
|
384 |
} |
|
385 |
break; |
|
386 |
||
387 |
case Bytecodes::_frem: |
|
388 |
case Bytecodes::_drem: { |
|
389 |
address entry; |
|
390 |
switch (x->op()) { |
|
391 |
case Bytecodes::_frem: |
|
392 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem); |
|
393 |
break; |
|
394 |
case Bytecodes::_drem: |
|
395 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem); |
|
396 |
break; |
|
397 |
default: |
|
398 |
ShouldNotReachHere(); |
|
399 |
} |
|
400 |
LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL); |
|
401 |
set_result(x, result); |
|
402 |
} |
|
403 |
break; |
|
404 |
||
405 |
default: ShouldNotReachHere(); |
|
406 |
} |
|
407 |
} |
|
408 |
||
409 |
||
410 |
// for _ladd, _lmul, _lsub, _ldiv, _lrem |
|
411 |
void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { |
|
412 |
switch (x->op()) { |
|
413 |
case Bytecodes::_lrem: |
|
414 |
case Bytecodes::_lmul: |
|
415 |
case Bytecodes::_ldiv: { |
|
416 |
||
417 |
if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) { |
|
418 |
LIRItem right(x->y(), this); |
|
419 |
right.load_item(); |
|
420 |
||
421 |
CodeEmitInfo* info = state_for(x); |
|
422 |
LIR_Opr item = right.result(); |
|
423 |
assert(item->is_register(), "must be"); |
|
424 |
__ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0)); |
|
425 |
__ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); |
|
426 |
} |
|
427 |
||
428 |
address entry; |
|
429 |
switch (x->op()) { |
|
430 |
case Bytecodes::_lrem: |
|
431 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); |
|
432 |
break; // check if dividend is 0 is done elsewhere |
|
433 |
case Bytecodes::_ldiv: |
|
434 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); |
|
435 |
break; // check if dividend is 0 is done elsewhere |
|
436 |
case Bytecodes::_lmul: |
|
437 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); |
|
438 |
break; |
|
439 |
default: |
|
440 |
ShouldNotReachHere(); |
|
441 |
} |
|
442 |
||
443 |
// order of arguments to runtime call is reversed. |
|
444 |
LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL); |
|
445 |
set_result(x, result); |
|
446 |
break; |
|
447 |
} |
|
448 |
case Bytecodes::_ladd: |
|
449 |
case Bytecodes::_lsub: { |
|
450 |
LIRItem left(x->x(), this); |
|
451 |
LIRItem right(x->y(), this); |
|
452 |
left.load_item(); |
|
453 |
right.load_item(); |
|
454 |
rlock_result(x); |
|
455 |
||
456 |
arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); |
|
457 |
break; |
|
458 |
} |
|
459 |
default: ShouldNotReachHere(); |
|
460 |
} |
|
461 |
} |
|
462 |
||
463 |
||
464 |
// Returns if item is an int constant that can be represented by a simm13 |
|
465 |
static bool is_simm13(LIR_Opr item) { |
|
466 |
if (item->is_constant() && item->type() == T_INT) { |
|
467 |
return Assembler::is_simm13(item->as_constant_ptr()->as_jint()); |
|
468 |
} else { |
|
469 |
return false; |
|
470 |
} |
|
471 |
} |
|
472 |
||
473 |
||
474 |
// for: _iadd, _imul, _isub, _idiv, _irem |
|
475 |
void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { |
|
476 |
bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem; |
|
477 |
LIRItem left(x->x(), this); |
|
478 |
LIRItem right(x->y(), this); |
|
479 |
// missing test if instr is commutative and if we should swap |
|
480 |
right.load_nonconstant(); |
|
481 |
assert(right.is_constant() || right.is_register(), "wrong state of right"); |
|
482 |
left.load_item(); |
|
483 |
rlock_result(x); |
|
484 |
if (is_div_rem) { |
|
485 |
CodeEmitInfo* info = state_for(x); |
|
486 |
LIR_Opr tmp = FrameMap::G1_opr; |
|
487 |
if (x->op() == Bytecodes::_irem) { |
|
488 |
__ irem(left.result(), right.result(), x->operand(), tmp, info); |
|
489 |
} else if (x->op() == Bytecodes::_idiv) { |
|
490 |
__ idiv(left.result(), right.result(), x->operand(), tmp, info); |
|
491 |
} |
|
492 |
} else { |
|
493 |
arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr); |
|
494 |
} |
|
495 |
} |
|
496 |
||
497 |
||
498 |
void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { |
|
499 |
ValueTag tag = x->type()->tag(); |
|
500 |
assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); |
|
501 |
switch (tag) { |
|
502 |
case floatTag: |
|
503 |
case doubleTag: do_ArithmeticOp_FPU(x); return; |
|
504 |
case longTag: do_ArithmeticOp_Long(x); return; |
|
505 |
case intTag: do_ArithmeticOp_Int(x); return; |
|
506 |
} |
|
507 |
ShouldNotReachHere(); |
|
508 |
} |
|
509 |
||
510 |
||
511 |
// _ishl, _lshl, _ishr, _lshr, _iushr, _lushr |
|
512 |
void LIRGenerator::do_ShiftOp(ShiftOp* x) { |
|
513 |
LIRItem value(x->x(), this); |
|
514 |
LIRItem count(x->y(), this); |
|
515 |
// Long shift destroys count register |
|
516 |
if (value.type()->is_long()) { |
|
517 |
count.set_destroys_register(); |
|
518 |
} |
|
519 |
value.load_item(); |
|
520 |
// the old backend doesn't support this |
|
521 |
if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) { |
|
522 |
jint c = count.get_jint_constant() & 0x1f; |
|
523 |
assert(c >= 0 && c < 32, "should be small"); |
|
524 |
count.dont_load_item(); |
|
525 |
} else { |
|
526 |
count.load_item(); |
|
527 |
} |
|
528 |
LIR_Opr reg = rlock_result(x); |
|
529 |
shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); |
|
530 |
} |
|
531 |
||
532 |
||
533 |
// _iand, _land, _ior, _lor, _ixor, _lxor |
|
534 |
void LIRGenerator::do_LogicOp(LogicOp* x) { |
|
535 |
LIRItem left(x->x(), this); |
|
536 |
LIRItem right(x->y(), this); |
|
537 |
||
538 |
left.load_item(); |
|
539 |
right.load_nonconstant(); |
|
540 |
LIR_Opr reg = rlock_result(x); |
|
541 |
||
542 |
logic_op(x->op(), reg, left.result(), right.result()); |
|
543 |
} |
|
544 |
||
545 |
||
546 |
||
547 |
// _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg |
|
548 |
void LIRGenerator::do_CompareOp(CompareOp* x) { |
|
549 |
LIRItem left(x->x(), this); |
|
550 |
LIRItem right(x->y(), this); |
|
551 |
left.load_item(); |
|
552 |
right.load_item(); |
|
553 |
LIR_Opr reg = rlock_result(x); |
|
554 |
if (x->x()->type()->is_float_kind()) { |
|
555 |
Bytecodes::Code code = x->op(); |
|
556 |
__ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); |
|
557 |
} else if (x->x()->type()->tag() == longTag) { |
|
558 |
__ lcmp2int(left.result(), right.result(), reg); |
|
559 |
} else { |
|
560 |
Unimplemented(); |
|
561 |
} |
|
562 |
} |
|
563 |
||
49906 | 564 |
LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) { |
565 |
LIR_Opr result = new_register(T_INT); |
|
1 | 566 |
LIR_Opr t1 = FrameMap::G1_opr; |
567 |
LIR_Opr t2 = FrameMap::G3_opr; |
|
49906 | 568 |
cmp_value.load_item(); |
569 |
new_value.load_item(); |
|
570 |
if (type == T_OBJECT || type == T_ARRAY) { |
|
571 |
__ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2); |
|
572 |
} else if (type == T_INT) { |
|
573 |
__ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2); |
|
574 |
} else if (type == T_LONG) { |
|
575 |
__ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2); |
|
576 |
} else { |
|
577 |
Unimplemented(); |
|
578 |
} |
|
579 |
__ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), |
|
580 |
result, type); |
|
581 |
return result; |
|
582 |
} |
|
1 | 583 |
|
49906 | 584 |
LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) { |
585 |
bool is_obj = type == T_OBJECT || type == T_ARRAY; |
|
586 |
LIR_Opr result = new_register(type); |
|
587 |
LIR_Opr tmp = LIR_OprFact::illegalOpr; |
|
1 | 588 |
|
49906 | 589 |
value.load_item(); |
1 | 590 |
|
49906 | 591 |
if (is_obj) { |
592 |
tmp = FrameMap::G3_opr; |
|
1374
4c24294029a9
6711316: Open source the Garbage-First garbage collector
ysr
parents:
202
diff
changeset
|
593 |
} |
4c24294029a9
6711316: Open source the Garbage-First garbage collector
ysr
parents:
202
diff
changeset
|
594 |
|
49906 | 595 |
// Because we want a 2-arg form of xchg |
596 |
__ move(value.result(), result); |
|
597 |
__ xchg(addr, result, result, tmp); |
|
598 |
return result; |
|
1 | 599 |
} |
600 |
||
49906 | 601 |
LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) { |
602 |
Unimplemented(); |
|
603 |
return LIR_OprFact::illegalOpr; |
|
604 |
} |
|
1 | 605 |
|
606 |
void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { |
|
607 |
switch (x->id()) { |
|
608 |
case vmIntrinsics::_dabs: |
|
609 |
case vmIntrinsics::_dsqrt: { |
|
610 |
assert(x->number_of_arguments() == 1, "wrong type"); |
|
611 |
LIRItem value(x->argument_at(0), this); |
|
612 |
value.load_item(); |
|
613 |
LIR_Opr dst = rlock_result(x); |
|
614 |
||
615 |
switch (x->id()) { |
|
616 |
case vmIntrinsics::_dsqrt: { |
|
617 |
__ sqrt(value.result(), dst, LIR_OprFact::illegalOpr); |
|
618 |
break; |
|
619 |
} |
|
620 |
case vmIntrinsics::_dabs: { |
|
621 |
__ abs(value.result(), dst, LIR_OprFact::illegalOpr); |
|
622 |
break; |
|
623 |
} |
|
624 |
} |
|
625 |
break; |
|
626 |
} |
|
627 |
case vmIntrinsics::_dlog10: // fall through |
|
628 |
case vmIntrinsics::_dlog: // fall through |
|
629 |
case vmIntrinsics::_dsin: // fall through |
|
630 |
case vmIntrinsics::_dtan: // fall through |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
631 |
case vmIntrinsics::_dcos: // fall through |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
632 |
case vmIntrinsics::_dexp: { |
1 | 633 |
assert(x->number_of_arguments() == 1, "wrong type"); |
634 |
||
635 |
address runtime_entry = NULL; |
|
636 |
switch (x->id()) { |
|
637 |
case vmIntrinsics::_dsin: |
|
638 |
runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin); |
|
639 |
break; |
|
640 |
case vmIntrinsics::_dcos: |
|
641 |
runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos); |
|
642 |
break; |
|
643 |
case vmIntrinsics::_dtan: |
|
644 |
runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan); |
|
645 |
break; |
|
646 |
case vmIntrinsics::_dlog: |
|
647 |
runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog); |
|
648 |
break; |
|
649 |
case vmIntrinsics::_dlog10: |
|
650 |
runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10); |
|
651 |
break; |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
652 |
case vmIntrinsics::_dexp: |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
653 |
runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp); |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
654 |
break; |
1 | 655 |
default: |
656 |
ShouldNotReachHere(); |
|
657 |
} |
|
658 |
||
659 |
LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL); |
|
660 |
set_result(x, result); |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
661 |
break; |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
662 |
} |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
663 |
case vmIntrinsics::_dpow: { |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
664 |
assert(x->number_of_arguments() == 2, "wrong type"); |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
665 |
address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow); |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
666 |
LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL); |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
667 |
set_result(x, result); |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
10562
diff
changeset
|
668 |
break; |
1 | 669 |
} |
670 |
} |
|
671 |
} |
|
672 |
||
673 |
||
674 |
void LIRGenerator::do_ArrayCopy(Intrinsic* x) { |
|
675 |
assert(x->number_of_arguments() == 5, "wrong type"); |
|
3683
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
676 |
|
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
677 |
// Make all state_for calls early since they can emit code |
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
678 |
CodeEmitInfo* info = state_for(x, x->state()); |
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
679 |
|
1 | 680 |
// Note: spill caller save before setting the item |
681 |
LIRItem src (x->argument_at(0), this); |
|
682 |
LIRItem src_pos (x->argument_at(1), this); |
|
683 |
LIRItem dst (x->argument_at(2), this); |
|
684 |
LIRItem dst_pos (x->argument_at(3), this); |
|
685 |
LIRItem length (x->argument_at(4), this); |
|
686 |
// load all values in callee_save_registers, as this makes the |
|
687 |
// parameter passing to the fast case simpler |
|
688 |
src.load_item_force (rlock_callee_saved(T_OBJECT)); |
|
689 |
src_pos.load_item_force (rlock_callee_saved(T_INT)); |
|
690 |
dst.load_item_force (rlock_callee_saved(T_OBJECT)); |
|
691 |
dst_pos.load_item_force (rlock_callee_saved(T_INT)); |
|
692 |
length.load_item_force (rlock_callee_saved(T_INT)); |
|
693 |
||
694 |
int flags; |
|
695 |
ciArrayKlass* expected_type; |
|
696 |
arraycopy_helper(x, &flags, &expected_type); |
|
697 |
||
698 |
__ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), |
|
699 |
length.result(), rlock_callee_saved(T_INT), |
|
700 |
expected_type, flags, info); |
|
701 |
set_no_result(x); |
|
702 |
} |
|
703 |
||
18507
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
16611
diff
changeset
|
704 |
void LIRGenerator::do_update_CRC32(Intrinsic* x) { |
34205 | 705 |
// Make all state_for calls early since they can emit code |
706 |
LIR_Opr result = rlock_result(x); |
|
707 |
int flags = 0; |
|
708 |
switch (x->id()) { |
|
709 |
case vmIntrinsics::_updateCRC32: { |
|
710 |
LIRItem crc(x->argument_at(0), this); |
|
711 |
LIRItem val(x->argument_at(1), this); |
|
712 |
// val is destroyed by update_crc32 |
|
713 |
val.set_destroys_register(); |
|
714 |
crc.load_item(); |
|
715 |
val.load_item(); |
|
716 |
__ update_crc32(crc.result(), val.result(), result); |
|
717 |
break; |
|
718 |
} |
|
719 |
case vmIntrinsics::_updateBytesCRC32: |
|
720 |
case vmIntrinsics::_updateByteBufferCRC32: { |
|
721 |
||
722 |
bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); |
|
723 |
||
724 |
LIRItem crc(x->argument_at(0), this); |
|
725 |
LIRItem buf(x->argument_at(1), this); |
|
726 |
LIRItem off(x->argument_at(2), this); |
|
727 |
LIRItem len(x->argument_at(3), this); |
|
728 |
||
729 |
buf.load_item(); |
|
730 |
off.load_nonconstant(); |
|
731 |
||
732 |
LIR_Opr index = off.result(); |
|
733 |
int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; |
|
734 |
if(off.result()->is_constant()) { |
|
735 |
index = LIR_OprFact::illegalOpr; |
|
736 |
offset += off.result()->as_jint(); |
|
737 |
} |
|
738 |
||
739 |
LIR_Opr base_op = buf.result(); |
|
740 |
||
741 |
if (index->is_valid()) { |
|
742 |
LIR_Opr tmp = new_register(T_LONG); |
|
743 |
__ convert(Bytecodes::_i2l, index, tmp); |
|
744 |
index = tmp; |
|
745 |
if (index->is_constant()) { |
|
746 |
offset += index->as_constant_ptr()->as_jint(); |
|
747 |
index = LIR_OprFact::illegalOpr; |
|
748 |
} else if (index->is_register()) { |
|
749 |
LIR_Opr tmp2 = new_register(T_LONG); |
|
750 |
LIR_Opr tmp3 = new_register(T_LONG); |
|
751 |
__ move(base_op, tmp2); |
|
752 |
__ move(index, tmp3); |
|
753 |
__ add(tmp2, tmp3, tmp2); |
|
754 |
base_op = tmp2; |
|
755 |
} else { |
|
756 |
ShouldNotReachHere(); |
|
757 |
} |
|
758 |
} |
|
759 |
||
760 |
LIR_Address* a = new LIR_Address(base_op, offset, T_BYTE); |
|
761 |
||
762 |
BasicTypeList signature(3); |
|
763 |
signature.append(T_INT); |
|
764 |
signature.append(T_ADDRESS); |
|
765 |
signature.append(T_INT); |
|
766 |
CallingConvention* cc = frame_map()->c_calling_convention(&signature); |
|
767 |
const LIR_Opr result_reg = result_register_for(x->type()); |
|
768 |
||
769 |
LIR_Opr addr = new_pointer_register(); |
|
770 |
__ leal(LIR_OprFact::address(a), addr); |
|
771 |
||
772 |
crc.load_item_force(cc->at(0)); |
|
773 |
__ move(addr, cc->at(1)); |
|
774 |
len.load_item_force(cc->at(2)); |
|
775 |
||
776 |
__ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args()); |
|
777 |
__ move(result_reg, result); |
|
778 |
||
779 |
break; |
|
780 |
} |
|
781 |
default: { |
|
782 |
ShouldNotReachHere(); |
|
783 |
} |
|
784 |
} |
|
18507
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
16611
diff
changeset
|
785 |
} |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
16611
diff
changeset
|
786 |
|
38237
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
787 |
void LIRGenerator::do_update_CRC32C(Intrinsic* x) { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
788 |
// Make all state_for calls early since they can emit code |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
789 |
LIR_Opr result = rlock_result(x); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
790 |
int flags = 0; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
791 |
switch (x->id()) { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
792 |
case vmIntrinsics::_updateBytesCRC32C: |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
793 |
case vmIntrinsics::_updateDirectByteBufferCRC32C: { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
794 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
795 |
bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
796 |
int array_offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
797 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
798 |
LIRItem crc(x->argument_at(0), this); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
799 |
LIRItem buf(x->argument_at(1), this); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
800 |
LIRItem off(x->argument_at(2), this); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
801 |
LIRItem end(x->argument_at(3), this); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
802 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
803 |
buf.load_item(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
804 |
off.load_nonconstant(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
805 |
end.load_nonconstant(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
806 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
807 |
// len = end - off |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
808 |
LIR_Opr len = end.result(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
809 |
LIR_Opr tmpA = new_register(T_INT); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
810 |
LIR_Opr tmpB = new_register(T_INT); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
811 |
__ move(end.result(), tmpA); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
812 |
__ move(off.result(), tmpB); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
813 |
__ sub(tmpA, tmpB, tmpA); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
814 |
len = tmpA; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
815 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
816 |
LIR_Opr index = off.result(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
817 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
818 |
if(off.result()->is_constant()) { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
819 |
index = LIR_OprFact::illegalOpr; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
820 |
array_offset += off.result()->as_jint(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
821 |
} |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
822 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
823 |
LIR_Opr base_op = buf.result(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
824 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
825 |
if (index->is_valid()) { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
826 |
LIR_Opr tmp = new_register(T_LONG); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
827 |
__ convert(Bytecodes::_i2l, index, tmp); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
828 |
index = tmp; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
829 |
if (index->is_constant()) { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
830 |
array_offset += index->as_constant_ptr()->as_jint(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
831 |
index = LIR_OprFact::illegalOpr; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
832 |
} else if (index->is_register()) { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
833 |
LIR_Opr tmp2 = new_register(T_LONG); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
834 |
LIR_Opr tmp3 = new_register(T_LONG); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
835 |
__ move(base_op, tmp2); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
836 |
__ move(index, tmp3); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
837 |
__ add(tmp2, tmp3, tmp2); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
838 |
base_op = tmp2; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
839 |
} else { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
840 |
ShouldNotReachHere(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
841 |
} |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
842 |
} |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
843 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
844 |
LIR_Address* a = new LIR_Address(base_op, array_offset, T_BYTE); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
845 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
846 |
BasicTypeList signature(3); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
847 |
signature.append(T_INT); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
848 |
signature.append(T_ADDRESS); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
849 |
signature.append(T_INT); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
850 |
CallingConvention* cc = frame_map()->c_calling_convention(&signature); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
851 |
const LIR_Opr result_reg = result_register_for(x->type()); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
852 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
853 |
LIR_Opr addr = new_pointer_register(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
854 |
__ leal(LIR_OprFact::address(a), addr); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
855 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
856 |
crc.load_item_force(cc->at(0)); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
857 |
__ move(addr, cc->at(1)); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
858 |
__ move(len, cc->at(2)); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
859 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
860 |
__ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), getThreadTemp(), result_reg, cc->args()); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
861 |
__ move(result_reg, result); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
862 |
|
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
863 |
break; |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
864 |
} |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
865 |
default: { |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
866 |
ShouldNotReachHere(); |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
867 |
} |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
868 |
} |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
869 |
} |
d972e3a2df53
8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC
kvn
parents:
38031
diff
changeset
|
870 |
|
41323 | 871 |
void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) { |
46597
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
872 |
assert(x->number_of_arguments() == 3, "wrong type"); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
873 |
assert(UseFMA, "Needs FMA instructions support."); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
874 |
|
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
875 |
LIRItem a(x->argument_at(0), this); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
876 |
LIRItem b(x->argument_at(1), this); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
877 |
LIRItem c(x->argument_at(2), this); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
878 |
|
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
879 |
a.load_item(); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
880 |
b.load_item(); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
881 |
c.load_item(); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
882 |
|
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
883 |
LIR_Opr ina = a.result(); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
884 |
LIR_Opr inb = b.result(); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
885 |
LIR_Opr inc = c.result(); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
886 |
LIR_Opr res = rlock_result(x); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
887 |
|
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
888 |
switch (x->id()) { |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
889 |
case vmIntrinsics::_fmaF: __ fmaf(ina, inb, inc, res); break; |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
890 |
case vmIntrinsics::_fmaD: __ fmad(ina, inb, inc, res); break; |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
891 |
default: |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
892 |
ShouldNotReachHere(); |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
893 |
break; |
d669fb842ae3
8164888: Intrinsify fused mac operations on SPARC
neliasso
parents:
46458
diff
changeset
|
894 |
} |
41323 | 895 |
} |
896 |
||
38238
1bbcc430c78d
8151268: Wire up the x86 _vectorizedMismatch stub routine in C1
psandoz
parents:
38237
diff
changeset
|
897 |
void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) { |
1bbcc430c78d
8151268: Wire up the x86 _vectorizedMismatch stub routine in C1
psandoz
parents:
38237
diff
changeset
|
898 |
fatal("vectorizedMismatch intrinsic is not implemented on this platform"); |
1bbcc430c78d
8151268: Wire up the x86 _vectorizedMismatch stub routine in C1
psandoz
parents:
38237
diff
changeset
|
899 |
} |
1bbcc430c78d
8151268: Wire up the x86 _vectorizedMismatch stub routine in C1
psandoz
parents:
38237
diff
changeset
|
900 |
|
1 | 901 |
// _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f |
902 |
// _i2b, _i2c, _i2s |
|
903 |
void LIRGenerator::do_Convert(Convert* x) { |
|
904 |
||
905 |
switch (x->op()) { |
|
906 |
case Bytecodes::_f2l: |
|
907 |
case Bytecodes::_d2l: |
|
908 |
case Bytecodes::_d2i: |
|
909 |
case Bytecodes::_l2f: |
|
910 |
case Bytecodes::_l2d: { |
|
911 |
||
912 |
address entry; |
|
913 |
switch (x->op()) { |
|
914 |
case Bytecodes::_l2f: |
|
915 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f); |
|
916 |
break; |
|
917 |
case Bytecodes::_l2d: |
|
918 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d); |
|
919 |
break; |
|
920 |
case Bytecodes::_f2l: |
|
921 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l); |
|
922 |
break; |
|
923 |
case Bytecodes::_d2l: |
|
924 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l); |
|
925 |
break; |
|
926 |
case Bytecodes::_d2i: |
|
927 |
entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i); |
|
928 |
break; |
|
929 |
default: |
|
930 |
ShouldNotReachHere(); |
|
931 |
} |
|
932 |
LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL); |
|
933 |
set_result(x, result); |
|
934 |
break; |
|
935 |
} |
|
936 |
||
937 |
case Bytecodes::_i2f: |
|
938 |
case Bytecodes::_i2d: { |
|
939 |
LIRItem value(x->value(), this); |
|
940 |
||
941 |
LIR_Opr reg = rlock_result(x); |
|
942 |
// To convert an int to double, we need to load the 32-bit int |
|
943 |
// from memory into a single precision floating point register |
|
944 |
// (even numbered). Then the sparc fitod instruction takes care |
|
945 |
// of the conversion. This is a bit ugly, but is the best way to |
|
946 |
// get the int value in a single precision floating point register |
|
947 |
value.load_item(); |
|
948 |
LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT); |
|
949 |
__ convert(x->op(), tmp, reg); |
|
950 |
break; |
|
951 |
} |
|
952 |
break; |
|
953 |
||
954 |
case Bytecodes::_i2l: |
|
955 |
case Bytecodes::_i2b: |
|
956 |
case Bytecodes::_i2c: |
|
957 |
case Bytecodes::_i2s: |
|
958 |
case Bytecodes::_l2i: |
|
959 |
case Bytecodes::_f2d: |
|
960 |
case Bytecodes::_d2f: { // inline code |
|
961 |
LIRItem value(x->value(), this); |
|
962 |
||
963 |
value.load_item(); |
|
964 |
LIR_Opr reg = rlock_result(x); |
|
965 |
__ convert(x->op(), value.result(), reg, false); |
|
966 |
} |
|
967 |
break; |
|
968 |
||
969 |
case Bytecodes::_f2i: { |
|
970 |
LIRItem value (x->value(), this); |
|
971 |
value.set_destroys_register(); |
|
972 |
value.load_item(); |
|
973 |
LIR_Opr reg = rlock_result(x); |
|
974 |
set_vreg_flag(reg, must_start_in_memory); |
|
975 |
__ convert(x->op(), value.result(), reg, false); |
|
976 |
} |
|
977 |
break; |
|
978 |
||
979 |
default: ShouldNotReachHere(); |
|
980 |
} |
|
981 |
} |
|
982 |
||
983 |
||
984 |
void LIRGenerator::do_NewInstance(NewInstance* x) { |
|
24933
c16c7a4ac386
8031994: java/lang/Character/CheckProp test times out
rbackman
parents:
24677
diff
changeset
|
985 |
print_if_not_loaded(x); |
c16c7a4ac386
8031994: java/lang/Character/CheckProp test times out
rbackman
parents:
24677
diff
changeset
|
986 |
|
1 | 987 |
// This instruction can be deoptimized in the slow path : use |
988 |
// O0 as result register. |
|
989 |
const LIR_Opr reg = result_register_for(x->type()); |
|
24933
c16c7a4ac386
8031994: java/lang/Character/CheckProp test times out
rbackman
parents:
24677
diff
changeset
|
990 |
|
1 | 991 |
CodeEmitInfo* info = state_for(x, x->state()); |
992 |
LIR_Opr tmp1 = FrameMap::G1_oop_opr; |
|
993 |
LIR_Opr tmp2 = FrameMap::G3_oop_opr; |
|
994 |
LIR_Opr tmp3 = FrameMap::G4_oop_opr; |
|
995 |
LIR_Opr tmp4 = FrameMap::O1_oop_opr; |
|
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
996 |
LIR_Opr klass_reg = FrameMap::G5_metadata_opr; |
24933
c16c7a4ac386
8031994: java/lang/Character/CheckProp test times out
rbackman
parents:
24677
diff
changeset
|
997 |
new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info); |
1 | 998 |
LIR_Opr result = rlock_result(x); |
999 |
__ move(reg, result); |
|
1000 |
} |
|
1001 |
||
1002 |
||
1003 |
void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { |
|
3683
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
1004 |
// Evaluate state_for early since it may emit code |
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
1005 |
CodeEmitInfo* info = state_for(x, x->state()); |
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
1006 |
|
1 | 1007 |
LIRItem length(x->length(), this); |
1008 |
length.load_item(); |
|
1009 |
||
1010 |
LIR_Opr reg = result_register_for(x->type()); |
|
1011 |
LIR_Opr tmp1 = FrameMap::G1_oop_opr; |
|
1012 |
LIR_Opr tmp2 = FrameMap::G3_oop_opr; |
|
1013 |
LIR_Opr tmp3 = FrameMap::G4_oop_opr; |
|
1014 |
LIR_Opr tmp4 = FrameMap::O1_oop_opr; |
|
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
1015 |
LIR_Opr klass_reg = FrameMap::G5_metadata_opr; |
1 | 1016 |
LIR_Opr len = length.result(); |
1017 |
BasicType elem_type = x->elt_type(); |
|
1018 |
||
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
1019 |
__ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); |
1 | 1020 |
|
1021 |
CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); |
|
1022 |
__ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); |
|
1023 |
||
1024 |
LIR_Opr result = rlock_result(x); |
|
1025 |
__ move(reg, result); |
|
1026 |
} |
|
1027 |
||
1028 |
||
1029 |
void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { |
|
3683
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
1030 |
// Evaluate state_for early since it may emit code. |
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
1031 |
CodeEmitInfo* info = state_for(x, x->state()); |
1 | 1032 |
// in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction |
1033 |
// and therefore provide the state before the parameters have been consumed |
|
1034 |
CodeEmitInfo* patching_info = NULL; |
|
1035 |
if (!x->klass()->is_loaded() || PatchALot) { |
|
1036 |
patching_info = state_for(x, x->state_before()); |
|
1037 |
} |
|
1038 |
||
3683
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
1039 |
LIRItem length(x->length(), this); |
1 | 1040 |
length.load_item(); |
1041 |
||
1042 |
const LIR_Opr reg = result_register_for(x->type()); |
|
1043 |
LIR_Opr tmp1 = FrameMap::G1_oop_opr; |
|
1044 |
LIR_Opr tmp2 = FrameMap::G3_oop_opr; |
|
1045 |
LIR_Opr tmp3 = FrameMap::G4_oop_opr; |
|
1046 |
LIR_Opr tmp4 = FrameMap::O1_oop_opr; |
|
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
1047 |
LIR_Opr klass_reg = FrameMap::G5_metadata_opr; |
1 | 1048 |
LIR_Opr len = length.result(); |
1049 |
||
1050 |
CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); |
|
13728
882756847a04
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
12959
diff
changeset
|
1051 |
ciMetadata* obj = ciObjArrayKlass::make(x->klass()); |
1 | 1052 |
if (obj == ciEnv::unloaded_ciobjarrayklass()) { |
1053 |
BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); |
|
1054 |
} |
|
13728
882756847a04
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
12959
diff
changeset
|
1055 |
klass2reg_with_patching(klass_reg, obj, patching_info); |
1 | 1056 |
__ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); |
1057 |
||
1058 |
LIR_Opr result = rlock_result(x); |
|
1059 |
__ move(reg, result); |
|
1060 |
} |
|
1061 |
||
1062 |
||
1063 |
void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { |
|
1064 |
Values* dims = x->dims(); |
|
1065 |
int i = dims->length(); |
|
38031
e0b822facc03
8149374: Replace C1-specific collection classes with universal collection classes
fzhinkin
parents:
34205
diff
changeset
|
1066 |
LIRItemList* items = new LIRItemList(i, i, NULL); |
1 | 1067 |
while (i-- > 0) { |
1068 |
LIRItem* size = new LIRItem(dims->at(i), this); |
|
1069 |
items->at_put(i, size); |
|
1070 |
} |
|
1071 |
||
3683
bbf665be687c
6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents:
3261
diff
changeset
|
1072 |
// Evaluate state_for early since it may emit code. |
1 | 1073 |
CodeEmitInfo* patching_info = NULL; |
1074 |
if (!x->klass()->is_loaded() || PatchALot) { |
|
1075 |
patching_info = state_for(x, x->state_before()); |
|
1076 |
||
12959
4d33f9be7e87
7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents:
12957
diff
changeset
|
1077 |
// Cannot re-use same xhandlers for multiple CodeEmitInfos, so |
4d33f9be7e87
7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents:
12957
diff
changeset
|
1078 |
// clone all handlers (NOTE: Usually this is handled transparently |
4d33f9be7e87
7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents:
12957
diff
changeset
|
1079 |
// by the CodeEmitInfo cloning logic in CodeStub constructors but |
4d33f9be7e87
7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents:
12957
diff
changeset
|
1080 |
// is done explicitly here because a stub isn't being used). |
1 | 1081 |
x->set_exception_handlers(new XHandlers(x->exception_handlers())); |
1082 |
} |
|
3688
22b55d147bc1
6875329: fix for 6795465 broke exception handler cloning
never
parents:
3683
diff
changeset
|
1083 |
CodeEmitInfo* info = state_for(x, x->state()); |
1 | 1084 |
|
1085 |
i = dims->length(); |
|
1086 |
while (i-- > 0) { |
|
1087 |
LIRItem* size = items->at(i); |
|
1088 |
size->load_item(); |
|
1089 |
store_stack_parameter (size->result(), |
|
1090 |
in_ByteSize(STACK_BIAS + |
|
1066 | 1091 |
frame::memory_parameter_word_sp_offset * wordSize + |
1092 |
i * sizeof(jint))); |
|
1 | 1093 |
} |
1094 |
||
1095 |
// This instruction can be deoptimized in the slow path : use |
|
1096 |
// O0 as result register. |
|
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
1097 |
const LIR_Opr klass_reg = FrameMap::O0_metadata_opr; |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
1098 |
klass2reg_with_patching(klass_reg, x->klass(), patching_info); |
1 | 1099 |
LIR_Opr rank = FrameMap::O1_opr; |
1100 |
__ move(LIR_OprFact::intConst(x->rank()), rank); |
|
1101 |
LIR_Opr varargs = FrameMap::as_pointer_opr(O2); |
|
1102 |
int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS; |
|
1103 |
__ add(FrameMap::SP_opr, |
|
1104 |
LIR_OprFact::intptrConst(offset_from_sp), |
|
1105 |
varargs); |
|
1106 |
LIR_OprList* args = new LIR_OprList(3); |
|
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
1107 |
args->append(klass_reg); |
1 | 1108 |
args->append(rank); |
1109 |
args->append(varargs); |
|
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
1110 |
const LIR_Opr reg = result_register_for(x->type()); |
1 | 1111 |
__ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), |
1112 |
LIR_OprFact::illegalOpr, |
|
1113 |
reg, args, info); |
|
1114 |
||
1115 |
LIR_Opr result = rlock_result(x); |
|
1116 |
__ move(reg, result); |
|
1117 |
} |
|
1118 |
||
1119 |
||
1120 |
void LIRGenerator::do_BlockBegin(BlockBegin* x) { |
|
1121 |
} |
|
1122 |
||
1123 |
||
1124 |
void LIRGenerator::do_CheckCast(CheckCast* x) { |
|
1125 |
LIRItem obj(x->obj(), this); |
|
1126 |
CodeEmitInfo* patching_info = NULL; |
|
49933
c63bdf53a1a7
8202399: [C1] LIRGenerator::do_CheckCast needs to exclude is_invokespecial_receiver_check() when using PatchAlot
dholmes
parents:
49906
diff
changeset
|
1127 |
if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) { |
1 | 1128 |
// must do this before locking the destination register as an oop register, |
1129 |
// and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location) |
|
1130 |
patching_info = state_for(x, x->state_before()); |
|
1131 |
} |
|
1132 |
obj.load_item(); |
|
1133 |
LIR_Opr out_reg = rlock_result(x); |
|
1134 |
CodeStub* stub; |
|
44738 | 1135 |
CodeEmitInfo* info_for_exception = |
1136 |
(x->needs_exception_state() ? state_for(x) : |
|
1137 |
state_for(x, x->state_before(), true /*ignore_xhandler*/)); |
|
1 | 1138 |
|
1139 |
if (x->is_incompatible_class_change_check()) { |
|
1140 |
assert(patching_info == NULL, "can't patch this"); |
|
1141 |
stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); |
|
44738 | 1142 |
} else if (x->is_invokespecial_receiver_check()) { |
1143 |
assert(patching_info == NULL, "can't patch this"); |
|
1144 |
stub = new DeoptimizeStub(info_for_exception, |
|
1145 |
Deoptimization::Reason_class_check, |
|
1146 |
Deoptimization::Action_none); |
|
1 | 1147 |
} else { |
1148 |
stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); |
|
1149 |
} |
|
1150 |
LIR_Opr tmp1 = FrameMap::G1_oop_opr; |
|
1151 |
LIR_Opr tmp2 = FrameMap::G3_oop_opr; |
|
1152 |
LIR_Opr tmp3 = FrameMap::G4_oop_opr; |
|
1153 |
__ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, |
|
1154 |
x->direct_compare(), info_for_exception, patching_info, stub, |
|
1155 |
x->profiled_method(), x->profiled_bci()); |
|
1156 |
} |
|
1157 |
||
1158 |
||
1159 |
void LIRGenerator::do_InstanceOf(InstanceOf* x) { |
|
1160 |
LIRItem obj(x->obj(), this); |
|
1161 |
CodeEmitInfo* patching_info = NULL; |
|
1162 |
if (!x->klass()->is_loaded() || PatchALot) { |
|
1163 |
patching_info = state_for(x, x->state_before()); |
|
1164 |
} |
|
1165 |
// ensure the result register is not the input register because the result is initialized before the patching safepoint |
|
1166 |
obj.load_item(); |
|
1167 |
LIR_Opr out_reg = rlock_result(x); |
|
1168 |
LIR_Opr tmp1 = FrameMap::G1_oop_opr; |
|
1169 |
LIR_Opr tmp2 = FrameMap::G3_oop_opr; |
|
1170 |
LIR_Opr tmp3 = FrameMap::G4_oop_opr; |
|
6461
cfc616b49f58
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
6453
diff
changeset
|
1171 |
__ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, |
cfc616b49f58
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
6453
diff
changeset
|
1172 |
x->direct_compare(), patching_info, |
cfc616b49f58
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
6453
diff
changeset
|
1173 |
x->profiled_method(), x->profiled_bci()); |
1 | 1174 |
} |
1175 |
||
1176 |
||
1177 |
void LIRGenerator::do_If(If* x) { |
|
1178 |
assert(x->number_of_sux() == 2, "inconsistency"); |
|
1179 |
ValueTag tag = x->x()->type()->tag(); |
|
1180 |
LIRItem xitem(x->x(), this); |
|
1181 |
LIRItem yitem(x->y(), this); |
|
1182 |
LIRItem* xin = &xitem; |
|
1183 |
LIRItem* yin = &yitem; |
|
1184 |
If::Condition cond = x->cond(); |
|
1185 |
||
1186 |
if (tag == longTag) { |
|
1187 |
// for longs, only conditions "eql", "neq", "lss", "geq" are valid; |
|
1188 |
// mirror for other conditions |
|
1189 |
if (cond == If::gtr || cond == If::leq) { |
|
1190 |
// swap inputs |
|
1191 |
cond = Instruction::mirror(cond); |
|
1192 |
xin = &yitem; |
|
1193 |
yin = &xitem; |
|
1194 |
} |
|
1195 |
xin->set_destroys_register(); |
|
1196 |
} |
|
1197 |
||
1198 |
LIR_Opr left = LIR_OprFact::illegalOpr; |
|
1199 |
LIR_Opr right = LIR_OprFact::illegalOpr; |
|
1200 |
||
1201 |
xin->load_item(); |
|
1202 |
left = xin->result(); |
|
1203 |
||
1204 |
if (is_simm13(yin->result())) { |
|
1205 |
// inline int constants which are small enough to be immediate operands |
|
1206 |
right = LIR_OprFact::value_type(yin->value()->type()); |
|
1207 |
} else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && |
|
1208 |
(cond == If::eql || cond == If::neq)) { |
|
1209 |
// inline long zero |
|
1210 |
right = LIR_OprFact::value_type(yin->value()->type()); |
|
1211 |
} else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) { |
|
1212 |
right = LIR_OprFact::value_type(yin->value()->type()); |
|
1213 |
} else { |
|
1214 |
yin->load_item(); |
|
1215 |
right = yin->result(); |
|
1216 |
} |
|
1217 |
set_no_result(x); |
|
1218 |
||
1219 |
// add safepoint before generating condition code so it can be recomputed |
|
1220 |
if (x->is_safepoint()) { |
|
1221 |
// increment backedge counter if needed |
|
50153 | 1222 |
increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()), |
1223 |
x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci()); |
|
47881
0ce0ac68ace7
8189941: Implementation JEP 312: Thread-local handshake
rehn
parents:
47216
diff
changeset
|
1224 |
__ safepoint(safepoint_poll_register(), state_for(x, x->state_before())); |
1 | 1225 |
} |
1226 |
||
1227 |
__ cmp(lir_cond(cond), left, right); |
|
6453 | 1228 |
// Generate branch profiling. Profiling code doesn't kill flags. |
1 | 1229 |
profile_branch(x, cond); |
1230 |
move_to_phi(x->state()); |
|
1231 |
if (x->x()->type()->is_float_kind()) { |
|
1232 |
__ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); |
|
1233 |
} else { |
|
1234 |
__ branch(lir_cond(cond), right->type(), x->tsux()); |
|
1235 |
} |
|
1236 |
assert(x->default_sux() == x->fsux(), "wrong destination above"); |
|
1237 |
__ jump(x->default_sux()); |
|
1238 |
} |
|
1239 |
||
1240 |
||
1241 |
LIR_Opr LIRGenerator::getThreadPointer() { |
|
1242 |
return FrameMap::as_pointer_opr(G2); |
|
1243 |
} |
|
1244 |
||
1245 |
||
1246 |
void LIRGenerator::trace_block_entry(BlockBegin* block) { |
|
1247 |
__ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr); |
|
1248 |
LIR_OprList* args = new LIR_OprList(1); |
|
1249 |
args->append(FrameMap::O0_opr); |
|
1250 |
address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); |
|
1251 |
__ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args); |
|
1252 |
} |
|
1253 |
||
1254 |
||
1255 |
void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, |
|
1256 |
CodeEmitInfo* info) { |
|
1257 |
__ store(value, address, info); |
|
1258 |
} |
|
1259 |
||
1260 |
void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, |
|
1261 |
CodeEmitInfo* info) { |
|
1262 |
__ load(address, result, info); |
|
1263 |
} |