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/*
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* Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*/
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package org.graalvm.compiler.lir.amd64;
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import jdk.vm.ci.amd64.AMD64;
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import jdk.vm.ci.amd64.AMD64.CPUFeature;
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import jdk.vm.ci.amd64.AMD64Kind;
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import jdk.vm.ci.code.Register;
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import jdk.vm.ci.code.TargetDescription;
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import jdk.vm.ci.meta.JavaKind;
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import jdk.vm.ci.meta.Value;
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import org.graalvm.compiler.asm.Label;
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import org.graalvm.compiler.asm.amd64.AMD64Address;
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import org.graalvm.compiler.asm.amd64.AMD64Address.Scale;
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import org.graalvm.compiler.asm.amd64.AMD64Assembler;
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import org.graalvm.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
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import org.graalvm.compiler.asm.amd64.AMD64Assembler.SSEOp;
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import org.graalvm.compiler.asm.amd64.AMD64BaseAssembler.OperandSize;
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import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler;
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import org.graalvm.compiler.asm.amd64.AVXKind;
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import org.graalvm.compiler.core.common.LIRKind;
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import org.graalvm.compiler.debug.GraalError;
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import org.graalvm.compiler.lir.LIRInstructionClass;
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import org.graalvm.compiler.lir.Opcode;
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import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
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import org.graalvm.compiler.lir.gen.LIRGeneratorTool;
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import static jdk.vm.ci.code.ValueUtil.asRegister;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.ILLEGAL;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG;
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import java.util.Objects;
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/**
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* Emits code which compares two arrays of the same length. If the CPU supports any vector
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* instructions specialized code is emitted to leverage these instructions.
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*
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* This op can also compare arrays of different integer types (e.g. {@code byte[]} and
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* {@code char[]}) with on-the-fly sign- or zero-extension. If one of the given arrays is a
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* {@code char[]} array, the smaller elements are zero-extended, otherwise they are sign-extended.
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*/
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@Opcode("ARRAY_EQUALS")
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public final class AMD64ArrayEqualsOp extends AMD64LIRInstruction {
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public static final LIRInstructionClass<AMD64ArrayEqualsOp> TYPE = LIRInstructionClass.create(AMD64ArrayEqualsOp.class);
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private final JavaKind kind1;
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private final JavaKind kind2;
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private final int arrayBaseOffset1;
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private final int arrayBaseOffset2;
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private final Scale arrayIndexScale1;
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private final Scale arrayIndexScale2;
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private final AVXKind.AVXSize vectorSize;
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private final int constantLength;
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private final boolean signExtend;
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@Def({REG}) private Value resultValue;
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@Alive({REG}) private Value array1Value;
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@Alive({REG}) private Value array2Value;
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@Alive({REG}) private Value lengthValue;
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@Temp({REG}) private Value temp1;
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@Temp({REG}) private Value temp2;
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@Temp({REG}) private Value temp3;
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@Temp({REG}) private Value temp4;
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@Temp({REG, ILLEGAL}) private Value temp5;
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@Temp({REG, ILLEGAL}) private Value tempXMM;
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@Temp({REG, ILLEGAL}) private Value vectorTemp1;
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@Temp({REG, ILLEGAL}) private Value vectorTemp2;
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@Temp({REG, ILLEGAL}) private Value vectorTemp3;
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@Temp({REG, ILLEGAL}) private Value vectorTemp4;
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public AMD64ArrayEqualsOp(LIRGeneratorTool tool, JavaKind kind1, JavaKind kind2, Value result, Value array1, Value array2, Value length,
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int constantLength, boolean directPointers, int maxVectorSize) {
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super(TYPE);
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this.kind1 = kind1;
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this.kind2 = kind2;
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this.signExtend = kind1 != JavaKind.Char && kind2 != JavaKind.Char;
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assert kind1.isNumericInteger() && kind2.isNumericInteger() || kind1 == kind2;
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this.arrayBaseOffset1 = directPointers ? 0 : tool.getProviders().getMetaAccess().getArrayBaseOffset(kind1);
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this.arrayBaseOffset2 = directPointers ? 0 : tool.getProviders().getMetaAccess().getArrayBaseOffset(kind2);
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this.arrayIndexScale1 = Objects.requireNonNull(Scale.fromInt(tool.getProviders().getMetaAccess().getArrayIndexScale(kind1)));
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this.arrayIndexScale2 = Objects.requireNonNull(Scale.fromInt(tool.getProviders().getMetaAccess().getArrayIndexScale(kind2)));
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this.vectorSize = ((AMD64) tool.target().arch).getFeatures().contains(CPUFeature.AVX2) && (maxVectorSize < 0 || maxVectorSize >= 32) ? AVXKind.AVXSize.YMM : AVXKind.AVXSize.XMM;
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this.constantLength = constantLength;
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this.resultValue = result;
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this.array1Value = array1;
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this.array2Value = array2;
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this.lengthValue = length;
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// Allocate some temporaries.
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this.temp1 = tool.newVariable(LIRKind.unknownReference(tool.target().arch.getWordKind()));
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this.temp2 = tool.newVariable(LIRKind.unknownReference(tool.target().arch.getWordKind()));
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this.temp3 = tool.newVariable(LIRKind.value(tool.target().arch.getWordKind()));
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this.temp4 = tool.newVariable(LIRKind.value(tool.target().arch.getWordKind()));
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this.temp5 = kind1.isNumericFloat() || kind1 != kind2 ? tool.newVariable(LIRKind.value(tool.target().arch.getWordKind())) : Value.ILLEGAL;
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if (kind1 == JavaKind.Float) {
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this.tempXMM = tool.newVariable(LIRKind.value(AMD64Kind.SINGLE));
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} else if (kind1 == JavaKind.Double) {
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this.tempXMM = tool.newVariable(LIRKind.value(AMD64Kind.DOUBLE));
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} else {
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this.tempXMM = Value.ILLEGAL;
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}
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// We only need the vector temporaries if we generate SSE code.
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if (supportsSSE41(tool.target())) {
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if (canGenerateConstantLengthCompare(tool.target())) {
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LIRKind lirKind = LIRKind.value(vectorSize == AVXKind.AVXSize.YMM ? AMD64Kind.V256_BYTE : AMD64Kind.V128_BYTE);
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this.vectorTemp1 = tool.newVariable(lirKind);
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this.vectorTemp2 = tool.newVariable(lirKind);
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this.vectorTemp3 = tool.newVariable(lirKind);
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this.vectorTemp4 = tool.newVariable(lirKind);
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} else {
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this.vectorTemp1 = tool.newVariable(LIRKind.value(AMD64Kind.DOUBLE));
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this.vectorTemp2 = tool.newVariable(LIRKind.value(AMD64Kind.DOUBLE));
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this.vectorTemp3 = Value.ILLEGAL;
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this.vectorTemp4 = Value.ILLEGAL;
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}
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} else {
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this.vectorTemp1 = Value.ILLEGAL;
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this.vectorTemp2 = Value.ILLEGAL;
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this.vectorTemp3 = Value.ILLEGAL;
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this.vectorTemp4 = Value.ILLEGAL;
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}
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}
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private boolean canGenerateConstantLengthCompare(TargetDescription target) {
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return constantLength >= 0 && kind1.isNumericInteger() && (kind1 == kind2 || getElementsPerVector(AVXKind.AVXSize.XMM) <= constantLength) && supportsSSE41(target);
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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Register result = asRegister(resultValue);
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Register array1 = asRegister(temp1);
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Register array2 = asRegister(temp2);
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Label trueLabel = new Label();
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Label falseLabel = new Label();
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Label done = new Label();
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// Load array base addresses.
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masm.leaq(array1, new AMD64Address(asRegister(array1Value), arrayBaseOffset1));
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masm.leaq(array2, new AMD64Address(asRegister(array2Value), arrayBaseOffset2));
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if (canGenerateConstantLengthCompare(crb.target)) {
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emitConstantLengthArrayCompareBytes(crb, masm, array1, array2, asRegister(temp3), asRegister(temp4),
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new Register[]{asRegister(vectorTemp1), asRegister(vectorTemp2), asRegister(vectorTemp3), asRegister(vectorTemp4)}, falseLabel);
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} else {
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Register length = asRegister(temp3);
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// Get array length.
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masm.movl(length, asRegister(lengthValue));
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// copy
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masm.movl(result, length);
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emitArrayCompare(crb, masm, result, array1, array2, length, trueLabel, falseLabel);
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}
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// Return true
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masm.bind(trueLabel);
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masm.movl(result, 1);
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masm.jmpb(done);
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// Return false
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masm.bind(falseLabel);
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masm.xorl(result, result);
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// That's it
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masm.bind(done);
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}
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private void emitArrayCompare(CompilationResultBuilder crb, AMD64MacroAssembler masm,
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Register result, Register array1, Register array2, Register length,
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Label trueLabel, Label falseLabel) {
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if (supportsSSE41(crb.target)) {
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emitVectorCompare(crb, masm, result, array1, array2, length, trueLabel, falseLabel);
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}
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if (kind1 == kind2) {
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emit8ByteCompare(crb, masm, result, array1, array2, length, trueLabel, falseLabel);
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emitTailCompares(masm, result, array1, array2, length, trueLabel, falseLabel);
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} else {
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emitDifferentKindsElementWiseCompare(crb, masm, result, array1, array2, length, trueLabel, falseLabel);
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}
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}
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/**
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* Returns if the underlying AMD64 architecture supports SSE 4.1 instructions.
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*
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* @param target target description of the underlying architecture
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* @return true if the underlying architecture supports SSE 4.1
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*/
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private static boolean supportsSSE41(TargetDescription target) {
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AMD64 arch = (AMD64) target.arch;
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return arch.getFeatures().contains(CPUFeature.SSE4_1);
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}
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/**
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* Emits code that uses SSE4.1/AVX1 128-bit (16-byte) or AVX2 256-bit (32-byte) vector compares.
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*/
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private void emitVectorCompare(CompilationResultBuilder crb, AMD64MacroAssembler masm,
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Register result, Register array1, Register array2, Register length,
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Label trueLabel, Label falseLabel) {
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assert supportsSSE41(crb.target);
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Register vector1 = asRegister(vectorTemp1);
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Register vector2 = asRegister(vectorTemp2);
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int elementsPerVector = getElementsPerVector(vectorSize);
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Label loop = new Label();
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Label compareTail = new Label();
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boolean requiresNaNCheck = kind1.isNumericFloat();
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Label loopCheck = new Label();
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Label nanCheck = new Label();
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// Compare 16-byte vectors
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masm.andl(result, elementsPerVector - 1); // tail count
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masm.andl(length, ~(elementsPerVector - 1)); // vector count
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masm.jcc(ConditionFlag.Zero, compareTail);
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masm.leaq(array1, new AMD64Address(array1, length, arrayIndexScale1, 0));
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masm.leaq(array2, new AMD64Address(array2, length, arrayIndexScale2, 0));
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masm.negq(length);
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// Align the main loop
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masm.align(crb.target.wordSize * 2);
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masm.bind(loop);
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emitVectorLoad1(masm, vector1, array1, length, 0, vectorSize);
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emitVectorLoad2(masm, vector2, array2, length, 0, vectorSize);
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emitVectorCmp(masm, vector1, vector2, vectorSize);
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masm.jcc(ConditionFlag.NotZero, requiresNaNCheck ? nanCheck : falseLabel);
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masm.bind(loopCheck);
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masm.addq(length, elementsPerVector);
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masm.jcc(ConditionFlag.NotZero, loop);
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masm.testl(result, result);
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masm.jcc(ConditionFlag.Zero, trueLabel);
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if (requiresNaNCheck) {
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Label unalignedCheck = new Label();
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masm.jmpb(unalignedCheck);
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masm.bind(nanCheck);
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emitFloatCompareWithinRange(crb, masm, array1, array2, length, 0, falseLabel, elementsPerVector);
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masm.jmpb(loopCheck);
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masm.bind(unalignedCheck);
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}
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/*
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* Compare the remaining bytes with an unaligned memory load aligned to the end of the
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* array.
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*/
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emitVectorLoad1(masm, vector1, array1, result, scaleDisplacement1(-vectorSize.getBytes()), vectorSize);
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emitVectorLoad2(masm, vector2, array2, result, scaleDisplacement2(-vectorSize.getBytes()), vectorSize);
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emitVectorCmp(masm, vector1, vector2, vectorSize);
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if (requiresNaNCheck) {
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masm.jcc(ConditionFlag.Zero, trueLabel);
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emitFloatCompareWithinRange(crb, masm, array1, array2, result, -vectorSize.getBytes(), falseLabel, elementsPerVector);
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} else {
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masm.jcc(ConditionFlag.NotZero, falseLabel);
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}
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masm.jmp(trueLabel);
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masm.bind(compareTail);
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masm.movl(length, result);
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}
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private int getElementsPerVector(AVXKind.AVXSize vSize) {
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return vSize.getBytes() >> Math.max(arrayIndexScale1.log2, arrayIndexScale2.log2);
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}
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private void emitVectorLoad1(AMD64MacroAssembler asm, Register dst, Register src, int displacement, AVXKind.AVXSize size) {
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emitVectorLoad1(asm, dst, src, Register.None, displacement, size);
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}
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private void emitVectorLoad2(AMD64MacroAssembler asm, Register dst, Register src, int displacement, AVXKind.AVXSize size) {
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emitVectorLoad2(asm, dst, src, Register.None, displacement, size);
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}
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private void emitVectorLoad1(AMD64MacroAssembler asm, Register dst, Register src, Register index, int displacement, AVXKind.AVXSize size) {
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emitVectorLoad(asm, dst, src, index, displacement, arrayIndexScale1, arrayIndexScale2, size);
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}
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private void emitVectorLoad2(AMD64MacroAssembler asm, Register dst, Register src, Register index, int displacement, AVXKind.AVXSize size) {
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emitVectorLoad(asm, dst, src, index, displacement, arrayIndexScale2, arrayIndexScale1, size);
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}
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private void emitVectorLoad(AMD64MacroAssembler asm, Register dst, Register src, Register index, int displacement, Scale ownScale, Scale otherScale, AVXKind.AVXSize size) {
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AMD64Address address = new AMD64Address(src, index, ownScale, displacement);
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if (ownScale.value < otherScale.value) {
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if (size == AVXKind.AVXSize.YMM) {
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getAVX2LoadAndExtendOp(ownScale, otherScale, signExtend).emit(asm, size, dst, address);
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} else {
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loadAndExtendSSE(asm, dst, address, ownScale, otherScale, signExtend);
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}
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} else {
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if (size == AVXKind.AVXSize.YMM) {
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asm.vmovdqu(dst, address);
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} else {
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asm.movdqu(dst, address);
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}
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}
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}
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private int scaleDisplacement1(int displacement) {
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|
331 |
return scaleDisplacement(displacement, arrayIndexScale1, arrayIndexScale2);
|
|
332 |
}
|
|
333 |
|
|
334 |
private int scaleDisplacement2(int displacement) {
|
|
335 |
return scaleDisplacement(displacement, arrayIndexScale2, arrayIndexScale1);
|
|
336 |
}
|
|
337 |
|
|
338 |
private static int scaleDisplacement(int displacement, Scale ownScale, Scale otherScale) {
|
|
339 |
if (ownScale.value < otherScale.value) {
|
|
340 |
return displacement >> (otherScale.log2 - ownScale.log2);
|
|
341 |
}
|
|
342 |
return displacement;
|
43972
|
343 |
}
|
|
344 |
|
54084
|
345 |
private static AMD64Assembler.VexRMOp getAVX2LoadAndExtendOp(Scale ownScale, Scale otherScale, boolean signExtend) {
|
|
346 |
switch (ownScale) {
|
|
347 |
case Times1:
|
|
348 |
switch (otherScale) {
|
|
349 |
case Times2:
|
|
350 |
return signExtend ? AMD64Assembler.VexRMOp.VPMOVSXBW : AMD64Assembler.VexRMOp.VPMOVZXBW;
|
|
351 |
case Times4:
|
|
352 |
return signExtend ? AMD64Assembler.VexRMOp.VPMOVSXBD : AMD64Assembler.VexRMOp.VPMOVZXBD;
|
|
353 |
case Times8:
|
|
354 |
return signExtend ? AMD64Assembler.VexRMOp.VPMOVSXBQ : AMD64Assembler.VexRMOp.VPMOVZXBQ;
|
|
355 |
}
|
|
356 |
throw GraalError.shouldNotReachHere();
|
|
357 |
case Times2:
|
|
358 |
switch (otherScale) {
|
|
359 |
case Times4:
|
|
360 |
return signExtend ? AMD64Assembler.VexRMOp.VPMOVSXWD : AMD64Assembler.VexRMOp.VPMOVZXWD;
|
|
361 |
case Times8:
|
|
362 |
return signExtend ? AMD64Assembler.VexRMOp.VPMOVSXWQ : AMD64Assembler.VexRMOp.VPMOVZXWQ;
|
|
363 |
}
|
|
364 |
throw GraalError.shouldNotReachHere();
|
|
365 |
case Times4:
|
|
366 |
return signExtend ? AMD64Assembler.VexRMOp.VPMOVSXDQ : AMD64Assembler.VexRMOp.VPMOVZXDQ;
|
|
367 |
}
|
|
368 |
throw GraalError.shouldNotReachHere();
|
|
369 |
}
|
43972
|
370 |
|
54084
|
371 |
private static void loadAndExtendSSE(AMD64MacroAssembler asm, Register dst, AMD64Address src, Scale ownScale, Scale otherScale, boolean signExtend) {
|
|
372 |
switch (ownScale) {
|
|
373 |
case Times1:
|
|
374 |
switch (otherScale) {
|
|
375 |
case Times2:
|
|
376 |
if (signExtend) {
|
|
377 |
asm.pmovsxbw(dst, src);
|
|
378 |
} else {
|
|
379 |
asm.pmovzxbw(dst, src);
|
|
380 |
}
|
|
381 |
return;
|
|
382 |
case Times4:
|
|
383 |
if (signExtend) {
|
|
384 |
asm.pmovsxbd(dst, src);
|
|
385 |
} else {
|
|
386 |
asm.pmovzxbd(dst, src);
|
|
387 |
}
|
|
388 |
return;
|
|
389 |
case Times8:
|
|
390 |
if (signExtend) {
|
|
391 |
asm.pmovsxbq(dst, src);
|
|
392 |
} else {
|
|
393 |
asm.pmovzxbq(dst, src);
|
|
394 |
}
|
|
395 |
return;
|
|
396 |
}
|
|
397 |
throw GraalError.shouldNotReachHere();
|
|
398 |
case Times2:
|
|
399 |
switch (otherScale) {
|
|
400 |
case Times4:
|
|
401 |
if (signExtend) {
|
|
402 |
asm.pmovsxwd(dst, src);
|
|
403 |
} else {
|
|
404 |
asm.pmovzxwd(dst, src);
|
|
405 |
}
|
|
406 |
return;
|
|
407 |
case Times8:
|
|
408 |
if (signExtend) {
|
|
409 |
asm.pmovsxwq(dst, src);
|
|
410 |
} else {
|
|
411 |
asm.pmovzxwq(dst, src);
|
|
412 |
}
|
|
413 |
return;
|
|
414 |
}
|
|
415 |
throw GraalError.shouldNotReachHere();
|
|
416 |
case Times4:
|
|
417 |
if (signExtend) {
|
|
418 |
asm.pmovsxdq(dst, src);
|
|
419 |
} else {
|
|
420 |
asm.pmovzxdq(dst, src);
|
|
421 |
}
|
|
422 |
return;
|
|
423 |
}
|
|
424 |
throw GraalError.shouldNotReachHere();
|
|
425 |
}
|
43972
|
426 |
|
54084
|
427 |
private static void emitVectorCmp(AMD64MacroAssembler masm, Register vector1, Register vector2, AVXKind.AVXSize size) {
|
|
428 |
emitVectorXor(masm, vector1, vector2, size);
|
|
429 |
emitVectorTest(masm, vector1, size);
|
|
430 |
}
|
46963
|
431 |
|
54084
|
432 |
private static void emitVectorXor(AMD64MacroAssembler masm, Register vector1, Register vector2, AVXKind.AVXSize size) {
|
|
433 |
if (size == AVXKind.AVXSize.YMM) {
|
|
434 |
masm.vpxor(vector1, vector1, vector2);
|
46963
|
435 |
} else {
|
54084
|
436 |
masm.pxor(vector1, vector2);
|
46963
|
437 |
}
|
54084
|
438 |
}
|
43972
|
439 |
|
54084
|
440 |
private static void emitVectorTest(AMD64MacroAssembler masm, Register vector1, AVXKind.AVXSize size) {
|
|
441 |
if (size == AVXKind.AVXSize.YMM) {
|
|
442 |
masm.vptest(vector1, vector1);
|
|
443 |
} else {
|
|
444 |
masm.ptest(vector1, vector1);
|
|
445 |
}
|
43972
|
446 |
}
|
|
447 |
|
|
448 |
/**
|
|
449 |
* Vector size used in {@link #emit8ByteCompare}.
|
|
450 |
*/
|
|
451 |
private static final int VECTOR_SIZE = 8;
|
|
452 |
|
|
453 |
/**
|
|
454 |
* Emits code that uses 8-byte vector compares.
|
|
455 |
*/
|
54084
|
456 |
private void emit8ByteCompare(CompilationResultBuilder crb, AMD64MacroAssembler masm,
|
|
457 |
Register result, Register array1, Register array2, Register length, Label trueLabel, Label falseLabel) {
|
|
458 |
assert kind1 == kind2;
|
43972
|
459 |
Label loop = new Label();
|
|
460 |
Label compareTail = new Label();
|
|
461 |
|
54084
|
462 |
int elementsPerVector = 8 >> arrayIndexScale1.log2;
|
|
463 |
|
|
464 |
boolean requiresNaNCheck = kind1.isNumericFloat();
|
46963
|
465 |
Label loopCheck = new Label();
|
|
466 |
Label nanCheck = new Label();
|
|
467 |
|
43972
|
468 |
Register temp = asRegister(temp4);
|
|
469 |
|
54084
|
470 |
masm.andl(result, elementsPerVector - 1); // tail count
|
|
471 |
masm.andl(length, ~(elementsPerVector - 1)); // vector count
|
46963
|
472 |
masm.jcc(ConditionFlag.Zero, compareTail);
|
43972
|
473 |
|
54084
|
474 |
masm.leaq(array1, new AMD64Address(array1, length, arrayIndexScale1, 0));
|
|
475 |
masm.leaq(array2, new AMD64Address(array2, length, arrayIndexScale2, 0));
|
43972
|
476 |
masm.negq(length);
|
|
477 |
|
|
478 |
// Align the main loop
|
|
479 |
masm.align(crb.target.wordSize * 2);
|
|
480 |
masm.bind(loop);
|
54084
|
481 |
masm.movq(temp, new AMD64Address(array1, length, arrayIndexScale1, 0));
|
|
482 |
masm.cmpq(temp, new AMD64Address(array2, length, arrayIndexScale2, 0));
|
46963
|
483 |
masm.jcc(ConditionFlag.NotEqual, requiresNaNCheck ? nanCheck : falseLabel);
|
|
484 |
|
|
485 |
masm.bind(loopCheck);
|
54084
|
486 |
masm.addq(length, elementsPerVector);
|
43972
|
487 |
masm.jccb(ConditionFlag.NotZero, loop);
|
|
488 |
|
|
489 |
masm.testl(result, result);
|
46963
|
490 |
masm.jcc(ConditionFlag.Zero, trueLabel);
|
|
491 |
|
|
492 |
if (requiresNaNCheck) {
|
|
493 |
// NaN check is slow path and hence placed outside of the main loop.
|
|
494 |
Label unalignedCheck = new Label();
|
|
495 |
masm.jmpb(unalignedCheck);
|
|
496 |
masm.bind(nanCheck);
|
|
497 |
// At most two iterations, unroll in the emitted code.
|
54084
|
498 |
for (int offset = 0; offset < VECTOR_SIZE; offset += kind1.getByteCount()) {
|
|
499 |
emitFloatCompare(masm, array1, array2, length, offset, falseLabel, kind1.getByteCount() == VECTOR_SIZE);
|
46963
|
500 |
}
|
|
501 |
masm.jmpb(loopCheck);
|
|
502 |
masm.bind(unalignedCheck);
|
|
503 |
}
|
43972
|
504 |
|
|
505 |
/*
|
|
506 |
* Compare the remaining bytes with an unaligned memory load aligned to the end of the
|
|
507 |
* array.
|
|
508 |
*/
|
54084
|
509 |
masm.movq(temp, new AMD64Address(array1, result, arrayIndexScale1, -VECTOR_SIZE));
|
|
510 |
masm.cmpq(temp, new AMD64Address(array2, result, arrayIndexScale2, -VECTOR_SIZE));
|
46963
|
511 |
if (requiresNaNCheck) {
|
|
512 |
masm.jcc(ConditionFlag.Equal, trueLabel);
|
|
513 |
// At most two iterations, unroll in the emitted code.
|
54084
|
514 |
for (int offset = 0; offset < VECTOR_SIZE; offset += kind1.getByteCount()) {
|
|
515 |
emitFloatCompare(masm, array1, array2, result, -VECTOR_SIZE + offset, falseLabel, kind1.getByteCount() == VECTOR_SIZE);
|
46963
|
516 |
}
|
|
517 |
} else {
|
|
518 |
masm.jccb(ConditionFlag.NotEqual, falseLabel);
|
|
519 |
}
|
43972
|
520 |
masm.jmpb(trueLabel);
|
|
521 |
|
|
522 |
masm.bind(compareTail);
|
|
523 |
masm.movl(length, result);
|
|
524 |
}
|
|
525 |
|
|
526 |
/**
|
|
527 |
* Emits code to compare the remaining 1 to 4 bytes.
|
|
528 |
*/
|
54084
|
529 |
private void emitTailCompares(AMD64MacroAssembler masm,
|
|
530 |
Register result, Register array1, Register array2, Register length, Label trueLabel, Label falseLabel) {
|
|
531 |
assert kind1 == kind2;
|
43972
|
532 |
Label compare2Bytes = new Label();
|
|
533 |
Label compare1Byte = new Label();
|
|
534 |
|
|
535 |
Register temp = asRegister(temp4);
|
|
536 |
|
54084
|
537 |
if (kind1.getByteCount() <= 4) {
|
43972
|
538 |
// Compare trailing 4 bytes, if any.
|
54084
|
539 |
masm.testl(result, arrayIndexScale1.log2 == 0 ? 4 : 4 >> arrayIndexScale1.log2);
|
43972
|
540 |
masm.jccb(ConditionFlag.Zero, compare2Bytes);
|
|
541 |
masm.movl(temp, new AMD64Address(array1, 0));
|
|
542 |
masm.cmpl(temp, new AMD64Address(array2, 0));
|
54084
|
543 |
if (kind1 == JavaKind.Float) {
|
46963
|
544 |
masm.jccb(ConditionFlag.Equal, trueLabel);
|
54084
|
545 |
emitFloatCompare(masm, array1, array2, Register.None, 0, falseLabel, true);
|
46963
|
546 |
masm.jmpb(trueLabel);
|
|
547 |
} else {
|
|
548 |
masm.jccb(ConditionFlag.NotEqual, falseLabel);
|
|
549 |
}
|
54084
|
550 |
if (kind1.getByteCount() <= 2) {
|
43972
|
551 |
// Move array pointers forward.
|
|
552 |
masm.leaq(array1, new AMD64Address(array1, 4));
|
|
553 |
masm.leaq(array2, new AMD64Address(array2, 4));
|
|
554 |
|
|
555 |
// Compare trailing 2 bytes, if any.
|
|
556 |
masm.bind(compare2Bytes);
|
54084
|
557 |
masm.testl(result, arrayIndexScale1.log2 == 0 ? 2 : 2 >> arrayIndexScale1.log2);
|
43972
|
558 |
masm.jccb(ConditionFlag.Zero, compare1Byte);
|
|
559 |
masm.movzwl(temp, new AMD64Address(array1, 0));
|
|
560 |
masm.movzwl(length, new AMD64Address(array2, 0));
|
|
561 |
masm.cmpl(temp, length);
|
|
562 |
masm.jccb(ConditionFlag.NotEqual, falseLabel);
|
|
563 |
|
|
564 |
// The one-byte tail compare is only required for boolean and byte arrays.
|
54084
|
565 |
if (kind1.getByteCount() <= 1) {
|
43972
|
566 |
// Move array pointers forward before we compare the last trailing byte.
|
|
567 |
masm.leaq(array1, new AMD64Address(array1, 2));
|
|
568 |
masm.leaq(array2, new AMD64Address(array2, 2));
|
|
569 |
|
|
570 |
// Compare trailing byte, if any.
|
|
571 |
masm.bind(compare1Byte);
|
|
572 |
masm.testl(result, 1);
|
|
573 |
masm.jccb(ConditionFlag.Zero, trueLabel);
|
|
574 |
masm.movzbl(temp, new AMD64Address(array1, 0));
|
|
575 |
masm.movzbl(length, new AMD64Address(array2, 0));
|
|
576 |
masm.cmpl(temp, length);
|
|
577 |
masm.jccb(ConditionFlag.NotEqual, falseLabel);
|
|
578 |
} else {
|
|
579 |
masm.bind(compare1Byte);
|
|
580 |
}
|
|
581 |
} else {
|
|
582 |
masm.bind(compare2Bytes);
|
|
583 |
}
|
|
584 |
}
|
|
585 |
}
|
|
586 |
|
54084
|
587 |
private void emitDifferentKindsElementWiseCompare(CompilationResultBuilder crb, AMD64MacroAssembler masm,
|
|
588 |
Register result, Register array1, Register array2, Register length, Label trueLabel, Label falseLabel) {
|
|
589 |
assert kind1 != kind2;
|
|
590 |
assert kind1.isNumericInteger() && kind2.isNumericInteger();
|
|
591 |
Label loop = new Label();
|
|
592 |
Label compareTail = new Label();
|
|
593 |
|
|
594 |
int elementsPerLoopIteration = 4;
|
|
595 |
|
|
596 |
Register tmp1 = asRegister(temp4);
|
|
597 |
Register tmp2 = asRegister(temp5);
|
|
598 |
|
|
599 |
masm.andl(result, elementsPerLoopIteration - 1); // tail count
|
|
600 |
masm.andl(length, ~(elementsPerLoopIteration - 1)); // bulk loop count
|
|
601 |
masm.jcc(ConditionFlag.Zero, compareTail);
|
|
602 |
|
|
603 |
masm.leaq(array1, new AMD64Address(array1, length, arrayIndexScale1, 0));
|
|
604 |
masm.leaq(array2, new AMD64Address(array2, length, arrayIndexScale2, 0));
|
|
605 |
masm.negq(length);
|
|
606 |
|
|
607 |
// clear comparison registers because of the missing movzlq instruction
|
|
608 |
masm.xorq(tmp1, tmp1);
|
|
609 |
masm.xorq(tmp2, tmp2);
|
|
610 |
|
|
611 |
// Align the main loop
|
|
612 |
masm.align(crb.target.wordSize * 2);
|
|
613 |
masm.bind(loop);
|
|
614 |
for (int i = 0; i < elementsPerLoopIteration; i++) {
|
|
615 |
emitMovBytes(masm, tmp1, new AMD64Address(array1, length, arrayIndexScale1, i << arrayIndexScale1.log2), kind1.getByteCount());
|
|
616 |
emitMovBytes(masm, tmp2, new AMD64Address(array2, length, arrayIndexScale2, i << arrayIndexScale2.log2), kind2.getByteCount());
|
|
617 |
masm.cmpq(tmp1, tmp2);
|
|
618 |
masm.jcc(ConditionFlag.NotEqual, falseLabel);
|
|
619 |
}
|
|
620 |
masm.addq(length, elementsPerLoopIteration);
|
|
621 |
masm.jccb(ConditionFlag.NotZero, loop);
|
|
622 |
|
|
623 |
masm.bind(compareTail);
|
|
624 |
masm.testl(result, result);
|
|
625 |
masm.jcc(ConditionFlag.Zero, trueLabel);
|
|
626 |
for (int i = 0; i < elementsPerLoopIteration - 1; i++) {
|
|
627 |
emitMovBytes(masm, tmp1, new AMD64Address(array1, length, arrayIndexScale1, 0), kind1.getByteCount());
|
|
628 |
emitMovBytes(masm, tmp2, new AMD64Address(array2, length, arrayIndexScale2, 0), kind2.getByteCount());
|
|
629 |
masm.cmpq(tmp1, tmp2);
|
|
630 |
masm.jcc(ConditionFlag.NotEqual, falseLabel);
|
|
631 |
if (i < elementsPerLoopIteration - 2) {
|
|
632 |
masm.incrementq(length, 1);
|
|
633 |
masm.decrementq(result, 1);
|
|
634 |
masm.jcc(ConditionFlag.Zero, trueLabel);
|
|
635 |
} else {
|
|
636 |
masm.jmpb(trueLabel);
|
|
637 |
}
|
|
638 |
}
|
|
639 |
}
|
|
640 |
|
46963
|
641 |
/**
|
|
642 |
* Emits code to fall through if {@code src} is NaN, otherwise jump to {@code branchOrdered}.
|
|
643 |
*/
|
54084
|
644 |
private void emitNaNCheck(AMD64MacroAssembler masm, AMD64Address src, Label branchIfNonNaN) {
|
|
645 |
assert kind1.isNumericFloat();
|
46963
|
646 |
Register tempXMMReg = asRegister(tempXMM);
|
54084
|
647 |
if (kind1 == JavaKind.Float) {
|
46963
|
648 |
masm.movflt(tempXMMReg, src);
|
|
649 |
} else {
|
|
650 |
masm.movdbl(tempXMMReg, src);
|
|
651 |
}
|
54084
|
652 |
SSEOp.UCOMIS.emit(masm, kind1 == JavaKind.Float ? OperandSize.PS : OperandSize.PD, tempXMMReg, tempXMMReg);
|
46963
|
653 |
masm.jcc(ConditionFlag.NoParity, branchIfNonNaN);
|
|
654 |
}
|
|
655 |
|
|
656 |
/**
|
|
657 |
* Emits code to compare if two floats are bitwise equal or both NaN.
|
|
658 |
*/
|
54084
|
659 |
private void emitFloatCompare(AMD64MacroAssembler masm, Register base1, Register base2, Register index, int offset, Label falseLabel,
|
52578
|
660 |
boolean skipBitwiseCompare) {
|
54084
|
661 |
AMD64Address address1 = new AMD64Address(base1, index, arrayIndexScale1, offset);
|
|
662 |
AMD64Address address2 = new AMD64Address(base2, index, arrayIndexScale2, offset);
|
46963
|
663 |
|
|
664 |
Label bitwiseEqual = new Label();
|
|
665 |
|
|
666 |
if (!skipBitwiseCompare) {
|
|
667 |
// Bitwise compare
|
|
668 |
Register temp = asRegister(temp4);
|
|
669 |
|
54084
|
670 |
if (kind1 == JavaKind.Float) {
|
46963
|
671 |
masm.movl(temp, address1);
|
|
672 |
masm.cmpl(temp, address2);
|
|
673 |
} else {
|
|
674 |
masm.movq(temp, address1);
|
|
675 |
masm.cmpq(temp, address2);
|
|
676 |
}
|
|
677 |
masm.jccb(ConditionFlag.Equal, bitwiseEqual);
|
|
678 |
}
|
|
679 |
|
54084
|
680 |
emitNaNCheck(masm, address1, falseLabel);
|
|
681 |
emitNaNCheck(masm, address2, falseLabel);
|
46963
|
682 |
|
|
683 |
masm.bind(bitwiseEqual);
|
|
684 |
}
|
|
685 |
|
|
686 |
/**
|
|
687 |
* Emits code to compare float equality within a range.
|
|
688 |
*/
|
54084
|
689 |
private void emitFloatCompareWithinRange(CompilationResultBuilder crb, AMD64MacroAssembler masm,
|
|
690 |
Register base1, Register base2, Register index, int offset, Label falseLabel, int range) {
|
|
691 |
assert kind1.isNumericFloat();
|
46963
|
692 |
Label loop = new Label();
|
|
693 |
Register i = asRegister(temp5);
|
|
694 |
|
|
695 |
masm.movq(i, range);
|
|
696 |
masm.negq(i);
|
|
697 |
// Align the main loop
|
|
698 |
masm.align(crb.target.wordSize * 2);
|
|
699 |
masm.bind(loop);
|
54084
|
700 |
emitFloatCompare(masm, base1, base2, index, offset, falseLabel, range == 1);
|
|
701 |
masm.incrementq(index, 1);
|
|
702 |
masm.incrementq(i, 1);
|
46963
|
703 |
masm.jccb(ConditionFlag.NotZero, loop);
|
|
704 |
// Floats within the range are equal, revert change to the register index
|
|
705 |
masm.subq(index, range);
|
|
706 |
}
|
52578
|
707 |
|
|
708 |
/**
|
|
709 |
* Emits specialized assembly for checking equality of memory regions
|
|
710 |
* {@code arrayPtr1[0..nBytes]} and {@code arrayPtr2[0..nBytes]}. If they match, execution
|
|
711 |
* continues directly after the emitted code block, otherwise we jump to {@code noMatch}.
|
|
712 |
*/
|
54084
|
713 |
private void emitConstantLengthArrayCompareBytes(
|
|
714 |
CompilationResultBuilder crb,
|
52578
|
715 |
AMD64MacroAssembler asm,
|
|
716 |
Register arrayPtr1,
|
|
717 |
Register arrayPtr2,
|
|
718 |
Register tmp1,
|
|
719 |
Register tmp2,
|
|
720 |
Register[] tmpVectors,
|
54084
|
721 |
Label noMatch) {
|
|
722 |
if (constantLength == 0) {
|
52578
|
723 |
// do nothing
|
|
724 |
return;
|
|
725 |
}
|
54084
|
726 |
AVXKind.AVXSize vSize = vectorSize;
|
|
727 |
if (constantLength < getElementsPerVector(vectorSize)) {
|
|
728 |
vSize = AVXKind.AVXSize.XMM;
|
|
729 |
}
|
|
730 |
int elementsPerVector = getElementsPerVector(vSize);
|
|
731 |
if (elementsPerVector > constantLength) {
|
|
732 |
assert kind1 == kind2;
|
|
733 |
int byteLength = constantLength << arrayIndexScale1.log2;
|
52578
|
734 |
// array is shorter than any vector register, use regular CMP instructions
|
54084
|
735 |
int movSize = (byteLength < 2) ? 1 : ((byteLength < 4) ? 2 : ((byteLength < 8) ? 4 : 8));
|
52578
|
736 |
emitMovBytes(asm, tmp1, new AMD64Address(arrayPtr1), movSize);
|
|
737 |
emitMovBytes(asm, tmp2, new AMD64Address(arrayPtr2), movSize);
|
|
738 |
emitCmpBytes(asm, tmp1, tmp2, movSize);
|
|
739 |
asm.jcc(AMD64Assembler.ConditionFlag.NotEqual, noMatch);
|
54084
|
740 |
if (byteLength > movSize) {
|
|
741 |
emitMovBytes(asm, tmp1, new AMD64Address(arrayPtr1, byteLength - movSize), movSize);
|
|
742 |
emitMovBytes(asm, tmp2, new AMD64Address(arrayPtr2, byteLength - movSize), movSize);
|
52578
|
743 |
emitCmpBytes(asm, tmp1, tmp2, movSize);
|
|
744 |
asm.jcc(AMD64Assembler.ConditionFlag.NotEqual, noMatch);
|
|
745 |
}
|
54084
|
746 |
} else {
|
|
747 |
int elementsPerVectorLoop = 2 * elementsPerVector;
|
|
748 |
int tailCount = constantLength & (elementsPerVectorLoop - 1);
|
|
749 |
int vectorCount = constantLength & ~(elementsPerVectorLoop - 1);
|
|
750 |
int bytesPerVector = vSize.getBytes();
|
|
751 |
if (vectorCount > 0) {
|
|
752 |
Label loopBegin = new Label();
|
|
753 |
asm.leaq(arrayPtr1, new AMD64Address(arrayPtr1, vectorCount << arrayIndexScale1.log2));
|
|
754 |
asm.leaq(arrayPtr2, new AMD64Address(arrayPtr2, vectorCount << arrayIndexScale2.log2));
|
|
755 |
asm.movq(tmp1, -vectorCount);
|
|
756 |
asm.align(crb.target.wordSize * 2);
|
|
757 |
asm.bind(loopBegin);
|
|
758 |
emitVectorLoad1(asm, tmpVectors[0], arrayPtr1, tmp1, 0, vSize);
|
|
759 |
emitVectorLoad2(asm, tmpVectors[1], arrayPtr2, tmp1, 0, vSize);
|
|
760 |
emitVectorLoad1(asm, tmpVectors[2], arrayPtr1, tmp1, scaleDisplacement1(bytesPerVector), vSize);
|
|
761 |
emitVectorLoad2(asm, tmpVectors[3], arrayPtr2, tmp1, scaleDisplacement2(bytesPerVector), vSize);
|
|
762 |
emitVectorXor(asm, tmpVectors[0], tmpVectors[1], vSize);
|
|
763 |
emitVectorXor(asm, tmpVectors[2], tmpVectors[3], vSize);
|
|
764 |
emitVectorTest(asm, tmpVectors[0], vSize);
|
52578
|
765 |
asm.jcc(AMD64Assembler.ConditionFlag.NotZero, noMatch);
|
54084
|
766 |
emitVectorTest(asm, tmpVectors[2], vSize);
|
|
767 |
asm.jcc(AMD64Assembler.ConditionFlag.NotZero, noMatch);
|
|
768 |
asm.addq(tmp1, elementsPerVectorLoop);
|
|
769 |
asm.jcc(AMD64Assembler.ConditionFlag.NotZero, loopBegin);
|
52578
|
770 |
}
|
54084
|
771 |
if (tailCount > 0) {
|
|
772 |
emitVectorLoad1(asm, tmpVectors[0], arrayPtr1, (tailCount << arrayIndexScale1.log2) - scaleDisplacement1(bytesPerVector), vSize);
|
|
773 |
emitVectorLoad2(asm, tmpVectors[1], arrayPtr2, (tailCount << arrayIndexScale2.log2) - scaleDisplacement2(bytesPerVector), vSize);
|
|
774 |
emitVectorXor(asm, tmpVectors[0], tmpVectors[1], vSize);
|
|
775 |
if (tailCount > elementsPerVector) {
|
|
776 |
emitVectorLoad1(asm, tmpVectors[2], arrayPtr1, 0, vSize);
|
|
777 |
emitVectorLoad2(asm, tmpVectors[3], arrayPtr2, 0, vSize);
|
|
778 |
emitVectorXor(asm, tmpVectors[2], tmpVectors[3], vSize);
|
|
779 |
emitVectorTest(asm, tmpVectors[2], vSize);
|
52578
|
780 |
asm.jcc(AMD64Assembler.ConditionFlag.NotZero, noMatch);
|
|
781 |
}
|
54084
|
782 |
emitVectorTest(asm, tmpVectors[0], vSize);
|
52578
|
783 |
asm.jcc(AMD64Assembler.ConditionFlag.NotZero, noMatch);
|
|
784 |
}
|
|
785 |
}
|
|
786 |
}
|
|
787 |
|
54084
|
788 |
private void emitMovBytes(AMD64MacroAssembler asm, Register dst, AMD64Address src, int size) {
|
52578
|
789 |
switch (size) {
|
|
790 |
case 1:
|
54084
|
791 |
if (signExtend) {
|
|
792 |
asm.movsbq(dst, src);
|
|
793 |
} else {
|
|
794 |
asm.movzbq(dst, src);
|
|
795 |
}
|
52578
|
796 |
break;
|
|
797 |
case 2:
|
54084
|
798 |
if (signExtend) {
|
|
799 |
asm.movswq(dst, src);
|
|
800 |
} else {
|
|
801 |
asm.movzwq(dst, src);
|
|
802 |
}
|
52578
|
803 |
break;
|
|
804 |
case 4:
|
54084
|
805 |
if (signExtend) {
|
|
806 |
asm.movslq(dst, src);
|
|
807 |
} else {
|
|
808 |
// there is no movzlq
|
|
809 |
asm.movl(dst, src);
|
|
810 |
}
|
52578
|
811 |
break;
|
|
812 |
case 8:
|
|
813 |
asm.movq(dst, src);
|
|
814 |
break;
|
|
815 |
default:
|
|
816 |
throw new IllegalStateException();
|
|
817 |
}
|
|
818 |
}
|
|
819 |
|
|
820 |
private static void emitCmpBytes(AMD64MacroAssembler asm, Register dst, Register src, int size) {
|
|
821 |
if (size < 8) {
|
|
822 |
asm.cmpl(dst, src);
|
|
823 |
} else {
|
|
824 |
asm.cmpq(dst, src);
|
|
825 |
}
|
|
826 |
}
|
43972
|
827 |
}
|