43972
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/*
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* Copyright (c) 2013, 2015, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*/
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package org.graalvm.compiler.lir.amd64;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.ILLEGAL;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG;
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import static jdk.vm.ci.code.ValueUtil.asRegister;
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import java.lang.reflect.Array;
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import java.lang.reflect.Field;
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import org.graalvm.compiler.asm.Label;
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import org.graalvm.compiler.asm.amd64.AMD64Address;
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import org.graalvm.compiler.asm.amd64.AMD64Address.Scale;
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import org.graalvm.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
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import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler;
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import org.graalvm.compiler.core.common.LIRKind;
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import org.graalvm.compiler.lir.LIRInstructionClass;
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import org.graalvm.compiler.lir.Opcode;
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import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
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import org.graalvm.compiler.lir.gen.LIRGeneratorTool;
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import jdk.vm.ci.amd64.AMD64;
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import jdk.vm.ci.amd64.AMD64.CPUFeature;
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import jdk.vm.ci.amd64.AMD64Kind;
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import jdk.vm.ci.code.Register;
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import jdk.vm.ci.code.TargetDescription;
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import jdk.vm.ci.meta.JavaKind;
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import jdk.vm.ci.meta.Value;
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import sun.misc.Unsafe;
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/**
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* Emits code which compares two arrays of the same length. If the CPU supports any vector
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* instructions specialized code is emitted to leverage these instructions.
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*/
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@Opcode("ARRAY_EQUALS")
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public final class AMD64ArrayEqualsOp extends AMD64LIRInstruction {
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public static final LIRInstructionClass<AMD64ArrayEqualsOp> TYPE = LIRInstructionClass.create(AMD64ArrayEqualsOp.class);
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private final JavaKind kind;
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private final int arrayBaseOffset;
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private final int arrayIndexScale;
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@Def({REG}) protected Value resultValue;
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@Alive({REG}) protected Value array1Value;
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@Alive({REG}) protected Value array2Value;
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@Alive({REG}) protected Value lengthValue;
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@Temp({REG}) protected Value temp1;
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@Temp({REG}) protected Value temp2;
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@Temp({REG}) protected Value temp3;
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@Temp({REG}) protected Value temp4;
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@Temp({REG, ILLEGAL}) protected Value vectorTemp1;
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@Temp({REG, ILLEGAL}) protected Value vectorTemp2;
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public AMD64ArrayEqualsOp(LIRGeneratorTool tool, JavaKind kind, Value result, Value array1, Value array2, Value length) {
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super(TYPE);
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this.kind = kind;
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Class<?> arrayClass = Array.newInstance(kind.toJavaClass(), 0).getClass();
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this.arrayBaseOffset = UNSAFE.arrayBaseOffset(arrayClass);
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this.arrayIndexScale = UNSAFE.arrayIndexScale(arrayClass);
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this.resultValue = result;
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this.array1Value = array1;
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this.array2Value = array2;
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this.lengthValue = length;
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// Allocate some temporaries.
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this.temp1 = tool.newVariable(LIRKind.unknownReference(tool.target().arch.getWordKind()));
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this.temp2 = tool.newVariable(LIRKind.unknownReference(tool.target().arch.getWordKind()));
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this.temp3 = tool.newVariable(LIRKind.value(tool.target().arch.getWordKind()));
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this.temp4 = tool.newVariable(LIRKind.value(tool.target().arch.getWordKind()));
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// We only need the vector temporaries if we generate SSE code.
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if (supportsSSE41(tool.target())) {
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this.vectorTemp1 = tool.newVariable(LIRKind.value(AMD64Kind.DOUBLE));
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this.vectorTemp2 = tool.newVariable(LIRKind.value(AMD64Kind.DOUBLE));
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} else {
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this.vectorTemp1 = Value.ILLEGAL;
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this.vectorTemp2 = Value.ILLEGAL;
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}
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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Register result = asRegister(resultValue);
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Register array1 = asRegister(temp1);
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Register array2 = asRegister(temp2);
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Register length = asRegister(temp3);
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Label trueLabel = new Label();
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Label falseLabel = new Label();
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Label done = new Label();
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// Load array base addresses.
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masm.leaq(array1, new AMD64Address(asRegister(array1Value), arrayBaseOffset));
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masm.leaq(array2, new AMD64Address(asRegister(array2Value), arrayBaseOffset));
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// Get array length in bytes.
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masm.imull(length, asRegister(lengthValue), arrayIndexScale);
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masm.movl(result, length); // copy
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if (supportsAVX2(crb.target)) {
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emitAVXCompare(crb, masm, result, array1, array2, length, trueLabel, falseLabel);
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} else if (supportsSSE41(crb.target)) {
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emitSSE41Compare(crb, masm, result, array1, array2, length, trueLabel, falseLabel);
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}
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emit8ByteCompare(crb, masm, result, array1, array2, length, trueLabel, falseLabel);
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emitTailCompares(masm, result, array1, array2, length, trueLabel, falseLabel);
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// Return true
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masm.bind(trueLabel);
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masm.movl(result, 1);
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masm.jmpb(done);
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// Return false
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masm.bind(falseLabel);
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masm.xorl(result, result);
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// That's it
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masm.bind(done);
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}
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/**
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* Returns if the underlying AMD64 architecture supports SSE 4.1 instructions.
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*
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* @param target target description of the underlying architecture
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* @return true if the underlying architecture supports SSE 4.1
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*/
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private static boolean supportsSSE41(TargetDescription target) {
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AMD64 arch = (AMD64) target.arch;
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return arch.getFeatures().contains(CPUFeature.SSE4_1);
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}
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/**
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* Vector size used in {@link #emitSSE41Compare}.
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*/
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private static final int SSE4_1_VECTOR_SIZE = 16;
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/**
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* Emits code that uses SSE4.1 128-bit (16-byte) vector compares.
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*/
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private void emitSSE41Compare(CompilationResultBuilder crb, AMD64MacroAssembler masm, Register result, Register array1, Register array2, Register length, Label trueLabel, Label falseLabel) {
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assert supportsSSE41(crb.target);
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Register vector1 = asRegister(vectorTemp1, AMD64Kind.DOUBLE);
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Register vector2 = asRegister(vectorTemp2, AMD64Kind.DOUBLE);
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Label loop = new Label();
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Label compareTail = new Label();
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// Compare 16-byte vectors
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masm.andl(result, SSE4_1_VECTOR_SIZE - 1); // tail count (in bytes)
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masm.andl(length, ~(SSE4_1_VECTOR_SIZE - 1)); // vector count (in bytes)
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masm.jccb(ConditionFlag.Zero, compareTail);
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masm.leaq(array1, new AMD64Address(array1, length, Scale.Times1, 0));
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masm.leaq(array2, new AMD64Address(array2, length, Scale.Times1, 0));
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masm.negq(length);
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// Align the main loop
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masm.align(crb.target.wordSize * 2);
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masm.bind(loop);
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masm.movdqu(vector1, new AMD64Address(array1, length, Scale.Times1, 0));
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masm.movdqu(vector2, new AMD64Address(array2, length, Scale.Times1, 0));
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masm.pxor(vector1, vector2);
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masm.ptest(vector1, vector1);
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masm.jcc(ConditionFlag.NotZero, falseLabel);
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masm.addq(length, SSE4_1_VECTOR_SIZE);
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masm.jcc(ConditionFlag.NotZero, loop);
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masm.testl(result, result);
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masm.jcc(ConditionFlag.Zero, trueLabel);
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/*
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* Compare the remaining bytes with an unaligned memory load aligned to the end of the
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* array.
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*/
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masm.movdqu(vector1, new AMD64Address(array1, result, Scale.Times1, -SSE4_1_VECTOR_SIZE));
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masm.movdqu(vector2, new AMD64Address(array2, result, Scale.Times1, -SSE4_1_VECTOR_SIZE));
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masm.pxor(vector1, vector2);
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masm.ptest(vector1, vector1);
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masm.jcc(ConditionFlag.NotZero, falseLabel);
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masm.jmp(trueLabel);
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masm.bind(compareTail);
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masm.movl(length, result);
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}
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/**
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* Returns if the underlying AMD64 architecture supports AVX instructions.
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*
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* @param target target description of the underlying architecture
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* @return true if the underlying architecture supports AVX
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*/
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private static boolean supportsAVX2(TargetDescription target) {
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AMD64 arch = (AMD64) target.arch;
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return arch.getFeatures().contains(CPUFeature.AVX2);
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}
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/**
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* Vector size used in {@link #emitAVXCompare}.
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*/
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private static final int AVX_VECTOR_SIZE = 32;
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private void emitAVXCompare(CompilationResultBuilder crb, AMD64MacroAssembler masm, Register result, Register array1, Register array2, Register length, Label trueLabel, Label falseLabel) {
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assert supportsAVX2(crb.target);
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Register vector1 = asRegister(vectorTemp1, AMD64Kind.DOUBLE);
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Register vector2 = asRegister(vectorTemp2, AMD64Kind.DOUBLE);
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Label loop = new Label();
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Label compareTail = new Label();
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// Compare 16-byte vectors
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masm.andl(result, AVX_VECTOR_SIZE - 1); // tail count (in bytes)
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masm.andl(length, ~(AVX_VECTOR_SIZE - 1)); // vector count (in bytes)
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masm.jccb(ConditionFlag.Zero, compareTail);
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masm.leaq(array1, new AMD64Address(array1, length, Scale.Times1, 0));
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masm.leaq(array2, new AMD64Address(array2, length, Scale.Times1, 0));
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masm.negq(length);
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// Align the main loop
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masm.align(crb.target.wordSize * 2);
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masm.bind(loop);
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masm.vmovdqu(vector1, new AMD64Address(array1, length, Scale.Times1, 0));
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masm.vmovdqu(vector2, new AMD64Address(array2, length, Scale.Times1, 0));
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masm.vpxor(vector1, vector1, vector2);
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masm.vptest(vector1, vector1);
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masm.jcc(ConditionFlag.NotZero, falseLabel);
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masm.addq(length, AVX_VECTOR_SIZE);
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masm.jcc(ConditionFlag.NotZero, loop);
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masm.testl(result, result);
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masm.jcc(ConditionFlag.Zero, trueLabel);
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/*
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* Compare the remaining bytes with an unaligned memory load aligned to the end of the
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* array.
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*/
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masm.vmovdqu(vector1, new AMD64Address(array1, result, Scale.Times1, -AVX_VECTOR_SIZE));
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masm.vmovdqu(vector2, new AMD64Address(array2, result, Scale.Times1, -AVX_VECTOR_SIZE));
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masm.vpxor(vector1, vector1, vector2);
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masm.vptest(vector1, vector1);
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masm.jcc(ConditionFlag.NotZero, falseLabel);
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masm.jmp(trueLabel);
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masm.bind(compareTail);
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masm.movl(length, result);
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}
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/**
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* Vector size used in {@link #emit8ByteCompare}.
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*/
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private static final int VECTOR_SIZE = 8;
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/**
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* Emits code that uses 8-byte vector compares.
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*/
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private void emit8ByteCompare(CompilationResultBuilder crb, AMD64MacroAssembler masm, Register result, Register array1, Register array2, Register length, Label trueLabel, Label falseLabel) {
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Label loop = new Label();
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Label compareTail = new Label();
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Register temp = asRegister(temp4);
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masm.andl(result, VECTOR_SIZE - 1); // tail count (in bytes)
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masm.andl(length, ~(VECTOR_SIZE - 1)); // vector count (in bytes)
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masm.jccb(ConditionFlag.Zero, compareTail);
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masm.leaq(array1, new AMD64Address(array1, length, Scale.Times1, 0));
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masm.leaq(array2, new AMD64Address(array2, length, Scale.Times1, 0));
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masm.negq(length);
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// Align the main loop
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masm.align(crb.target.wordSize * 2);
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masm.bind(loop);
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masm.movq(temp, new AMD64Address(array1, length, Scale.Times1, 0));
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masm.cmpq(temp, new AMD64Address(array2, length, Scale.Times1, 0));
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masm.jccb(ConditionFlag.NotEqual, falseLabel);
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masm.addq(length, VECTOR_SIZE);
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masm.jccb(ConditionFlag.NotZero, loop);
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masm.testl(result, result);
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masm.jccb(ConditionFlag.Zero, trueLabel);
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/*
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* Compare the remaining bytes with an unaligned memory load aligned to the end of the
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* array.
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*/
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masm.movq(temp, new AMD64Address(array1, result, Scale.Times1, -VECTOR_SIZE));
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masm.cmpq(temp, new AMD64Address(array2, result, Scale.Times1, -VECTOR_SIZE));
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masm.jccb(ConditionFlag.NotEqual, falseLabel);
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masm.jmpb(trueLabel);
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masm.bind(compareTail);
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masm.movl(length, result);
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}
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/**
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* Emits code to compare the remaining 1 to 4 bytes.
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*/
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private void emitTailCompares(AMD64MacroAssembler masm, Register result, Register array1, Register array2, Register length, Label trueLabel, Label falseLabel) {
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Label compare2Bytes = new Label();
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Label compare1Byte = new Label();
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Register temp = asRegister(temp4);
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if (kind.getByteCount() <= 4) {
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// Compare trailing 4 bytes, if any.
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masm.testl(result, 4);
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masm.jccb(ConditionFlag.Zero, compare2Bytes);
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masm.movl(temp, new AMD64Address(array1, 0));
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masm.cmpl(temp, new AMD64Address(array2, 0));
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masm.jccb(ConditionFlag.NotEqual, falseLabel);
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if (kind.getByteCount() <= 2) {
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// Move array pointers forward.
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masm.leaq(array1, new AMD64Address(array1, 4));
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masm.leaq(array2, new AMD64Address(array2, 4));
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// Compare trailing 2 bytes, if any.
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masm.bind(compare2Bytes);
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masm.testl(result, 2);
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masm.jccb(ConditionFlag.Zero, compare1Byte);
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masm.movzwl(temp, new AMD64Address(array1, 0));
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masm.movzwl(length, new AMD64Address(array2, 0));
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masm.cmpl(temp, length);
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masm.jccb(ConditionFlag.NotEqual, falseLabel);
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// The one-byte tail compare is only required for boolean and byte arrays.
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if (kind.getByteCount() <= 1) {
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// Move array pointers forward before we compare the last trailing byte.
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masm.leaq(array1, new AMD64Address(array1, 2));
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masm.leaq(array2, new AMD64Address(array2, 2));
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// Compare trailing byte, if any.
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masm.bind(compare1Byte);
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masm.testl(result, 1);
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|
361 |
masm.jccb(ConditionFlag.Zero, trueLabel);
|
|
362 |
masm.movzbl(temp, new AMD64Address(array1, 0));
|
|
363 |
masm.movzbl(length, new AMD64Address(array2, 0));
|
|
364 |
masm.cmpl(temp, length);
|
|
365 |
masm.jccb(ConditionFlag.NotEqual, falseLabel);
|
|
366 |
} else {
|
|
367 |
masm.bind(compare1Byte);
|
|
368 |
}
|
|
369 |
} else {
|
|
370 |
masm.bind(compare2Bytes);
|
|
371 |
}
|
|
372 |
}
|
|
373 |
}
|
|
374 |
|
|
375 |
private static final Unsafe UNSAFE = initUnsafe();
|
|
376 |
|
|
377 |
private static Unsafe initUnsafe() {
|
|
378 |
try {
|
|
379 |
return Unsafe.getUnsafe();
|
|
380 |
} catch (SecurityException se) {
|
|
381 |
try {
|
|
382 |
Field theUnsafe = Unsafe.class.getDeclaredField("theUnsafe");
|
|
383 |
theUnsafe.setAccessible(true);
|
|
384 |
return (Unsafe) theUnsafe.get(Unsafe.class);
|
|
385 |
} catch (Exception e) {
|
|
386 |
throw new RuntimeException("exception while trying to get Unsafe", e);
|
|
387 |
}
|
|
388 |
}
|
|
389 |
}
|
|
390 |
}
|