author | anoll |
Tue, 12 Nov 2013 09:32:50 +0100 | |
changeset 21575 | 6a9645992cee |
parent 14631 | 526804361522 |
child 22807 | 1cf02ef734e2 |
permissions | -rw-r--r-- |
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/* |
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* Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#ifndef SHARE_VM_CODE_VMREG_HPP |
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#define SHARE_VM_CODE_VMREG_HPP |
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#include "memory/allocation.hpp" |
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#include "utilities/globalDefinitions.hpp" |
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#include "asm/register.hpp" |
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#ifdef COMPILER2 |
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#include "opto/adlcVMDeps.hpp" |
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#include "utilities/ostream.hpp" |
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#ifdef TARGET_ARCH_MODEL_x86_32 |
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# include "adfiles/adGlobals_x86_32.hpp" |
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#endif |
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#ifdef TARGET_ARCH_MODEL_x86_64 |
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# include "adfiles/adGlobals_x86_64.hpp" |
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#endif |
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#ifdef TARGET_ARCH_MODEL_sparc |
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# include "adfiles/adGlobals_sparc.hpp" |
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#endif |
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#ifdef TARGET_ARCH_MODEL_zero |
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# include "adfiles/adGlobals_zero.hpp" |
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#endif |
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#ifdef TARGET_ARCH_MODEL_arm |
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# include "adfiles/adGlobals_arm.hpp" |
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#endif |
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#ifdef TARGET_ARCH_MODEL_ppc |
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# include "adfiles/adGlobals_ppc.hpp" |
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#endif |
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#endif |
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//------------------------------VMReg------------------------------------------ |
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// The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots. |
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// Register numbers below VMRegImpl::stack0 are the same for both. Register |
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// numbers above stack0 are either warped (in the compiler) or unwarped |
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// (in the VM). Unwarped numbers represent stack indices, offsets from |
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// the current stack pointer. Warped numbers are required during compilation |
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// when we do not yet know how big the frame will be. |
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class VMRegImpl; |
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typedef VMRegImpl* VMReg; |
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class VMRegImpl { |
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// friend class OopMap; |
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friend class VMStructs; |
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friend class OptoReg; |
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// friend class Location; |
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private: |
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enum { |
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BAD = -1 |
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}; |
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static VMReg stack0; |
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// Names for registers |
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static const char *regName[]; |
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static const int register_count; |
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public: |
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static VMReg as_VMReg(int val, bool bad_ok = false) { assert(val > BAD || bad_ok, "invalid"); return (VMReg) (intptr_t) val; } |
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const char* name() { |
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if (is_reg()) { |
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return regName[value()]; |
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} else if (!is_valid()) { |
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return "BAD"; |
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} else { |
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// shouldn't really be called with stack |
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return "STACKED REG"; |
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} |
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} |
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static VMReg Bad() { return (VMReg) (intptr_t) BAD; } |
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bool is_valid() const { return ((intptr_t) this) != BAD; } |
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bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; } |
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bool is_reg() const { return is_valid() && !is_stack(); } |
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// A concrete register is a value that returns true for is_reg() and is |
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// also a register you could use in the assembler. On machines with |
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// 64bit registers only one half of the VMReg (and OptoReg) is considered |
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// concrete. |
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bool is_concrete(); |
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// VMRegs are 4 bytes wide on all platforms |
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static const int stack_slot_size; |
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static const int slots_per_word; |
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// This really ought to check that the register is "real" in the sense that |
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// we don't try and get the VMReg number of a physical register that doesn't |
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// have an expressible part. That would be pd specific code |
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VMReg next() { |
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assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be"); |
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return (VMReg)(intptr_t)(value() + 1); |
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} |
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VMReg next(int i) { |
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assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be"); |
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return (VMReg)(intptr_t)(value() + i); |
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} |
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VMReg prev() { |
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assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be"); |
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return (VMReg)(intptr_t)(value() - 1); |
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} |
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intptr_t value() const {return (intptr_t) this; } |
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void print_on(outputStream* st) const; |
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void print() const { print_on(tty); } |
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// bias a stack slot. |
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// Typically used to adjust a virtual frame slots by amounts that are offset by |
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// amounts that are part of the native abi. The VMReg must be a stack slot |
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// and the result must be also. |
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VMReg bias(int offset) { |
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assert(is_stack(), "must be"); |
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// VMReg res = VMRegImpl::as_VMReg(value() + offset); |
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VMReg res = stack2reg(reg2stack() + offset); |
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assert(res->is_stack(), "must be"); |
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return res; |
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} |
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// Convert register numbers to stack slots and vice versa |
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static VMReg stack2reg( int idx ) { |
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return (VMReg) (intptr_t) (stack0->value() + idx); |
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} |
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uintptr_t reg2stack() { |
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assert( is_stack(), "Not a stack-based register" ); |
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return value() - stack0->value(); |
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} |
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static void set_regName(); |
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#ifdef TARGET_ARCH_x86 |
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# include "vmreg_x86.hpp" |
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#endif |
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#ifdef TARGET_ARCH_sparc |
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# include "vmreg_sparc.hpp" |
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#endif |
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#ifdef TARGET_ARCH_zero |
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# include "vmreg_zero.hpp" |
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#endif |
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#ifdef TARGET_ARCH_arm |
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# include "vmreg_arm.hpp" |
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#endif |
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#ifdef TARGET_ARCH_ppc |
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# include "vmreg_ppc.hpp" |
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#endif |
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}; |
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//---------------------------VMRegPair------------------------------------------- |
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// Pairs of 32-bit registers for arguments. |
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// SharedRuntime::java_calling_convention will overwrite the structs with |
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// the calling convention's registers. VMRegImpl::Bad is returned for any |
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// unused 32-bit register. This happens for the unused high half of Int |
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// arguments, or for 32-bit pointers or for longs in the 32-bit sparc build |
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// (which are passed to natives in low 32-bits of e.g. O0/O1 and the high |
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// 32-bits of O0/O1 are set to VMRegImpl::Bad). Longs in one register & doubles |
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// always return a high and a low register, as do 64-bit pointers. |
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// |
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class VMRegPair { |
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private: |
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VMReg _second; |
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VMReg _first; |
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public: |
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void set_bad ( ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); } |
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void set1 ( VMReg v ) { _second=VMRegImpl::Bad(); _first=v; } |
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void set2 ( VMReg v ) { _second=v->next(); _first=v; } |
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void set_pair( VMReg second, VMReg first ) { _second= second; _first= first; } |
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void set_ptr ( VMReg ptr ) { |
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#ifdef _LP64 |
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_second = ptr->next(); |
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#else |
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_second = VMRegImpl::Bad(); |
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#endif |
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_first = ptr; |
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} |
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// Return true if single register, even if the pair is really just adjacent stack slots |
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bool is_single_reg() const { |
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return (_first->is_valid()) && (_first->value() + 1 == _second->value()); |
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} |
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// Return true if single stack based "register" where the slot alignment matches input alignment |
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bool is_adjacent_on_stack(int alignment) const { |
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return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); |
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} |
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// Return true if single stack based "register" where the slot alignment matches input alignment |
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bool is_adjacent_aligned_on_stack(int alignment) const { |
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return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); |
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} |
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// Return true if single register but adjacent stack slots do not count |
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bool is_single_phys_reg() const { |
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return (_first->is_reg() && (_first->value() + 1 == _second->value())); |
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} |
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VMReg second() const { return _second; } |
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VMReg first() const { return _first; } |
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VMRegPair(VMReg s, VMReg f) { _second = s; _first = f; } |
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VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; } |
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VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); } |
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}; |
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#endif // SHARE_VM_CODE_VMREG_HPP |