hotspot/src/cpu/sparc/vm/nativeInst_sparc.hpp
changeset 46596 a7c9706d25a9
parent 46381 020219e46c86
equal deleted inserted replaced
46595:18a062f9a227 46596:a7c9706d25a9
    65             (inv_op3(x) & Assembler::cc_bit_op3) == Assembler::cc_bit_op3);
    65             (inv_op3(x) & Assembler::cc_bit_op3) == Assembler::cc_bit_op3);
    66   }
    66   }
    67   bool is_illegal();
    67   bool is_illegal();
    68   bool is_zombie() {
    68   bool is_zombie() {
    69     int x = long_at(0);
    69     int x = long_at(0);
    70     return is_op3(x,
    70     return (is_op3(x, Assembler::ldsw_op3, Assembler::ldst_op) &&
    71                   Assembler::ldsw_op3,
    71             inv_rs1(x) == G0 && inv_rd(x) == O7);
    72                   Assembler::ldst_op)
       
    73         && Assembler::inv_rs1(x) == G0
       
    74         && Assembler::inv_rd(x) == O7;
       
    75   }
    72   }
    76   bool is_ic_miss_trap();       // Inline-cache uses a trap to detect a miss
    73   bool is_ic_miss_trap();       // Inline-cache uses a trap to detect a miss
    77   bool is_return() {
    74   bool is_return() {
    78     // is it the output of MacroAssembler::ret or MacroAssembler::retl?
    75     // is it the output of MacroAssembler::ret or MacroAssembler::retl?
    79     int x = long_at(0);
    76     int x = long_at(0);
   127 
   124 
   128   bool is_zero_test(Register &reg);
   125   bool is_zero_test(Register &reg);
   129   bool is_load_store_with_small_offset(Register reg);
   126   bool is_load_store_with_small_offset(Register reg);
   130 
   127 
   131  public:
   128  public:
   132 #ifdef ASSERT
       
   133   static int rdpc_instruction()        { return Assembler::op(Assembler::arith_op ) | Assembler::op3(Assembler::rdreg_op3) | Assembler::u_field(5, 18, 14) | Assembler::rd(O7); }
       
   134 #else
       
   135   // Temporary fix: in optimized mode, u_field is a macro for efficiency reasons (see Assembler::u_field) - needs to be fixed
       
   136   static int rdpc_instruction()        { return Assembler::op(Assembler::arith_op ) | Assembler::op3(Assembler::rdreg_op3) |            u_field(5, 18, 14) | Assembler::rd(O7); }
       
   137 #endif
       
   138   static int nop_instruction()         { return Assembler::op(Assembler::branch_op) | Assembler::op2(Assembler::sethi_op2); }
   129   static int nop_instruction()         { return Assembler::op(Assembler::branch_op) | Assembler::op2(Assembler::sethi_op2); }
   139   static int illegal_instruction();    // the output of __ breakpoint_trap()
   130   static int illegal_instruction();    // the output of __ breakpoint_trap()
   140   static int call_instruction(address destination, address pc) { return Assembler::op(Assembler::call_op) | Assembler::wdisp((intptr_t)destination, (intptr_t)pc, 30); }
   131   static int call_instruction(address destination, address pc) { return Assembler::op(Assembler::call_op) | Assembler::wdisp((intptr_t)destination, (intptr_t)pc, 30); }
   141 
   132 
   142   static int branch_instruction(Assembler::op2s op2val, Assembler::Condition c, bool a) {
   133 protected:
   143     return Assembler::op(Assembler::branch_op) | Assembler::op2(op2val) | Assembler::annul(a) | Assembler::cond(c);
       
   144   }
       
   145 
       
   146   static int op3_instruction(Assembler::ops opval, Register rd, Assembler::op3s op3val, Register rs1, int simm13a) {
       
   147     return Assembler::op(opval) | Assembler::rd(rd) | Assembler::op3(op3val) | Assembler::rs1(rs1) | Assembler::immed(true) | Assembler::simm(simm13a, 13);
       
   148   }
       
   149 
       
   150   static int sethi_instruction(Register rd, int imm22a) {
       
   151     return Assembler::op(Assembler::branch_op) | Assembler::rd(rd) | Assembler::op2(Assembler::sethi_op2) | Assembler::hi22(imm22a);
       
   152   }
       
   153 
       
   154  protected:
       
   155   address  addr_at(int offset) const    { return address(this) + offset; }
   134   address  addr_at(int offset) const    { return address(this) + offset; }
   156   int      long_at(int offset) const    { return *(int*)addr_at(offset); }
   135   int      long_at(int offset) const    { return *(int*)addr_at(offset); }
   157   void set_long_at(int offset, int i);      /* deals with I-cache */
   136   void set_long_at(int offset, int i);      /* deals with I-cache */
   158   void set_jlong_at(int offset, jlong i);   /* deals with I-cache */
   137   void set_jlong_at(int offset, jlong i);   /* deals with I-cache */
   159   void set_addr_at(int offset, address x);  /* deals with I-cache */
   138   void set_addr_at(int offset, address x);  /* deals with I-cache */