hotspot/src/cpu/sparc/vm/c1_MacroAssembler_sparc.cpp
author prr
Wed, 15 Apr 2015 14:28:43 -0700
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/*
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 * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "c1/c1_MacroAssembler.hpp"
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#include "c1/c1_Runtime1.hpp"
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#include "classfile/systemDictionary.hpp"
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#include "gc_interface/collectedHeap.hpp"
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#include "interpreter/interpreter.hpp"
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#include "oops/arrayOop.hpp"
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#include "oops/markOop.hpp"
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#include "runtime/basicLock.hpp"
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#include "runtime/biasedLocking.hpp"
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#include "runtime/os.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/stubRoutines.hpp"
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void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
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  Label L;
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  const Register temp_reg = G3_scratch;
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  // Note: needs more testing of out-of-line vs. inline slow case
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  verify_oop(receiver);
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  load_klass(receiver, temp_reg);
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  cmp_and_brx_short(temp_reg, iCache, Assembler::equal, Assembler::pt, L);
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  AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub());
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  jump_to(ic_miss, temp_reg);
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  delayed()->nop();
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  align(CodeEntryAlignment);
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  bind(L);
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}
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void C1_MacroAssembler::explicit_null_check(Register base) {
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  Unimplemented();
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}
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void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_bytes) {
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  assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
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  generate_stack_overflow_check(bang_size_in_bytes);
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  // Create the frame.
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  save_frame_c1(frame_size_in_bytes);
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}
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void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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  if (C1Breakpoint) breakpoint_trap();
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  inline_cache_check(receiver, ic_klass);
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}
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void C1_MacroAssembler::verified_entry() {
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  if (C1Breakpoint) breakpoint_trap();
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  // build frame
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  verify_FPU(0, "method_entry");
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}
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void C1_MacroAssembler::lock_object(Register Rmark, Register Roop, Register Rbox, Register Rscratch, Label& slow_case) {
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  assert_different_registers(Rmark, Roop, Rbox, Rscratch);
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  Label done;
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  Address mark_addr(Roop, oopDesc::mark_offset_in_bytes());
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  // The following move must be the first instruction of emitted since debug
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  // information may be generated for it.
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  // Load object header
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  ld_ptr(mark_addr, Rmark);
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  verify_oop(Roop);
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  // save object being locked into the BasicObjectLock
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  st_ptr(Roop, Rbox, BasicObjectLock::obj_offset_in_bytes());
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  if (UseBiasedLocking) {
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    biased_locking_enter(Roop, Rmark, Rscratch, done, &slow_case);
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  }
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  // Save Rbox in Rscratch to be used for the cas operation
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  mov(Rbox, Rscratch);
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  // and mark it unlocked
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  or3(Rmark, markOopDesc::unlocked_value, Rmark);
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  // save unlocked object header into the displaced header location on the stack
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  st_ptr(Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
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  // compare object markOop with Rmark and if equal exchange Rscratch with object markOop
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  assert(mark_addr.disp() == 0, "cas must take a zero displacement");
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  cas_ptr(mark_addr.base(), Rmark, Rscratch);
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  // if compare/exchange succeeded we found an unlocked object and we now have locked it
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  // hence we are done
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  cmp(Rmark, Rscratch);
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  brx(Assembler::equal, false, Assembler::pt, done);
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  delayed()->sub(Rscratch, SP, Rscratch);  //pull next instruction into delay slot
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  // we did not find an unlocked object so see if this is a recursive case
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  // sub(Rscratch, SP, Rscratch);
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  assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
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  andcc(Rscratch, 0xfffff003, Rscratch);
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  brx(Assembler::notZero, false, Assembler::pn, slow_case);
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  delayed()->st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
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  bind(done);
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}
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void C1_MacroAssembler::unlock_object(Register Rmark, Register Roop, Register Rbox, Label& slow_case) {
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  assert_different_registers(Rmark, Roop, Rbox);
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  Label done;
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  Address mark_addr(Roop, oopDesc::mark_offset_in_bytes());
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  assert(mark_addr.disp() == 0, "cas must take a zero displacement");
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  if (UseBiasedLocking) {
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    // load the object out of the BasicObjectLock
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    ld_ptr(Rbox, BasicObjectLock::obj_offset_in_bytes(), Roop);
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    verify_oop(Roop);
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    biased_locking_exit(mark_addr, Rmark, done);
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  }
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  // Test first it it is a fast recursive unlock
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  ld_ptr(Rbox, BasicLock::displaced_header_offset_in_bytes(), Rmark);
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  br_null_short(Rmark, Assembler::pt, done);
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  if (!UseBiasedLocking) {
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    // load object
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    ld_ptr(Rbox, BasicObjectLock::obj_offset_in_bytes(), Roop);
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    verify_oop(Roop);
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  }
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  // Check if it is still a light weight lock, this is is true if we see
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  // the stack address of the basicLock in the markOop of the object
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  cas_ptr(mark_addr.base(), Rbox, Rmark);
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  cmp(Rbox, Rmark);
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  brx(Assembler::notEqual, false, Assembler::pn, slow_case);
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  delayed()->nop();
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  // Done
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  bind(done);
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}
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void C1_MacroAssembler::try_allocate(
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  Register obj,                        // result: pointer to object after successful allocation
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  Register var_size_in_bytes,          // object size in bytes if unknown at compile time; invalid otherwise
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  int      con_size_in_bytes,          // object size in bytes if   known at compile time
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  Register t1,                         // temp register, must be global register for incr_allocated_bytes
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  Register t2,                         // temp register
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  Label&   slow_case                   // continuation point if fast allocation fails
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) {
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  RegisterOrConstant size_in_bytes = var_size_in_bytes->is_valid()
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    ? RegisterOrConstant(var_size_in_bytes) : RegisterOrConstant(con_size_in_bytes);
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  if (UseTLAB) {
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    tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case);
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  } else {
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    eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
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    incr_allocated_bytes(size_in_bytes, t1, t2);
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  }
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}
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void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
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  assert_different_registers(obj, klass, len, t1, t2);
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  if (UseBiasedLocking && !len->is_valid()) {
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    ld_ptr(klass, in_bytes(Klass::prototype_header_offset()), t1);
1
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  } else {
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    set((intx)markOopDesc::prototype(), t1);
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  }
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  st_ptr(t1, obj, oopDesc::mark_offset_in_bytes());
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  if (UseCompressedClassPointers) {
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    // Save klass
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    mov(klass, t1);
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    encode_klass_not_null(t1);
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    stw(t1, obj, oopDesc::klass_offset_in_bytes());
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  } else {
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    st_ptr(klass, obj, oopDesc::klass_offset_in_bytes());
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  }
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  if (len->is_valid()) {
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    st(len, obj, arrayOopDesc::length_offset_in_bytes());
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  } else if (UseCompressedClassPointers) {
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    // otherwise length is in the class gap
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    store_klass_gap(G0, obj);
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  }
1
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}
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void C1_MacroAssembler::initialize_body(Register base, Register index) {
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  assert_different_registers(base, index);
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  Label loop;
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  bind(loop);
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  subcc(index, HeapWordSize, index);
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  brx(Assembler::greaterEqual, true, Assembler::pt, loop);
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  delayed()->st_ptr(G0, base, index);
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}
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void C1_MacroAssembler::allocate_object(
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  Register obj,                        // result: pointer to object after successful allocation
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  Register t1,                         // temp register
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  Register t2,                         // temp register, must be a global register for try_allocate
1
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  Register t3,                         // temp register
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  int      hdr_size,                   // object header size in words
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  int      obj_size,                   // object size in words
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  Register klass,                      // object klass
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  Label&   slow_case                   // continuation point if fast allocation fails
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) {
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  assert_different_registers(obj, t1, t2, t3, klass);
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  assert(klass == G5, "must be G5");
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  // allocate space & initialize header
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  if (!is_simm13(obj_size * wordSize)) {
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    // would need to use extra register to load
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    // object size => go the slow case for now
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    ba(slow_case);
1
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    delayed()->nop();
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    return;
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  }
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  try_allocate(obj, noreg, obj_size * wordSize, t2, t3, slow_case);
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  initialize_object(obj, klass, noreg, obj_size * HeapWordSize, t1, t2);
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}
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void C1_MacroAssembler::initialize_object(
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  Register obj,                        // result: pointer to object after successful allocation
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  Register klass,                      // object klass
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  Register var_size_in_bytes,          // object size in bytes if unknown at compile time; invalid otherwise
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  int      con_size_in_bytes,          // object size in bytes if   known at compile time
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  Register t1,                         // temp register
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  Register t2                          // temp register
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  ) {
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  const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
1
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  initialize_header(obj, klass, noreg, t1, t2);
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#ifdef ASSERT
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  {
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    Label ok;
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    ld(klass, in_bytes(Klass::layout_helper_offset()), t1);
1
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    if (var_size_in_bytes != noreg) {
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      cmp_and_brx_short(t1, var_size_in_bytes, Assembler::equal, Assembler::pt, ok);
1
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    } else {
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      cmp_and_brx_short(t1, con_size_in_bytes, Assembler::equal, Assembler::pt, ok);
1
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    }
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    stop("bad size in initialize_object");
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    should_not_reach_here();
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    bind(ok);
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  }
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#endif
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  // initialize body
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  const int threshold = 5 * HeapWordSize;              // approximate break even point for code size
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  if (var_size_in_bytes != noreg) {
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    // use a loop
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    add(obj, hdr_size_in_bytes, t1);               // compute address of first element
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    sub(var_size_in_bytes, hdr_size_in_bytes, t2); // compute size of body
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    initialize_body(t1, t2);
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   279
#ifndef _LP64
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  } else if (con_size_in_bytes < threshold * 2) {
1
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    // on v9 we can do double word stores to fill twice as much space.
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    assert(hdr_size_in_bytes % 8 == 0, "double word aligned");
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    assert(con_size_in_bytes % 8 == 0, "double word aligned");
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    for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += 2 * HeapWordSize) stx(G0, obj, i);
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   285
#endif
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   286
  } else if (con_size_in_bytes <= threshold) {
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    // use explicit NULL stores
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    for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += HeapWordSize)     st_ptr(G0, obj, i);
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   289
  } else if (con_size_in_bytes > hdr_size_in_bytes) {
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    // use a loop
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    const Register base  = t1;
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    const Register index = t2;
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   293
    add(obj, hdr_size_in_bytes, base);               // compute address of first element
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   294
    // compute index = number of words to clear
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   295
    set(con_size_in_bytes - hdr_size_in_bytes, index);
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   296
    initialize_body(base, index);
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   297
  }
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   298
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   299
  if (CURRENT_ENV->dtrace_alloc_probes()) {
1
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   300
    assert(obj == O0, "must be");
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    call(CAST_FROM_FN_PTR(address, Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)),
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         relocInfo::runtime_call_type);
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    delayed()->nop();
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   304
  }
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  verify_oop(obj);
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   307
}
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   308
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   309
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void C1_MacroAssembler::allocate_array(
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   311
  Register obj,                        // result: pointer to array after successful allocation
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   312
  Register len,                        // array length
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   313
  Register t1,                         // temp register
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   314
  Register t2,                         // temp register
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   315
  Register t3,                         // temp register
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   316
  int      hdr_size,                   // object header size in words
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   317
  int      elt_size,                   // element size in bytes
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   318
  Register klass,                      // object klass
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   319
  Label&   slow_case                   // continuation point if fast allocation fails
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   320
) {
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   321
  assert_different_registers(obj, len, t1, t2, t3, klass);
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   322
  assert(klass == G5, "must be G5");
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   323
  assert(t1 == G1, "must be G1");
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   324
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   325
  // determine alignment mask
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   326
  assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
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   327
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  // check for negative or excessive length
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   329
  // note: the maximum length allowed is chosen so that arrays of any
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   330
  //       element size with this length are always smaller or equal
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   331
  //       to the largest integer (i.e., array size computation will
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  //       not overflow)
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   333
  set(max_array_allocation_length, t1);
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   334
  cmp(len, t1);
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   335
  br(Assembler::greaterUnsigned, false, Assembler::pn, slow_case);
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   336
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  // compute array size
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   338
  // note: if 0 <= len <= max_length, len*elt_size + header + alignment is
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   339
  //       smaller or equal to the largest integer; also, since top is always
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   340
  //       aligned, we can do the alignment here instead of at the end address
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   341
  //       computation
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  const Register arr_size = t1;
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   343
  switch (elt_size) {
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   344
    case  1: delayed()->mov(len,    arr_size); break;
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   345
    case  2: delayed()->sll(len, 1, arr_size); break;
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   346
    case  4: delayed()->sll(len, 2, arr_size); break;
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   347
    case  8: delayed()->sll(len, 3, arr_size); break;
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   348
    default: ShouldNotReachHere();
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   349
  }
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   350
  add(arr_size, hdr_size * wordSize + MinObjAlignmentInBytesMask, arr_size); // add space for header & alignment
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   351
  and3(arr_size, ~MinObjAlignmentInBytesMask, arr_size);                     // align array size
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   352
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   353
  // allocate space & initialize header
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   354
  if (UseTLAB) {
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   355
    tlab_allocate(obj, arr_size, 0, t2, slow_case);
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   356
  } else {
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   357
    eden_allocate(obj, arr_size, 0, t2, t3, slow_case);
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   358
  }
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   359
  initialize_header(obj, klass, len, t2, t3);
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   360
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  // initialize body
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   362
  const Register base  = t2;
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   363
  const Register index = t3;
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   364
  add(obj, hdr_size * wordSize, base);               // compute address of first element
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diff changeset
   365
  sub(arr_size, hdr_size * wordSize, index);         // compute index = number of words to clear
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   366
  initialize_body(base, index);
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   367
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69187054225f 6788527: Server vm intermittently fails with assertion "live value must not be garbage" with fastdebug bits
kvn
parents: 2571
diff changeset
   368
  if (CURRENT_ENV->dtrace_alloc_probes()) {
1
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   369
    assert(obj == O0, "must be");
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   370
    call(CAST_FROM_FN_PTR(address, Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)),
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   371
         relocInfo::runtime_call_type);
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   372
    delayed()->nop();
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   373
  }
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parents:
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   374
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   375
  verify_oop(obj);
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   376
}
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parents:
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   377
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   378
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   379
#ifndef PRODUCT
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   380
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   381
void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
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   382
  if (!VerifyOops) return;
2571
d602ad6538bd 6822110: Add AddressLiteral class on SPARC
twisti
parents: 670
diff changeset
   383
  verify_oop_addr(Address(SP, stack_offset + STACK_BIAS));
1
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   384
}
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   385
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parents:
diff changeset
   386
void C1_MacroAssembler::verify_not_null_oop(Register r) {
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   387
  Label not_null;
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0981ce1c3eef 7063628: Use cbcond on T4
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diff changeset
   388
  br_notnull_short(r, Assembler::pt, not_null);
1
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   389
  stop("non-null oop required");
489c9b5090e2 Initial load
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   390
  bind(not_null);
489c9b5090e2 Initial load
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parents:
diff changeset
   391
  if (!VerifyOops) return;
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parents:
diff changeset
   392
  verify_oop(r);
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   393
}
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parents:
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   394
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parents:
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   395
void C1_MacroAssembler::invalidate_registers(bool iregisters, bool lregisters, bool oregisters,
489c9b5090e2 Initial load
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   396
                                             Register preserve1, Register preserve2) {
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parents:
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   397
  if (iregisters) {
489c9b5090e2 Initial load
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parents:
diff changeset
   398
    for (int i = 0; i < 6; i++) {
489c9b5090e2 Initial load
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parents:
diff changeset
   399
      Register r = as_iRegister(i);
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   400
      if (r != preserve1 && r != preserve2)  set(0xdead, r);
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parents:
diff changeset
   401
    }
489c9b5090e2 Initial load
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parents:
diff changeset
   402
  }
489c9b5090e2 Initial load
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parents:
diff changeset
   403
  if (oregisters) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
    for (int i = 0; i < 6; i++) {
489c9b5090e2 Initial load
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parents:
diff changeset
   405
      Register r = as_oRegister(i);
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parents:
diff changeset
   406
      if (r != preserve1 && r != preserve2)  set(0xdead, r);
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parents:
diff changeset
   407
    }
489c9b5090e2 Initial load
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parents:
diff changeset
   408
  }
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parents:
diff changeset
   409
  if (lregisters) {
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parents:
diff changeset
   410
    for (int i = 0; i < 8; i++) {
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parents:
diff changeset
   411
      Register r = as_lRegister(i);
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parents:
diff changeset
   412
      if (r != preserve1 && r != preserve2)  set(0xdead, r);
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parents:
diff changeset
   413
    }
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parents:
diff changeset
   414
  }
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parents:
diff changeset
   415
}
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parents:
diff changeset
   416
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parents:
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   417
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parents:
diff changeset
   418
#endif