--- a/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Tue Nov 24 08:29:48 2015 +0000
+++ b/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Tue Nov 24 09:02:26 2015 +0000
@@ -189,10 +189,11 @@
   get_cache_and_index_at_bcp(cache, index, bcp_offset, index_size);
   // We use a 32-bit load here since the layout of 64-bit words on
   // little-endian machines allow us that.
-  // n.b. unlike x86 cache alreeady includes the index offset
-  ldrw(bytecode, Address(cache,
+  // n.b. unlike x86 cache already includes the index offset
+  lea(bytecode, Address(cache,
                          ConstantPoolCache::base_offset()
                          + ConstantPoolCacheEntry::indices_offset()));
+  ldarw(bytecode, bytecode);
   const int shift_count = (1 + byte_no) * BitsPerByte;
   ubfx(bytecode, bytecode, shift_count, BitsPerByte);
 }