8184162: Support addresses with index operands in LIRAssembler::leal on SPARC
authoreosterlund
Wed, 12 Jul 2017 11:59:51 +0200
changeset 46651 a0aef4e7599b
parent 46650 642365ee2b92
child 46654 149aa826a8bf
child 46655 d5ecb8ef2b93
child 46658 72c739e058d4
8184162: Support addresses with index operands in LIRAssembler::leal on SPARC Summary: Support was added for C1 leal on addresses with an index operand on SPARC. Reviewed-by: kvn, roland
hotspot/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp
--- a/hotspot/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Wed Jul 12 09:49:05 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Wed Jul 12 11:59:51 2017 +0200
@@ -3189,16 +3189,29 @@
   __ srl (rs,  0, rd->successor());
 }
 
-
 void LIR_Assembler::leal(LIR_Opr addr_opr, LIR_Opr dest) {
-  LIR_Address* addr = addr_opr->as_address_ptr();
-  assert(addr->index()->is_illegal() && addr->scale() == LIR_Address::times_1, "can't handle complex addresses yet");
+  const LIR_Address* addr = addr_opr->as_address_ptr();
+  assert(addr->scale() == LIR_Address::times_1, "can't handle complex addresses yet");
+  const Register dest_reg = dest->as_pointer_register();
+  const Register base_reg = addr->base()->as_pointer_register();
 
   if (Assembler::is_simm13(addr->disp())) {
-    __ add(addr->base()->as_pointer_register(), addr->disp(), dest->as_pointer_register());
+    if (addr->index()->is_valid()) {
+      const Register index_reg = addr->index()->as_pointer_register();
+      assert(index_reg != G3_scratch, "invariant");
+      __ add(base_reg, addr->disp(), G3_scratch);
+      __ add(index_reg, G3_scratch, dest_reg);
+    } else {
+      __ add(base_reg, addr->disp(), dest_reg);
+    }
   } else {
     __ set(addr->disp(), G3_scratch);
-    __ add(addr->base()->as_pointer_register(), G3_scratch, dest->as_pointer_register());
+    if (addr->index()->is_valid()) {
+      const Register index_reg = addr->index()->as_pointer_register();
+      assert(index_reg != G3_scratch, "invariant");
+      __ add(index_reg, G3_scratch, G3_scratch);
+    }
+    __ add(base_reg, G3_scratch, dest_reg);
   }
 }