8157906: aarch64: some more integer rotate instructions are never emitted
authorfyang
Fri, 27 May 2016 20:38:38 +0800
changeset 39233 98bdcf5cec8f
parent 39232 118d17fef4f9
child 39234 d48ea2ff9c02
child 39239 e4ff636bc83a
8157906: aarch64: some more integer rotate instructions are never emitted Summary: fix wrong definition of source operand of left rotate instructions Reviewed-by: aph Contributed-by: teng.lu@linaro.org
hotspot/src/cpu/aarch64/vm/aarch64.ad
--- a/hotspot/src/cpu/aarch64/vm/aarch64.ad	Fri May 27 01:02:16 2016 +0800
+++ b/hotspot/src/cpu/aarch64/vm/aarch64.ad	Fri May 27 20:38:38 2016 +0800
@@ -12179,21 +12179,21 @@
   %}
 %}
 
-instruct rolI_rReg_Var_C_32(iRegLNoSp dst, iRegL src, iRegI shift, immI_32 c_32, rFlagsReg cr)
+instruct rolI_rReg_Var_C_32(iRegINoSp dst, iRegI src, iRegI shift, immI_32 c_32, rFlagsReg cr)
 %{
   match(Set dst (OrI (LShiftI src shift) (URShiftI src (SubI c_32 shift))));
 
   expand %{
-    rolL_rReg(dst, src, shift, cr);
-  %}
-%}
-
-instruct rolI_rReg_Var_C0(iRegLNoSp dst, iRegL src, iRegI shift, immI0 c0, rFlagsReg cr)
+    rolI_rReg(dst, src, shift, cr);
+  %}
+%}
+
+instruct rolI_rReg_Var_C0(iRegINoSp dst, iRegI src, iRegI shift, immI0 c0, rFlagsReg cr)
 %{
   match(Set dst (OrI (LShiftI src shift) (URShiftI src (SubI c0 shift))));
 
   expand %{
-    rolL_rReg(dst, src, shift, cr);
+    rolI_rReg(dst, src, shift, cr);
   %}
 %}