hotspot/src/cpu/ppc/vm/c1_LIR_ppc.cpp
author goetz
Thu, 23 Jun 2016 22:33:46 +0200
changeset 40071 53e12df44b7b
permissions -rw-r--r--
8160245: C1: Clean up platform #defines in c1_LIR.hpp. Summary: Also add fnoreg on x86, LIR_Address constructor without scale, clean up templateInterpreterGenerator.hpp and remove PPC32 special cases. Reviewed-by: coleenp, thartmann

/*
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 * version 2 for more details (a copy is included in the LICENSE file that
 * accompanied this code).
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#include "precompiled.hpp"
#include "asm/register.hpp"
#include "c1/c1_LIR.hpp"

FloatRegister LIR_OprDesc::as_float_reg() const {
  return as_FloatRegister(fpu_regnr());
}

FloatRegister LIR_OprDesc::as_double_reg() const {
  return as_FloatRegister(fpu_regnrLo());
}

// Reg2 unused.
LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) {
  assert(!as_FloatRegister(reg2)->is_valid(), "Not used on this platform");
  return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
                             (reg1 << LIR_OprDesc::reg2_shift) |
                             LIR_OprDesc::double_type          |
                             LIR_OprDesc::fpu_register         |
                             LIR_OprDesc::double_size);
}

#ifndef PRODUCT
void LIR_Address::verify() const {
  assert(scale() == times_1, "Scaled addressing mode not available on PPC and should not be used");
  assert(disp() == 0 || index()->is_illegal(), "can't have both");
#ifdef _LP64
  assert(base()->is_cpu_register(), "wrong base operand");
  assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
  assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
         "wrong type for addresses");
#else
  assert(base()->is_single_cpu(), "wrong base operand");
  assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
  assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
         "wrong type for addresses");
#endif
}
#endif // PRODUCT