--- a/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp Mon Sep 23 14:39:11 2019 -0400
+++ b/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp Mon Sep 23 14:49:04 2019 -0400
@@ -728,7 +728,7 @@
move_regs(src->as_register(), dest->as_register());
} else if (dest->is_double_cpu()) {
- if (src->type() == T_OBJECT || src->type() == T_ARRAY) {
+ if (is_reference_type(src->type()) {
// Surprising to me but we can see move of a long to t_object
__ verify_oop(src->as_register());
move_regs(src->as_register(), dest->as_register_lo());
@@ -756,7 +756,7 @@
void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack) {
if (src->is_single_cpu()) {
- if (type == T_ARRAY || type == T_OBJECT) {
+ if (is_reference_type(type)) {
__ str(src->as_register(), frame_map()->address_for_slot(dest->single_stack_ix()));
__ verify_oop(src->as_register());
} else if (type == T_METADATA || type == T_DOUBLE) {
@@ -794,7 +794,7 @@
return;
}
- if (type == T_ARRAY || type == T_OBJECT) {
+ if (is_reference_type(type)) {
__ verify_oop(src->as_register());
if (UseCompressedOops && !wide) {
@@ -869,7 +869,7 @@
assert(dest->is_register(), "should not call otherwise");
if (dest->is_single_cpu()) {
- if (type == T_ARRAY || type == T_OBJECT) {
+ if (is_reference_type(type)) {
__ ldr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix()));
__ verify_oop(dest->as_register());
} else if (type == T_METADATA) {
@@ -1019,7 +1019,7 @@
ShouldNotReachHere();
}
- if (type == T_ARRAY || type == T_OBJECT) {
+ if (is_reference_type(type)) {
if (UseCompressedOops && !wide) {
__ decode_heap_oop(dest->as_register());
}
@@ -1227,8 +1227,8 @@
__ uxtw(len, len);
if (UseSlowPath ||
- (!UseFastNewObjectArray && (op->type() == T_OBJECT || op->type() == T_ARRAY)) ||
- (!UseFastNewTypeArray && (op->type() != T_OBJECT && op->type() != T_ARRAY))) {
+ (!UseFastNewObjectArray && is_reference_type(op->type())) ||
+ (!UseFastNewTypeArray && !is_reference_type(op->type()))) {
__ b(*op->stub()->entry());
} else {
Register tmp1 = op->tmp1()->as_register();
@@ -1948,10 +1948,10 @@
if (opr2->is_single_cpu()) {
// cpu register - cpu register
Register reg2 = opr2->as_register();
- if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY) {
+ if (is_reference_type(opr1->type())) {
__ cmpoop(reg1, reg2);
} else {
- assert(opr2->type() != T_OBJECT && opr2->type() != T_ARRAY, "cmp int, oop?");
+ assert(!is_reference_type(opr2->type()), "cmp int, oop?");
__ cmpw(reg1, reg2);
}
return;
@@ -2243,7 +2243,7 @@
CodeStub* stub = op->stub();
int flags = op->flags();
BasicType basic_type = default_type != NULL ? default_type->element_type()->basic_type() : T_ILLEGAL;
- if (basic_type == T_ARRAY) basic_type = T_OBJECT;
+ if (is_reference_type(basic_type)) basic_type = T_OBJECT;
// if we don't know anything, just go through the generic arraycopy
if (default_type == NULL // || basic_type == T_OBJECT
@@ -3131,7 +3131,7 @@
void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp_op) {
Address addr = as_Address(src->as_address_ptr());
BasicType type = src->type();
- bool is_oop = type == T_OBJECT || type == T_ARRAY;
+ bool is_oop = is_reference_type(type);
void (MacroAssembler::* add)(Register prev, RegisterOrConstant incr, Register addr);
void (MacroAssembler::* xchg)(Register prev, Register newv, Register addr);