equal
deleted
inserted
replaced
726 __ verify_oop(src->as_register()); |
726 __ verify_oop(src->as_register()); |
727 } |
727 } |
728 move_regs(src->as_register(), dest->as_register()); |
728 move_regs(src->as_register(), dest->as_register()); |
729 |
729 |
730 } else if (dest->is_double_cpu()) { |
730 } else if (dest->is_double_cpu()) { |
731 if (src->type() == T_OBJECT || src->type() == T_ARRAY) { |
731 if (is_reference_type(src->type()) { |
732 // Surprising to me but we can see move of a long to t_object |
732 // Surprising to me but we can see move of a long to t_object |
733 __ verify_oop(src->as_register()); |
733 __ verify_oop(src->as_register()); |
734 move_regs(src->as_register(), dest->as_register_lo()); |
734 move_regs(src->as_register(), dest->as_register_lo()); |
735 return; |
735 return; |
736 } |
736 } |
754 } |
754 } |
755 } |
755 } |
756 |
756 |
757 void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack) { |
757 void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack) { |
758 if (src->is_single_cpu()) { |
758 if (src->is_single_cpu()) { |
759 if (type == T_ARRAY || type == T_OBJECT) { |
759 if (is_reference_type(type)) { |
760 __ str(src->as_register(), frame_map()->address_for_slot(dest->single_stack_ix())); |
760 __ str(src->as_register(), frame_map()->address_for_slot(dest->single_stack_ix())); |
761 __ verify_oop(src->as_register()); |
761 __ verify_oop(src->as_register()); |
762 } else if (type == T_METADATA || type == T_DOUBLE) { |
762 } else if (type == T_METADATA || type == T_DOUBLE) { |
763 __ str(src->as_register(), frame_map()->address_for_slot(dest->single_stack_ix())); |
763 __ str(src->as_register(), frame_map()->address_for_slot(dest->single_stack_ix())); |
764 } else { |
764 } else { |
792 if (patch_code != lir_patch_none) { |
792 if (patch_code != lir_patch_none) { |
793 deoptimize_trap(info); |
793 deoptimize_trap(info); |
794 return; |
794 return; |
795 } |
795 } |
796 |
796 |
797 if (type == T_ARRAY || type == T_OBJECT) { |
797 if (is_reference_type(type)) { |
798 __ verify_oop(src->as_register()); |
798 __ verify_oop(src->as_register()); |
799 |
799 |
800 if (UseCompressedOops && !wide) { |
800 if (UseCompressedOops && !wide) { |
801 __ encode_heap_oop(compressed_src, src->as_register()); |
801 __ encode_heap_oop(compressed_src, src->as_register()); |
802 } else { |
802 } else { |
867 void LIR_Assembler::stack2reg(LIR_Opr src, LIR_Opr dest, BasicType type) { |
867 void LIR_Assembler::stack2reg(LIR_Opr src, LIR_Opr dest, BasicType type) { |
868 assert(src->is_stack(), "should not call otherwise"); |
868 assert(src->is_stack(), "should not call otherwise"); |
869 assert(dest->is_register(), "should not call otherwise"); |
869 assert(dest->is_register(), "should not call otherwise"); |
870 |
870 |
871 if (dest->is_single_cpu()) { |
871 if (dest->is_single_cpu()) { |
872 if (type == T_ARRAY || type == T_OBJECT) { |
872 if (is_reference_type(type)) { |
873 __ ldr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix())); |
873 __ ldr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix())); |
874 __ verify_oop(dest->as_register()); |
874 __ verify_oop(dest->as_register()); |
875 } else if (type == T_METADATA) { |
875 } else if (type == T_METADATA) { |
876 __ ldr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix())); |
876 __ ldr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix())); |
877 } else { |
877 } else { |
1017 |
1017 |
1018 default: |
1018 default: |
1019 ShouldNotReachHere(); |
1019 ShouldNotReachHere(); |
1020 } |
1020 } |
1021 |
1021 |
1022 if (type == T_ARRAY || type == T_OBJECT) { |
1022 if (is_reference_type(type)) { |
1023 if (UseCompressedOops && !wide) { |
1023 if (UseCompressedOops && !wide) { |
1024 __ decode_heap_oop(dest->as_register()); |
1024 __ decode_heap_oop(dest->as_register()); |
1025 } |
1025 } |
1026 |
1026 |
1027 if (!UseZGC) { |
1027 if (!UseZGC) { |
1225 void LIR_Assembler::emit_alloc_array(LIR_OpAllocArray* op) { |
1225 void LIR_Assembler::emit_alloc_array(LIR_OpAllocArray* op) { |
1226 Register len = op->len()->as_register(); |
1226 Register len = op->len()->as_register(); |
1227 __ uxtw(len, len); |
1227 __ uxtw(len, len); |
1228 |
1228 |
1229 if (UseSlowPath || |
1229 if (UseSlowPath || |
1230 (!UseFastNewObjectArray && (op->type() == T_OBJECT || op->type() == T_ARRAY)) || |
1230 (!UseFastNewObjectArray && is_reference_type(op->type())) || |
1231 (!UseFastNewTypeArray && (op->type() != T_OBJECT && op->type() != T_ARRAY))) { |
1231 (!UseFastNewTypeArray && !is_reference_type(op->type()))) { |
1232 __ b(*op->stub()->entry()); |
1232 __ b(*op->stub()->entry()); |
1233 } else { |
1233 } else { |
1234 Register tmp1 = op->tmp1()->as_register(); |
1234 Register tmp1 = op->tmp1()->as_register(); |
1235 Register tmp2 = op->tmp2()->as_register(); |
1235 Register tmp2 = op->tmp2()->as_register(); |
1236 Register tmp3 = op->tmp3()->as_register(); |
1236 Register tmp3 = op->tmp3()->as_register(); |
1946 } else if (opr1->is_single_cpu() || opr1->is_double_cpu()) { |
1946 } else if (opr1->is_single_cpu() || opr1->is_double_cpu()) { |
1947 Register reg1 = as_reg(opr1); |
1947 Register reg1 = as_reg(opr1); |
1948 if (opr2->is_single_cpu()) { |
1948 if (opr2->is_single_cpu()) { |
1949 // cpu register - cpu register |
1949 // cpu register - cpu register |
1950 Register reg2 = opr2->as_register(); |
1950 Register reg2 = opr2->as_register(); |
1951 if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY) { |
1951 if (is_reference_type(opr1->type())) { |
1952 __ cmpoop(reg1, reg2); |
1952 __ cmpoop(reg1, reg2); |
1953 } else { |
1953 } else { |
1954 assert(opr2->type() != T_OBJECT && opr2->type() != T_ARRAY, "cmp int, oop?"); |
1954 assert(!is_reference_type(opr2->type()), "cmp int, oop?"); |
1955 __ cmpw(reg1, reg2); |
1955 __ cmpw(reg1, reg2); |
1956 } |
1956 } |
1957 return; |
1957 return; |
1958 } |
1958 } |
1959 if (opr2->is_double_cpu()) { |
1959 if (opr2->is_double_cpu()) { |
2241 __ resolve(ACCESS_WRITE, dst); |
2241 __ resolve(ACCESS_WRITE, dst); |
2242 |
2242 |
2243 CodeStub* stub = op->stub(); |
2243 CodeStub* stub = op->stub(); |
2244 int flags = op->flags(); |
2244 int flags = op->flags(); |
2245 BasicType basic_type = default_type != NULL ? default_type->element_type()->basic_type() : T_ILLEGAL; |
2245 BasicType basic_type = default_type != NULL ? default_type->element_type()->basic_type() : T_ILLEGAL; |
2246 if (basic_type == T_ARRAY) basic_type = T_OBJECT; |
2246 if (is_reference_type(basic_type)) basic_type = T_OBJECT; |
2247 |
2247 |
2248 // if we don't know anything, just go through the generic arraycopy |
2248 // if we don't know anything, just go through the generic arraycopy |
2249 if (default_type == NULL // || basic_type == T_OBJECT |
2249 if (default_type == NULL // || basic_type == T_OBJECT |
2250 ) { |
2250 ) { |
2251 Label done; |
2251 Label done; |
3129 } |
3129 } |
3130 |
3130 |
3131 void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp_op) { |
3131 void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp_op) { |
3132 Address addr = as_Address(src->as_address_ptr()); |
3132 Address addr = as_Address(src->as_address_ptr()); |
3133 BasicType type = src->type(); |
3133 BasicType type = src->type(); |
3134 bool is_oop = type == T_OBJECT || type == T_ARRAY; |
3134 bool is_oop = is_reference_type(type); |
3135 |
3135 |
3136 void (MacroAssembler::* add)(Register prev, RegisterOrConstant incr, Register addr); |
3136 void (MacroAssembler::* add)(Register prev, RegisterOrConstant incr, Register addr); |
3137 void (MacroAssembler::* xchg)(Register prev, Register newv, Register addr); |
3137 void (MacroAssembler::* xchg)(Register prev, Register newv, Register addr); |
3138 |
3138 |
3139 switch(type) { |
3139 switch(type) { |