1 /* |
1 /* |
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved. |
3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved. |
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
5 * |
5 * |
6 * This code is free software; you can redistribute it and/or modify it |
6 * This code is free software; you can redistribute it and/or modify it |
7 * under the terms of the GNU General Public License version 2 only, as |
7 * under the terms of the GNU General Public License version 2 only, as |
8 * published by the Free Software Foundation. |
8 * published by the Free Software Foundation. |
165 |
165 |
166 virtual void notify(int type); |
166 virtual void notify(int type); |
167 |
167 |
168 // aliases defined in AARCH64 spec |
168 // aliases defined in AARCH64 spec |
169 |
169 |
170 |
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171 template<class T> |
170 template<class T> |
172 inline void cmpw(Register Rd, T imm) { subsw(zr, Rd, imm); } |
171 inline void cmpw(Register Rd, T imm) { subsw(zr, Rd, imm); } |
173 inline void cmp(Register Rd, unsigned imm) { subs(zr, Rd, imm); } |
172 inline void cmp(Register Rd, unsigned imm) { subs(zr, Rd, imm); } |
174 |
173 |
175 inline void cmnw(Register Rd, unsigned imm) { addsw(zr, Rd, imm); } |
174 inline void cmnw(Register Rd, unsigned imm) { addsw(zr, Rd, imm); } |
176 inline void cmn(Register Rd, unsigned imm) { adds(zr, Rd, imm); } |
175 inline void cmn(Register Rd, unsigned imm) { adds(zr, Rd, imm); } |
177 |
176 |
1119 void string_indexof(Register str1, Register str2, |
1118 void string_indexof(Register str1, Register str2, |
1120 Register cnt1, Register cnt2, |
1119 Register cnt1, Register cnt2, |
1121 Register tmp1, Register tmp2, |
1120 Register tmp1, Register tmp2, |
1122 Register tmp3, Register tmp4, |
1121 Register tmp3, Register tmp4, |
1123 int int_cnt1, Register result); |
1122 int int_cnt1, Register result); |
1124 |
1123 private: |
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1124 void add2_with_carry(Register final_dest_hi, Register dest_hi, Register dest_lo, |
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1125 Register src1, Register src2); |
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1126 void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2) { |
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1127 add2_with_carry(dest_hi, dest_hi, dest_lo, src1, src2); |
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1128 } |
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1129 void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart, |
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1130 Register y, Register y_idx, Register z, |
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1131 Register carry, Register product, |
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1132 Register idx, Register kdx); |
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1133 void multiply_128_x_128_loop(Register y, Register z, |
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1134 Register carry, Register carry2, |
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1135 Register idx, Register jdx, |
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1136 Register yz_idx1, Register yz_idx2, |
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1137 Register tmp, Register tmp3, Register tmp4, |
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1138 Register tmp7, Register product_hi); |
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1139 public: |
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1140 void multiply_to_len(Register x, Register xlen, Register y, Register ylen, Register z, |
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1141 Register zlen, Register tmp1, Register tmp2, Register tmp3, |
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1142 Register tmp4, Register tmp5, Register tmp6, Register tmp7); |
1125 // ISB may be needed because of a safepoint |
1143 // ISB may be needed because of a safepoint |
1126 void maybe_isb() { isb(); } |
1144 void maybe_isb() { isb(); } |
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1145 |
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1146 private: |
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1147 // Return the effective address r + (r1 << ext) + offset. |
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1148 // Uses rscratch2. |
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1149 Address offsetted_address(Register r, Register r1, Address::extend ext, |
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1150 int offset, int size); |
1127 }; |
1151 }; |
1128 |
1152 |
1129 // Used by aarch64.ad to control code generation |
1153 // Used by aarch64.ad to control code generation |
1130 #define treat_as_volatile(MEM_NODE) \ |
1154 #define treat_as_volatile(MEM_NODE) \ |
1131 (MacroAssembler::use_acq_rel_for_volatile_fields() ? (MEM_NODE)->is_volatile() : false) |
1155 (MacroAssembler::use_acq_rel_for_volatile_fields() ? (MEM_NODE)->is_volatile() : false) |