23 */ |
23 */ |
24 |
24 |
25 #ifndef CPU_X86_VM_VMREG_X86_HPP |
25 #ifndef CPU_X86_VM_VMREG_X86_HPP |
26 #define CPU_X86_VM_VMREG_X86_HPP |
26 #define CPU_X86_VM_VMREG_X86_HPP |
27 |
27 |
28 bool is_Register(); |
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29 Register as_Register(); |
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30 |
28 |
31 bool is_FloatRegister(); |
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32 FloatRegister as_FloatRegister(); |
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33 |
29 |
34 bool is_XMMRegister(); |
30 inline bool is_Register() { |
35 XMMRegister as_XMMRegister(); |
31 return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; |
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32 } |
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33 |
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34 inline bool is_FloatRegister() { |
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35 return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; |
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36 } |
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37 |
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38 inline bool is_XMMRegister() { |
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39 return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm; |
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40 } |
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41 |
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42 inline Register as_Register() { |
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43 |
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44 assert( is_Register(), "must be"); |
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45 // Yuk |
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46 #ifdef AMD64 |
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47 return ::as_Register(value() >> 1); |
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48 #else |
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49 return ::as_Register(value()); |
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50 #endif // AMD64 |
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51 } |
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52 |
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53 inline FloatRegister as_FloatRegister() { |
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54 assert( is_FloatRegister() && is_even(value()), "must be" ); |
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55 // Yuk |
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56 return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); |
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57 } |
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58 |
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59 inline XMMRegister as_XMMRegister() { |
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60 assert( is_XMMRegister() && is_even(value()), "must be" ); |
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61 // Yuk |
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62 return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 3); |
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63 } |
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64 |
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65 inline bool is_concrete() { |
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66 assert(is_reg(), "must be"); |
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67 #ifndef AMD64 |
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68 if (is_Register()) return true; |
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69 #endif // AMD64 |
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70 return is_even(value()); |
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71 } |
36 |
72 |
37 #endif // CPU_X86_VM_VMREG_X86_HPP |
73 #endif // CPU_X86_VM_VMREG_X86_HPP |