diff -r 3bcfa1db9717 -r d5a8dbdc5150 hotspot/src/cpu/x86/vm/vmreg_x86.hpp
--- a/hotspot/src/cpu/x86/vm/vmreg_x86.hpp	Wed Jul 02 20:20:45 2014 -0400
+++ b/hotspot/src/cpu/x86/vm/vmreg_x86.hpp	Fri Jul 04 11:46:01 2014 +0200
@@ -25,13 +25,49 @@
 #ifndef CPU_X86_VM_VMREG_X86_HPP
 #define CPU_X86_VM_VMREG_X86_HPP
 
-  bool is_Register();
-  Register as_Register();
+
+
+inline bool is_Register() {
+  return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
+}
+
+inline bool is_FloatRegister() {
+  return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
+}
+
+inline bool is_XMMRegister() {
+  return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm;
+}
+
+inline Register as_Register() {
 
-  bool is_FloatRegister();
-  FloatRegister as_FloatRegister();
+  assert( is_Register(), "must be");
+  // Yuk
+#ifdef AMD64
+  return ::as_Register(value() >> 1);
+#else
+  return ::as_Register(value());
+#endif // AMD64
+}
 
-  bool is_XMMRegister();
-  XMMRegister as_XMMRegister();
+inline FloatRegister as_FloatRegister() {
+  assert( is_FloatRegister() && is_even(value()), "must be" );
+  // Yuk
+  return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
+}
+
+inline XMMRegister as_XMMRegister() {
+  assert( is_XMMRegister() && is_even(value()), "must be" );
+  // Yuk
+  return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 3);
+}
+
+inline   bool is_concrete() {
+  assert(is_reg(), "must be");
+#ifndef AMD64
+  if (is_Register()) return true;
+#endif // AMD64
+  return is_even(value());
+}
 
 #endif // CPU_X86_VM_VMREG_X86_HPP