src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetC1_aarch64.cpp
changeset 52925 9c18c9d839d3
child 53519 74a5ef4c81cc
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52924:420ff459906f 52925:9c18c9d839d3
       
     1 /*
       
     2  * Copyright (c) 2018, Red Hat, Inc. All rights reserved.
       
     3  *
       
     4  * This code is free software; you can redistribute it and/or modify it
       
     5  * under the terms of the GNU General Public License version 2 only, as
       
     6  * published by the Free Software Foundation.
       
     7  *
       
     8  * This code is distributed in the hope that it will be useful, but WITHOUT
       
     9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
       
    10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
       
    11  * version 2 for more details (a copy is included in the LICENSE file that
       
    12  * accompanied this code).
       
    13  *
       
    14  * You should have received a copy of the GNU General Public License version
       
    15  * 2 along with this work; if not, write to the Free Software Foundation,
       
    16  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
       
    17  *
       
    18  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
       
    19  * or visit www.oracle.com if you need additional information or have any
       
    20  * questions.
       
    21  *
       
    22  */
       
    23 
       
    24 #include "precompiled.hpp"
       
    25 #include "c1/c1_LIRAssembler.hpp"
       
    26 #include "c1/c1_MacroAssembler.hpp"
       
    27 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
       
    28 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
       
    29 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
       
    30 
       
    31 void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) {
       
    32   Register addr = _addr->as_register_lo();
       
    33   Register newval = _new_value->as_register();
       
    34   Register cmpval = _cmp_value->as_register();
       
    35   Register tmp1 = _tmp1->as_register();
       
    36   Register tmp2 = _tmp2->as_register();
       
    37   ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm->masm(), addr, cmpval, newval, /*acquire*/ false, /*release*/ true, /*weak*/ false, true, tmp1, tmp2);
       
    38 }
       
    39 
       
    40 #ifdef ASSERT
       
    41 #define __ gen->lir(__FILE__, __LINE__)->
       
    42 #else
       
    43 #define __ gen->lir()->
       
    44 #endif
       
    45 
       
    46 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
       
    47   BasicType bt = access.type();
       
    48   if (access.is_oop()) {
       
    49     LIRGenerator *gen = access.gen();
       
    50     if (ShenandoahSATBBarrier) {
       
    51       pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
       
    52                   LIR_OprFact::illegalOpr /* pre_val */);
       
    53     }
       
    54     if (ShenandoahCASBarrier) {
       
    55       cmp_value.load_item();
       
    56       new_value.load_item();
       
    57 
       
    58       LIR_Opr t1 = gen->new_register(T_OBJECT);
       
    59       LIR_Opr t2 = gen->new_register(T_OBJECT);
       
    60       LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
       
    61 
       
    62       __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2,
       
    63                                                    LIR_OprFact::illegalOpr));
       
    64 
       
    65       LIR_Opr result = gen->new_register(T_INT);
       
    66       __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
       
    67                result, T_INT);
       
    68       return result;
       
    69     }
       
    70   }
       
    71   return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
       
    72 }
       
    73 
       
    74 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
       
    75   LIRGenerator* gen = access.gen();
       
    76   BasicType type = access.type();
       
    77 
       
    78   LIR_Opr result = gen->new_register(type);
       
    79   value.load_item();
       
    80   LIR_Opr value_opr = value.result();
       
    81 
       
    82   if (access.is_oop()) {
       
    83     value_opr = storeval_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
       
    84   }
       
    85 
       
    86   assert(type == T_INT || type == T_OBJECT || type == T_ARRAY LP64_ONLY( || type == T_LONG ), "unexpected type");
       
    87   LIR_Opr tmp = gen->new_register(T_INT);
       
    88   __ xchg(access.resolved_addr(), value_opr, result, tmp);
       
    89 
       
    90   if (access.is_oop()) {
       
    91     if (ShenandoahSATBBarrier) {
       
    92       pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
       
    93                   result /* pre_val */);
       
    94     }
       
    95   }
       
    96 
       
    97   return result;
       
    98 }