src/hotspot/cpu/ppc/c1_Defs_ppc.hpp
changeset 53244 9807daeb47c4
parent 47216 71c04702a3d5
equal deleted inserted replaced
53243:8bea4144b21c 53244:9807daeb47c4
     1 /*
     1 /*
     2  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
     2  * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
     3  * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
     3  * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     5  *
     5  *
     6  * This code is free software; you can redistribute it and/or modify it
     6  * This code is free software; you can redistribute it and/or modify it
     7  * under the terms of the GNU General Public License version 2 only, as
     7  * under the terms of the GNU General Public License version 2 only, as
    21  * or visit www.oracle.com if you need additional information or have any
    21  * or visit www.oracle.com if you need additional information or have any
    22  * questions.
    22  * questions.
    23  *
    23  *
    24  */
    24  */
    25 
    25 
    26 #ifndef CPU_PPC_VM_C1_DEFS_PPC_HPP
    26 #ifndef CPU_PPC_C1_DEFS_PPC_HPP
    27 #define CPU_PPC_VM_C1_DEFS_PPC_HPP
    27 #define CPU_PPC_C1_DEFS_PPC_HPP
    28 
    28 
    29 // Native word offsets from memory address.
    29 // Native word offsets from memory address.
    30 enum {
    30 enum {
    31 #if defined(VM_LITTLE_ENDIAN)
    31 #if defined(VM_LITTLE_ENDIAN)
    32   pd_lo_word_offset_in_bytes = 0,
    32   pd_lo_word_offset_in_bytes = 0,
    71 // For debug info: a float value in a register is saved in single precision by runtime stubs.
    71 // For debug info: a float value in a register is saved in single precision by runtime stubs.
    72 enum {
    72 enum {
    73   pd_float_saved_as_double = true
    73   pd_float_saved_as_double = true
    74 };
    74 };
    75 
    75 
    76 #endif // CPU_PPC_VM_C1_DEFS_PPC_HPP
    76 #endif // CPU_PPC_C1_DEFS_PPC_HPP