|
1 /* |
|
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved. |
|
3 * Copyright (c) 2012, 2015 SAP SE. All rights reserved. |
|
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
|
5 * |
|
6 * This code is free software; you can redistribute it and/or modify it |
|
7 * under the terms of the GNU General Public License version 2 only, as |
|
8 * published by the Free Software Foundation. |
|
9 * |
|
10 * This code is distributed in the hope that it will be useful, but WITHOUT |
|
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
|
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
|
13 * version 2 for more details (a copy is included in the LICENSE file that |
|
14 * accompanied this code). |
|
15 * |
|
16 * You should have received a copy of the GNU General Public License version |
|
17 * 2 along with this work; if not, write to the Free Software Foundation, |
|
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
|
19 * |
|
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
|
21 * or visit www.oracle.com if you need additional information or have any |
|
22 * questions. |
|
23 * |
|
24 */ |
|
25 |
|
26 #ifndef CPU_PPC_VM_C1_DEFS_PPC_HPP |
|
27 #define CPU_PPC_VM_C1_DEFS_PPC_HPP |
|
28 |
|
29 // Native word offsets from memory address. |
|
30 enum { |
|
31 #if defined(VM_LITTLE_ENDIAN) |
|
32 pd_lo_word_offset_in_bytes = 0, |
|
33 pd_hi_word_offset_in_bytes = BytesPerInt |
|
34 #else |
|
35 pd_lo_word_offset_in_bytes = BytesPerInt, |
|
36 pd_hi_word_offset_in_bytes = 0 |
|
37 #endif |
|
38 }; |
|
39 |
|
40 |
|
41 // Explicit rounding operations are not required to implement the strictFP mode. |
|
42 enum { |
|
43 pd_strict_fp_requires_explicit_rounding = false |
|
44 }; |
|
45 |
|
46 |
|
47 // registers |
|
48 enum { |
|
49 pd_nof_cpu_regs_frame_map = 32, // Number of registers used during code emission. |
|
50 pd_nof_caller_save_cpu_regs_frame_map = 27, // Number of cpu registers killed by calls. (At least R3_ARG1 ... R10_ARG8, but using all like C2.) |
|
51 pd_nof_cpu_regs_reg_alloc = 27, // Number of registers that are visible to register allocator. |
|
52 pd_nof_cpu_regs_linearscan = 32, // Number of registers visible linear scan. |
|
53 pd_first_callee_saved_reg = pd_nof_caller_save_cpu_regs_frame_map, |
|
54 pd_last_callee_saved_reg = pd_nof_cpu_regs_reg_alloc - 1, |
|
55 pd_first_cpu_reg = 0, |
|
56 pd_last_cpu_reg = pd_nof_cpu_regs_reg_alloc - 1, |
|
57 |
|
58 pd_nof_fpu_regs_frame_map = 32, // Number of registers used during code emission. |
|
59 pd_nof_caller_save_fpu_regs_frame_map = 32, // Number of fpu registers killed by calls. |
|
60 pd_nof_fpu_regs_reg_alloc = 32, // Number of registers that are visible to register allocator. |
|
61 pd_nof_fpu_regs_linearscan = 32, // Number of registers visible to linear scan. |
|
62 pd_first_fpu_reg = pd_nof_cpu_regs_frame_map, |
|
63 pd_last_fpu_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_reg_alloc - 1, |
|
64 |
|
65 pd_nof_xmm_regs_linearscan = 0, |
|
66 pd_nof_caller_save_xmm_regs = 0, |
|
67 pd_first_xmm_reg = -1, |
|
68 pd_last_xmm_reg = -1 |
|
69 }; |
|
70 |
|
71 // For debug info: a float value in a register is saved in single precision by runtime stubs. |
|
72 enum { |
|
73 pd_float_saved_as_double = true |
|
74 }; |
|
75 |
|
76 #endif // CPU_PPC_VM_C1_DEFS_PPC_HPP |