src/hotspot/cpu/s390/interp_masm_s390.cpp
changeset 48332 651a95f30dfb
parent 47762 9ccaa4e79030
child 48965 be873d8c0114
equal deleted inserted replaced
48331:a8e39cc7b88f 48332:651a95f30dfb
    34 #include "oops/markOop.hpp"
    34 #include "oops/markOop.hpp"
    35 #include "prims/jvmtiExport.hpp"
    35 #include "prims/jvmtiExport.hpp"
    36 #include "prims/jvmtiThreadState.hpp"
    36 #include "prims/jvmtiThreadState.hpp"
    37 #include "runtime/basicLock.hpp"
    37 #include "runtime/basicLock.hpp"
    38 #include "runtime/biasedLocking.hpp"
    38 #include "runtime/biasedLocking.hpp"
       
    39 #include "runtime/safepointMechanism.hpp"
    39 #include "runtime/sharedRuntime.hpp"
    40 #include "runtime/sharedRuntime.hpp"
    40 #include "runtime/thread.inline.hpp"
    41 #include "runtime/thread.inline.hpp"
    41 
    42 
    42 // Implementation of InterpreterMacroAssembler.
    43 // Implementation of InterpreterMacroAssembler.
    43 // This file specializes the assember with interpreter-specific macros.
    44 // This file specializes the assember with interpreter-specific macros.
    72 // own dispatch.
    73 // own dispatch.
    73 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int step) {
    74 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int step) {
    74   dispatch_next(state, step);
    75   dispatch_next(state, step);
    75 }
    76 }
    76 
    77 
    77 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
    78 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr, bool generate_poll) {
    78   z_llgc(Z_bytecode, bcp_incr, Z_R0, Z_bcp);  // Load next bytecode.
    79   z_llgc(Z_bytecode, bcp_incr, Z_R0, Z_bcp);  // Load next bytecode.
    79   add2reg(Z_bcp, bcp_incr);                   // Advance bcp. Add2reg produces optimal code.
    80   add2reg(Z_bcp, bcp_incr);                   // Advance bcp. Add2reg produces optimal code.
    80   dispatch_base(state, Interpreter::dispatch_table(state));
    81   dispatch_base(state, Interpreter::dispatch_table(state), generate_poll);
    81 }
    82 }
    82 
    83 
    83 // Common code to dispatch and dispatch_only.
    84 // Common code to dispatch and dispatch_only.
    84 // Dispatch value in Lbyte_code and increment Lbcp.
    85 // Dispatch value in Lbyte_code and increment Lbcp.
    85 
    86 
    86 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
    87 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table, bool generate_poll) {
    87   verify_FPU(1, state);
    88   verify_FPU(1, state);
    88 
    89 
    89 #ifdef ASSERT
    90 #ifdef ASSERT
    90   address reentry = NULL;
    91   address reentry = NULL;
    91   { Label OK;
    92   { Label OK;
   107   // TODO: Maybe implement +VerifyActivationFrameSize here.
   108   // TODO: Maybe implement +VerifyActivationFrameSize here.
   108   // verify_thread(); // Too slow. We will just verify on method entry & exit.
   109   // verify_thread(); // Too slow. We will just verify on method entry & exit.
   109   verify_oop(Z_tos, state);
   110   verify_oop(Z_tos, state);
   110 
   111 
   111   // Dispatch table to use.
   112   // Dispatch table to use.
   112   load_absolute_address(Z_tmp_1, (address) table);  // Z_tmp_1 = table;
   113   load_absolute_address(Z_tmp_1, (address)table);  // Z_tmp_1 = table;
       
   114 
       
   115   if (SafepointMechanism::uses_thread_local_poll() && generate_poll) {
       
   116     address *sfpt_tbl = Interpreter::safept_table(state);
       
   117     if (table != sfpt_tbl) {
       
   118       Label dispatch;
       
   119       const Address poll_byte_addr(Z_thread, in_bytes(Thread::polling_page_offset()) + 7 /* Big Endian */);
       
   120       // Armed page has poll_bit set, if poll bit is cleared just continue.
       
   121       z_tm(poll_byte_addr, SafepointMechanism::poll_bit());
       
   122       z_braz(dispatch);
       
   123       load_absolute_address(Z_tmp_1, (address)sfpt_tbl);  // Z_tmp_1 = table;
       
   124       bind(dispatch);
       
   125     }
       
   126   }
   113 
   127 
   114   // 0 <= Z_bytecode < 256 => Use a 32 bit shift, because it is shorter than sllg.
   128   // 0 <= Z_bytecode < 256 => Use a 32 bit shift, because it is shorter than sllg.
   115   // Z_bytecode must have been loaded zero-extended for this approach to be correct.
   129   // Z_bytecode must have been loaded zero-extended for this approach to be correct.
   116   z_sll(Z_bytecode, LogBytesPerWord, Z_R0);   // Multiply by wordSize.
   130   z_sll(Z_bytecode, LogBytesPerWord, Z_R0);   // Multiply by wordSize.
   117   z_lg(Z_tmp_1, 0, Z_bytecode, Z_tmp_1);      // Get entry addr.
   131   z_lg(Z_tmp_1, 0, Z_bytecode, Z_tmp_1);      // Get entry addr.
   118 
   132 
   119   z_br(Z_tmp_1);
   133   z_br(Z_tmp_1);
   120 }
   134 }
   121 
   135 
   122 void InterpreterMacroAssembler::dispatch_only(TosState state) {
   136 void InterpreterMacroAssembler::dispatch_only(TosState state, bool generate_poll) {
   123   dispatch_base(state, Interpreter::dispatch_table(state));
   137   dispatch_base(state, Interpreter::dispatch_table(state), generate_poll);
   124 }
   138 }
   125 
   139 
   126 void InterpreterMacroAssembler::dispatch_only_normal(TosState state) {
   140 void InterpreterMacroAssembler::dispatch_only_normal(TosState state) {
   127   dispatch_base(state, Interpreter::normal_table(state));
   141   dispatch_base(state, Interpreter::normal_table(state));
   128 }
   142 }