1 /*

     2  * Copyright 2000-2006 Sun Microsystems, Inc.  All Rights Reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,

    20  * CA 95054 USA or visit www.sun.com if you need additional information or

    21  * have any questions.

    22  *

    23  */

    24 

    25 class BlockBegin;

    26 class BlockList;

    27 class LIR_Assembler;

    28 class CodeEmitInfo;

    29 class CodeStub;

    30 class CodeStubList;

    31 class ArrayCopyStub;

    32 class LIR_Op;

    33 class ciType;

    34 class ValueType;

    35 class LIR_OpVisitState;

    36 class FpuStackSim;

    37 

    38 //---------------------------------------------------------------------

    39 //                 LIR Operands

    40 //  LIR_OprDesc

    41 //    LIR_OprPtr

    42 //      LIR_Const

    43 //      LIR_Address

    44 //---------------------------------------------------------------------

    45 class LIR_OprDesc;

    46 class LIR_OprPtr;

    47 class LIR_Const;

    48 class LIR_Address;

    49 class LIR_OprVisitor;

    50 

    51 

    52 typedef LIR_OprDesc* LIR_Opr;

    53 typedef int          RegNr;

    54 

    55 define_array(LIR_OprArray, LIR_Opr)

    56 define_stack(LIR_OprList, LIR_OprArray)

    57 

    58 define_array(LIR_OprRefArray, LIR_Opr*)

    59 define_stack(LIR_OprRefList, LIR_OprRefArray)

    60 

    61 define_array(CodeEmitInfoArray, CodeEmitInfo*)

    62 define_stack(CodeEmitInfoList, CodeEmitInfoArray)

    63 

    64 define_array(LIR_OpArray, LIR_Op*)

    65 define_stack(LIR_OpList, LIR_OpArray)

    66 

    67 // define LIR_OprPtr early so LIR_OprDesc can refer to it

    68 class LIR_OprPtr: public CompilationResourceObj {

    69  public:

    70   bool is_oop_pointer() const                    { return (type() == T_OBJECT); }

    71   bool is_float_kind() const                     { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }

    72 

    73   virtual LIR_Const*  as_constant()              { return NULL; }

    74   virtual LIR_Address* as_address()              { return NULL; }

    75   virtual BasicType type() const                 = 0;

    76   virtual void print_value_on(outputStream* out) const = 0;

    77 };

    78 

    79 

    80 

    81 // LIR constants

    82 class LIR_Const: public LIR_OprPtr {

    83  private:

    84   JavaValue _value;

    85 

    86   void type_check(BasicType t) const   { assert(type() == t, "type check"); }

    87   void type_check(BasicType t1, BasicType t2) const   { assert(type() == t1 || type() == t2, "type check"); }

    88 

    89  public:

    90   LIR_Const(jint i)                              { _value.set_type(T_INT);     _value.set_jint(i); }

    91   LIR_Const(jlong l)                             { _value.set_type(T_LONG);    _value.set_jlong(l); }

    92   LIR_Const(jfloat f)                            { _value.set_type(T_FLOAT);   _value.set_jfloat(f); }

    93   LIR_Const(jdouble d)                           { _value.set_type(T_DOUBLE);  _value.set_jdouble(d); }

    94   LIR_Const(jobject o)                           { _value.set_type(T_OBJECT);  _value.set_jobject(o); }

    95   LIR_Const(void* p) {

    96 #ifdef _LP64

    97     assert(sizeof(jlong) >= sizeof(p), "too small");;

    98     _value.set_type(T_LONG);    _value.set_jlong((jlong)p);

    99 #else

   100     assert(sizeof(jint) >= sizeof(p), "too small");;

   101     _value.set_type(T_INT);     _value.set_jint((jint)p);

   102 #endif

   103   }

   104 

   105   virtual BasicType type()       const { return _value.get_type(); }

   106   virtual LIR_Const* as_constant()     { return this; }

   107 

   108   jint      as_jint()    const         { type_check(T_INT   ); return _value.get_jint(); }

   109   jlong     as_jlong()   const         { type_check(T_LONG  ); return _value.get_jlong(); }

   110   jfloat    as_jfloat()  const         { type_check(T_FLOAT ); return _value.get_jfloat(); }

   111   jdouble   as_jdouble() const         { type_check(T_DOUBLE); return _value.get_jdouble(); }

   112   jobject   as_jobject() const         { type_check(T_OBJECT); return _value.get_jobject(); }

   113   jint      as_jint_lo() const         { type_check(T_LONG  ); return low(_value.get_jlong()); }

   114   jint      as_jint_hi() const         { type_check(T_LONG  ); return high(_value.get_jlong()); }

   115 

   116 #ifdef _LP64

   117   address   as_pointer() const         { type_check(T_LONG  ); return (address)_value.get_jlong(); }

   118 #else

   119   address   as_pointer() const         { type_check(T_INT   ); return (address)_value.get_jint(); }

   120 #endif

   121 

   122 

   123   jint      as_jint_bits() const       { type_check(T_FLOAT, T_INT); return _value.get_jint(); }

   124   jint      as_jint_lo_bits() const    {

   125     if (type() == T_DOUBLE) {

   126       return low(jlong_cast(_value.get_jdouble()));

   127     } else {

   128       return as_jint_lo();

   129     }

   130   }

   131   jint      as_jint_hi_bits() const    {

   132     if (type() == T_DOUBLE) {

   133       return high(jlong_cast(_value.get_jdouble()));

   134     } else {

   135       return as_jint_hi();

   136     }

   137   }

   138 

   139   virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;

   140 

   141 

   142   bool is_zero_float() {

   143     jfloat f = as_jfloat();

   144     jfloat ok = 0.0f;

   145     return jint_cast(f) == jint_cast(ok);

   146   }

   147 

   148   bool is_one_float() {

   149     jfloat f = as_jfloat();

   150     return !g_isnan(f) && g_isfinite(f) && f == 1.0;

   151   }

   152 

   153   bool is_zero_double() {

   154     jdouble d = as_jdouble();

   155     jdouble ok = 0.0;

   156     return jlong_cast(d) == jlong_cast(ok);

   157   }

   158 

   159   bool is_one_double() {

   160     jdouble d = as_jdouble();

   161     return !g_isnan(d) && g_isfinite(d) && d == 1.0;

   162   }

   163 };

   164 

   165 

   166 //---------------------LIR Operand descriptor------------------------------------

   167 //

   168 // The class LIR_OprDesc represents a LIR instruction operand;

   169 // it can be a register (ALU/FPU), stack location or a constant;

   170 // Constants and addresses are represented as resource area allocated

   171 // structures (see above).

   172 // Registers and stack locations are inlined into the this pointer

   173 // (see value function).

   174 

   175 class LIR_OprDesc: public CompilationResourceObj {

   176  public:

   177   // value structure:

   178   //     data       opr-type opr-kind

   179   // +--------------+-------+-------+

   180   // [max...........|7 6 5 4|3 2 1 0]

   181   //                             ^

   182   //                    is_pointer bit

   183   //

   184   // lowest bit cleared, means it is a structure pointer

   185   // we need  4 bits to represent types

   186 

   187  private:

   188   friend class LIR_OprFact;

   189 

   190   // Conversion

   191   intptr_t value() const                         { return (intptr_t) this; }

   192 

   193   bool check_value_mask(intptr_t mask, intptr_t masked_value) const {

   194     return (value() & mask) == masked_value;

   195   }

   196 

   197   enum OprKind {

   198       pointer_value      = 0

   199     , stack_value        = 1

   200     , cpu_register       = 3

   201     , fpu_register       = 5

   202     , illegal_value      = 7

   203   };

   204 

   205   enum OprBits {

   206       pointer_bits   = 1

   207     , kind_bits      = 3

   208     , type_bits      = 4

   209     , size_bits      = 2

   210     , destroys_bits  = 1

   211     , virtual_bits   = 1

   212     , is_xmm_bits    = 1

   213     , last_use_bits  = 1

   214     , is_fpu_stack_offset_bits = 1        // used in assertion checking on x86 for FPU stack slot allocation

   215     , non_data_bits  = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +

   216                        is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits

   217     , data_bits      = BitsPerInt - non_data_bits

   218     , reg_bits       = data_bits / 2      // for two registers in one value encoding

   219   };

   220 

   221   enum OprShift {

   222       kind_shift     = 0

   223     , type_shift     = kind_shift     + kind_bits

   224     , size_shift     = type_shift     + type_bits

   225     , destroys_shift = size_shift     + size_bits

   226     , last_use_shift = destroys_shift + destroys_bits

   227     , is_fpu_stack_offset_shift = last_use_shift + last_use_bits

   228     , virtual_shift  = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits

   229     , is_xmm_shift   = virtual_shift + virtual_bits

   230     , data_shift     = is_xmm_shift + is_xmm_bits

   231     , reg1_shift = data_shift

   232     , reg2_shift = data_shift + reg_bits

   233 

   234   };

   235 

   236   enum OprSize {

   237       single_size = 0 << size_shift

   238     , double_size = 1 << size_shift

   239   };

   240 

   241   enum OprMask {

   242       kind_mask      = right_n_bits(kind_bits)

   243     , type_mask      = right_n_bits(type_bits) << type_shift

   244     , size_mask      = right_n_bits(size_bits) << size_shift

   245     , last_use_mask  = right_n_bits(last_use_bits) << last_use_shift

   246     , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift

   247     , virtual_mask   = right_n_bits(virtual_bits) << virtual_shift

   248     , is_xmm_mask    = right_n_bits(is_xmm_bits) << is_xmm_shift

   249     , pointer_mask   = right_n_bits(pointer_bits)

   250     , lower_reg_mask = right_n_bits(reg_bits)

   251     , no_type_mask   = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))

   252   };

   253 

   254   uintptr_t data() const                         { return value() >> data_shift; }

   255   int lo_reg_half() const                        { return data() & lower_reg_mask; }

   256   int hi_reg_half() const                        { return (data() >> reg_bits) & lower_reg_mask; }

   257   OprKind kind_field() const                     { return (OprKind)(value() & kind_mask); }

   258   OprSize size_field() const                     { return (OprSize)(value() & size_mask); }

   259 

   260   static char type_char(BasicType t);

   261 

   262  public:

   263   enum {

   264     vreg_base = ConcreteRegisterImpl::number_of_registers,

   265     vreg_max = (1 << data_bits) - 1

   266   };

   267 

   268   static inline LIR_Opr illegalOpr();

   269 

   270   enum OprType {

   271       unknown_type  = 0 << type_shift    // means: not set (catch uninitialized types)

   272     , int_type      = 1 << type_shift

   273     , long_type     = 2 << type_shift

   274     , object_type   = 3 << type_shift

   275     , pointer_type  = 4 << type_shift

   276     , float_type    = 5 << type_shift

   277     , double_type   = 6 << type_shift

   278   };

   279   friend OprType as_OprType(BasicType t);

   280   friend BasicType as_BasicType(OprType t);

   281 

   282   OprType type_field_valid() const               { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }

   283   OprType type_field() const                     { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }

   284 

   285   static OprSize size_for(BasicType t) {

   286     switch (t) {

   287       case T_LONG:

   288       case T_DOUBLE:

   289         return double_size;

   290         break;

   291 

   292       case T_FLOAT:

   293       case T_BOOLEAN:

   294       case T_CHAR:

   295       case T_BYTE:

   296       case T_SHORT:

   297       case T_INT:

   298       case T_OBJECT:

   299       case T_ARRAY:

   300         return single_size;

   301         break;

   302 

   303       default:

   304         ShouldNotReachHere();

   305       }

   306   }

   307 

   308 

   309   void validate_type() const PRODUCT_RETURN;

   310 

   311   BasicType type() const {

   312     if (is_pointer()) {

   313       return pointer()->type();

   314     }

   315     return as_BasicType(type_field());

   316   }

   317 

   318 

   319   ValueType* value_type() const                  { return as_ValueType(type()); }

   320 

   321   char type_char() const                         { return type_char((is_pointer()) ? pointer()->type() : type()); }

   322 

   323   bool is_equal(LIR_Opr opr) const         { return this == opr; }

   324   // checks whether types are same

   325   bool is_same_type(LIR_Opr opr) const     {

   326     assert(type_field() != unknown_type &&

   327            opr->type_field() != unknown_type, "shouldn't see unknown_type");

   328     return type_field() == opr->type_field();

   329   }

   330   bool is_same_register(LIR_Opr opr) {

   331     return (is_register() && opr->is_register() &&

   332             kind_field() == opr->kind_field() &&

   333             (value() & no_type_mask) == (opr->value() & no_type_mask));

   334   }

   335 

   336   bool is_pointer() const      { return check_value_mask(pointer_mask, pointer_value); }

   337   bool is_illegal() const      { return kind_field() == illegal_value; }

   338   bool is_valid() const        { return kind_field() != illegal_value; }

   339 

   340   bool is_register() const     { return is_cpu_register() || is_fpu_register(); }

   341   bool is_virtual() const      { return is_virtual_cpu()  || is_virtual_fpu();  }

   342 

   343   bool is_constant() const     { return is_pointer() && pointer()->as_constant() != NULL; }

   344   bool is_address() const      { return is_pointer() && pointer()->as_address() != NULL; }

   345 

   346   bool is_float_kind() const   { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }

   347   bool is_oop() const;

   348 

   349   // semantic for fpu- and xmm-registers:

   350   // * is_float and is_double return true for xmm_registers

   351   //   (so is_single_fpu and is_single_xmm are true)

   352   // * So you must always check for is_???_xmm prior to is_???_fpu to

   353   //   distinguish between fpu- and xmm-registers

   354 

   355   bool is_stack() const        { validate_type(); return check_value_mask(kind_mask,                stack_value);                 }

   356   bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask,    stack_value  | single_size);  }

   357   bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask,    stack_value  | double_size);  }

   358 

   359   bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask,                cpu_register);                }

   360   bool is_virtual_cpu() const  { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }

   361   bool is_fixed_cpu() const    { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register);                }

   362   bool is_single_cpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    cpu_register | single_size);  }

   363   bool is_double_cpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    cpu_register | double_size);  }

   364 

   365   bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask,                fpu_register);                }

   366   bool is_virtual_fpu() const  { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }

   367   bool is_fixed_fpu() const    { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register);                }

   368   bool is_single_fpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    fpu_register | single_size);  }

   369   bool is_double_fpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    fpu_register | double_size);  }

   370 

   371   bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask,             fpu_register | is_xmm_mask); }

   372   bool is_single_xmm() const   { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }

   373   bool is_double_xmm() const   { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }

   374 

   375   // fast accessor functions for special bits that do not work for pointers

   376   // (in this functions, the check for is_pointer() is omitted)

   377   bool is_single_word() const      { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }

   378   bool is_double_word() const      { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }

   379   bool is_virtual_register() const { assert(is_register(),               "type check"); return check_value_mask(virtual_mask, virtual_mask); }

   380   bool is_oop_register() const     { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }

   381   BasicType type_register() const  { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid());  }

   382 

   383   bool is_last_use() const         { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }

   384   bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }

   385   LIR_Opr make_last_use()          { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }

   386   LIR_Opr make_fpu_stack_offset()  { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }

   387 

   388 

   389   int single_stack_ix() const  { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }

   390   int double_stack_ix() const  { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }

   391   RegNr cpu_regnr() const      { assert(is_single_cpu()   && !is_virtual(), "type check"); return (RegNr)data(); }

   392   RegNr cpu_regnrLo() const    { assert(is_double_cpu()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }

   393   RegNr cpu_regnrHi() const    { assert(is_double_cpu()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }

   394   RegNr fpu_regnr() const      { assert(is_single_fpu()   && !is_virtual(), "type check"); return (RegNr)data(); }

   395   RegNr fpu_regnrLo() const    { assert(is_double_fpu()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }

   396   RegNr fpu_regnrHi() const    { assert(is_double_fpu()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }

   397   RegNr xmm_regnr() const      { assert(is_single_xmm()   && !is_virtual(), "type check"); return (RegNr)data(); }

   398   RegNr xmm_regnrLo() const    { assert(is_double_xmm()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }

   399   RegNr xmm_regnrHi() const    { assert(is_double_xmm()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }

   400   int   vreg_number() const    { assert(is_virtual(),                       "type check"); return (RegNr)data(); }

   401 

   402   LIR_OprPtr* pointer()  const                   { assert(is_pointer(), "type check");      return (LIR_OprPtr*)this; }

   403   LIR_Const* as_constant_ptr() const             { return pointer()->as_constant(); }

   404   LIR_Address* as_address_ptr() const            { return pointer()->as_address(); }

   405 

   406   Register as_register()    const;

   407   Register as_register_lo() const;

   408   Register as_register_hi() const;

   409 

   410   Register as_pointer_register() {

   411 #ifdef _LP64

   412     if (is_double_cpu()) {

   413       assert(as_register_lo() == as_register_hi(), "should be a single register");

   414       return as_register_lo();

   415     }

   416 #endif

   417     return as_register();

   418   }

   419 

   420 #ifdef IA32

   421   XMMRegister as_xmm_float_reg() const;

   422   XMMRegister as_xmm_double_reg() const;

   423   // for compatibility with RInfo

   424   int fpu () const                                  { return lo_reg_half(); }

   425 #endif

   426 

   427 #ifdef SPARC

   428   FloatRegister as_float_reg   () const;

   429   FloatRegister as_double_reg  () const;

   430 #endif

   431 

   432   jint      as_jint()    const { return as_constant_ptr()->as_jint(); }

   433   jlong     as_jlong()   const { return as_constant_ptr()->as_jlong(); }

   434   jfloat    as_jfloat()  const { return as_constant_ptr()->as_jfloat(); }

   435   jdouble   as_jdouble() const { return as_constant_ptr()->as_jdouble(); }

   436   jobject   as_jobject() const { return as_constant_ptr()->as_jobject(); }

   437 

   438   void print() const PRODUCT_RETURN;

   439   void print(outputStream* out) const PRODUCT_RETURN;

   440 };

   441 

   442 

   443 inline LIR_OprDesc::OprType as_OprType(BasicType type) {

   444   switch (type) {

   445   case T_INT:      return LIR_OprDesc::int_type;

   446   case T_LONG:     return LIR_OprDesc::long_type;

   447   case T_FLOAT:    return LIR_OprDesc::float_type;

   448   case T_DOUBLE:   return LIR_OprDesc::double_type;

   449   case T_OBJECT:

   450   case T_ARRAY:    return LIR_OprDesc::object_type;

   451   case T_ILLEGAL:  // fall through

   452   default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;

   453   }

   454 }

   455 

   456 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {

   457   switch (t) {

   458   case LIR_OprDesc::int_type:     return T_INT;

   459   case LIR_OprDesc::long_type:    return T_LONG;

   460   case LIR_OprDesc::float_type:   return T_FLOAT;

   461   case LIR_OprDesc::double_type:  return T_DOUBLE;

   462   case LIR_OprDesc::object_type:  return T_OBJECT;

   463   case LIR_OprDesc::unknown_type: // fall through

   464   default: ShouldNotReachHere();  return T_ILLEGAL;

   465   }

   466 }

   467 

   468 

   469 // LIR_Address

   470 class LIR_Address: public LIR_OprPtr {

   471  friend class LIR_OpVisitState;

   472 

   473  public:

   474   // NOTE: currently these must be the log2 of the scale factor (and

   475   // must also be equivalent to the ScaleFactor enum in

   476   // assembler_i486.hpp)

   477   enum Scale {

   478     times_1  =  0,

   479     times_2  =  1,

   480     times_4  =  2,

   481     times_8  =  3

   482   };

   483 

   484  private:

   485   LIR_Opr   _base;

   486   LIR_Opr   _index;

   487   Scale     _scale;

   488   intx      _disp;

   489   BasicType _type;

   490 

   491  public:

   492   LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):

   493        _base(base)

   494      , _index(index)

   495      , _scale(times_1)

   496      , _type(type)

   497      , _disp(0) { verify(); }

   498 

   499   LIR_Address(LIR_Opr base, int disp, BasicType type):

   500        _base(base)

   501      , _index(LIR_OprDesc::illegalOpr())

   502      , _scale(times_1)

   503      , _type(type)

   504      , _disp(disp) { verify(); }

   505 

   506 #ifdef IA32

   507   LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, int disp, BasicType type):

   508        _base(base)

   509      , _index(index)

   510      , _scale(scale)

   511      , _type(type)

   512      , _disp(disp) { verify(); }

   513 #endif

   514 

   515   LIR_Opr base()  const                          { return _base;  }

   516   LIR_Opr index() const                          { return _index; }

   517   Scale   scale() const                          { return _scale; }

   518   intx    disp()  const                          { return _disp;  }

   519 

   520   bool equals(LIR_Address* other) const          { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }

   521 

   522   virtual LIR_Address* as_address()              { return this;   }

   523   virtual BasicType type() const                 { return _type; }

   524   virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;

   525 

   526   void verify() const PRODUCT_RETURN;

   527 

   528   static Scale scale(BasicType type);

   529 };

   530 

   531 

   532 // operand factory

   533 class LIR_OprFact: public AllStatic {

   534  public:

   535 

   536   static LIR_Opr illegalOpr;

   537 

   538   static LIR_Opr single_cpu(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift) |                                     LIR_OprDesc::int_type    | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }

   539   static LIR_Opr single_cpu_oop(int reg)        { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift) |                                     LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }

   540   static LIR_Opr double_cpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::long_type   | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }

   541 

   542   static LIR_Opr single_fpu(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift) |                                     LIR_OprDesc::float_type  | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size); }

   543 

   544 #ifdef SPARC

   545   static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }

   546 #endif

   547 #ifdef IA32

   548   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift) | (reg  << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }

   549   static LIR_Opr single_xmm(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift) |                                     LIR_OprDesc::float_type  | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size | LIR_OprDesc::is_xmm_mask); }

   550   static LIR_Opr double_xmm(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift) | (reg  << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size | LIR_OprDesc::is_xmm_mask); }

   551 #endif

   552 

   553 

   554   static LIR_Opr virtual_register(int index, BasicType type) {

   555     LIR_Opr res;

   556     switch (type) {

   557       case T_OBJECT: // fall through

   558       case T_ARRAY:  res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break;

   559       case T_INT:    res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::int_type    | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break;

   560       case T_LONG:   res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::long_type   | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size | LIR_OprDesc::virtual_mask); break;

   561       case T_FLOAT:  res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::float_type  | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break;

   562       case T_DOUBLE: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size | LIR_OprDesc::virtual_mask); break;

   563 

   564       default:       ShouldNotReachHere(); res = illegalOpr;

   565     }

   566 

   567 #ifdef ASSERT

   568     res->validate_type();

   569     assert(res->vreg_number() == index, "conversion check");

   570     assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");

   571     assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");

   572 

   573     // old-style calculation; check if old and new method are equal

   574     LIR_OprDesc::OprType t = as_OprType(type);

   575     LIR_Opr old_res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | t |

   576                                ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |

   577                                LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);

   578     assert(res == old_res, "old and new method not equal");

   579 #endif

   580 

   581     return res;

   582   }

   583 

   584   // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as

   585   // the index is platform independent; a double stack useing indeces 2 and 3 has always

   586   // index 2.

   587   static LIR_Opr stack(int index, BasicType type) {

   588     LIR_Opr res;

   589     switch (type) {

   590       case T_OBJECT: // fall through

   591       case T_ARRAY:  res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::object_type | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break;

   592       case T_INT:    res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::int_type    | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break;

   593       case T_LONG:   res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::long_type   | LIR_OprDesc::stack_value | LIR_OprDesc::double_size); break;

   594       case T_FLOAT:  res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::float_type  | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break;

   595       case T_DOUBLE: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::double_type | LIR_OprDesc::stack_value | LIR_OprDesc::double_size); break;

   596 

   597       default:       ShouldNotReachHere(); res = illegalOpr;

   598     }

   599 

   600 #ifdef ASSERT

   601     assert(index >= 0, "index must be positive");

   602     assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");

   603 

   604     LIR_Opr old_res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::stack_value | as_OprType(type) | LIR_OprDesc::size_for(type));

   605     assert(res == old_res, "old and new method not equal");

   606 #endif

   607 

   608     return res;

   609   }

   610 

   611   static LIR_Opr intConst(jint i)                { return (LIR_Opr)(new LIR_Const(i)); }

   612   static LIR_Opr longConst(jlong l)              { return (LIR_Opr)(new LIR_Const(l)); }

   613   static LIR_Opr floatConst(jfloat f)            { return (LIR_Opr)(new LIR_Const(f)); }

   614   static LIR_Opr doubleConst(jdouble d)          { return (LIR_Opr)(new LIR_Const(d)); }

   615   static LIR_Opr oopConst(jobject o)             { return (LIR_Opr)(new LIR_Const(o)); }

   616   static LIR_Opr address(LIR_Address* a)         { return (LIR_Opr)a; }

   617   static LIR_Opr intptrConst(void* p)            { return (LIR_Opr)(new LIR_Const(p)); }

   618   static LIR_Opr intptrConst(intptr_t v)         { return (LIR_Opr)(new LIR_Const((void*)v)); }

   619   static LIR_Opr illegal()                       { return (LIR_Opr)-1; }

   620 

   621   static LIR_Opr value_type(ValueType* type);

   622   static LIR_Opr dummy_value_type(ValueType* type);

   623 };

   624 

   625 

   626 //-------------------------------------------------------------------------------

   627 //                   LIR Instructions

   628 //-------------------------------------------------------------------------------

   629 //

   630 // Note:

   631 //  - every instruction has a result operand

   632 //  - every instruction has an CodeEmitInfo operand (can be revisited later)

   633 //  - every instruction has a LIR_OpCode operand

   634 //  - LIR_OpN, means an instruction that has N input operands

   635 //

   636 // class hierarchy:

   637 //

   638 class  LIR_Op;

   639 class    LIR_Op0;

   640 class      LIR_OpLabel;

   641 class    LIR_Op1;

   642 class      LIR_OpBranch;

   643 class      LIR_OpConvert;

   644 class      LIR_OpAllocObj;

   645 class      LIR_OpRoundFP;

   646 class    LIR_Op2;

   647 class    LIR_OpDelay;

   648 class    LIR_Op3;

   649 class      LIR_OpAllocArray;

   650 class    LIR_OpCall;

   651 class      LIR_OpJavaCall;

   652 class      LIR_OpRTCall;

   653 class    LIR_OpArrayCopy;

   654 class    LIR_OpLock;

   655 class    LIR_OpTypeCheck;

   656 class    LIR_OpCompareAndSwap;

   657 class    LIR_OpProfileCall;

   658 

   659 

   660 // LIR operation codes

   661 enum LIR_Code {

   662     lir_none

   663   , begin_op0

   664       , lir_word_align

   665       , lir_label

   666       , lir_nop

   667       , lir_backwardbranch_target

   668       , lir_std_entry

   669       , lir_osr_entry

   670       , lir_build_frame

   671       , lir_fpop_raw

   672       , lir_24bit_FPU

   673       , lir_reset_FPU

   674       , lir_breakpoint

   675       , lir_rtcall

   676       , lir_membar

   677       , lir_membar_acquire

   678       , lir_membar_release

   679       , lir_get_thread

   680   , end_op0

   681   , begin_op1

   682       , lir_fxch

   683       , lir_fld

   684       , lir_ffree

   685       , lir_push

   686       , lir_pop

   687       , lir_null_check

   688       , lir_return

   689       , lir_leal

   690       , lir_neg

   691       , lir_branch

   692       , lir_cond_float_branch

   693       , lir_move

   694       , lir_prefetchr

   695       , lir_prefetchw

   696       , lir_convert

   697       , lir_alloc_object

   698       , lir_monaddr

   699       , lir_roundfp

   700       , lir_safepoint

   701   , end_op1

   702   , begin_op2

   703       , lir_cmp

   704       , lir_cmp_l2i

   705       , lir_ucmp_fd2i

   706       , lir_cmp_fd2i

   707       , lir_cmove

   708       , lir_add

   709       , lir_sub

   710       , lir_mul

   711       , lir_mul_strictfp

   712       , lir_div

   713       , lir_div_strictfp

   714       , lir_rem

   715       , lir_sqrt

   716       , lir_abs

   717       , lir_sin

   718       , lir_cos

   719       , lir_tan

   720       , lir_log

   721       , lir_log10

   722       , lir_logic_and

   723       , lir_logic_or

   724       , lir_logic_xor

   725       , lir_shl

   726       , lir_shr

   727       , lir_ushr

   728       , lir_alloc_array

   729       , lir_throw

   730       , lir_unwind

   731       , lir_compare_to

   732   , end_op2

   733   , begin_op3

   734       , lir_idiv

   735       , lir_irem

   736   , end_op3

   737   , begin_opJavaCall

   738       , lir_static_call

   739       , lir_optvirtual_call

   740       , lir_icvirtual_call

   741       , lir_virtual_call

   742   , end_opJavaCall

   743   , begin_opArrayCopy

   744       , lir_arraycopy

   745   , end_opArrayCopy

   746   , begin_opLock

   747     , lir_lock

   748     , lir_unlock

   749   , end_opLock

   750   , begin_delay_slot

   751     , lir_delay_slot

   752   , end_delay_slot

   753   , begin_opTypeCheck

   754     , lir_instanceof

   755     , lir_checkcast

   756     , lir_store_check

   757   , end_opTypeCheck

   758   , begin_opCompareAndSwap

   759     , lir_cas_long

   760     , lir_cas_obj

   761     , lir_cas_int

   762   , end_opCompareAndSwap

   763   , begin_opMDOProfile

   764     , lir_profile_call

   765   , end_opMDOProfile

   766 };

   767 

   768 

   769 enum LIR_Condition {

   770     lir_cond_equal

   771   , lir_cond_notEqual

   772   , lir_cond_less

   773   , lir_cond_lessEqual

   774   , lir_cond_greaterEqual

   775   , lir_cond_greater

   776   , lir_cond_belowEqual

   777   , lir_cond_aboveEqual

   778   , lir_cond_always

   779   , lir_cond_unknown = -1

   780 };

   781 

   782 

   783 enum LIR_PatchCode {

   784   lir_patch_none,

   785   lir_patch_low,

   786   lir_patch_high,

   787   lir_patch_normal

   788 };

   789 

   790 

   791 enum LIR_MoveKind {

   792   lir_move_normal,

   793   lir_move_volatile,

   794   lir_move_unaligned,

   795   lir_move_max_flag

   796 };

   797 

   798 

   799 // --------------------------------------------------

   800 // LIR_Op

   801 // --------------------------------------------------

   802 class LIR_Op: public CompilationResourceObj {

   803  friend class LIR_OpVisitState;

   804 

   805 #ifdef ASSERT

   806  private:

   807   const char *  _file;

   808   int           _line;

   809 #endif

   810 

   811  protected:

   812   LIR_Opr       _result;

   813   unsigned short _code;

   814   unsigned short _flags;

   815   CodeEmitInfo* _info;

   816   int           _id;     // value id for register allocation

   817   int           _fpu_pop_count;

   818   Instruction*  _source; // for debugging

   819 

   820   static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;

   821 

   822  protected:

   823   static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end)  { return start < test && test < end; }

   824 

   825  public:

   826   LIR_Op()

   827     : _result(LIR_OprFact::illegalOpr)

   828     , _code(lir_none)

   829     , _flags(0)

   830     , _info(NULL)

   831 #ifdef ASSERT

   832     , _file(NULL)

   833     , _line(0)

   834 #endif

   835     , _fpu_pop_count(0)

   836     , _source(NULL)

   837     , _id(-1)                             {}

   838 

   839   LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)

   840     : _result(result)

   841     , _code(code)

   842     , _flags(0)

   843     , _info(info)

   844 #ifdef ASSERT

   845     , _file(NULL)

   846     , _line(0)

   847 #endif

   848     , _fpu_pop_count(0)

   849     , _source(NULL)

   850     , _id(-1)                             {}

   851 

   852   CodeEmitInfo* info() const                  { return _info;   }

   853   LIR_Code code()      const                  { return (LIR_Code)_code;   }

   854   LIR_Opr result_opr() const                  { return _result; }

   855   void    set_result_opr(LIR_Opr opr)         { _result = opr;  }

   856 

   857 #ifdef ASSERT

   858   void set_file_and_line(const char * file, int line) {

   859     _file = file;

   860     _line = line;

   861   }

   862 #endif

   863 

   864   virtual const char * name() const PRODUCT_RETURN0;

   865 

   866   int id()             const                  { return _id;     }

   867   void set_id(int id)                         { _id = id; }

   868 

   869   // FPU stack simulation helpers -- only used on Intel

   870   void set_fpu_pop_count(int count)           { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }

   871   int  fpu_pop_count() const                  { return _fpu_pop_count; }

   872   bool pop_fpu_stack()                        { return _fpu_pop_count > 0; }

   873 

   874   Instruction* source() const                 { return _source; }

   875   void set_source(Instruction* ins)           { _source = ins; }

   876 

   877   virtual void emit_code(LIR_Assembler* masm) = 0;

   878   virtual void print_instr(outputStream* out) const   = 0;

   879   virtual void print_on(outputStream* st) const PRODUCT_RETURN;

   880 

   881   virtual LIR_OpCall* as_OpCall() { return NULL; }

   882   virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }

   883   virtual LIR_OpLabel* as_OpLabel() { return NULL; }

   884   virtual LIR_OpDelay* as_OpDelay() { return NULL; }

   885   virtual LIR_OpLock* as_OpLock() { return NULL; }

   886   virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }

   887   virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }

   888   virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }

   889   virtual LIR_OpBranch* as_OpBranch() { return NULL; }

   890   virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }

   891   virtual LIR_OpConvert* as_OpConvert() { return NULL; }

   892   virtual LIR_Op0* as_Op0() { return NULL; }

   893   virtual LIR_Op1* as_Op1() { return NULL; }

   894   virtual LIR_Op2* as_Op2() { return NULL; }

   895   virtual LIR_Op3* as_Op3() { return NULL; }

   896   virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }

   897   virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }

   898   virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }

   899   virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }

   900 

   901   virtual void verify() const {}

   902 };

   903 

   904 // for calls

   905 class LIR_OpCall: public LIR_Op {

   906  friend class LIR_OpVisitState;

   907 

   908  protected:

   909   address      _addr;

   910   LIR_OprList* _arguments;

   911  protected:

   912   LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,

   913              LIR_OprList* arguments, CodeEmitInfo* info = NULL)

   914     : LIR_Op(code, result, info)

   915     , _arguments(arguments)

   916     , _addr(addr) {}

   917 

   918  public:

   919   address addr() const                           { return _addr; }

   920   const LIR_OprList* arguments() const           { return _arguments; }

   921   virtual LIR_OpCall* as_OpCall()                { return this; }

   922 };

   923 

   924 

   925 // --------------------------------------------------

   926 // LIR_OpJavaCall

   927 // --------------------------------------------------

   928 class LIR_OpJavaCall: public LIR_OpCall {

   929  friend class LIR_OpVisitState;

   930 

   931  private:

   932   ciMethod*       _method;

   933   LIR_Opr         _receiver;

   934 

   935  public:

   936   LIR_OpJavaCall(LIR_Code code, ciMethod* method,

   937                  LIR_Opr receiver, LIR_Opr result,

   938                  address addr, LIR_OprList* arguments,

   939                  CodeEmitInfo* info)

   940   : LIR_OpCall(code, addr, result, arguments, info)

   941   , _receiver(receiver)

   942   , _method(method)          { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }

   943 

   944   LIR_OpJavaCall(LIR_Code code, ciMethod* method,

   945                  LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,

   946                  LIR_OprList* arguments, CodeEmitInfo* info)

   947   : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)

   948   , _receiver(receiver)

   949   , _method(method)          { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }

   950 

   951   LIR_Opr receiver() const                       { return _receiver; }

   952   ciMethod* method() const                       { return _method;   }

   953 

   954   intptr_t vtable_offset() const {

   955     assert(_code == lir_virtual_call, "only have vtable for real vcall");

   956     return (intptr_t) addr();

   957   }

   958 

   959   virtual void emit_code(LIR_Assembler* masm);

   960   virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }

   961   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;

   962 };

   963 

   964 // --------------------------------------------------

   965 // LIR_OpLabel

   966 // --------------------------------------------------

   967 // Location where a branch can continue

   968 class LIR_OpLabel: public LIR_Op {

   969  friend class LIR_OpVisitState;

   970 

   971  private:

   972   Label* _label;

   973  public:

   974   LIR_OpLabel(Label* lbl)

   975    : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)

   976    , _label(lbl)                                 {}

   977   Label* label() const                           { return _label; }

   978 

   979   virtual void emit_code(LIR_Assembler* masm);

   980   virtual LIR_OpLabel* as_OpLabel() { return this; }

   981   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;

   982 };

   983 

   984 // LIR_OpArrayCopy

   985 class LIR_OpArrayCopy: public LIR_Op {

   986  friend class LIR_OpVisitState;

   987 

   988  private:

   989   ArrayCopyStub*  _stub;

   990   LIR_Opr   _src;

   991   LIR_Opr   _src_pos;

   992   LIR_Opr   _dst;

   993   LIR_Opr   _dst_pos;

   994   LIR_Opr   _length;

   995   LIR_Opr   _tmp;

   996   ciArrayKlass* _expected_type;

   997   int       _flags;

   998 

   999 public:

  1000   enum Flags {

  1001     src_null_check         = 1 << 0,

  1002     dst_null_check         = 1 << 1,

  1003     src_pos_positive_check = 1 << 2,

  1004     dst_pos_positive_check = 1 << 3,

  1005     length_positive_check  = 1 << 4,

  1006     src_range_check        = 1 << 5,

  1007     dst_range_check        = 1 << 6,

  1008     type_check             = 1 << 7,

  1009     all_flags              = (1 << 8) - 1

  1010   };

  1011 

  1012   LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,

  1013                   ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);

  1014 

  1015   LIR_Opr src() const                            { return _src; }

  1016   LIR_Opr src_pos() const                        { return _src_pos; }

  1017   LIR_Opr dst() const                            { return _dst; }

  1018   LIR_Opr dst_pos() const                        { return _dst_pos; }

  1019   LIR_Opr length() const                         { return _length; }

  1020   LIR_Opr tmp() const                            { return _tmp; }

  1021   int flags() const                              { return _flags; }

  1022   ciArrayKlass* expected_type() const            { return _expected_type; }

  1023   ArrayCopyStub* stub() const                    { return _stub; }

  1024 

  1025   virtual void emit_code(LIR_Assembler* masm);

  1026   virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }

  1027   void print_instr(outputStream* out) const PRODUCT_RETURN;

  1028 };

  1029 

  1030 

  1031 // --------------------------------------------------

  1032 // LIR_Op0

  1033 // --------------------------------------------------

  1034 class LIR_Op0: public LIR_Op {

  1035  friend class LIR_OpVisitState;

  1036 

  1037  public:

  1038   LIR_Op0(LIR_Code code)

  1039    : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)  { assert(is_in_range(code, begin_op0, end_op0), "code check"); }

  1040   LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)

  1041    : LIR_Op(code, result, info)  { assert(is_in_range(code, begin_op0, end_op0), "code check"); }

  1042 

  1043   virtual void emit_code(LIR_Assembler* masm);

  1044   virtual LIR_Op0* as_Op0() { return this; }

  1045   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;

  1046 };

  1047 

  1048 

  1049 // --------------------------------------------------

  1050 // LIR_Op1

  1051 // --------------------------------------------------

  1052 

  1053 class LIR_Op1: public LIR_Op {

  1054  friend class LIR_OpVisitState;

  1055 

  1056  protected:

  1057   LIR_Opr         _opr;   // input operand

  1058   BasicType       _type;  // Operand types

  1059   LIR_PatchCode   _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)

  1060 

  1061   static void print_patch_code(outputStream* out, LIR_PatchCode code);

  1062 

  1063   void set_kind(LIR_MoveKind kind) {

  1064     assert(code() == lir_move, "must be");

  1065     _flags = kind;

  1066   }

  1067 

  1068  public:

  1069   LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)

  1070     : LIR_Op(code, result, info)

  1071     , _opr(opr)

  1072     , _patch(patch)

  1073     , _type(type)                      { assert(is_in_range(code, begin_op1, end_op1), "code check"); }

  1074 

  1075   LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)

  1076     : LIR_Op(code, result, info)

  1077     , _opr(opr)

  1078     , _patch(patch)

  1079     , _type(type)                      {

  1080     assert(code == lir_move, "must be");

  1081     set_kind(kind);

  1082   }

  1083 

  1084   LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)

  1085     : LIR_Op(code, LIR_OprFact::illegalOpr, info)

  1086     , _opr(opr)

  1087     , _patch(lir_patch_none)

  1088     , _type(T_ILLEGAL)                 { assert(is_in_range(code, begin_op1, end_op1), "code check"); }

  1089 

  1090   LIR_Opr in_opr()           const               { return _opr;   }

  1091   LIR_PatchCode patch_code() const               { return _patch; }

  1092   BasicType type()           const               { return _type;  }

  1093 

  1094   LIR_MoveKind move_kind() const {

  1095     assert(code() == lir_move, "must be");

  1096     return (LIR_MoveKind)_flags;

  1097   }

  1098 

  1099   virtual void emit_code(LIR_Assembler* masm);

  1100   virtual LIR_Op1* as_Op1() { return this; }

  1101   virtual const char * name() const PRODUCT_RETURN0;

  1102 

  1103   void set_in_opr(LIR_Opr opr) { _opr = opr; }

  1104 

  1105   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;

  1106   virtual void verify() const;

  1107 };

  1108 

  1109 

  1110 // for runtime calls

  1111 class LIR_OpRTCall: public LIR_OpCall {

  1112  friend class LIR_OpVisitState;

  1113 

  1114  private:

  1115   LIR_Opr _tmp;

  1116  public:

  1117   LIR_OpRTCall(address addr, LIR_Opr tmp,

  1118                LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)

  1119     : LIR_OpCall(lir_rtcall, addr, result, arguments, info)

  1120     , _tmp(tmp) {}

  1121 

  1122   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;

  1123   virtual void emit_code(LIR_Assembler* masm);

  1124   virtual LIR_OpRTCall* as_OpRTCall() { return this; }

  1125 

  1126   LIR_Opr tmp() const                            { return _tmp; }

  1127 

  1128   virtual void verify() const;

  1129 };

  1130 

  1131 

  1132 class LIR_OpBranch: public LIR_Op {

  1133  friend class LIR_OpVisitState;

  1134 

  1135  private: