38 import org.graalvm.compiler.lir.ConstantValue; |
38 import org.graalvm.compiler.lir.ConstantValue; |
39 import org.graalvm.compiler.lir.LIRFrameState; |
39 import org.graalvm.compiler.lir.LIRFrameState; |
40 import org.graalvm.compiler.lir.LIRInstructionClass; |
40 import org.graalvm.compiler.lir.LIRInstructionClass; |
41 import org.graalvm.compiler.lir.Opcode; |
41 import org.graalvm.compiler.lir.Opcode; |
42 import org.graalvm.compiler.lir.amd64.AMD64AddressValue; |
42 import org.graalvm.compiler.lir.amd64.AMD64AddressValue; |
43 import org.graalvm.compiler.lir.amd64.AMD64LIRInstruction; |
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44 import org.graalvm.compiler.lir.asm.CompilationResultBuilder; |
43 import org.graalvm.compiler.lir.asm.CompilationResultBuilder; |
45 |
44 |
46 import jdk.vm.ci.amd64.AMD64Kind; |
45 import jdk.vm.ci.amd64.AMD64Kind; |
47 import jdk.vm.ci.meta.AllocatableValue; |
46 import jdk.vm.ci.meta.AllocatableValue; |
48 |
47 |
49 public class AMD64VectorBinary { |
48 public class AMD64VectorBinary { |
50 |
49 |
51 public static final class AVXBinaryOp extends AMD64LIRInstruction { |
50 public static final class AVXBinaryOp extends AMD64VectorInstruction { |
52 public static final LIRInstructionClass<AVXBinaryOp> TYPE = LIRInstructionClass.create(AVXBinaryOp.class); |
51 public static final LIRInstructionClass<AVXBinaryOp> TYPE = LIRInstructionClass.create(AVXBinaryOp.class); |
53 |
52 |
54 @Opcode private final VexRVMOp opcode; |
53 @Opcode private final VexRVMOp opcode; |
55 private final AVXKind.AVXSize size; |
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56 |
54 |
57 @Def({REG}) protected AllocatableValue result; |
55 @Def({REG}) protected AllocatableValue result; |
58 @Use({REG}) protected AllocatableValue x; |
56 @Use({REG}) protected AllocatableValue x; |
59 @Use({REG, STACK}) protected AllocatableValue y; |
57 @Use({REG, STACK}) protected AllocatableValue y; |
60 |
58 |
61 public AVXBinaryOp(VexRVMOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, AllocatableValue y) { |
59 public AVXBinaryOp(VexRVMOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, AllocatableValue y) { |
62 super(TYPE); |
60 super(TYPE, size); |
63 this.opcode = opcode; |
61 this.opcode = opcode; |
64 this.size = size; |
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65 this.result = result; |
62 this.result = result; |
66 this.x = x; |
63 this.x = x; |
67 this.y = y; |
64 this.y = y; |
68 } |
65 } |
69 |
66 |
75 opcode.emit(masm, size, asRegister(result), asRegister(x), (AMD64Address) crb.asAddress(y)); |
72 opcode.emit(masm, size, asRegister(result), asRegister(x), (AMD64Address) crb.asAddress(y)); |
76 } |
73 } |
77 } |
74 } |
78 } |
75 } |
79 |
76 |
80 public static final class AVXBinaryConstOp extends AMD64LIRInstruction { |
77 public static final class AVXBinaryConstOp extends AMD64VectorInstruction { |
81 |
78 |
82 public static final LIRInstructionClass<AVXBinaryConstOp> TYPE = LIRInstructionClass.create(AVXBinaryConstOp.class); |
79 public static final LIRInstructionClass<AVXBinaryConstOp> TYPE = LIRInstructionClass.create(AVXBinaryConstOp.class); |
83 |
80 |
84 @Opcode private final VexRRIOp opcode; |
81 @Opcode private final VexRRIOp opcode; |
85 private final AVXKind.AVXSize size; |
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86 |
82 |
87 @Def({REG}) protected AllocatableValue result; |
83 @Def({REG}) protected AllocatableValue result; |
88 @Use({REG}) protected AllocatableValue x; |
84 @Use({REG}) protected AllocatableValue x; |
89 protected int y; |
85 protected int y; |
90 |
86 |
91 public AVXBinaryConstOp(VexRRIOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, int y) { |
87 public AVXBinaryConstOp(VexRRIOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, int y) { |
92 super(TYPE); |
88 super(TYPE, size); |
93 assert (y & 0xFF) == y; |
89 assert (y & 0xFF) == y; |
94 this.opcode = opcode; |
90 this.opcode = opcode; |
95 this.size = size; |
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96 this.result = result; |
91 this.result = result; |
97 this.x = x; |
92 this.x = x; |
98 this.y = y; |
93 this.y = y; |
99 } |
94 } |
100 |
95 |
102 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
97 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
103 opcode.emit(masm, size, asRegister(result), asRegister(x), y); |
98 opcode.emit(masm, size, asRegister(result), asRegister(x), y); |
104 } |
99 } |
105 } |
100 } |
106 |
101 |
107 public static final class AVXBinaryConstFloatOp extends AMD64LIRInstruction { |
102 public static final class AVXBinaryConstFloatOp extends AMD64VectorInstruction { |
108 |
103 |
109 public static final LIRInstructionClass<AVXBinaryConstFloatOp> TYPE = LIRInstructionClass.create(AVXBinaryConstFloatOp.class); |
104 public static final LIRInstructionClass<AVXBinaryConstFloatOp> TYPE = LIRInstructionClass.create(AVXBinaryConstFloatOp.class); |
110 |
105 |
111 @Opcode private final VexRVMOp opcode; |
106 @Opcode private final VexRVMOp opcode; |
112 private final AVXKind.AVXSize size; |
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113 |
107 |
114 @Def({REG}) protected AllocatableValue result; |
108 @Def({REG}) protected AllocatableValue result; |
115 @Use({REG}) protected AllocatableValue x; |
109 @Use({REG}) protected AllocatableValue x; |
116 protected ConstantValue y; |
110 protected ConstantValue y; |
117 |
111 |
118 public AVXBinaryConstFloatOp(VexRVMOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, ConstantValue y) { |
112 public AVXBinaryConstFloatOp(VexRVMOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, ConstantValue y) { |
119 super(TYPE); |
113 super(TYPE, size); |
120 assert y.getPlatformKind() == AMD64Kind.SINGLE || y.getPlatformKind() == AMD64Kind.DOUBLE; |
114 assert y.getPlatformKind() == AMD64Kind.SINGLE || y.getPlatformKind() == AMD64Kind.DOUBLE; |
121 this.opcode = opcode; |
115 this.opcode = opcode; |
122 this.size = size; |
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123 this.result = result; |
116 this.result = result; |
124 this.x = x; |
117 this.x = x; |
125 this.y = y; |
118 this.y = y; |
126 } |
119 } |
127 |
120 |
134 opcode.emit(masm, size, asRegister(result), asRegister(x), (AMD64Address) crb.asDoubleConstRef(y.getJavaConstant())); |
127 opcode.emit(masm, size, asRegister(result), asRegister(x), (AMD64Address) crb.asDoubleConstRef(y.getJavaConstant())); |
135 } |
128 } |
136 } |
129 } |
137 } |
130 } |
138 |
131 |
139 public static final class AVXBinaryMemoryOp extends AMD64LIRInstruction { |
132 public static final class AVXBinaryMemoryOp extends AMD64VectorInstruction { |
140 public static final LIRInstructionClass<AVXBinaryMemoryOp> TYPE = LIRInstructionClass.create(AVXBinaryMemoryOp.class); |
133 public static final LIRInstructionClass<AVXBinaryMemoryOp> TYPE = LIRInstructionClass.create(AVXBinaryMemoryOp.class); |
141 |
134 |
142 @Opcode private final VexRVMOp opcode; |
135 @Opcode private final VexRVMOp opcode; |
143 private final AVXKind.AVXSize size; |
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144 |
136 |
145 @Def({REG}) protected AllocatableValue result; |
137 @Def({REG}) protected AllocatableValue result; |
146 @Use({REG}) protected AllocatableValue x; |
138 @Use({REG}) protected AllocatableValue x; |
147 @Use({COMPOSITE}) protected AMD64AddressValue y; |
139 @Use({COMPOSITE}) protected AMD64AddressValue y; |
148 @State protected LIRFrameState state; |
140 @State protected LIRFrameState state; |
149 |
141 |
150 public AVXBinaryMemoryOp(VexRVMOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, AMD64AddressValue y, LIRFrameState state) { |
142 public AVXBinaryMemoryOp(VexRVMOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, AMD64AddressValue y, LIRFrameState state) { |
151 super(TYPE); |
143 super(TYPE, size); |
152 this.opcode = opcode; |
144 this.opcode = opcode; |
153 this.size = size; |
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154 this.result = result; |
145 this.result = result; |
155 this.x = x; |
146 this.x = x; |
156 this.y = y; |
147 this.y = y; |
157 this.state = state; |
148 this.state = state; |
158 } |
149 } |