equal
deleted
inserted
replaced
1672 } |
1672 } |
1673 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
1673 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
1674 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F3, true); |
1674 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F3, true); |
1675 } |
1675 } |
1676 |
1676 |
|
1677 void Assembler::cvtsi2ssq(XMMRegister dst, Register src) { |
|
1678 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
1679 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F3, true); |
|
1680 emit_int8(0x2A); |
|
1681 emit_int8((unsigned char)(0xC0 | encode)); |
|
1682 } |
|
1683 |
1677 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { |
1684 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { |
1678 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
1685 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
1679 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
1686 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
1680 } |
1687 } |
1681 |
1688 |
6602 simd_prefix_q(dst, dst, src, VEX_SIMD_F2, true); |
6609 simd_prefix_q(dst, dst, src, VEX_SIMD_F2, true); |
6603 emit_int8(0x2A); |
6610 emit_int8(0x2A); |
6604 emit_operand(dst, src); |
6611 emit_operand(dst, src); |
6605 } |
6612 } |
6606 |
6613 |
6607 void Assembler::cvtsi2ssq(XMMRegister dst, Register src) { |
|
6608 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
6609 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F3, true); |
|
6610 emit_int8(0x2A); |
|
6611 emit_int8((unsigned char)(0xC0 | encode)); |
|
6612 } |
|
6613 |
|
6614 void Assembler::cvtsi2ssq(XMMRegister dst, Address src) { |
6614 void Assembler::cvtsi2ssq(XMMRegister dst, Address src) { |
6615 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
6615 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
6616 if (VM_Version::supports_evex()) { |
6616 if (VM_Version::supports_evex()) { |
6617 tuple_type = EVEX_T1S; |
6617 tuple_type = EVEX_T1S; |
6618 input_size_in_bits = EVEX_32bit; |
6618 input_size_in_bits = EVEX_32bit; |