src/hotspot/cpu/x86/c1_CodeStubs_x86.cpp
author tschatzl
Wed, 08 Aug 2018 15:31:06 +0200
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8208670: Compiler changes to allow enabling -Wreorder Reviewed-by: kvn
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/*
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 * Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "c1/c1_CodeStubs.hpp"
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#include "c1/c1_FrameMap.hpp"
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#include "c1/c1_LIRAssembler.hpp"
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#include "c1/c1_MacroAssembler.hpp"
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#include "c1/c1_Runtime1.hpp"
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#include "nativeInst_x86.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "utilities/align.hpp"
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#include "utilities/macros.hpp"
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#include "vmreg_x86.inline.hpp"
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#define __ ce->masm()->
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float ConversionStub::float_zero = 0.0;
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double ConversionStub::double_zero = 0.0;
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void ConversionStub::emit_code(LIR_Assembler* ce) {
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  __ bind(_entry);
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  assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
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  if (input()->is_single_xmm()) {
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    __ comiss(input()->as_xmm_float_reg(),
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              ExternalAddress((address)&float_zero));
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  } else if (input()->is_double_xmm()) {
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    __ comisd(input()->as_xmm_double_reg(),
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              ExternalAddress((address)&double_zero));
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  } else {
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    LP64_ONLY(ShouldNotReachHere());
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    __ push(rax);
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    __ ftst();
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    __ fnstsw_ax();
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    __ sahf();
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    __ pop(rax);
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  }
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  Label NaN, do_return;
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  __ jccb(Assembler::parity, NaN);
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  __ jccb(Assembler::below, do_return);
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  // input is > 0 -> return maxInt
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  // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
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  __ decrement(result()->as_register());
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  __ jmpb(do_return);
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  // input is NaN -> return 0
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  __ bind(NaN);
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  __ xorptr(result()->as_register(), result()->as_register());
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  __ bind(do_return);
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  __ jmp(_continuation);
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}
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void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
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  __ bind(_entry);
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  Metadata *m = _method->as_constant_ptr()->as_metadata();
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  ce->store_parameter(m, 1);
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  ce->store_parameter(_bci, 0);
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  __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
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  ce->add_call_info_here(_info);
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  ce->verify_oop_map(_info);
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  __ jmp(_continuation);
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}
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RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index, LIR_Opr array)
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  : _index(index), _array(array), _throw_index_out_of_bounds_exception(false) {
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  assert(info != NULL, "must have info");
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  _info = new CodeEmitInfo(info);
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}
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RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index)
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  : _index(index), _array(NULL), _throw_index_out_of_bounds_exception(true) {
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  assert(info != NULL, "must have info");
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  _info = new CodeEmitInfo(info);
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}
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void RangeCheckStub::emit_code(LIR_Assembler* ce) {
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  __ bind(_entry);
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  if (_info->deoptimize_on_exception()) {
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    address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id);
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    __ call(RuntimeAddress(a));
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    ce->add_call_info_here(_info);
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    ce->verify_oop_map(_info);
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    debug_only(__ should_not_reach_here());
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    return;
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  }
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  // pass the array index on stack because all registers must be preserved
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  if (_index->is_cpu_register()) {
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    ce->store_parameter(_index->as_register(), 0);
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  } else {
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    ce->store_parameter(_index->as_jint(), 0);
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  }
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  Runtime1::StubID stub_id;
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  if (_throw_index_out_of_bounds_exception) {
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    stub_id = Runtime1::throw_index_exception_id;
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  } else {
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    stub_id = Runtime1::throw_range_check_failed_id;
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    ce->store_parameter(_array->as_pointer_register(), 1);
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  }
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  __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
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  ce->add_call_info_here(_info);
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  ce->verify_oop_map(_info);
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  debug_only(__ should_not_reach_here());
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}
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PredicateFailedStub::PredicateFailedStub(CodeEmitInfo* info) {
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  _info = new CodeEmitInfo(info);
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}
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void PredicateFailedStub::emit_code(LIR_Assembler* ce) {
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  __ bind(_entry);
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  address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id);
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  __ call(RuntimeAddress(a));
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  ce->add_call_info_here(_info);
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  ce->verify_oop_map(_info);
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  debug_only(__ should_not_reach_here());
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}
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void DivByZeroStub::emit_code(LIR_Assembler* ce) {
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  if (_offset != -1) {
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    ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
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  }
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  __ bind(_entry);
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  __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
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  ce->add_call_info_here(_info);
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  debug_only(__ should_not_reach_here());
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}
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// Implementation of NewInstanceStub
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NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
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  _result = result;
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  _klass = klass;
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  _klass_reg = klass_reg;
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  _info = new CodeEmitInfo(info);
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  assert(stub_id == Runtime1::new_instance_id                 ||
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         stub_id == Runtime1::fast_new_instance_id            ||
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         stub_id == Runtime1::fast_new_instance_init_check_id,
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         "need new_instance id");
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  _stub_id   = stub_id;
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}
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void NewInstanceStub::emit_code(LIR_Assembler* ce) {
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  assert(__ rsp_offset() == 0, "frame size should be fixed");
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  __ bind(_entry);
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  __ movptr(rdx, _klass_reg->as_register());
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  __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
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  ce->add_call_info_here(_info);
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  ce->verify_oop_map(_info);
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  assert(_result->as_register() == rax, "result must in rax,");
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  __ jmp(_continuation);
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}
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// Implementation of NewTypeArrayStub
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NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
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  _klass_reg = klass_reg;
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  _length = length;
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  _result = result;
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  _info = new CodeEmitInfo(info);
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}
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void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
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  assert(__ rsp_offset() == 0, "frame size should be fixed");
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  __ bind(_entry);
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  assert(_length->as_register() == rbx, "length must in rbx,");
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  assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
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  __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
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  ce->add_call_info_here(_info);
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  ce->verify_oop_map(_info);
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  assert(_result->as_register() == rax, "result must in rax,");
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  __ jmp(_continuation);
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}
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// Implementation of NewObjectArrayStub
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NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
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  _klass_reg = klass_reg;
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  _result = result;
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  _length = length;
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  _info = new CodeEmitInfo(info);
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}
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void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
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  assert(__ rsp_offset() == 0, "frame size should be fixed");
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  __ bind(_entry);
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  assert(_length->as_register() == rbx, "length must in rbx,");
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  assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
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  __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
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  ce->add_call_info_here(_info);
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  ce->verify_oop_map(_info);
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  assert(_result->as_register() == rax, "result must in rax,");
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  __ jmp(_continuation);
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}
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// Implementation of MonitorAccessStubs
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MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
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: MonitorAccessStub(obj_reg, lock_reg)
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{
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  _info = new CodeEmitInfo(info);
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}
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void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
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  assert(__ rsp_offset() == 0, "frame size should be fixed");
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  __ bind(_entry);
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  ce->store_parameter(_obj_reg->as_register(),  1);
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  ce->store_parameter(_lock_reg->as_register(), 0);
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  Runtime1::StubID enter_id;
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  if (ce->compilation()->has_fpu_code()) {
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    enter_id = Runtime1::monitorenter_id;
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  } else {
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    enter_id = Runtime1::monitorenter_nofpu_id;
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  }
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  __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
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  ce->add_call_info_here(_info);
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  ce->verify_oop_map(_info);
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  __ jmp(_continuation);
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}
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void MonitorExitStub::emit_code(LIR_Assembler* ce) {
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  __ bind(_entry);
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  if (_compute_lock) {
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    // lock_reg was destroyed by fast unlocking attempt => recompute it
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    ce->monitor_address(_monitor_ix, _lock_reg);
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  }
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  ce->store_parameter(_lock_reg->as_register(), 0);
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  // note: non-blocking leaf routine => no call info needed
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  Runtime1::StubID exit_id;
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  if (ce->compilation()->has_fpu_code()) {
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    exit_id = Runtime1::monitorexit_id;
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  } else {
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    exit_id = Runtime1::monitorexit_nofpu_id;
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  }
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  __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
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  __ jmp(_continuation);
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}
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// Implementation of patching:
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// - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
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// - Replace original code with a call to the stub
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// At Runtime:
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// - call to stub, jump to runtime
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// - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
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// - in runtime: after initializing class, restore original code, reexecute instruction
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int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
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void PatchingStub::align_patch_site(MacroAssembler* masm) {
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  // We're patching a 5-7 byte instruction on intel and we need to
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  // make sure that we don't see a piece of the instruction.  It
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  // appears mostly impossible on Intel to simply invalidate other
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  // processors caches and since they may do aggressive prefetch it's
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  // very hard to make a guess about what code might be in the icache.
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  // Force the instruction to be double word aligned so that it
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  // doesn't span a cache line.
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  masm->align(align_up((int)NativeGeneralJump::instruction_size, wordSize));
1
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}
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void PatchingStub::emit_code(LIR_Assembler* ce) {
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  assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
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  Label call_patch;
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  // static field accesses have special semantics while the class
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  // initializer is being run so we emit a test which can be used to
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  // check that this code is being executed by the initializing
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  // thread.
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  address being_initialized_entry = __ pc();
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  if (CommentedAssembly) {
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    __ block_comment(" patch template");
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  }
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  if (_id == load_klass_id) {
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    // produce a copy of the load klass instruction for use by the being initialized case
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#ifdef ASSERT
1
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    address start = __ pc();
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#endif
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    Metadata* o = NULL;
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    __ mov_metadata(_obj, o);
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#ifdef ASSERT
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    for (int i = 0; i < _bytes_to_copy; i++) {
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      address ptr = (address)(_pc_start + i);
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      int a_byte = (*ptr) & 0xFF;
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      assert(a_byte == *start++, "should be the same code");
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   322
    }
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#endif
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  } else if (_id == load_mirror_id) {
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    // produce a copy of the load mirror instruction for use by the being
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    // initialized case
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#ifdef ASSERT
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    address start = __ pc();
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#endif
1
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    jobject o = NULL;
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    __ movoop(_obj, o);
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#ifdef ASSERT
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    for (int i = 0; i < _bytes_to_copy; i++) {
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      address ptr = (address)(_pc_start + i);
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      int a_byte = (*ptr) & 0xFF;
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      assert(a_byte == *start++, "should be the same code");
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    }
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#endif
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  } else {
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    // make a copy the code which is going to be patched.
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    for (int i = 0; i < _bytes_to_copy; i++) {
1
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      address ptr = (address)(_pc_start + i);
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      int a_byte = (*ptr) & 0xFF;
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      __ emit_int8(a_byte);
1
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      *ptr = 0x90; // make the site look like a nop
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    }
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  }
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  address end_of_patch = __ pc();
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  int bytes_to_skip = 0;
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  if (_id == load_mirror_id) {
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    int offset = __ offset();
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   353
    if (CommentedAssembly) {
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      __ block_comment(" being_initialized check");
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    }
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    assert(_obj != noreg, "must be a valid register");
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    Register tmp = rax;
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    Register tmp2 = rbx;
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    __ push(tmp);
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    __ push(tmp2);
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    // Load without verification to keep code size small. We need it because
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diff changeset
   362
    // begin_initialized_entry_offset has to fit in a byte. Also, we know it's not null.
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13486
diff changeset
   363
    __ movptr(tmp2, Address(_obj, java_lang_Class::klass_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   364
    __ get_thread(tmp);
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13486
diff changeset
   365
    __ cmpptr(tmp, Address(tmp2, InstanceKlass::init_thread_offset()));
8725
8c1e3dd5fe1b 7017732: move static fields into Class to prepare for perm gen removal
never
parents: 8067
diff changeset
   366
    __ pop(tmp2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 1
diff changeset
   367
    __ pop(tmp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   368
    __ jcc(Assembler::notEqual, call_patch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   369
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
    // access_field patches may execute the patched code before it's
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
    // copied back into place so we need to jump back into the main
489c9b5090e2 Initial load
duke
parents:
diff changeset
   372
    // code of the nmethod to continue execution.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   373
    __ jmp(_patch_site_continuation);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   374
489c9b5090e2 Initial load
duke
parents:
diff changeset
   375
    // make sure this extra code gets skipped
489c9b5090e2 Initial load
duke
parents:
diff changeset
   376
    bytes_to_skip += __ offset() - offset;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   377
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   378
  if (CommentedAssembly) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   379
    __ block_comment("patch data encoded as movl");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   380
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   381
  // Now emit the patch record telling the runtime how to find the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   382
  // pieces of the patch.  We only need 3 bytes but for readability of
489c9b5090e2 Initial load
duke
parents:
diff changeset
   383
  // the disassembly we make the data look like a movl reg, imm32,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   384
  // which requires 5 bytes
489c9b5090e2 Initial load
duke
parents:
diff changeset
   385
  int sizeof_patch_record = 5;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   386
  bytes_to_skip += sizeof_patch_record;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
  // emit the offsets needed to find the code to patch
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
  int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
14837
a75c3082d106 8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents: 13728
diff changeset
   391
  __ emit_int8((unsigned char)0xB8);
a75c3082d106 8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents: 13728
diff changeset
   392
  __ emit_int8(0);
a75c3082d106 8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents: 13728
diff changeset
   393
  __ emit_int8(being_initialized_entry_offset);
a75c3082d106 8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents: 13728
diff changeset
   394
  __ emit_int8(bytes_to_skip);
a75c3082d106 8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents: 13728
diff changeset
   395
  __ emit_int8(_bytes_to_copy);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
  address patch_info_pc = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
  assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
  address entry = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   400
  NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   401
  address target = NULL;
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13486
diff changeset
   402
  relocInfo::relocType reloc_type = relocInfo::none;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   403
  switch (_id) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
    case access_field_id:  target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13486
diff changeset
   405
    case load_klass_id:    target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break;
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13486
diff changeset
   406
    case load_mirror_id:   target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break;
19710
2f8ca425504e 7199175: JSR 292: C1 needs patching when invokedynamic/invokehandle call site is not linked
roland
parents: 16611
diff changeset
   407
    case load_appendix_id:      target = Runtime1::entry_for(Runtime1::load_appendix_patching_id); reloc_type = relocInfo::oop_type; break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   408
    default: ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   409
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
  __ bind(call_patch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   411
489c9b5090e2 Initial load
duke
parents:
diff changeset
   412
  if (CommentedAssembly) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
    __ block_comment("patch entry point");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   415
  __ call(RuntimeAddress(target));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   416
  assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   417
  ce->add_call_info_here(_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
  int jmp_off = __ offset();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   419
  __ jmp(_patch_site_entry);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   420
  // Add enough nops so deoptimization can overwrite the jmp above with a call
32203
01a3716ed455 8131682: C1 should use multibyte nops everywhere
shade
parents: 32082
diff changeset
   421
  // and not destroy the world. We cannot use fat nops here, since the concurrent
01a3716ed455 8131682: C1 should use multibyte nops everywhere
shade
parents: 32082
diff changeset
   422
  // code rewrite may transiently create the illegal instruction sequence.
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   423
  for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   424
    __ nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
  }
19710
2f8ca425504e 7199175: JSR 292: C1 needs patching when invokedynamic/invokehandle call site is not linked
roland
parents: 16611
diff changeset
   426
  if (_id == load_klass_id || _id == load_mirror_id || _id == load_appendix_id) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   427
    CodeSection* cs = __ code_section();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   428
    RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13486
diff changeset
   429
    relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, reloc_type, relocInfo::none);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   430
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   431
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   432
489c9b5090e2 Initial load
duke
parents:
diff changeset
   433
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1412
diff changeset
   434
void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1412
diff changeset
   435
  __ bind(_entry);
24442
4d4ae31dea26 8032463: VirtualDispatch test timeout with DeoptimizeALot
iveresov
parents: 22234
diff changeset
   436
  ce->store_parameter(_trap_request, 0);
10972
ef164805934c 7102657: JSR 292: C1 deoptimizes unlinked invokedynamic call sites infinitely
twisti
parents: 9186
diff changeset
   437
  __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id)));
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1412
diff changeset
   438
  ce->add_call_info_here(_info);
10972
ef164805934c 7102657: JSR 292: C1 deoptimizes unlinked invokedynamic call sites infinitely
twisti
parents: 9186
diff changeset
   439
  DEBUG_ONLY(__ should_not_reach_here());
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1412
diff changeset
   440
}
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1412
diff changeset
   441
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1412
diff changeset
   442
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   443
void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   444
  address a;
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   445
  if (_info->deoptimize_on_exception()) {
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   446
    // Deoptimize, do not throw the exception, because it is probably wrong to do it here.
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   447
    a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id);
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   448
  } else {
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   449
    a = Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id);
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   450
  }
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   451
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
  ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   453
  __ bind(_entry);
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   454
  __ call(RuntimeAddress(a));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   455
  ce->add_call_info_here(_info);
16611
6807a703dd6b 7153771: array bound check elimination for c1
roland
parents: 15482
diff changeset
   456
  ce->verify_oop_map(_info);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
  debug_only(__ should_not_reach_here());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   458
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   459
489c9b5090e2 Initial load
duke
parents:
diff changeset
   460
489c9b5090e2 Initial load
duke
parents:
diff changeset
   461
void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
  assert(__ rsp_offset() == 0, "frame size should be fixed");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
489c9b5090e2 Initial load
duke
parents:
diff changeset
   464
  __ bind(_entry);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
  // pass the object on stack because all registers must be preserved
489c9b5090e2 Initial load
duke
parents:
diff changeset
   466
  if (_obj->is_cpu_register()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   467
    ce->store_parameter(_obj->as_register(), 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   468
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
  __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   470
  ce->add_call_info_here(_info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   471
  debug_only(__ should_not_reach_here());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   472
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   473
489c9b5090e2 Initial load
duke
parents:
diff changeset
   474
489c9b5090e2 Initial load
duke
parents:
diff changeset
   475
void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   476
  //---------------slow case: call to native-----------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   477
  __ bind(_entry);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   478
  // Figure out where the args should go
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13486
diff changeset
   479
  // This should really convert the IntrinsicID to the Method* and signature
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   480
  // but I don't know how to do that.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   482
  VMRegPair args[5];
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
  BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
489c9b5090e2 Initial load
duke
parents:
diff changeset
   484
  SharedRuntime::java_calling_convention(signature, args, 5, true);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   485
489c9b5090e2 Initial load
duke
parents:
diff changeset
   486
  // push parameters
489c9b5090e2 Initial load
duke
parents:
diff changeset
   487
  // (src, src_pos, dest, destPos, length)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   488
  Register r[5];
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
  r[0] = src()->as_register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   490
  r[1] = src_pos()->as_register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
  r[2] = dst()->as_register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
  r[3] = dst_pos()->as_register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
  r[4] = length()->as_register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
  // next registers will get stored on the stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
  for (int i = 0; i < 5 ; i++ ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   497
    VMReg r_1 = args[i].first();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   498
    if (r_1->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
      int st_off = r_1->reg2stack() * wordSize;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 1
diff changeset
   500
      __ movptr (Address(rsp, st_off), r[i]);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   501
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   502
      assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   503
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   504
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   505
489c9b5090e2 Initial load
duke
parents:
diff changeset
   506
  ce->align_call(lir_static_call);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   507
489c9b5090e2 Initial load
duke
parents:
diff changeset
   508
  ce->emit_static_call_stub();
32082
2a3323e25de1 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
thartmann
parents: 30764
diff changeset
   509
  if (ce->compilation()->bailed_out()) {
2a3323e25de1 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
thartmann
parents: 30764
diff changeset
   510
    return; // CodeCache is full
2a3323e25de1 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
thartmann
parents: 30764
diff changeset
   511
  }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   512
  AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   513
                         relocInfo::static_call_type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   514
  __ call(resolve);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   515
  ce->add_call_info_here(info());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   516
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
#ifndef PRODUCT
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 1
diff changeset
   518
  __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
  __ jmp(_continuation);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   522
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   523
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
#undef __