hotspot/src/cpu/x86/vm/sharedRuntime_x86_64.cpp
author trims
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6941466: Oracle rebranding changes for Hotspot repositories Summary: Change all the Sun copyrights to Oracle copyright Reviewed-by: ohair
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/*
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 * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "incls/_precompiled.incl"
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#include "incls/_sharedRuntime_x86_64.cpp.incl"
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DeoptimizationBlob *SharedRuntime::_deopt_blob;
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#ifdef COMPILER2
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UncommonTrapBlob   *SharedRuntime::_uncommon_trap_blob;
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ExceptionBlob      *OptoRuntime::_exception_blob;
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#endif // COMPILER2
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SafepointBlob      *SharedRuntime::_polling_page_safepoint_handler_blob;
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SafepointBlob      *SharedRuntime::_polling_page_return_handler_blob;
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RuntimeStub*       SharedRuntime::_wrong_method_blob;
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RuntimeStub*       SharedRuntime::_ic_miss_blob;
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RuntimeStub*       SharedRuntime::_resolve_opt_virtual_call_blob;
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RuntimeStub*       SharedRuntime::_resolve_virtual_call_blob;
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RuntimeStub*       SharedRuntime::_resolve_static_call_blob;
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const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
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#define __ masm->
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class SimpleRuntimeFrame {
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  public:
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  // Most of the runtime stubs have this simple frame layout.
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  // This class exists to make the layout shared in one place.
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  // Offsets are for compiler stack slots, which are jints.
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  enum layout {
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    // The frame sender code expects that rbp will be in the "natural" place and
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    // will override any oopMap setting for it. We must therefore force the layout
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    // so that it agrees with the frame sender code.
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    rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
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    rbp_off2,
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    return_off, return_off2,
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    framesize
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  };
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};
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class RegisterSaver {
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  // Capture info about frame layout.  Layout offsets are in jint
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  // units because compiler frame slots are jints.
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#define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
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  enum layout {
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    fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
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    xmm_off       = fpu_state_off + 160/BytesPerInt,            // offset in fxsave save area
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    DEF_XMM_OFFS(0),
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    DEF_XMM_OFFS(1),
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    DEF_XMM_OFFS(2),
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    DEF_XMM_OFFS(3),
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    DEF_XMM_OFFS(4),
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    DEF_XMM_OFFS(5),
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    DEF_XMM_OFFS(6),
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    DEF_XMM_OFFS(7),
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    DEF_XMM_OFFS(8),
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    DEF_XMM_OFFS(9),
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    DEF_XMM_OFFS(10),
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    DEF_XMM_OFFS(11),
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    DEF_XMM_OFFS(12),
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    DEF_XMM_OFFS(13),
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    DEF_XMM_OFFS(14),
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    DEF_XMM_OFFS(15),
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    fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
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    fpu_stateH_end,
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    r15_off, r15H_off,
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    r14_off, r14H_off,
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    r13_off, r13H_off,
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    r12_off, r12H_off,
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    r11_off, r11H_off,
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    r10_off, r10H_off,
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    r9_off,  r9H_off,
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    r8_off,  r8H_off,
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    rdi_off, rdiH_off,
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    rsi_off, rsiH_off,
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    ignore_off, ignoreH_off,  // extra copy of rbp
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    rsp_off, rspH_off,
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    rbx_off, rbxH_off,
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    rdx_off, rdxH_off,
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    rcx_off, rcxH_off,
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    rax_off, raxH_off,
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    // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
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    align_off, alignH_off,
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    flags_off, flagsH_off,
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    // The frame sender code expects that rbp will be in the "natural" place and
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    // will override any oopMap setting for it. We must therefore force the layout
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    // so that it agrees with the frame sender code.
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    rbp_off, rbpH_off,        // copy of rbp we will restore
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    return_off, returnH_off,  // slot for return address
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    reg_save_size             // size in compiler stack slots
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  };
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 public:
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  static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
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  static void restore_live_registers(MacroAssembler* masm);
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  // Offsets into the register save area
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  // Used by deoptimization when it is managing result register
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  // values on its own
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  static int rax_offset_in_bytes(void)    { return BytesPerInt * rax_off; }
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  static int rdx_offset_in_bytes(void)    { return BytesPerInt * rdx_off; }
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  static int rbx_offset_in_bytes(void)    { return BytesPerInt * rbx_off; }
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  static int xmm0_offset_in_bytes(void)   { return BytesPerInt * xmm0_off; }
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  static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
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  // During deoptimization only the result registers need to be restored,
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  // all the other values have already been extracted.
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  static void restore_result_registers(MacroAssembler* masm);
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};
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OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
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  // Always make the frame size 16-byte aligned
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  int frame_size_in_bytes = round_to(additional_frame_words*wordSize +
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                                     reg_save_size*BytesPerInt, 16);
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  // OopMap frame size is in compiler stack slots (jint's) not bytes or words
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  int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
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  // The caller will allocate additional_frame_words
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  int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt;
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  // CodeBlob frame size is in words.
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  int frame_size_in_words = frame_size_in_bytes / wordSize;
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  *total_frame_words = frame_size_in_words;
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  // Save registers, fpu state, and flags.
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  // We assume caller has already pushed the return address onto the
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  // stack, so rsp is 8-byte aligned here.
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  // We push rpb twice in this sequence because we want the real rbp
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  // to be under the return like a normal enter.
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  __ enter();          // rsp becomes 16-byte aligned here
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  __ push_CPU_state(); // Push a multiple of 16 bytes
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  if (frame::arg_reg_save_area_bytes != 0) {
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    // Allocate argument register save area
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    __ subptr(rsp, frame::arg_reg_save_area_bytes);
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  }
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  // Set an oopmap for the call site.  This oopmap will map all
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  // oop-registers and debug-info registers as callee-saved.  This
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  // will allow deoptimization at this safepoint to find all possible
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  // debug-info recordings, as well as let GC find all oops.
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  OopMapSet *oop_maps = new OopMapSet();
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  OopMap* map = new OopMap(frame_size_in_slots, 0);
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  map->set_callee_saved(VMRegImpl::stack2reg( rax_off  + additional_frame_slots), rax->as_VMReg());
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  map->set_callee_saved(VMRegImpl::stack2reg( rcx_off  + additional_frame_slots), rcx->as_VMReg());
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  map->set_callee_saved(VMRegImpl::stack2reg( rdx_off  + additional_frame_slots), rdx->as_VMReg());
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  map->set_callee_saved(VMRegImpl::stack2reg( rbx_off  + additional_frame_slots), rbx->as_VMReg());
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  // rbp location is known implicitly by the frame sender code, needs no oopmap
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  // and the location where rbp was saved by is ignored
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  map->set_callee_saved(VMRegImpl::stack2reg( rsi_off  + additional_frame_slots), rsi->as_VMReg());
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  map->set_callee_saved(VMRegImpl::stack2reg( rdi_off  + additional_frame_slots), rdi->as_VMReg());
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  map->set_callee_saved(VMRegImpl::stack2reg( r8_off   + additional_frame_slots), r8->as_VMReg());
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  map->set_callee_saved(VMRegImpl::stack2reg( r9_off   + additional_frame_slots), r9->as_VMReg());
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  map->set_callee_saved(VMRegImpl::stack2reg( r10_off  + additional_frame_slots), r10->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   179
  map->set_callee_saved(VMRegImpl::stack2reg( r11_off  + additional_frame_slots), r11->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   180
  map->set_callee_saved(VMRegImpl::stack2reg( r12_off  + additional_frame_slots), r12->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   181
  map->set_callee_saved(VMRegImpl::stack2reg( r13_off  + additional_frame_slots), r13->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   182
  map->set_callee_saved(VMRegImpl::stack2reg( r14_off  + additional_frame_slots), r14->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   183
  map->set_callee_saved(VMRegImpl::stack2reg( r15_off  + additional_frame_slots), r15->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   184
  map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off  + additional_frame_slots), xmm0->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   185
  map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off  + additional_frame_slots), xmm1->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   186
  map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off  + additional_frame_slots), xmm2->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   187
  map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off  + additional_frame_slots), xmm3->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   188
  map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off  + additional_frame_slots), xmm4->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   189
  map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off  + additional_frame_slots), xmm5->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   190
  map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off  + additional_frame_slots), xmm6->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   191
  map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off  + additional_frame_slots), xmm7->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   192
  map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off  + additional_frame_slots), xmm8->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   193
  map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off  + additional_frame_slots), xmm9->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   194
  map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   195
  map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   196
  map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   197
  map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   198
  map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   199
  map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg());
489c9b5090e2 Initial load
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parents:
diff changeset
   200
489c9b5090e2 Initial load
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parents:
diff changeset
   201
  // %%% These should all be a waste but we'll keep things as they were for now
489c9b5090e2 Initial load
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parents:
diff changeset
   202
  if (true) {
489c9b5090e2 Initial load
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parents:
diff changeset
   203
    map->set_callee_saved(VMRegImpl::stack2reg( raxH_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   204
                          rax->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   205
    map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   206
                          rcx->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   207
    map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   208
                          rdx->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   209
    map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   210
                          rbx->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   211
    // rbp location is known implicitly by the frame sender code, needs no oopmap
489c9b5090e2 Initial load
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parents:
diff changeset
   212
    map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   213
                          rsi->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   214
    map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   215
                          rdi->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   216
    map->set_callee_saved(VMRegImpl::stack2reg( r8H_off   + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   217
                          r8->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   218
    map->set_callee_saved(VMRegImpl::stack2reg( r9H_off   + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   219
                          r9->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   220
    map->set_callee_saved(VMRegImpl::stack2reg( r10H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   221
                          r10->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   222
    map->set_callee_saved(VMRegImpl::stack2reg( r11H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   223
                          r11->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   224
    map->set_callee_saved(VMRegImpl::stack2reg( r12H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   225
                          r12->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   226
    map->set_callee_saved(VMRegImpl::stack2reg( r13H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   227
                          r13->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   228
    map->set_callee_saved(VMRegImpl::stack2reg( r14H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   229
                          r14->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   230
    map->set_callee_saved(VMRegImpl::stack2reg( r15H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   231
                          r15->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   232
    map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   233
                          xmm0->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   234
    map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   235
                          xmm1->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   236
    map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   237
                          xmm2->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   238
    map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   239
                          xmm3->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   240
    map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   241
                          xmm4->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   242
    map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   243
                          xmm5->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   244
    map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   245
                          xmm6->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   246
    map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   247
                          xmm7->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   248
    map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   249
                          xmm8->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   250
    map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off  + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   251
                          xmm9->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   252
    map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   253
                          xmm10->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   254
    map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   255
                          xmm11->as_VMReg()->next());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   256
    map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   257
                          xmm12->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   258
    map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   259
                          xmm13->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   260
    map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   261
                          xmm14->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   262
    map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots),
489c9b5090e2 Initial load
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parents:
diff changeset
   263
                          xmm15->as_VMReg()->next());
489c9b5090e2 Initial load
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parents:
diff changeset
   264
  }
489c9b5090e2 Initial load
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parents:
diff changeset
   265
489c9b5090e2 Initial load
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parents:
diff changeset
   266
  return map;
489c9b5090e2 Initial load
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parents:
diff changeset
   267
}
489c9b5090e2 Initial load
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parents:
diff changeset
   268
489c9b5090e2 Initial load
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parents:
diff changeset
   269
void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
489c9b5090e2 Initial load
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parents:
diff changeset
   270
  if (frame::arg_reg_save_area_bytes != 0) {
489c9b5090e2 Initial load
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parents:
diff changeset
   271
    // Pop arg register save area
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   272
    __ addptr(rsp, frame::arg_reg_save_area_bytes);
1
489c9b5090e2 Initial load
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parents:
diff changeset
   273
  }
489c9b5090e2 Initial load
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parents:
diff changeset
   274
  // Recover CPU state
489c9b5090e2 Initial load
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parents:
diff changeset
   275
  __ pop_CPU_state();
489c9b5090e2 Initial load
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parents:
diff changeset
   276
  // Get the rbp described implicitly by the calling convention (no oopMap)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
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parents: 670
diff changeset
   277
  __ pop(rbp);
1
489c9b5090e2 Initial load
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parents:
diff changeset
   278
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   279
489c9b5090e2 Initial load
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parents:
diff changeset
   280
void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   281
489c9b5090e2 Initial load
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parents:
diff changeset
   282
  // Just restore result register. Only used by deoptimization. By
489c9b5090e2 Initial load
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parents:
diff changeset
   283
  // now any callee save register that needs to be restored to a c2
489c9b5090e2 Initial load
duke
parents:
diff changeset
   284
  // caller of the deoptee has been extracted into the vframeArray
489c9b5090e2 Initial load
duke
parents:
diff changeset
   285
  // and will be stuffed into the c2i adapter we create for later
489c9b5090e2 Initial load
duke
parents:
diff changeset
   286
  // restoration so only result registers need to be restored here.
489c9b5090e2 Initial load
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parents:
diff changeset
   287
489c9b5090e2 Initial load
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parents:
diff changeset
   288
  // Restore fp result register
489c9b5090e2 Initial load
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parents:
diff changeset
   289
  __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
489c9b5090e2 Initial load
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parents:
diff changeset
   290
  // Restore integer result register
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   291
  __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   292
  __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   293
1
489c9b5090e2 Initial load
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parents:
diff changeset
   294
  // Pop all of the register save are off the stack except the return address
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   295
  __ addptr(rsp, return_offset_in_bytes());
1
489c9b5090e2 Initial load
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parents:
diff changeset
   296
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   297
489c9b5090e2 Initial load
duke
parents:
diff changeset
   298
// The java_calling_convention describes stack locations as ideal slots on
489c9b5090e2 Initial load
duke
parents:
diff changeset
   299
// a frame with no abi restrictions. Since we must observe abi restrictions
489c9b5090e2 Initial load
duke
parents:
diff changeset
   300
// (like the placement of the register window) the slots must be biased by
489c9b5090e2 Initial load
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parents:
diff changeset
   301
// the following value.
489c9b5090e2 Initial load
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parents:
diff changeset
   302
static int reg2offset_in(VMReg r) {
489c9b5090e2 Initial load
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parents:
diff changeset
   303
  // Account for saved rbp and return address
489c9b5090e2 Initial load
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parents:
diff changeset
   304
  // This should really be in_preserve_stack_slots
489c9b5090e2 Initial load
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parents:
diff changeset
   305
  return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
489c9b5090e2 Initial load
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parents:
diff changeset
   306
}
489c9b5090e2 Initial load
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parents:
diff changeset
   307
489c9b5090e2 Initial load
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parents:
diff changeset
   308
static int reg2offset_out(VMReg r) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   309
  return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
489c9b5090e2 Initial load
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parents:
diff changeset
   310
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   311
489c9b5090e2 Initial load
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parents:
diff changeset
   312
// ---------------------------------------------------------------------------
489c9b5090e2 Initial load
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parents:
diff changeset
   313
// Read the array of BasicTypes from a signature, and compute where the
489c9b5090e2 Initial load
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parents:
diff changeset
   314
// arguments should go.  Values in the VMRegPair regs array refer to 4-byte
489c9b5090e2 Initial load
duke
parents:
diff changeset
   315
// quantities.  Values less than VMRegImpl::stack0 are registers, those above
489c9b5090e2 Initial load
duke
parents:
diff changeset
   316
// refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
489c9b5090e2 Initial load
duke
parents:
diff changeset
   317
// as framesizes are fixed.
489c9b5090e2 Initial load
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parents:
diff changeset
   318
// VMRegImpl::stack0 refers to the first slot 0(sp).
489c9b5090e2 Initial load
duke
parents:
diff changeset
   319
// and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
489c9b5090e2 Initial load
duke
parents:
diff changeset
   320
// up to RegisterImpl::number_of_registers) are the 64-bit
489c9b5090e2 Initial load
duke
parents:
diff changeset
   321
// integer registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   322
489c9b5090e2 Initial load
duke
parents:
diff changeset
   323
// Note: the INPUTS in sig_bt are in units of Java argument words, which are
489c9b5090e2 Initial load
duke
parents:
diff changeset
   324
// either 32-bit or 64-bit depending on the build.  The OUTPUTS are in 32-bit
489c9b5090e2 Initial load
duke
parents:
diff changeset
   325
// units regardless of build. Of course for i486 there is no 64 bit build
489c9b5090e2 Initial load
duke
parents:
diff changeset
   326
489c9b5090e2 Initial load
duke
parents:
diff changeset
   327
// The Java calling convention is a "shifted" version of the C ABI.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   328
// By skipping the first C ABI register we can call non-static jni methods
489c9b5090e2 Initial load
duke
parents:
diff changeset
   329
// with small numbers of arguments without having to shuffle the arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
   330
// at all. Since we control the java ABI we ought to at least get some
489c9b5090e2 Initial load
duke
parents:
diff changeset
   331
// advantage out of it.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   332
489c9b5090e2 Initial load
duke
parents:
diff changeset
   333
int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   334
                                           VMRegPair *regs,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   335
                                           int total_args_passed,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   336
                                           int is_outgoing) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   337
489c9b5090e2 Initial load
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parents:
diff changeset
   338
  // Create the mapping between argument positions and
489c9b5090e2 Initial load
duke
parents:
diff changeset
   339
  // registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   340
  static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   341
    j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
489c9b5090e2 Initial load
duke
parents:
diff changeset
   342
  };
489c9b5090e2 Initial load
duke
parents:
diff changeset
   343
  static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   344
    j_farg0, j_farg1, j_farg2, j_farg3,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   345
    j_farg4, j_farg5, j_farg6, j_farg7
489c9b5090e2 Initial load
duke
parents:
diff changeset
   346
  };
489c9b5090e2 Initial load
duke
parents:
diff changeset
   347
489c9b5090e2 Initial load
duke
parents:
diff changeset
   348
489c9b5090e2 Initial load
duke
parents:
diff changeset
   349
  uint int_args = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   350
  uint fp_args = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   351
  uint stk_args = 0; // inc by 2 each time
489c9b5090e2 Initial load
duke
parents:
diff changeset
   352
489c9b5090e2 Initial load
duke
parents:
diff changeset
   353
  for (int i = 0; i < total_args_passed; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   354
    switch (sig_bt[i]) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   355
    case T_BOOLEAN:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   356
    case T_CHAR:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   357
    case T_BYTE:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   358
    case T_SHORT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   359
    case T_INT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   360
      if (int_args < Argument::n_int_register_parameters_j) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   361
        regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   362
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   363
        regs[i].set1(VMRegImpl::stack2reg(stk_args));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   364
        stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   365
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   366
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   367
    case T_VOID:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   368
      // halves of T_LONG or T_DOUBLE
489c9b5090e2 Initial load
duke
parents:
diff changeset
   369
      assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
      regs[i].set_bad();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   372
    case T_LONG:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   373
      assert(sig_bt[i + 1] == T_VOID, "expecting half");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   374
      // fall through
489c9b5090e2 Initial load
duke
parents:
diff changeset
   375
    case T_OBJECT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   376
    case T_ARRAY:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   377
    case T_ADDRESS:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   378
      if (int_args < Argument::n_int_register_parameters_j) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   379
        regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   380
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   381
        regs[i].set2(VMRegImpl::stack2reg(stk_args));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   382
        stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   383
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   384
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   385
    case T_FLOAT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   386
      if (fp_args < Argument::n_float_register_parameters_j) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
        regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
        regs[i].set1(VMRegImpl::stack2reg(stk_args));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
        stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   393
    case T_DOUBLE:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   394
      assert(sig_bt[i + 1] == T_VOID, "expecting half");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   395
      if (fp_args < Argument::n_float_register_parameters_j) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
        regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
        regs[i].set2(VMRegImpl::stack2reg(stk_args));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
        stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   400
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   401
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   402
    default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   403
      ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   405
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   406
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   407
489c9b5090e2 Initial load
duke
parents:
diff changeset
   408
  return round_to(stk_args, 2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   409
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
489c9b5090e2 Initial load
duke
parents:
diff changeset
   411
// Patch the callers callsite with entry to compiled code if it exists.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   412
static void patch_callers_callsite(MacroAssembler *masm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
  Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
  __ verify_oop(rbx);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   415
  __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   416
  __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   417
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
  // Save the current stack pointer
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   419
  __ mov(r13, rsp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   420
  // Schedule the branch target address early.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   421
  // Call into the VM to patch the caller, then jump to compiled callee
489c9b5090e2 Initial load
duke
parents:
diff changeset
   422
  // rax isn't live so capture return address while we easily can
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   423
  __ movptr(rax, Address(rsp, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   424
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
  // align stack so push_CPU_state doesn't fault
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   426
  __ andptr(rsp, -(StackAlignmentInBytes));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   427
  __ push_CPU_state();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   428
489c9b5090e2 Initial load
duke
parents:
diff changeset
   429
489c9b5090e2 Initial load
duke
parents:
diff changeset
   430
  __ verify_oop(rbx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   431
  // VM needs caller's callsite
489c9b5090e2 Initial load
duke
parents:
diff changeset
   432
  // VM needs target method
489c9b5090e2 Initial load
duke
parents:
diff changeset
   433
  // This needs to be a long call since we will relocate this adapter to
489c9b5090e2 Initial load
duke
parents:
diff changeset
   434
  // the codeBuffer and it may not reach
489c9b5090e2 Initial load
duke
parents:
diff changeset
   435
489c9b5090e2 Initial load
duke
parents:
diff changeset
   436
  // Allocate argument register save area
489c9b5090e2 Initial load
duke
parents:
diff changeset
   437
  if (frame::arg_reg_save_area_bytes != 0) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   438
    __ subptr(rsp, frame::arg_reg_save_area_bytes);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   439
  }
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   440
  __ mov(c_rarg0, rbx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   441
  __ mov(c_rarg1, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   442
  __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   443
489c9b5090e2 Initial load
duke
parents:
diff changeset
   444
  // De-allocate argument register save area
489c9b5090e2 Initial load
duke
parents:
diff changeset
   445
  if (frame::arg_reg_save_area_bytes != 0) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   446
    __ addptr(rsp, frame::arg_reg_save_area_bytes);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   447
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   448
489c9b5090e2 Initial load
duke
parents:
diff changeset
   449
  __ pop_CPU_state();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   450
  // restore sp
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   451
  __ mov(rsp, r13);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
  __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   453
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   454
489c9b5090e2 Initial load
duke
parents:
diff changeset
   455
489c9b5090e2 Initial load
duke
parents:
diff changeset
   456
static void gen_c2i_adapter(MacroAssembler *masm,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
                            int total_args_passed,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   458
                            int comp_args_on_stack,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   459
                            const BasicType *sig_bt,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   460
                            const VMRegPair *regs,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   461
                            Label& skip_fixup) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
  // Before we get into the guts of the C2I adapter, see if we should be here
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
  // at all.  We've come from compiled code and are attempting to jump to the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   464
  // interpreter, which means the caller made a static call to get here
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
  // (vcalls always get a compiled target if there is one).  Check for a
489c9b5090e2 Initial load
duke
parents:
diff changeset
   466
  // compiled target.  If there is one, we need to patch the caller's call.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   467
  patch_callers_callsite(masm);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   468
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
  __ bind(skip_fixup);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   470
489c9b5090e2 Initial load
duke
parents:
diff changeset
   471
  // Since all args are passed on the stack, total_args_passed *
489c9b5090e2 Initial load
duke
parents:
diff changeset
   472
  // Interpreter::stackElementSize is the space we need. Plus 1 because
489c9b5090e2 Initial load
duke
parents:
diff changeset
   473
  // we also account for the return address location since
489c9b5090e2 Initial load
duke
parents:
diff changeset
   474
  // we store it first rather than hold it in rax across all the shuffling
489c9b5090e2 Initial load
duke
parents:
diff changeset
   475
5419
f2e8cc8c12ea 6943304: remove tagged stack interpreter
twisti
parents: 5252
diff changeset
   476
  int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   477
489c9b5090e2 Initial load
duke
parents:
diff changeset
   478
  // stack is aligned, keep it that way
489c9b5090e2 Initial load
duke
parents:
diff changeset
   479
  extraspace = round_to(extraspace, 2*wordSize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   480
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
  // Get return address
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   482
  __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
489c9b5090e2 Initial load
duke
parents:
diff changeset
   484
  // set senderSP value
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   485
  __ mov(r13, rsp);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   486
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   487
  __ subptr(rsp, extraspace);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   488
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
  // Store the return address in the expected location
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   490
  __ movptr(Address(rsp, 0), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
  // Now write the args into the outgoing interpreter space
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
  for (int i = 0; i < total_args_passed; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
    if (sig_bt[i] == T_VOID) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
      assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
      continue;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   497
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   498
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
    // offset to start parameters
5419
f2e8cc8c12ea 6943304: remove tagged stack interpreter
twisti
parents: 5252
diff changeset
   500
    int st_off   = (total_args_passed - i) * Interpreter::stackElementSize;
f2e8cc8c12ea 6943304: remove tagged stack interpreter
twisti
parents: 5252
diff changeset
   501
    int next_off = st_off - Interpreter::stackElementSize;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   502
489c9b5090e2 Initial load
duke
parents:
diff changeset
   503
    // Say 4 args:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   504
    // i   st_off
489c9b5090e2 Initial load
duke
parents:
diff changeset
   505
    // 0   32 T_LONG
489c9b5090e2 Initial load
duke
parents:
diff changeset
   506
    // 1   24 T_VOID
489c9b5090e2 Initial load
duke
parents:
diff changeset
   507
    // 2   16 T_OBJECT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   508
    // 3    8 T_BOOL
489c9b5090e2 Initial load
duke
parents:
diff changeset
   509
    // -    0 return address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   510
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   511
    // However to make thing extra confusing. Because we can fit a long/double in
489c9b5090e2 Initial load
duke
parents:
diff changeset
   512
    // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
489c9b5090e2 Initial load
duke
parents:
diff changeset
   513
    // leaves one slot empty and only stores to a single slot. In this case the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   514
    // slot that is occupied is the T_VOID slot. See I said it was confusing.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   515
489c9b5090e2 Initial load
duke
parents:
diff changeset
   516
    VMReg r_1 = regs[i].first();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
    VMReg r_2 = regs[i].second();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
    if (!r_1->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
      assert(!r_2->is_valid(), "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
      continue;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   522
    if (r_1->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   523
      // memory to memory use rax
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
      int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   525
      if (!r_2->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   526
        // sign extend??
489c9b5090e2 Initial load
duke
parents:
diff changeset
   527
        __ movl(rax, Address(rsp, ld_off));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   528
        __ movptr(Address(rsp, st_off), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   529
489c9b5090e2 Initial load
duke
parents:
diff changeset
   530
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   531
489c9b5090e2 Initial load
duke
parents:
diff changeset
   532
        __ movq(rax, Address(rsp, ld_off));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   533
489c9b5090e2 Initial load
duke
parents:
diff changeset
   534
        // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
489c9b5090e2 Initial load
duke
parents:
diff changeset
   535
        // T_DOUBLE and T_LONG use two slots in the interpreter
489c9b5090e2 Initial load
duke
parents:
diff changeset
   536
        if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   537
          // ld_off == LSW, ld_off+wordSize == MSW
489c9b5090e2 Initial load
duke
parents:
diff changeset
   538
          // st_off == MSW, next_off == LSW
489c9b5090e2 Initial load
duke
parents:
diff changeset
   539
          __ movq(Address(rsp, next_off), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   540
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   541
          // Overwrite the unused slot with known junk
489c9b5090e2 Initial load
duke
parents:
diff changeset
   542
          __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   543
          __ movptr(Address(rsp, st_off), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   544
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   545
        } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   546
          __ movq(Address(rsp, st_off), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   547
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   548
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   549
    } else if (r_1->is_Register()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   550
      Register r = r_1->as_Register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   551
      if (!r_2->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
        // must be only an int (or less ) so move only 32bits to slot
489c9b5090e2 Initial load
duke
parents:
diff changeset
   553
        // why not sign extend??
489c9b5090e2 Initial load
duke
parents:
diff changeset
   554
        __ movl(Address(rsp, st_off), r);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   555
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   556
        // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
489c9b5090e2 Initial load
duke
parents:
diff changeset
   557
        // T_DOUBLE and T_LONG use two slots in the interpreter
489c9b5090e2 Initial load
duke
parents:
diff changeset
   558
        if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   559
          // long/double in gpr
489c9b5090e2 Initial load
duke
parents:
diff changeset
   560
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   561
          // Overwrite the unused slot with known junk
489c9b5090e2 Initial load
duke
parents:
diff changeset
   562
          __ mov64(rax, CONST64(0xdeadffffdeadaaab));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   563
          __ movptr(Address(rsp, st_off), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   564
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   565
          __ movq(Address(rsp, next_off), r);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   566
        } else {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   567
          __ movptr(Address(rsp, st_off), r);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   568
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   569
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   570
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   571
      assert(r_1->is_XMMRegister(), "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   572
      if (!r_2->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   573
        // only a float use just part of the slot
489c9b5090e2 Initial load
duke
parents:
diff changeset
   574
        __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   575
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   576
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   577
        // Overwrite the unused slot with known junk
489c9b5090e2 Initial load
duke
parents:
diff changeset
   578
        __ mov64(rax, CONST64(0xdeadffffdeadaaac));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   579
        __ movptr(Address(rsp, st_off), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   580
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   581
        __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   582
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   583
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   584
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   585
489c9b5090e2 Initial load
duke
parents:
diff changeset
   586
  // Schedule the branch target address early.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   587
  __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   588
  __ jmp(rcx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   589
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   590
489c9b5090e2 Initial load
duke
parents:
diff changeset
   591
static void gen_i2c_adapter(MacroAssembler *masm,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   592
                            int total_args_passed,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   593
                            int comp_args_on_stack,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   594
                            const BasicType *sig_bt,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   595
                            const VMRegPair *regs) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   596
489c9b5090e2 Initial load
duke
parents:
diff changeset
   597
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   598
  // We will only enter here from an interpreted frame and never from after
489c9b5090e2 Initial load
duke
parents:
diff changeset
   599
  // passing thru a c2i. Azul allowed this but we do not. If we lose the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   600
  // race and use a c2i we will remain interpreted for the race loser(s).
489c9b5090e2 Initial load
duke
parents:
diff changeset
   601
  // This removes all sorts of headaches on the x86 side and also eliminates
489c9b5090e2 Initial load
duke
parents:
diff changeset
   602
  // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   603
489c9b5090e2 Initial load
duke
parents:
diff changeset
   604
489c9b5090e2 Initial load
duke
parents:
diff changeset
   605
  // Note: r13 contains the senderSP on entry. We must preserve it since
489c9b5090e2 Initial load
duke
parents:
diff changeset
   606
  // we may do a i2c -> c2i transition if we lose a race where compiled
489c9b5090e2 Initial load
duke
parents:
diff changeset
   607
  // code goes non-entrant while we get args ready.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   608
  // In addition we use r13 to locate all the interpreter args as
489c9b5090e2 Initial load
duke
parents:
diff changeset
   609
  // we must align the stack to 16 bytes on an i2c entry else we
489c9b5090e2 Initial load
duke
parents:
diff changeset
   610
  // lose alignment we expect in all compiled code and register
489c9b5090e2 Initial load
duke
parents:
diff changeset
   611
  // save code can segv when fxsave instructions find improperly
489c9b5090e2 Initial load
duke
parents:
diff changeset
   612
  // aligned stack pointer.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   613
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   614
  __ movptr(rax, Address(rsp, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   615
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   616
  // Must preserve original SP for loading incoming arguments because
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   617
  // we need to align the outgoing SP for compiled code.
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   618
  __ movptr(r11, rsp);
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   619
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   620
  // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
489c9b5090e2 Initial load
duke
parents:
diff changeset
   621
  // in registers, we will occasionally have no stack args.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   622
  int comp_words_on_stack = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   623
  if (comp_args_on_stack) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   624
    // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
489c9b5090e2 Initial load
duke
parents:
diff changeset
   625
    // registers are below.  By subtracting stack0, we either get a negative
489c9b5090e2 Initial load
duke
parents:
diff changeset
   626
    // number (all values in registers) or the maximum stack slot accessed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   627
489c9b5090e2 Initial load
duke
parents:
diff changeset
   628
    // Convert 4-byte c2 stack slots to words.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   629
    comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   630
    // Round up to miminum stack alignment, in wordSize
489c9b5090e2 Initial load
duke
parents:
diff changeset
   631
    comp_words_on_stack = round_to(comp_words_on_stack, 2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   632
    __ subptr(rsp, comp_words_on_stack * wordSize);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   633
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   634
489c9b5090e2 Initial load
duke
parents:
diff changeset
   635
489c9b5090e2 Initial load
duke
parents:
diff changeset
   636
  // Ensure compiled code always sees stack at proper alignment
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   637
  __ andptr(rsp, -16);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   638
489c9b5090e2 Initial load
duke
parents:
diff changeset
   639
  // push the return address and misalign the stack that youngest frame always sees
489c9b5090e2 Initial load
duke
parents:
diff changeset
   640
  // as far as the placement of the call instruction
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   641
  __ push(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   642
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   643
  // Put saved SP in another register
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   644
  const Register saved_sp = rax;
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   645
  __ movptr(saved_sp, r11);
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   646
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   647
  // Will jump to the compiled code just as if compiled code was doing it.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   648
  // Pre-load the register-jump target early, to schedule it better.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   649
  __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   650
489c9b5090e2 Initial load
duke
parents:
diff changeset
   651
  // Now generate the shuffle code.  Pick up all register args and move the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   652
  // rest through the floating point stack top.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   653
  for (int i = 0; i < total_args_passed; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   654
    if (sig_bt[i] == T_VOID) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   655
      // Longs and doubles are passed in native word order, but misaligned
489c9b5090e2 Initial load
duke
parents:
diff changeset
   656
      // in the 32-bit build.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   657
      assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   658
      continue;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   659
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   660
489c9b5090e2 Initial load
duke
parents:
diff changeset
   661
    // Pick up 0, 1 or 2 words from SP+offset.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   662
489c9b5090e2 Initial load
duke
parents:
diff changeset
   663
    assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   664
            "scrambled load targets?");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   665
    // Load in argument order going down.
5419
f2e8cc8c12ea 6943304: remove tagged stack interpreter
twisti
parents: 5252
diff changeset
   666
    int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   667
    // Point to interpreter value (vs. tag)
5419
f2e8cc8c12ea 6943304: remove tagged stack interpreter
twisti
parents: 5252
diff changeset
   668
    int next_off = ld_off - Interpreter::stackElementSize;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   669
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   670
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   671
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   672
    VMReg r_1 = regs[i].first();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   673
    VMReg r_2 = regs[i].second();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   674
    if (!r_1->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   675
      assert(!r_2->is_valid(), "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   676
      continue;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   677
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   678
    if (r_1->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   679
      // Convert stack slot to an SP offset (+ wordSize to account for return address )
489c9b5090e2 Initial load
duke
parents:
diff changeset
   680
      int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   681
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   682
      // We can use r13 as a temp here because compiled code doesn't need r13 as an input
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   683
      // and if we end up going thru a c2i because of a miss a reasonable value of r13
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   684
      // will be generated.
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   685
      if (!r_2->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   686
        // sign extend???
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   687
        __ movl(r13, Address(saved_sp, ld_off));
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   688
        __ movptr(Address(rsp, st_off), r13);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   689
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   690
        //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   691
        // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
489c9b5090e2 Initial load
duke
parents:
diff changeset
   692
        // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
489c9b5090e2 Initial load
duke
parents:
diff changeset
   693
        // So we must adjust where to pick up the data to match the interpreter.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   694
        //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   695
        // Interpreter local[n] == MSW, local[n+1] == LSW however locals
489c9b5090e2 Initial load
duke
parents:
diff changeset
   696
        // are accessed as negative so LSW is at LOW address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   697
489c9b5090e2 Initial load
duke
parents:
diff changeset
   698
        // ld_off is MSW so get LSW
489c9b5090e2 Initial load
duke
parents:
diff changeset
   699
        const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
489c9b5090e2 Initial load
duke
parents:
diff changeset
   700
                           next_off : ld_off;
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   701
        __ movq(r13, Address(saved_sp, offset));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   702
        // st_off is LSW (i.e. reg.first())
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   703
        __ movq(Address(rsp, st_off), r13);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   704
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   705
    } else if (r_1->is_Register()) {  // Register argument
489c9b5090e2 Initial load
duke
parents:
diff changeset
   706
      Register r = r_1->as_Register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   707
      assert(r != rax, "must be different");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   708
      if (r_2->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   709
        //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   710
        // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
489c9b5090e2 Initial load
duke
parents:
diff changeset
   711
        // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
489c9b5090e2 Initial load
duke
parents:
diff changeset
   712
        // So we must adjust where to pick up the data to match the interpreter.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   713
489c9b5090e2 Initial load
duke
parents:
diff changeset
   714
        const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
489c9b5090e2 Initial load
duke
parents:
diff changeset
   715
                           next_off : ld_off;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   716
489c9b5090e2 Initial load
duke
parents:
diff changeset
   717
        // this can be a misaligned move
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   718
        __ movq(r, Address(saved_sp, offset));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   719
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   720
        // sign extend and use a full word?
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   721
        __ movl(r, Address(saved_sp, ld_off));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   722
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   723
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   724
      if (!r_2->is_valid()) {
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   725
        __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   726
      } else {
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
   727
        __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   728
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   729
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   730
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   731
489c9b5090e2 Initial load
duke
parents:
diff changeset
   732
  // 6243940 We might end up in handle_wrong_method if
489c9b5090e2 Initial load
duke
parents:
diff changeset
   733
  // the callee is deoptimized as we race thru here. If that
489c9b5090e2 Initial load
duke
parents:
diff changeset
   734
  // happens we don't want to take a safepoint because the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   735
  // caller frame will look interpreted and arguments are now
489c9b5090e2 Initial load
duke
parents:
diff changeset
   736
  // "compiled" so it is much better to make this transition
489c9b5090e2 Initial load
duke
parents:
diff changeset
   737
  // invisible to the stack walking code. Unfortunately if
489c9b5090e2 Initial load
duke
parents:
diff changeset
   738
  // we try and find the callee by normal means a safepoint
489c9b5090e2 Initial load
duke
parents:
diff changeset
   739
  // is possible. So we stash the desired callee in the thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
   740
  // and the vm will find there should this case occur.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   741
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   742
  __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   743
489c9b5090e2 Initial load
duke
parents:
diff changeset
   744
  // put methodOop where a c2i would expect should we end up there
489c9b5090e2 Initial load
duke
parents:
diff changeset
   745
  // only needed becaus eof c2 resolve stubs return methodOop as a result in
489c9b5090e2 Initial load
duke
parents:
diff changeset
   746
  // rax
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   747
  __ mov(rax, rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   748
  __ jmp(r11);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   749
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   750
489c9b5090e2 Initial load
duke
parents:
diff changeset
   751
// ---------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   752
AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   753
                                                            int total_args_passed,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   754
                                                            int comp_args_on_stack,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   755
                                                            const BasicType *sig_bt,
4735
3d4e4ec0df67 6911204: generated adapters with large signatures can fill up the code cache
never
parents: 4564
diff changeset
   756
                                                            const VMRegPair *regs,
3d4e4ec0df67 6911204: generated adapters with large signatures can fill up the code cache
never
parents: 4564
diff changeset
   757
                                                            AdapterFingerPrint* fingerprint) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   758
  address i2c_entry = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   759
489c9b5090e2 Initial load
duke
parents:
diff changeset
   760
  gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   761
489c9b5090e2 Initial load
duke
parents:
diff changeset
   762
  // -------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   763
  // Generate a C2I adapter.  On entry we know rbx holds the methodOop during calls
489c9b5090e2 Initial load
duke
parents:
diff changeset
   764
  // to the interpreter.  The args start out packed in the compiled layout.  They
489c9b5090e2 Initial load
duke
parents:
diff changeset
   765
  // need to be unpacked into the interpreter layout.  This will almost always
489c9b5090e2 Initial load
duke
parents:
diff changeset
   766
  // require some stack space.  We grow the current (compiled) stack, then repack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
  // the args.  We  finally end in a jump to the generic interpreter entry point.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   768
  // On exit from the interpreter, the interpreter will restore our SP (lest the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   769
  // compiled code, which relys solely on SP and not RBP, get sick).
489c9b5090e2 Initial load
duke
parents:
diff changeset
   770
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
  address c2i_unverified_entry = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   772
  Label skip_fixup;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   773
  Label ok;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   774
489c9b5090e2 Initial load
duke
parents:
diff changeset
   775
  Register holder = rax;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   776
  Register receiver = j_rarg0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   777
  Register temp = rbx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   778
489c9b5090e2 Initial load
duke
parents:
diff changeset
   779
  {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   780
    __ verify_oop(holder);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
   781
    __ load_klass(temp, receiver);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   782
    __ verify_oop(temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   783
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   784
    __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   785
    __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   786
    __ jcc(Assembler::equal, ok);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   787
    __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   788
489c9b5090e2 Initial load
duke
parents:
diff changeset
   789
    __ bind(ok);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   790
    // Method might have been compiled since the call site was patched to
489c9b5090e2 Initial load
duke
parents:
diff changeset
   791
    // interpreted if that is the case treat it as a miss so we can get
489c9b5090e2 Initial load
duke
parents:
diff changeset
   792
    // the call site corrected.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   793
    __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   794
    __ jcc(Assembler::equal, skip_fixup);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   795
    __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   796
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   797
489c9b5090e2 Initial load
duke
parents:
diff changeset
   798
  address c2i_entry = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   799
489c9b5090e2 Initial load
duke
parents:
diff changeset
   800
  gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   801
489c9b5090e2 Initial load
duke
parents:
diff changeset
   802
  __ flush();
4735
3d4e4ec0df67 6911204: generated adapters with large signatures can fill up the code cache
never
parents: 4564
diff changeset
   803
  return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   804
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   805
489c9b5090e2 Initial load
duke
parents:
diff changeset
   806
int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   807
                                         VMRegPair *regs,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   808
                                         int total_args_passed) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   809
// We return the amount of VMRegImpl stack slots we need to reserve for all
489c9b5090e2 Initial load
duke
parents:
diff changeset
   810
// the arguments NOT counting out_preserve_stack_slots.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   811
489c9b5090e2 Initial load
duke
parents:
diff changeset
   812
// NOTE: These arrays will have to change when c1 is ported
489c9b5090e2 Initial load
duke
parents:
diff changeset
   813
#ifdef _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   814
    static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   815
      c_rarg0, c_rarg1, c_rarg2, c_rarg3
489c9b5090e2 Initial load
duke
parents:
diff changeset
   816
    };
489c9b5090e2 Initial load
duke
parents:
diff changeset
   817
    static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   818
      c_farg0, c_farg1, c_farg2, c_farg3
489c9b5090e2 Initial load
duke
parents:
diff changeset
   819
    };
489c9b5090e2 Initial load
duke
parents:
diff changeset
   820
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   821
    static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   822
      c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
489c9b5090e2 Initial load
duke
parents:
diff changeset
   823
    };
489c9b5090e2 Initial load
duke
parents:
diff changeset
   824
    static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   825
      c_farg0, c_farg1, c_farg2, c_farg3,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   826
      c_farg4, c_farg5, c_farg6, c_farg7
489c9b5090e2 Initial load
duke
parents:
diff changeset
   827
    };
489c9b5090e2 Initial load
duke
parents:
diff changeset
   828
#endif // _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   829
489c9b5090e2 Initial load
duke
parents:
diff changeset
   830
489c9b5090e2 Initial load
duke
parents:
diff changeset
   831
    uint int_args = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   832
    uint fp_args = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   833
    uint stk_args = 0; // inc by 2 each time
489c9b5090e2 Initial load
duke
parents:
diff changeset
   834
489c9b5090e2 Initial load
duke
parents:
diff changeset
   835
    for (int i = 0; i < total_args_passed; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   836
      switch (sig_bt[i]) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   837
      case T_BOOLEAN:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   838
      case T_CHAR:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   839
      case T_BYTE:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   840
      case T_SHORT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   841
      case T_INT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   842
        if (int_args < Argument::n_int_register_parameters_c) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   843
          regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   844
#ifdef _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   845
          fp_args++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   846
          // Allocate slots for callee to stuff register args the stack.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   847
          stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   848
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   849
        } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   850
          regs[i].set1(VMRegImpl::stack2reg(stk_args));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   851
          stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   852
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   853
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   854
      case T_LONG:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   855
        assert(sig_bt[i + 1] == T_VOID, "expecting half");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   856
        // fall through
489c9b5090e2 Initial load
duke
parents:
diff changeset
   857
      case T_OBJECT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   858
      case T_ARRAY:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   859
      case T_ADDRESS:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   860
        if (int_args < Argument::n_int_register_parameters_c) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   861
          regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   862
#ifdef _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   863
          fp_args++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   864
          stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   865
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   866
        } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   867
          regs[i].set2(VMRegImpl::stack2reg(stk_args));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   868
          stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   869
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   870
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   871
      case T_FLOAT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   872
        if (fp_args < Argument::n_float_register_parameters_c) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   873
          regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   874
#ifdef _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   875
          int_args++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   876
          // Allocate slots for callee to stuff register args the stack.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   877
          stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   878
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   879
        } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   880
          regs[i].set1(VMRegImpl::stack2reg(stk_args));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   881
          stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   882
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   883
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   884
      case T_DOUBLE:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   885
        assert(sig_bt[i + 1] == T_VOID, "expecting half");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   886
        if (fp_args < Argument::n_float_register_parameters_c) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   887
          regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   888
#ifdef _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   889
          int_args++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   890
          // Allocate slots for callee to stuff register args the stack.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   891
          stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   892
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   893
        } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   894
          regs[i].set2(VMRegImpl::stack2reg(stk_args));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   895
          stk_args += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   896
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   897
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   898
      case T_VOID: // Halves of longs and doubles
489c9b5090e2 Initial load
duke
parents:
diff changeset
   899
        assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   900
        regs[i].set_bad();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   901
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   902
      default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   903
        ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   904
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   905
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   906
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   907
#ifdef _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   908
  // windows abi requires that we always allocate enough stack space
489c9b5090e2 Initial load
duke
parents:
diff changeset
   909
  // for 4 64bit registers to be stored down.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   910
  if (stk_args < 8) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   911
    stk_args = 8;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   912
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   913
#endif // _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   914
489c9b5090e2 Initial load
duke
parents:
diff changeset
   915
  return stk_args;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   916
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   917
489c9b5090e2 Initial load
duke
parents:
diff changeset
   918
// On 64 bit we will store integer like items to the stack as
489c9b5090e2 Initial load
duke
parents:
diff changeset
   919
// 64 bits items (sparc abi) even though java would only store
489c9b5090e2 Initial load
duke
parents:
diff changeset
   920
// 32bits for a parameter. On 32bit it will simply be 32 bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
   921
// So this routine will do 32->32 on 32bit and 32->64 on 64bit
489c9b5090e2 Initial load
duke
parents:
diff changeset
   922
static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   923
  if (src.first()->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   924
    if (dst.first()->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   925
      // stack to stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   926
      __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   927
      __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   928
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   929
      // stack to reg
489c9b5090e2 Initial load
duke
parents:
diff changeset
   930
      __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   931
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   932
  } else if (dst.first()->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   933
    // reg to stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   934
    // Do we really have to sign extend???
489c9b5090e2 Initial load
duke
parents:
diff changeset
   935
    // __ movslq(src.first()->as_Register(), src.first()->as_Register());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   936
    __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   937
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   938
    // Do we really have to sign extend???
489c9b5090e2 Initial load
duke
parents:
diff changeset
   939
    // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   940
    if (dst.first() != src.first()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   941
      __ movq(dst.first()->as_Register(), src.first()->as_Register());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   942
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   943
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   944
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   945
489c9b5090e2 Initial load
duke
parents:
diff changeset
   946
489c9b5090e2 Initial load
duke
parents:
diff changeset
   947
// An oop arg. Must pass a handle not the oop itself
489c9b5090e2 Initial load
duke
parents:
diff changeset
   948
static void object_move(MacroAssembler* masm,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   949
                        OopMap* map,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   950
                        int oop_handle_offset,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   951
                        int framesize_in_slots,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   952
                        VMRegPair src,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   953
                        VMRegPair dst,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   954
                        bool is_receiver,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   955
                        int* receiver_offset) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   956
489c9b5090e2 Initial load
duke
parents:
diff changeset
   957
  // must pass a handle. First figure out the location we use as a handle
489c9b5090e2 Initial load
duke
parents:
diff changeset
   958
489c9b5090e2 Initial load
duke
parents:
diff changeset
   959
  Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   960
489c9b5090e2 Initial load
duke
parents:
diff changeset
   961
  // See if oop is NULL if it is we need no handle
489c9b5090e2 Initial load
duke
parents:
diff changeset
   962
489c9b5090e2 Initial load
duke
parents:
diff changeset
   963
  if (src.first()->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   964
489c9b5090e2 Initial load
duke
parents:
diff changeset
   965
    // Oop is already on the stack as an argument
489c9b5090e2 Initial load
duke
parents:
diff changeset
   966
    int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   967
    map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   968
    if (is_receiver) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   969
      *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   970
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   971
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   972
    __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   973
    __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   974
    // conditionally move a NULL
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
   975
    __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   976
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   977
489c9b5090e2 Initial load
duke
parents:
diff changeset
   978
    // Oop is in an a register we must store it to the space we reserve
489c9b5090e2 Initial load
duke
parents:
diff changeset
   979
    // on the stack for oop_handles and pass a handle if oop is non-NULL
489c9b5090e2 Initial load
duke
parents:
diff changeset
   980
489c9b5090e2 Initial load
duke
parents:
diff changeset
   981
    const Register rOop = src.first()->as_Register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   982
    int oop_slot;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   983
    if (rOop == j_rarg0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   984
      oop_slot = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   985
    else if (rOop == j_rarg1)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   986
      oop_slot = 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   987
    else if (rOop == j_rarg2)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   988
      oop_slot = 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   989
    else if (rOop == j_rarg3)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   990
      oop_slot = 3;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   991
    else if (rOop == j_rarg4)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   992
      oop_slot = 4;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   993
    else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   994
      assert(rOop == j_rarg5, "wrong register");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   995
      oop_slot = 5;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   996
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   997
489c9b5090e2 Initial load
duke
parents:
diff changeset
   998
    oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   999
    int offset = oop_slot*VMRegImpl::stack_slot_size;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1001
    map->set_oop(VMRegImpl::stack2reg(oop_slot));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1002
    // Store oop in handle area, may be NULL
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1003
    __ movptr(Address(rsp, offset), rOop);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1004
    if (is_receiver) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1005
      *receiver_offset = offset;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1006
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1007
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1008
    __ cmpptr(rOop, (int32_t)NULL_WORD);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1009
    __ lea(rHandle, Address(rsp, offset));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1010
    // conditionally move a NULL from the handle area where it was just stored
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1011
    __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1012
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1013
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1014
  // If arg is on the stack then place it otherwise it is already in correct reg.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1015
  if (dst.first()->is_stack()) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1016
    __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1017
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1018
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1019
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1020
// A float arg may have to do float reg int reg conversion
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1021
static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1022
  assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1023
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1024
  // The calling conventions assures us that each VMregpair is either
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1025
  // all really one physical register or adjacent stack slots.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1026
  // This greatly simplifies the cases here compared to sparc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1027
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1028
  if (src.first()->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1029
    if (dst.first()->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1030
      __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1031
      __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1032
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1033
      // stack to reg
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1034
      assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1035
      __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1036
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1037
  } else if (dst.first()->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1038
    // reg to stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1039
    assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1040
    __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1041
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1042
    // reg to reg
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1043
    // In theory these overlap but the ordering is such that this is likely a nop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1044
    if ( src.first() != dst.first()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1045
      __ movdbl(dst.first()->as_XMMRegister(),  src.first()->as_XMMRegister());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1046
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1047
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1048
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1049
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1050
// A long move
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1051
static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1052
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1053
  // The calling conventions assures us that each VMregpair is either
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1054
  // all really one physical register or adjacent stack slots.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1055
  // This greatly simplifies the cases here compared to sparc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1056
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1057
  if (src.is_single_phys_reg() ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1058
    if (dst.is_single_phys_reg()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1059
      if (dst.first() != src.first()) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1060
        __ mov(dst.first()->as_Register(), src.first()->as_Register());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1061
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1062
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1063
      assert(dst.is_single_reg(), "not a stack pair");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1064
      __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1065
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1066
  } else if (dst.is_single_phys_reg()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1067
    assert(src.is_single_reg(),  "not a stack pair");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1068
    __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1069
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1070
    assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1071
    __ movq(rax, Address(rbp, reg2offset_in(src.first())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1072
    __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1073
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1074
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1075
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1076
// A double move
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1077
static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1078
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1079
  // The calling conventions assures us that each VMregpair is either
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1080
  // all really one physical register or adjacent stack slots.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1081
  // This greatly simplifies the cases here compared to sparc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1082
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1083
  if (src.is_single_phys_reg() ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1084
    if (dst.is_single_phys_reg()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1085
      // In theory these overlap but the ordering is such that this is likely a nop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1086
      if ( src.first() != dst.first()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1087
        __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1088
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1089
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1090
      assert(dst.is_single_reg(), "not a stack pair");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1091
      __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1092
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1093
  } else if (dst.is_single_phys_reg()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1094
    assert(src.is_single_reg(),  "not a stack pair");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1095
    __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1096
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1097
    assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1098
    __ movq(rax, Address(rbp, reg2offset_in(src.first())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1099
    __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1100
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1101
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1102
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1103
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1104
void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1105
  // We always ignore the frame_slots arg and just use the space just below frame pointer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1106
  // which by this time is free to use
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1107
  switch (ret_type) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1108
  case T_FLOAT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1109
    __ movflt(Address(rbp, -wordSize), xmm0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1110
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1111
  case T_DOUBLE:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1112
    __ movdbl(Address(rbp, -wordSize), xmm0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1113
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1114
  case T_VOID:  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1115
  default: {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1116
    __ movptr(Address(rbp, -wordSize), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1117
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1118
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1119
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1120
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1121
void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1122
  // We always ignore the frame_slots arg and just use the space just below frame pointer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1123
  // which by this time is free to use
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1124
  switch (ret_type) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1125
  case T_FLOAT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1126
    __ movflt(xmm0, Address(rbp, -wordSize));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1127
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1128
  case T_DOUBLE:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1129
    __ movdbl(xmm0, Address(rbp, -wordSize));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1130
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1131
  case T_VOID:  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1132
  default: {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1133
    __ movptr(rax, Address(rbp, -wordSize));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1134
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1135
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1136
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1137
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1138
static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1139
    for ( int i = first_arg ; i < arg_count ; i++ ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1140
      if (args[i].first()->is_Register()) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1141
        __ push(args[i].first()->as_Register());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1142
      } else if (args[i].first()->is_XMMRegister()) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1143
        __ subptr(rsp, 2*wordSize);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1144
        __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1145
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1146
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1147
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1148
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1149
static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1150
    for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1151
      if (args[i].first()->is_Register()) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1152
        __ pop(args[i].first()->as_Register());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1153
      } else if (args[i].first()->is_XMMRegister()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1154
        __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1155
        __ addptr(rsp, 2*wordSize);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1156
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1157
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1158
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1159
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1160
// ---------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1161
// Generate a native wrapper for a given method.  The method takes arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1162
// in the Java compiled code convention, marshals them to the native
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1163
// convention (handlizes oops, etc), transitions to native, makes the call,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1164
// returns to java state (possibly blocking), unhandlizes any result and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1165
// returns.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1166
nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1167
                                                methodHandle method,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1168
                                                int total_in_args,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1169
                                                int comp_args_on_stack,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1170
                                                BasicType *in_sig_bt,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1171
                                                VMRegPair *in_regs,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1172
                                                BasicType ret_type) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1173
  // Native nmethod wrappers never take possesion of the oop arguments.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1174
  // So the caller will gc the arguments. The only thing we need an
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1175
  // oopMap for is if the call is static
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1176
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1177
  // An OopMap for lock (and class if static)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1178
  OopMapSet *oop_maps = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1179
  intptr_t start = (intptr_t)__ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1180
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1181
  // We have received a description of where all the java arg are located
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1182
  // on entry to the wrapper. We need to convert these args to where
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1183
  // the jni function will expect them. To figure out where they go
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1184
  // we convert the java signature to a C signature by inserting
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1185
  // the hidden arguments as arg[0] and possibly arg[1] (static method)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1186
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1187
  int total_c_args = total_in_args + 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1188
  if (method->is_static()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1189
    total_c_args++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1190
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1191
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1192
  BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1193
  VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair,   total_c_args);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1194
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1195
  int argc = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1196
  out_sig_bt[argc++] = T_ADDRESS;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1197
  if (method->is_static()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1198
    out_sig_bt[argc++] = T_OBJECT;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1199
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1200
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1201
  for (int i = 0; i < total_in_args ; i++ ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1202
    out_sig_bt[argc++] = in_sig_bt[i];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1203
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1204
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1205
  // Now figure out where the args must be stored and how much stack space
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1206
  // they require.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1207
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1208
  int out_arg_slots;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1209
  out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1210
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1211
  // Compute framesize for the wrapper.  We need to handlize all oops in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1212
  // incoming registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1213
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1214
  // Calculate the total number of stack slots we will need.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1215
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1216
  // First count the abi requirement plus all of the outgoing args
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1217
  int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1218
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1219
  // Now the space for the inbound oop handle area
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1220
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1221
  int oop_handle_offset = stack_slots;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1222
  stack_slots += 6*VMRegImpl::slots_per_word;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1223
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1224
  // Now any space we need for handlizing a klass if static method
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1225
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1226
  int oop_temp_slot_offset = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1227
  int klass_slot_offset = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1228
  int klass_offset = -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1229
  int lock_slot_offset = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1230
  bool is_static = false;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1231
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1232
  if (method->is_static()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1233
    klass_slot_offset = stack_slots;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1234
    stack_slots += VMRegImpl::slots_per_word;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1235
    klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1236
    is_static = true;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1237
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1238
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1239
  // Plus a lock if needed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1240
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1241
  if (method->is_synchronized()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1242
    lock_slot_offset = stack_slots;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1243
    stack_slots += VMRegImpl::slots_per_word;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1244
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1245
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1246
  // Now a place (+2) to save return values or temp during shuffling
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1247
  // + 4 for return address (which we own) and saved rbp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1248
  stack_slots += 6;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1249
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1250
  // Ok The space we have allocated will look like:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1251
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1252
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1253
  // FP-> |                     |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1254
  //      |---------------------|
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1255
  //      | 2 slots for moves   |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1256
  //      |---------------------|
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1257
  //      | lock box (if sync)  |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1258
  //      |---------------------| <- lock_slot_offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1259
  //      | klass (if static)   |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1260
  //      |---------------------| <- klass_slot_offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1261
  //      | oopHandle area      |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1262
  //      |---------------------| <- oop_handle_offset (6 java arg registers)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1263
  //      | outbound memory     |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1264
  //      | based arguments     |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1265
  //      |                     |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1266
  //      |---------------------|
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1267
  //      |                     |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1268
  // SP-> | out_preserved_slots |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1269
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1270
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1271
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1272
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1273
  // Now compute actual number of stack words we need rounding to make
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1274
  // stack properly aligned.
1900
68ea5d5fab8b 6792301: StackAlignmentInBytes not honored for compiled native methods
xlu
parents: 1896
diff changeset
  1275
  stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1276
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1277
  int stack_size = stack_slots * VMRegImpl::stack_slot_size;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1278
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1279
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1280
  // First thing make an ic check to see if we should even be here
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1281
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1282
  // We are free to use all registers as temps without saving them and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1283
  // restoring them except rbp. rbp is the only callee save register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1284
  // as far as the interpreter and the compiler(s) are concerned.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1285
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1286
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1287
  const Register ic_reg = rax;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1288
  const Register receiver = j_rarg0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1289
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1290
  Label ok;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1291
  Label exception_pending;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1292
3265
d57651294166 6859338: amd64 native unverified entry point pushes values before implicit null check
never
parents: 2349
diff changeset
  1293
  assert_different_registers(ic_reg, receiver, rscratch1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1294
  __ verify_oop(receiver);
3265
d57651294166 6859338: amd64 native unverified entry point pushes values before implicit null check
never
parents: 2349
diff changeset
  1295
  __ load_klass(rscratch1, receiver);
d57651294166 6859338: amd64 native unverified entry point pushes values before implicit null check
never
parents: 2349
diff changeset
  1296
  __ cmpq(ic_reg, rscratch1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1297
  __ jcc(Assembler::equal, ok);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1298
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1299
  __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1300
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  1301
  __ bind(ok);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  1302
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1303
  // Verified entry point must be aligned
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1304
  __ align(8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1305
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1306
  int vep_offset = ((intptr_t)__ pc()) - start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1307
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1308
  // The instruction at the verified entry point must be 5 bytes or longer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1309
  // because it can be patched on the fly by make_non_entrant. The stack bang
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1310
  // instruction fits that requirement.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1311
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1312
  // Generate stack overflow check
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1313
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1314
  if (UseStackBanging) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1315
    __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1316
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1317
    // need a 5 byte instruction to allow MT safe patching to non-entrant
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1318
    __ fat_nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1319
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1320
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1321
  // Generate a new frame for the wrapper.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1322
  __ enter();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1323
  // -2 because return address is already present and so is saved rbp
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1324
  __ subptr(rsp, stack_size - 2*wordSize);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1325
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1326
    // Frame is now completed as far as size and linkage.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1327
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1328
    int frame_complete = ((intptr_t)__ pc()) - start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1329
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1330
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1331
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1332
      Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1333
      __ mov(rax, rsp);
2131
98f9cef66a34 6810672: Comment typos
twisti
parents: 1900
diff changeset
  1334
      __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1335
      __ cmpptr(rax, rsp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1336
      __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1337
      __ stop("improperly aligned stack");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1338
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1339
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1340
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1341
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1342
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1343
  // We use r14 as the oop handle for the receiver/klass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1344
  // It is callee save so it survives the call to native
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1345
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1346
  const Register oop_handle_reg = r14;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1347
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1348
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1349
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1350
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1351
  // We immediately shuffle the arguments so that any vm call we have to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1352
  // make from here on out (sync slow path, jvmti, etc.) we will have
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1353
  // captured the oops from our caller and have a valid oopMap for
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1354
  // them.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1355
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1356
  // -----------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1357
  // The Grand Shuffle
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1358
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1359
  // The Java calling convention is either equal (linux) or denser (win64) than the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1360
  // c calling convention. However the because of the jni_env argument the c calling
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1361
  // convention always has at least one more (and two for static) arguments than Java.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1362
  // Therefore if we move the args from java -> c backwards then we will never have
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1363
  // a register->register conflict and we don't have to build a dependency graph
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1364
  // and figure out how to break any cycles.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1365
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1366
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1367
  // Record esp-based slot for receiver on stack for non-static methods
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1368
  int receiver_offset = -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1369
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1370
  // This is a trick. We double the stack slots so we can claim
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1371
  // the oops in the caller's frame. Since we are sure to have
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1372
  // more args than the caller doubling is enough to make
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1373
  // sure we can capture all the incoming oop args from the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1374
  // caller.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1375
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1376
  OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1377
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1378
  // Mark location of rbp (someday)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1379
  // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1380
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1381
  // Use eax, ebx as temporaries during any memory-memory moves we have to do
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1382
  // All inbound args are referenced based on rbp and all outbound args via rsp.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1383
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1384
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1385
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1386
  bool reg_destroyed[RegisterImpl::number_of_registers];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1387
  bool freg_destroyed[XMMRegisterImpl::number_of_registers];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1388
  for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1389
    reg_destroyed[r] = false;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1390
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1391
  for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1392
    freg_destroyed[f] = false;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1393
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1394
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1395
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1396
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1397
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1398
  int c_arg = total_c_args - 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1399
  for ( int i = total_in_args - 1; i >= 0 ; i--, c_arg-- ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1400
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1401
    if (in_regs[i].first()->is_Register()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1402
      assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1403
    } else if (in_regs[i].first()->is_XMMRegister()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1404
      assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1405
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1406
    if (out_regs[c_arg].first()->is_Register()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1407
      reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1408
    } else if (out_regs[c_arg].first()->is_XMMRegister()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1409
      freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1410
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1411
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1412
    switch (in_sig_bt[i]) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1413
      case T_ARRAY:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1414
      case T_OBJECT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1415
        object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1416
                    ((i == 0) && (!is_static)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1417
                    &receiver_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1418
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1419
      case T_VOID:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1420
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1421
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1422
      case T_FLOAT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1423
        float_move(masm, in_regs[i], out_regs[c_arg]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1424
          break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1425
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1426
      case T_DOUBLE:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1427
        assert( i + 1 < total_in_args &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1428
                in_sig_bt[i + 1] == T_VOID &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1429
                out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1430
        double_move(masm, in_regs[i], out_regs[c_arg]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1431
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1432
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1433
      case T_LONG :
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1434
        long_move(masm, in_regs[i], out_regs[c_arg]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1435
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1436
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1437
      case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1438
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1439
      default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1440
        move32_64(masm, in_regs[i], out_regs[c_arg]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1441
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1442
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1443
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1444
  // point c_arg at the first arg that is already loaded in case we
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1445
  // need to spill before we call out
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1446
  c_arg++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1447
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1448
  // Pre-load a static method's oop into r14.  Used both by locking code and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1449
  // the normal JNI call code.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1450
  if (method->is_static()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1451
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1452
    //  load oop into a register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1453
    __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1454
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1455
    // Now handlize the static class mirror it's known not-null.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1456
    __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1457
    map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1458
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1459
    // Now get the handle
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1460
    __ lea(oop_handle_reg, Address(rsp, klass_offset));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1461
    // store the klass handle as second argument
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1462
    __ movptr(c_rarg1, oop_handle_reg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1463
    // and protect the arg if we must spill
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1464
    c_arg--;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1465
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1466
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1467
  // Change state to native (we save the return address in the thread, since it might not
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1468
  // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1469
  // points into the right code segment. It does not have to be the correct return pc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1470
  // We use the same pc/oopMap repeatedly when we call out
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1471
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1472
  intptr_t the_pc = (intptr_t) __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1473
  oop_maps->add_gc_map(the_pc - start, map);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1474
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1475
  __ set_last_Java_frame(rsp, noreg, (address)the_pc);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1476
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1477
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1478
  // We have all of the arguments setup at this point. We must not touch any register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1479
  // argument registers at this point (what if we save/restore them there are no oop?
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1480
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1481
  {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1482
    SkipIfEqual skip(masm, &DTraceMethodProbes, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1483
    // protect the args we've loaded
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1484
    save_args(masm, total_c_args, c_arg, out_regs);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1485
    __ movoop(c_rarg1, JNIHandles::make_local(method()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1486
    __ call_VM_leaf(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1487
      CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1488
      r15_thread, c_rarg1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1489
    restore_args(masm, total_c_args, c_arg, out_regs);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1490
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1491
2136
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1492
  // RedefineClasses() tracing support for obsolete method entry
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1493
  if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1494
    // protect the args we've loaded
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1495
    save_args(masm, total_c_args, c_arg, out_regs);
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1496
    __ movoop(c_rarg1, JNIHandles::make_local(method()));
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1497
    __ call_VM_leaf(
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1498
      CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1499
      r15_thread, c_rarg1);
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1500
    restore_args(masm, total_c_args, c_arg, out_regs);
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1501
  }
c55428da3cec 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 1066
diff changeset
  1502
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1503
  // Lock a synchronized method
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1504
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1505
  // Register definitions used by locking and unlocking
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1506
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1507
  const Register swap_reg = rax;  // Must use rax for cmpxchg instruction
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1508
  const Register obj_reg  = rbx;  // Will contain the oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1509
  const Register lock_reg = r13;  // Address of compiler lock object (BasicLock)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1510
  const Register old_hdr  = r13;  // value of old header at unlock time
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1511
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1512
  Label slow_path_lock;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1513
  Label lock_done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1514
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1515
  if (method->is_synchronized()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1516
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1517
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1518
    const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1519
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1520
    // Get the handle (the 2nd argument)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1521
    __ mov(oop_handle_reg, c_rarg1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1522
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1523
    // Get address of the box
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1524
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1525
    __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1526
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1527
    // Load the oop from the handle
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1528
    __ movptr(obj_reg, Address(oop_handle_reg, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1529
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1530
    if (UseBiasedLocking) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1531
      __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1532
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1533
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1534
    // Load immediate 1 into swap_reg %rax
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1535
    __ movl(swap_reg, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1536
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1537
    // Load (object->mark() | 1) into swap_reg %rax
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1538
    __ orptr(swap_reg, Address(obj_reg, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1539
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1540
    // Save (object->mark() | 1) into BasicLock's displaced header
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1541
    __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1542
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1543
    if (os::is_MP()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1544
      __ lock();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1545
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1546
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1547
    // src -> dest iff dest == rax else rax <- dest
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1548
    __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1549
    __ jcc(Assembler::equal, lock_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1550
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1551
    // Hmm should this move to the slow path code area???
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1552
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1553
    // Test if the oopMark is an obvious stack pointer, i.e.,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1554
    //  1) (mark & 3) == 0, and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1555
    //  2) rsp <= mark < mark + os::pagesize()
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1556
    // These 3 tests can be done by evaluating the following
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1557
    // expression: ((mark - rsp) & (3 - os::vm_page_size())),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1558
    // assuming both stack pointer and pagesize have their
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1559
    // least significant 2 bits clear.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1560
    // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1561
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1562
    __ subptr(swap_reg, rsp);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1563
    __ andptr(swap_reg, 3 - os::vm_page_size());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1564
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1565
    // Save the test result, for recursive case, the result is zero
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1566
    __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1567
    __ jcc(Assembler::notEqual, slow_path_lock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1568
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1569
    // Slow path will re-enter here
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1570
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1571
    __ bind(lock_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1572
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1573
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1574
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1575
  // Finally just about ready to make the JNI call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1576
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1577
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1578
  // get JNIEnv* which is first argument to native
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1579
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1580
  __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1581
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1582
  // Now set thread in native
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1583
  __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1584
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1585
  __ call(RuntimeAddress(method->native_function()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1586
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1587
    // Either restore the MXCSR register after returning from the JNI Call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1588
    // or verify that it wasn't changed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1589
    if (RestoreMXCSROnJNICalls) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1590
      __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1591
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1592
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1593
    else if (CheckJNICalls ) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1594
      __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry())));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1595
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1596
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1597
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1598
  // Unpack native results.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1599
  switch (ret_type) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1600
  case T_BOOLEAN: __ c2bool(rax);            break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1601
  case T_CHAR   : __ movzwl(rax, rax);      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1602
  case T_BYTE   : __ sign_extend_byte (rax); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1603
  case T_SHORT  : __ sign_extend_short(rax); break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1604
  case T_INT    : /* nothing to do */        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1605
  case T_DOUBLE :
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1606
  case T_FLOAT  :
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1607
    // Result is in xmm0 we'll save as needed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1608
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1609
  case T_ARRAY:                 // Really a handle
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1610
  case T_OBJECT:                // Really a handle
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1611
      break; // can't de-handlize until after safepoint check
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1612
  case T_VOID: break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1613
  case T_LONG: break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1614
  default       : ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1615
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1616
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1617
  // Switch thread to "native transition" state before reading the synchronization state.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1618
  // This additional state is necessary because reading and testing the synchronization
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1619
  // state is not atomic w.r.t. GC, as this scenario demonstrates:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1620
  //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1621
  //     VM thread changes sync state to synchronizing and suspends threads for GC.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1622
  //     Thread A is resumed to finish this native method, but doesn't block here since it
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1623
  //     didn't see any synchronization is progress, and escapes.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1624
  __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1625
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1626
  if(os::is_MP()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1627
    if (UseMembar) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1628
      // Force this write out before the read below
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1629
      __ membar(Assembler::Membar_mask_bits(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1630
           Assembler::LoadLoad | Assembler::LoadStore |
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1631
           Assembler::StoreLoad | Assembler::StoreStore));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1632
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1633
      // Write serialization page so VM thread can do a pseudo remote membar.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1634
      // We use the current thread pointer to calculate a thread specific
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1635
      // offset to write to within the page. This minimizes bus traffic
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1636
      // due to cache line collision.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1637
      __ serialize_memory(r15_thread, rcx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1638
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1639
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1640
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1641
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1642
  // check for safepoint operation in progress and/or pending suspend requests
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1643
  {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1644
    Label Continue;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1645
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1646
    __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1647
             SafepointSynchronize::_not_synchronized);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1648
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1649
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1650
    __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1651
    __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1652
    __ jcc(Assembler::equal, Continue);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1653
    __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1654
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1655
    // Don't use call_VM as it will see a possible pending exception and forward it
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1656
    // and never return here preventing us from clearing _last_native_pc down below.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1657
    // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1658
    // preserved and correspond to the bcp/locals pointers. So we do a runtime call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1659
    // by hand.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1660
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1661
    save_native_result(masm, ret_type, stack_slots);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1662
    __ mov(c_rarg0, r15_thread);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1663
    __ mov(r12, rsp); // remember sp
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1664
    __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1665
    __ andptr(rsp, -16); // align stack as required by ABI
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1666
    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1667
    __ mov(rsp, r12); // restore sp
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  1668
    __ reinit_heapbase();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1669
    // Restore any method result value
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1670
    restore_native_result(masm, ret_type, stack_slots);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1671
    __ bind(Continue);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1672
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1673
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1674
  // change thread state
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1675
  __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1676
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1677
  Label reguard;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1678
  Label reguard_done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1679
  __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1680
  __ jcc(Assembler::equal, reguard);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1681
  __ bind(reguard_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1682
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1683
  // native result if any is live
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1684
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1685
  // Unlock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1686
  Label unlock_done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1687
  Label slow_path_unlock;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1688
  if (method->is_synchronized()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1689
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1690
    // Get locked oop from the handle we passed to jni
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1691
    __ movptr(obj_reg, Address(oop_handle_reg, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1692
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1693
    Label done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1694
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1695
    if (UseBiasedLocking) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1696
      __ biased_locking_exit(obj_reg, old_hdr, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1697
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1698
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1699
    // Simple recursive lock?
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1700
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1701
    __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1702
    __ jcc(Assembler::equal, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1703
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1704
    // Must save rax if if it is live now because cmpxchg must use it
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1705
    if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1706
      save_native_result(masm, ret_type, stack_slots);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1707
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1708
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1709
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1710
    // get address of the stack lock
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1711
    __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1712
    //  get old displaced header
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1713
    __ movptr(old_hdr, Address(rax, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1714
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1715
    // Atomic swap old header if oop still contains the stack lock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1716
    if (os::is_MP()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1717
      __ lock();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1718
    }
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1719
    __ cmpxchgptr(old_hdr, Address(obj_reg, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1720
    __ jcc(Assembler::notEqual, slow_path_unlock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1721
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1722
    // slow path re-enters here
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1723
    __ bind(unlock_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1724
    if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1725
      restore_native_result(masm, ret_type, stack_slots);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1726
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1727
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1728
    __ bind(done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1729
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1730
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1731
  {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1732
    SkipIfEqual skip(masm, &DTraceMethodProbes, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1733
    save_native_result(masm, ret_type, stack_slots);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1734
    __ movoop(c_rarg1, JNIHandles::make_local(method()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1735
    __ call_VM_leaf(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1736
         CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1737
         r15_thread, c_rarg1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1738
    restore_native_result(masm, ret_type, stack_slots);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1739
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1740
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1741
  __ reset_last_Java_frame(false, true);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1742
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1743
  // Unpack oop result
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1744
  if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1745
      Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1746
      __ testptr(rax, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1747
      __ jcc(Assembler::zero, L);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1748
      __ movptr(rax, Address(rax, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1749
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1750
      __ verify_oop(rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1751
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1752
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1753
  // reset handle block
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1754
  __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1755
  __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1756
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1757
  // pop our frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1758
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1759
  __ leave();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1760
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1761
  // Any exception pending?
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1762
  __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1763
  __ jcc(Assembler::notEqual, exception_pending);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1764
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1765
  // Return
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1766
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1767
  __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1768
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1769
  // Unexpected paths are out of line and go here
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1770
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1771
  // forward the exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1772
  __ bind(exception_pending);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1773
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1774
  // and forward the exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1775
  __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1776
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1777
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1778
  // Slow path locking & unlocking
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1779
  if (method->is_synchronized()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1780
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1781
    // BEGIN Slow path lock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1782
    __ bind(slow_path_lock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1783
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1784
    // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1785
    // args are (oop obj, BasicLock* lock, JavaThread* thread)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1786
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1787
    // protect the args we've loaded
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1788
    save_args(masm, total_c_args, c_arg, out_regs);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1789
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1790
    __ mov(c_rarg0, obj_reg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1791
    __ mov(c_rarg1, lock_reg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1792
    __ mov(c_rarg2, r15_thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1793
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1794
    // Not a leaf but we have last_Java_frame setup as we want
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1795
    __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1796
    restore_args(masm, total_c_args, c_arg, out_regs);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1797
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1798
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1799
    { Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1800
    __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1801
    __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1802
    __ stop("no pending exception allowed on exit from monitorenter");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1803
    __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1804
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1805
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1806
    __ jmp(lock_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1807
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1808
    // END Slow path lock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1809
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1810
    // BEGIN Slow path unlock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1811
    __ bind(slow_path_unlock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1812
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1813
    // If we haven't already saved the native result we must save it now as xmm registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1814
    // are still exposed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1815
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1816
    if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1817
      save_native_result(masm, ret_type, stack_slots);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1818
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1819
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1820
    __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1821
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1822
    __ mov(c_rarg0, obj_reg);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1823
    __ mov(r12, rsp); // remember sp
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1824
    __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1825
    __ andptr(rsp, -16); // align stack as required by ABI
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1826
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1827
    // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1828
    // NOTE that obj_reg == rbx currently
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1829
    __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1830
    __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1831
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1832
    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1833
    __ mov(rsp, r12); // restore sp
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  1834
    __ reinit_heapbase();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1835
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1836
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1837
      Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1838
      __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1839
      __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1840
      __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1841
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1842
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1843
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1844
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1845
    __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1846
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1847
    if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1848
      restore_native_result(masm, ret_type, stack_slots);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1849
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1850
    __ jmp(unlock_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1851
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1852
    // END Slow path unlock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1853
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1854
  } // synchronized
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1855
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1856
  // SLOW PATH Reguard the stack if needed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1857
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1858
  __ bind(reguard);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1859
  save_native_result(masm, ret_type, stack_slots);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1860
  __ mov(r12, rsp); // remember sp
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1861
  __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1862
  __ andptr(rsp, -16); // align stack as required by ABI
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1863
  __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  1864
  __ mov(rsp, r12); // restore sp
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  1865
  __ reinit_heapbase();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1866
  restore_native_result(masm, ret_type, stack_slots);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1867
  // and continue
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1868
  __ jmp(reguard_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1869
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1870
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1871
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1872
  __ flush();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1873
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1874
  nmethod *nm = nmethod::new_native_nmethod(method,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1875
                                            masm->code(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1876
                                            vep_offset,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1877
                                            frame_complete,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1878
                                            stack_slots / VMRegImpl::slots_per_word,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1879
                                            (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1880
                                            in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1881
                                            oop_maps);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1882
  return nm;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1883
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1884
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1885
363
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1886
#ifdef HAVE_DTRACE_H
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1887
// ---------------------------------------------------------------------------
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1888
// Generate a dtrace nmethod for a given signature.  The method takes arguments
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1889
// in the Java compiled code convention, marshals them to the native
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1890
// abi and then leaves nops at the position you would expect to call a native
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1891
// function. When the probe is enabled the nops are replaced with a trap
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1892
// instruction that dtrace inserts and the trace will cause a notification
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1893
// to dtrace.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1894
//
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1895
// The probes are only able to take primitive types and java/lang/String as
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1896
// arguments.  No other java types are allowed. Strings are converted to utf8
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1897
// strings so that from dtrace point of view java strings are converted to C
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1898
// strings. There is an arbitrary fixed limit on the total space that a method
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1899
// can use for converting the strings. (256 chars per string in the signature).
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1900
// So any java string larger then this is truncated.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1901
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1902
static int  fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 };
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1903
static bool offsets_initialized = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1904
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1905
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1906
nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm,
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1907
                                                methodHandle method) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1908
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1909
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1910
  // generate_dtrace_nmethod is guarded by a mutex so we are sure to
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1911
  // be single threaded in this method.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1912
  assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1913
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1914
  if (!offsets_initialized) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1915
    fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1916
    fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1917
    fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1918
    fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1919
    fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1920
    fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1921
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1922
    fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1923
    fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1924
    fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1925
    fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1926
    fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1927
    fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1928
    fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1929
    fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1930
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1931
    offsets_initialized = true;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1932
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1933
  // Fill in the signature array, for the calling-convention call.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1934
  int total_args_passed = method->size_of_parameters();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1935
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1936
  BasicType* in_sig_bt  = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1937
  VMRegPair  *in_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1938
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1939
  // The signature we are going to use for the trap that dtrace will see
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1940
  // java/lang/String is converted. We drop "this" and any other object
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1941
  // is converted to NULL.  (A one-slot java/lang/Long object reference
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1942
  // is converted to a two-slot long, which is why we double the allocation).
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1943
  BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1944
  VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1945
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1946
  int i=0;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1947
  int total_strings = 0;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1948
  int first_arg_to_pass = 0;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1949
  int total_c_args = 0;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1950
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1951
  // Skip the receiver as dtrace doesn't want to see it
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1952
  if( !method->is_static() ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1953
    in_sig_bt[i++] = T_OBJECT;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1954
    first_arg_to_pass = 1;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1955
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1956
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1957
  // We need to convert the java args to where a native (non-jni) function
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1958
  // would expect them. To figure out where they go we convert the java
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1959
  // signature to a C signature.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1960
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1961
  SignatureStream ss(method->signature());
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1962
  for ( ; !ss.at_return_type(); ss.next()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1963
    BasicType bt = ss.type();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1964
    in_sig_bt[i++] = bt;  // Collect remaining bits of signature
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1965
    out_sig_bt[total_c_args++] = bt;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1966
    if( bt == T_OBJECT) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1967
      symbolOop s = ss.as_symbol_or_null();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1968
      if (s == vmSymbols::java_lang_String()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1969
        total_strings++;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1970
        out_sig_bt[total_c_args-1] = T_ADDRESS;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1971
      } else if (s == vmSymbols::java_lang_Boolean() ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1972
                 s == vmSymbols::java_lang_Character() ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1973
                 s == vmSymbols::java_lang_Byte() ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1974
                 s == vmSymbols::java_lang_Short() ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1975
                 s == vmSymbols::java_lang_Integer() ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1976
                 s == vmSymbols::java_lang_Float()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1977
        out_sig_bt[total_c_args-1] = T_INT;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1978
      } else if (s == vmSymbols::java_lang_Long() ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1979
                 s == vmSymbols::java_lang_Double()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1980
        out_sig_bt[total_c_args-1] = T_LONG;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1981
        out_sig_bt[total_c_args++] = T_VOID;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1982
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1983
    } else if ( bt == T_LONG || bt == T_DOUBLE ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1984
      in_sig_bt[i++] = T_VOID;   // Longs & doubles take 2 Java slots
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1985
      // We convert double to long
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1986
      out_sig_bt[total_c_args-1] = T_LONG;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1987
      out_sig_bt[total_c_args++] = T_VOID;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1988
    } else if ( bt == T_FLOAT) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1989
      // We convert float to int
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1990
      out_sig_bt[total_c_args-1] = T_INT;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1991
    }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1992
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1993
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1994
  assert(i==total_args_passed, "validly parsed signature");
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1995
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1996
  // Now get the compiled-Java layout as input arguments
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1997
  int comp_args_on_stack;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1998
  comp_args_on_stack = SharedRuntime::java_calling_convention(
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  1999
      in_sig_bt, in_regs, total_args_passed, false);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2000
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2001
  // Now figure out where the args must be stored and how much stack space
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2002
  // they require (neglecting out_preserve_stack_slots but space for storing
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2003
  // the 1st six register arguments). It's weird see int_stk_helper.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2004
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2005
  int out_arg_slots;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2006
  out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2007
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2008
  // Calculate the total number of stack slots we will need.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2009
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2010
  // First count the abi requirement plus all of the outgoing args
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2011
  int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2012
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2013
  // Now space for the string(s) we must convert
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2014
  int* string_locs   = NEW_RESOURCE_ARRAY(int, total_strings + 1);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2015
  for (i = 0; i < total_strings ; i++) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2016
    string_locs[i] = stack_slots;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2017
    stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2018
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2019
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2020
  // Plus the temps we might need to juggle register args
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2021
  // regs take two slots each
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2022
  stack_slots += (Argument::n_int_register_parameters_c +
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2023
                  Argument::n_float_register_parameters_c) * 2;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2024
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2025
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2026
  // + 4 for return address (which we own) and saved rbp,
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2027
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2028
  stack_slots += 4;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2029
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2030
  // Ok The space we have allocated will look like:
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2031
  //
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2032
  //
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2033
  // FP-> |                     |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2034
  //      |---------------------|
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2035
  //      | string[n]           |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2036
  //      |---------------------| <- string_locs[n]
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2037
  //      | string[n-1]         |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2038
  //      |---------------------| <- string_locs[n-1]
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2039
  //      | ...                 |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2040
  //      | ...                 |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2041
  //      |---------------------| <- string_locs[1]
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2042
  //      | string[0]           |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2043
  //      |---------------------| <- string_locs[0]
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2044
  //      | outbound memory     |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2045
  //      | based arguments     |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2046
  //      |                     |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2047
  //      |---------------------|
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2048
  //      |                     |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2049
  // SP-> | out_preserved_slots |
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2050
  //
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2051
  //
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2052
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2053
  // Now compute actual number of stack words we need rounding to make
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2054
  // stack properly aligned.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2055
  stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2056
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2057
  int stack_size = stack_slots * VMRegImpl::stack_slot_size;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2058
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2059
  intptr_t start = (intptr_t)__ pc();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2060
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2061
  // First thing make an ic check to see if we should even be here
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2062
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2063
  // We are free to use all registers as temps without saving them and
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2064
  // restoring them except rbp. rbp, is the only callee save register
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2065
  // as far as the interpreter and the compiler(s) are concerned.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2066
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2067
  const Register ic_reg = rax;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2068
  const Register receiver = rcx;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2069
  Label hit;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2070
  Label exception_pending;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2071
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2072
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2073
  __ verify_oop(receiver);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2074
  __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2075
  __ jcc(Assembler::equal, hit);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2076
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2077
  __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2078
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2079
  // verified entry must be aligned for code patching.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2080
  // and the first 5 bytes must be in the same cache line
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2081
  // if we align at 8 then we will be sure 5 bytes are in the same line
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2082
  __ align(8);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2083
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2084
  __ bind(hit);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2085
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2086
  int vep_offset = ((intptr_t)__ pc()) - start;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2087
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2088
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2089
  // The instruction at the verified entry point must be 5 bytes or longer
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2090
  // because it can be patched on the fly by make_non_entrant. The stack bang
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2091
  // instruction fits that requirement.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2092
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2093
  // Generate stack overflow check
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2094
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2095
  if (UseStackBanging) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2096
    if (stack_size <= StackShadowPages*os::vm_page_size()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2097
      __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2098
    } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2099
      __ movl(rax, stack_size);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2100
      __ bang_stack_size(rax, rbx);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2101
    }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2102
  } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2103
    // need a 5 byte instruction to allow MT safe patching to non-entrant
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2104
    __ fat_nop();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2105
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2106
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2107
  assert(((uintptr_t)__ pc() - start - vep_offset) >= 5,
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2108
         "valid size for make_non_entrant");
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2109
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2110
  // Generate a new frame for the wrapper.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2111
  __ enter();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2112
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2113
  // -4 because return address is already present and so is saved rbp,
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2114
  if (stack_size - 2*wordSize != 0) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2115
    __ subq(rsp, stack_size - 2*wordSize);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2116
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2117
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2118
  // Frame is now completed as far a size and linkage.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2119
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2120
  int frame_complete = ((intptr_t)__ pc()) - start;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2121
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2122
  int c_arg, j_arg;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2123
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2124
  // State of input register args
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2125
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2126
  bool  live[ConcreteRegisterImpl::number_of_registers];
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2127
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2128
  live[j_rarg0->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2129
  live[j_rarg1->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2130
  live[j_rarg2->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2131
  live[j_rarg3->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2132
  live[j_rarg4->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2133
  live[j_rarg5->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2134
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2135
  live[j_farg0->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2136
  live[j_farg1->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2137
  live[j_farg2->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2138
  live[j_farg3->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2139
  live[j_farg4->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2140
  live[j_farg5->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2141
  live[j_farg6->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2142
  live[j_farg7->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2143
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2144
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2145
  bool rax_is_zero = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2146
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2147
  // All args (except strings) destined for the stack are moved first
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2148
  for (j_arg = first_arg_to_pass, c_arg = 0 ;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2149
       j_arg < total_args_passed ; j_arg++, c_arg++ ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2150
    VMRegPair src = in_regs[j_arg];
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2151
    VMRegPair dst = out_regs[c_arg];
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2152
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2153
    // Get the real reg value or a dummy (rsp)
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2154
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2155
    int src_reg = src.first()->is_reg() ?
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2156
                  src.first()->value() :
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2157
                  rsp->as_VMReg()->value();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2158
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2159
    bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2160
                    (in_sig_bt[j_arg] == T_OBJECT &&
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2161
                     out_sig_bt[c_arg] != T_INT &&
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2162
                     out_sig_bt[c_arg] != T_ADDRESS &&
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2163
                     out_sig_bt[c_arg] != T_LONG);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2164
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2165
    live[src_reg] = !useless;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2166
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2167
    if (dst.first()->is_stack()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2168
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2169
      // Even though a string arg in a register is still live after this loop
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2170
      // after the string conversion loop (next) it will be dead so we take
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2171
      // advantage of that now for simpler code to manage live.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2172
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2173
      live[src_reg] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2174
      switch (in_sig_bt[j_arg]) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2175
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2176
        case T_ARRAY:
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2177
        case T_OBJECT:
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2178
          {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2179
            Address stack_dst(rsp, reg2offset_out(dst.first()));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2180
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2181
            if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2182
              // need to unbox a one-word value
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2183
              Register in_reg = rax;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2184
              if ( src.first()->is_reg() ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2185
                in_reg = src.first()->as_Register();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2186
              } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2187
                __ movq(rax, Address(rbp, reg2offset_in(src.first())));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2188
                rax_is_zero = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2189
              }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2190
              Label skipUnbox;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2191
              __ movptr(Address(rsp, reg2offset_out(dst.first())),
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2192
                        (int32_t)NULL_WORD);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2193
              __ testq(in_reg, in_reg);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2194
              __ jcc(Assembler::zero, skipUnbox);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2195
591
04d2e26e6d69 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 363
diff changeset
  2196
              BasicType bt = out_sig_bt[c_arg];
04d2e26e6d69 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 363
diff changeset
  2197
              int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
363
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2198
              Address src1(in_reg, box_offset);
591
04d2e26e6d69 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 363
diff changeset
  2199
              if ( bt == T_LONG ) {
363
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2200
                __ movq(in_reg,  src1);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2201
                __ movq(stack_dst, in_reg);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2202
                assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2203
                ++c_arg; // skip over T_VOID to keep the loop indices in sync
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2204
              } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2205
                __ movl(in_reg,  src1);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2206
                __ movl(stack_dst, in_reg);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2207
              }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2208
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2209
              __ bind(skipUnbox);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2210
            } else if (out_sig_bt[c_arg] != T_ADDRESS) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2211
              // Convert the arg to NULL
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2212
              if (!rax_is_zero) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2213
                __ xorq(rax, rax);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2214
                rax_is_zero = true;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2215
              }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2216
              __ movq(stack_dst, rax);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2217
            }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2218
          }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2219
          break;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2220
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2221
        case T_VOID:
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2222
          break;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2223
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2224
        case T_FLOAT:
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2225
          // This does the right thing since we know it is destined for the
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2226
          // stack
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2227
          float_move(masm, src, dst);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2228
          break;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2229
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2230
        case T_DOUBLE:
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2231
          // This does the right thing since we know it is destined for the
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2232
          // stack
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2233
          double_move(masm, src, dst);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2234
          break;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2235
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2236
        case T_LONG :
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2237
          long_move(masm, src, dst);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2238
          break;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2239
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2240
        case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2241
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2242
        default:
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2243
          move32_64(masm, src, dst);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2244
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2245
    }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2246
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2247
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2248
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2249
  // If we have any strings we must store any register based arg to the stack
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2250
  // This includes any still live xmm registers too.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2251
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2252
  int sid = 0;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2253
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2254
  if (total_strings > 0 ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2255
    for (j_arg = first_arg_to_pass, c_arg = 0 ;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2256
         j_arg < total_args_passed ; j_arg++, c_arg++ ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2257
      VMRegPair src = in_regs[j_arg];
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2258
      VMRegPair dst = out_regs[c_arg];
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2259
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2260
      if (src.first()->is_reg()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2261
        Address src_tmp(rbp, fp_offset[src.first()->value()]);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2262
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2263
        // string oops were left untouched by the previous loop even if the
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2264
        // eventual (converted) arg is destined for the stack so park them
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2265
        // away now (except for first)
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2266
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2267
        if (out_sig_bt[c_arg] == T_ADDRESS) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2268
          Address utf8_addr = Address(
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2269
              rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2270
          if (sid != 1) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2271
            // The first string arg won't be killed until after the utf8
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2272
            // conversion
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2273
            __ movq(utf8_addr, src.first()->as_Register());
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2274
          }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2275
        } else if (dst.first()->is_reg()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2276
          if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2277
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2278
            // Convert the xmm register to an int and store it in the reserved
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2279
            // location for the eventual c register arg
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2280
            XMMRegister f = src.first()->as_XMMRegister();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2281
            if (in_sig_bt[j_arg] == T_FLOAT) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2282
              __ movflt(src_tmp, f);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2283
            } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2284
              __ movdbl(src_tmp, f);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2285
            }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2286
          } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2287
            // If the arg is an oop type we don't support don't bother to store
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2288
            // it remember string was handled above.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2289
            bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2290
                            (in_sig_bt[j_arg] == T_OBJECT &&
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2291
                             out_sig_bt[c_arg] != T_INT &&
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2292
                             out_sig_bt[c_arg] != T_LONG);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2293
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2294
            if (!useless) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2295
              __ movq(src_tmp, src.first()->as_Register());
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2296
            }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2297
          }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2298
        }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2299
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2300
      if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2301
        assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2302
        ++c_arg; // skip over T_VOID to keep the loop indices in sync
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2303
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2304
    }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2305
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2306
    // Now that the volatile registers are safe, convert all the strings
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2307
    sid = 0;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2308
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2309
    for (j_arg = first_arg_to_pass, c_arg = 0 ;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2310
         j_arg < total_args_passed ; j_arg++, c_arg++ ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2311
      if (out_sig_bt[c_arg] == T_ADDRESS) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2312
        // It's a string
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2313
        Address utf8_addr = Address(
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2314
            rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2315
        // The first string we find might still be in the original java arg
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2316
        // register
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2317
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2318
        VMReg src = in_regs[j_arg].first();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2319
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2320
        // We will need to eventually save the final argument to the trap
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2321
        // in the von-volatile location dedicated to src. This is the offset
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2322
        // from fp we will use.
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2323
        int src_off = src->is_reg() ?
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2324
            fp_offset[src->value()] : reg2offset_in(src);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2325
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2326
        // This is where the argument will eventually reside
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2327
        VMRegPair dst = out_regs[c_arg];
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2328
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2329
        if (src->is_reg()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2330
          if (sid == 1) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2331
            __ movq(c_rarg0, src->as_Register());
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2332
          } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2333
            __ movq(c_rarg0, utf8_addr);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2334
          }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2335
        } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2336
          // arg is still in the original location
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2337
          __ movq(c_rarg0, Address(rbp, reg2offset_in(src)));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2338
        }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2339
        Label done, convert;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2340
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2341
        // see if the oop is NULL
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2342
        __ testq(c_rarg0, c_rarg0);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2343
        __ jcc(Assembler::notEqual, convert);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2344
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2345
        if (dst.first()->is_reg()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2346
          // Save the ptr to utf string in the origina src loc or the tmp
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2347
          // dedicated to it
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2348
          __ movq(Address(rbp, src_off), c_rarg0);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2349
        } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2350
          __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2351
        }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2352
        __ jmp(done);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2353
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2354
        __ bind(convert);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2355
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2356
        __ lea(c_rarg1, utf8_addr);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2357
        if (dst.first()->is_reg()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2358
          __ movq(Address(rbp, src_off), c_rarg1);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2359
        } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2360
          __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2361
        }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2362
        // And do the conversion
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2363
        __ call(RuntimeAddress(
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2364
                CAST_FROM_FN_PTR(address, SharedRuntime::get_utf)));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2365
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2366
        __ bind(done);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2367
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2368
      if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2369
        assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2370
        ++c_arg; // skip over T_VOID to keep the loop indices in sync
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2371
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2372
    }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2373
    // The get_utf call killed all the c_arg registers
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2374
    live[c_rarg0->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2375
    live[c_rarg1->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2376
    live[c_rarg2->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2377
    live[c_rarg3->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2378
    live[c_rarg4->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2379
    live[c_rarg5->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2380
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2381
    live[c_farg0->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2382
    live[c_farg1->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2383
    live[c_farg2->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2384
    live[c_farg3->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2385
    live[c_farg4->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2386
    live[c_farg5->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2387
    live[c_farg6->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2388
    live[c_farg7->as_VMReg()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2389
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2390
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2391
  // Now we can finally move the register args to their desired locations
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2392
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2393
  rax_is_zero = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2394
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2395
  for (j_arg = first_arg_to_pass, c_arg = 0 ;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2396
       j_arg < total_args_passed ; j_arg++, c_arg++ ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2397
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2398
    VMRegPair src = in_regs[j_arg];
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2399
    VMRegPair dst = out_regs[c_arg];
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2400
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2401
    // Only need to look for args destined for the interger registers (since we
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2402
    // convert float/double args to look like int/long outbound)
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2403
    if (dst.first()->is_reg()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2404
      Register r =  dst.first()->as_Register();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2405
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2406
      // Check if the java arg is unsupported and thereofre useless
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2407
      bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2408
                      (in_sig_bt[j_arg] == T_OBJECT &&
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2409
                       out_sig_bt[c_arg] != T_INT &&
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2410
                       out_sig_bt[c_arg] != T_ADDRESS &&
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2411
                       out_sig_bt[c_arg] != T_LONG);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2412
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2413
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2414
      // If we're going to kill an existing arg save it first
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2415
      if (live[dst.first()->value()]) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2416
        // you can't kill yourself
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2417
        if (src.first() != dst.first()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2418
          __ movq(Address(rbp, fp_offset[dst.first()->value()]), r);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2419
        }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2420
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2421
      if (src.first()->is_reg()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2422
        if (live[src.first()->value()] ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2423
          if (in_sig_bt[j_arg] == T_FLOAT) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2424
            __ movdl(r, src.first()->as_XMMRegister());
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2425
          } else if (in_sig_bt[j_arg] == T_DOUBLE) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2426
            __ movdq(r, src.first()->as_XMMRegister());
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2427
          } else if (r != src.first()->as_Register()) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2428
            if (!useless) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2429
              __ movq(r, src.first()->as_Register());
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2430
            }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2431
          }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2432
        } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2433
          // If the arg is an oop type we don't support don't bother to store
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2434
          // it
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2435
          if (!useless) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2436
            if (in_sig_bt[j_arg] == T_DOUBLE ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2437
                in_sig_bt[j_arg] == T_LONG  ||
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2438
                in_sig_bt[j_arg] == T_OBJECT ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2439
              __ movq(r, Address(rbp, fp_offset[src.first()->value()]));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2440
            } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2441
              __ movl(r, Address(rbp, fp_offset[src.first()->value()]));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2442
            }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2443
          }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2444
        }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2445
        live[src.first()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2446
      } else if (!useless) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2447
        // full sized move even for int should be ok
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2448
        __ movq(r, Address(rbp, reg2offset_in(src.first())));
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2449
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2450
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2451
      // At this point r has the original java arg in the final location
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2452
      // (assuming it wasn't useless). If the java arg was an oop
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2453
      // we have a bit more to do
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2454
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2455
      if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2456
        if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2457
          // need to unbox a one-word value
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2458
          Label skip;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2459
          __ testq(r, r);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2460
          __ jcc(Assembler::equal, skip);
591
04d2e26e6d69 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 363
diff changeset
  2461
          BasicType bt = out_sig_bt[c_arg];
04d2e26e6d69 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 363
diff changeset
  2462
          int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
363
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2463
          Address src1(r, box_offset);
591
04d2e26e6d69 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 363
diff changeset
  2464
          if ( bt == T_LONG ) {
363
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2465
            __ movq(r, src1);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2466
          } else {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2467
            __ movl(r, src1);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2468
          }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2469
          __ bind(skip);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2470
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2471
        } else if (out_sig_bt[c_arg] != T_ADDRESS) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2472
          // Convert the arg to NULL
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2473
          __ xorq(r, r);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2474
        }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2475
      }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2476
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2477
      // dst can longer be holding an input value
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2478
      live[dst.first()->value()] = false;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2479
    }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2480
    if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2481
      assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2482
      ++c_arg; // skip over T_VOID to keep the loop indices in sync
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2483
    }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2484
  }
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2485
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2486
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2487
  // Ok now we are done. Need to place the nop that dtrace wants in order to
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2488
  // patch in the trap
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2489
  int patch_offset = ((intptr_t)__ pc()) - start;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2490
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2491
  __ nop();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2492
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2493
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2494
  // Return
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2495
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2496
  __ leave();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2497
  __ ret(0);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2498
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2499
  __ flush();
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2500
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2501
  nmethod *nm = nmethod::new_dtrace_nmethod(
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2502
      method, masm->code(), vep_offset, patch_offset, frame_complete,
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2503
      stack_slots / VMRegImpl::slots_per_word);
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2504
  return nm;
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2505
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2506
}
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2507
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2508
#endif // HAVE_DTRACE_H
99d43e8a76ad 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 360
diff changeset
  2509
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2510
// this function returns the adjust size (in number of words) to a c2i adapter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2511
// activation for use during deoptimization
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2512
int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
5419
f2e8cc8c12ea 6943304: remove tagged stack interpreter
twisti
parents: 5252
diff changeset
  2513
  return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2514
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2515
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2516
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2517
uint SharedRuntime::out_preserve_stack_slots() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2518
  return 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2519
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2520
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2521
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2522
//------------------------------generate_deopt_blob----------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2523
void SharedRuntime::generate_deopt_blob() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2524
  // Allocate space for the code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2525
  ResourceMark rm;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2526
  // Setup code generation tools
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2527
  CodeBuffer buffer("deopt_blob", 2048, 1024);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2528
  MacroAssembler* masm = new MacroAssembler(&buffer);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2529
  int frame_size_in_words;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2530
  OopMap* map = NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2531
  OopMapSet *oop_maps = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2532
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2533
  // -------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2534
  // This code enters when returning to a de-optimized nmethod.  A return
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2535
  // address has been pushed on the the stack, and return values are in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2536
  // registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2537
  // If we are doing a normal deopt then we were called from the patched
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2538
  // nmethod from the point we returned to the nmethod. So the return
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2539
  // address on the stack is wrong by NativeCall::instruction_size
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2540
  // We will adjust the value so it looks like we have the original return
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2541
  // address on the stack (like when we eagerly deoptimized).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2542
  // In the case of an exception pending when deoptimizing, we enter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2543
  // with a return address on the stack that points after the call we patched
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2544
  // into the exception handler. We have the following register state from,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2545
  // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2546
  //    rax: exception oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2547
  //    rbx: exception handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2548
  //    rdx: throwing pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2549
  // So in this case we simply jam rdx into the useless return address and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2550
  // the stack looks just like we want.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2551
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2552
  // At this point we need to de-opt.  We save the argument return
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2553
  // registers.  We call the first C routine, fetch_unroll_info().  This
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2554
  // routine captures the return values and returns a structure which
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2555
  // describes the current frame size and the sizes of all replacement frames.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2556
  // The current frame is compiled code and may contain many inlined
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2557
  // functions, each with their own JVM state.  We pop the current frame, then
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2558
  // push all the new frames.  Then we call the C routine unpack_frames() to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2559
  // populate these frames.  Finally unpack_frames() returns us the new target
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2560
  // address.  Notice that callee-save registers are BLOWN here; they have
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2561
  // already been captured in the vframeArray at the time the return PC was
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2562
  // patched.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2563
  address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2564
  Label cont;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2565
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2566
  // Prolog for non exception case!
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2567
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2568
  // Save everything in sight.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2569
  map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2570
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2571
  // Normal deoptimization.  Save exec mode for unpack_frames.
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  2572
  __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2573
  __ jmp(cont);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2574
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2575
  int reexecute_offset = __ pc() - start;
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2576
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2577
  // Reexecute case
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2578
  // return address is the pc describes what bci to do re-execute at
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2579
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2580
  // No need to update map as each call to save_live_registers will produce identical oopmap
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2581
  (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2582
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2583
  __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2584
  __ jmp(cont);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2585
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2586
  int exception_offset = __ pc() - start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2587
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2588
  // Prolog for exception case
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2589
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2590
  // all registers are dead at this entry point, except for rax, and
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2591
  // rdx which contain the exception oop and exception pc
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2592
  // respectively.  Set them in TLS and fall thru to the
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2593
  // unpack_with_exception_in_tls entry point.
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2594
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2595
  __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2596
  __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2597
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2598
  int exception_in_tls_offset = __ pc() - start;
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2599
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2600
  // new implementation because exception oop is now passed in JavaThread
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2601
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2602
  // Prolog for exception case
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2603
  // All registers must be preserved because they might be used by LinearScan
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2604
  // Exceptiop oop and throwing PC are passed in JavaThread
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2605
  // tos: stack at point of call to method that threw the exception (i.e. only
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2606
  // args are on the stack, no return address)
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2607
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2608
  // make room on stack for the return address
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2609
  // It will be patched later with the throwing pc. The correct value is not
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2610
  // available now because loading it from memory would destroy registers.
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2611
  __ push(0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2612
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2613
  // Save everything in sight.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2614
  map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2615
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2616
  // Now it is safe to overwrite any register
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2617
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2618
  // Deopt during an exception.  Save exec mode for unpack_frames.
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  2619
  __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2620
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2621
  // load throwing pc from JavaThread and patch it as the return address
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2622
  // of the current frame. Then clear the field in JavaThread
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2623
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2624
  __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2625
  __ movptr(Address(rbp, wordSize), rdx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2626
  __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2627
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2628
#ifdef ASSERT
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2629
  // verify that there is really an exception oop in JavaThread
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2630
  __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2631
  __ verify_oop(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2632
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2633
  // verify that there is no pending exception
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2634
  Label no_pending_exception;
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2635
  __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2636
  __ testptr(rax, rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2637
  __ jcc(Assembler::zero, no_pending_exception);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2638
  __ stop("must not have pending exception here");
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2639
  __ bind(no_pending_exception);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2640
#endif
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2641
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2642
  __ bind(cont);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2643
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2644
  // Call C code.  Need thread and this frame, but NOT official VM entry
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2645
  // crud.  We cannot block on this call, no GC can happen.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2646
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2647
  // UnrollBlock* fetch_unroll_info(JavaThread* thread)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2648
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2649
  // fetch_unroll_info needs to call last_java_frame().
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2650
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2651
  __ set_last_Java_frame(noreg, noreg, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2652
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2653
  { Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2654
    __ cmpptr(Address(r15_thread,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2655
                    JavaThread::last_Java_fp_offset()),
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2656
            (int32_t)0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2657
    __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2658
    __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2659
    __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2660
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2661
#endif // ASSERT
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2662
  __ mov(c_rarg0, r15_thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2663
  __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2664
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2665
  // Need to have an oopmap that tells fetch_unroll_info where to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2666
  // find any register it might need.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2667
  oop_maps->add_gc_map(__ pc() - start, map);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2668
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2669
  __ reset_last_Java_frame(false, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2670
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2671
  // Load UnrollBlock* into rdi
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2672
  __ mov(rdi, rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2673
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2674
   Label noException;
2349
d438a6c62f88 6824463: deopt blob is testing wrong register on 64-bit x86
never
parents: 2154
diff changeset
  2675
  __ cmpl(r14, Deoptimization::Unpack_exception);   // Was exception pending?
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2676
  __ jcc(Assembler::notEqual, noException);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2677
  __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2678
  // QQQ this is useless it was NULL above
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2679
  __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2680
  __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2681
  __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2682
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2683
  __ verify_oop(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2684
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2685
  // Overwrite the result registers with the exception results.
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2686
  __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2687
  // I think this is useless
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2688
  __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2689
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2690
  __ bind(noException);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2691
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2692
  // Only register save data is on the stack.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2693
  // Now restore the result registers.  Everything else is either dead
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2694
  // or captured in the vframeArray.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2695
  RegisterSaver::restore_result_registers(masm);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2696
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2697
  // All of the register save area has been popped of the stack. Only the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2698
  // return address remains.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2699
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2700
  // Pop all the frames we must move/replace.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2701
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2702
  // Frame picture (youngest to oldest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2703
  // 1: self-frame (no frame link)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2704
  // 2: deopting frame  (no frame link)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2705
  // 3: caller of deopting frame (could be compiled/interpreted).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2706
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2707
  // Note: by leaving the return address of self-frame on the stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2708
  // and using the size of frame 2 to adjust the stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2709
  // when we are done the return to frame 3 will still be on the stack.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2710
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2711
  // Pop deoptimized frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2712
  __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2713
  __ addptr(rsp, rcx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2714
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2715
  // rsp should be pointing at the return address to the caller (3)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2716
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2717
  // Stack bang to make sure there's enough room for these interpreter frames.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2718
  if (UseStackBanging) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2719
    __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2720
    __ bang_stack_size(rbx, rcx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2721
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2722
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2723
  // Load address of array of frame pcs into rcx
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2724
  __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2725
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2726
  // Trash the old pc
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2727
  __ addptr(rsp, wordSize);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2728
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2729
  // Load address of array of frame sizes into rsi
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2730
  __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2731
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2732
  // Load counter into rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2733
  __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2734
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2735
  // Pick up the initial fp we should save
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2736
  __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2737
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2738
  // Now adjust the caller's stack to make up for the extra locals
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2739
  // but record the original sp so that we can save it in the skeletal interpreter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2740
  // frame and the stack walking of interpreter_sender will get the unextended sp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2741
  // value and not the "real" sp value.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2742
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2743
  const Register sender_sp = r8;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2744
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2745
  __ mov(sender_sp, rsp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2746
  __ movl(rbx, Address(rdi,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2747
                       Deoptimization::UnrollBlock::
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2748
                       caller_adjustment_offset_in_bytes()));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2749
  __ subptr(rsp, rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2750
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2751
  // Push interpreter frames in a loop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2752
  Label loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2753
  __ bind(loop);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2754
  __ movptr(rbx, Address(rsi, 0));      // Load frame size
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2755
#ifdef CC_INTERP
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2756
  __ subptr(rbx, 4*wordSize);           // we'll push pc and ebp by hand and
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2757
#ifdef ASSERT
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2758
  __ push(0xDEADDEAD);                  // Make a recognizable pattern
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2759
  __ push(0xDEADDEAD);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2760
#else /* ASSERT */
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2761
  __ subptr(rsp, 2*wordSize);           // skip the "static long no_param"
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2762
#endif /* ASSERT */
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2763
#else
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2764
  __ subptr(rbx, 2*wordSize);           // We'll push pc and ebp by hand
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2765
#endif // CC_INTERP
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2766
  __ pushptr(Address(rcx, 0));          // Save return address
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2767
  __ enter();                           // Save old & set new ebp
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2768
  __ subptr(rsp, rbx);                  // Prolog
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2769
#ifdef CC_INTERP
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2770
  __ movptr(Address(rbp,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2771
                  -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2772
            sender_sp); // Make it walkable
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2773
#else /* CC_INTERP */
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2774
  // This value is corrected by layout_activation_impl
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2775
  __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2776
  __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2777
#endif /* CC_INTERP */
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2778
  __ mov(sender_sp, rsp);               // Pass sender_sp to next frame
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2779
  __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2780
  __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2781
  __ decrementl(rdx);                   // Decrement counter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2782
  __ jcc(Assembler::notZero, loop);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2783
  __ pushptr(Address(rcx, 0));          // Save final return address
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2784
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2785
  // Re-push self-frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2786
  __ enter();                           // Save old & set new ebp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2787
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2788
  // Allocate a full sized register save area.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2789
  // Return address and rbp are in place, so we allocate two less words.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2790
  __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2791
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2792
  // Restore frame locals after moving the frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2793
  __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2794
  __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2795
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2796
  // Call C code.  Need thread but NOT official VM entry
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2797
  // crud.  We cannot block on this call, no GC can happen.  Call should
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2798
  // restore return values to their stack-slots with the new SP.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2799
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2800
  // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2801
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2802
  // Use rbp because the frames look interpreted now
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2803
  __ set_last_Java_frame(noreg, rbp, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2804
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2805
  __ mov(c_rarg0, r15_thread);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  2806
  __ movl(c_rarg1, r14); // second arg: exec_mode
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2807
  __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2808
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2809
  // Set an oopmap for the call site
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2810
  oop_maps->add_gc_map(__ pc() - start,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2811
                       new OopMap( frame_size_in_words, 0 ));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2812
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2813
  __ reset_last_Java_frame(true, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2814
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2815
  // Collect return values
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2816
  __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2817
  __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2818
  // I think this is useless (throwing pc?)
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2819
  __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2820
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2821
  // Pop self-frame.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2822
  __ leave();                           // Epilog
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2823
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2824
  // Jump to interpreter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2825
  __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2826
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2827
  // Make sure all code is generated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2828
  masm->flush();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2829
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2830
  _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2831
  _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2832
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2833
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2834
#ifdef COMPILER2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2835
//------------------------------generate_uncommon_trap_blob--------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2836
void SharedRuntime::generate_uncommon_trap_blob() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2837
  // Allocate space for the code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2838
  ResourceMark rm;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2839
  // Setup code generation tools
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2840
  CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2841
  MacroAssembler* masm = new MacroAssembler(&buffer);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2842
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2843
  assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2844
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2845
  address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2846
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2847
  // Push self-frame.  We get here with a return address on the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2848
  // stack, so rsp is 8-byte aligned until we allocate our frame.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2849
  __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2850
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2851
  // No callee saved registers. rbp is assumed implicitly saved
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2852
  __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2853
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2854
  // compiler left unloaded_class_index in j_rarg0 move to where the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2855
  // runtime expects it.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2856
  __ movl(c_rarg1, j_rarg0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2857
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2858
  __ set_last_Java_frame(noreg, noreg, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2859
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2860
  // Call C code.  Need thread but NOT official VM entry
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2861
  // crud.  We cannot block on this call, no GC can happen.  Call should
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2862
  // capture callee-saved registers as well as return values.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2863
  // Thread is in rdi already.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2864
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2865
  // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2866
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2867
  __ mov(c_rarg0, r15_thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2868
  __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2869
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2870
  // Set an oopmap for the call site
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2871
  OopMapSet* oop_maps = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2872
  OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2873
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2874
  // location of rbp is known implicitly by the frame sender code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2875
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2876
  oop_maps->add_gc_map(__ pc() - start, map);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2877
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2878
  __ reset_last_Java_frame(false, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2879
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2880
  // Load UnrollBlock* into rdi
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2881
  __ mov(rdi, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2882
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2883
  // Pop all the frames we must move/replace.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2884
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2885
  // Frame picture (youngest to oldest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2886
  // 1: self-frame (no frame link)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2887
  // 2: deopting frame  (no frame link)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2888
  // 3: caller of deopting frame (could be compiled/interpreted).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2889
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2890
  // Pop self-frame.  We have no frame, and must rely only on rax and rsp.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2891
  __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2892
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2893
  // Pop deoptimized frame (int)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2894
  __ movl(rcx, Address(rdi,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2895
                       Deoptimization::UnrollBlock::
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2896
                       size_of_deoptimized_frame_offset_in_bytes()));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2897
  __ addptr(rsp, rcx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2898
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2899
  // rsp should be pointing at the return address to the caller (3)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2900
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2901
  // Stack bang to make sure there's enough room for these interpreter frames.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2902
  if (UseStackBanging) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2903
    __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2904
    __ bang_stack_size(rbx, rcx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2905
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2906
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2907
  // Load address of array of frame pcs into rcx (address*)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2908
  __ movptr(rcx,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2909
            Address(rdi,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2910
                    Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2911
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2912
  // Trash the return pc
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2913
  __ addptr(rsp, wordSize);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2914
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2915
  // Load address of array of frame sizes into rsi (intptr_t*)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2916
  __ movptr(rsi, Address(rdi,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2917
                         Deoptimization::UnrollBlock::
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2918
                         frame_sizes_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2919
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2920
  // Counter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2921
  __ movl(rdx, Address(rdi,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2922
                       Deoptimization::UnrollBlock::
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2923
                       number_of_frames_offset_in_bytes())); // (int)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2924
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2925
  // Pick up the initial fp we should save
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2926
  __ movptr(rbp,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2927
            Address(rdi,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2928
                    Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2929
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2930
  // Now adjust the caller's stack to make up for the extra locals but
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2931
  // record the original sp so that we can save it in the skeletal
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2932
  // interpreter frame and the stack walking of interpreter_sender
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2933
  // will get the unextended sp value and not the "real" sp value.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2934
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2935
  const Register sender_sp = r8;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2936
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2937
  __ mov(sender_sp, rsp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2938
  __ movl(rbx, Address(rdi,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2939
                       Deoptimization::UnrollBlock::
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2940
                       caller_adjustment_offset_in_bytes())); // (int)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2941
  __ subptr(rsp, rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2942
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2943
  // Push interpreter frames in a loop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2944
  Label loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2945
  __ bind(loop);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2946
  __ movptr(rbx, Address(rsi, 0)); // Load frame size
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2947
  __ subptr(rbx, 2 * wordSize);    // We'll push pc and rbp by hand
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2948
  __ pushptr(Address(rcx, 0));     // Save return address
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2949
  __ enter();                      // Save old & set new rbp
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2950
  __ subptr(rsp, rbx);             // Prolog
1896
cce23a9ff495 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 1066
diff changeset
  2951
#ifdef CC_INTERP
cce23a9ff495 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 1066
diff changeset
  2952
  __ movptr(Address(rbp,
cce23a9ff495 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 1066
diff changeset
  2953
                  -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
cce23a9ff495 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 1066
diff changeset
  2954
            sender_sp); // Make it walkable
cce23a9ff495 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 1066
diff changeset
  2955
#else // CC_INTERP
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2956
  __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2957
            sender_sp);            // Make it walkable
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2958
  // This value is corrected by layout_activation_impl
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2959
  __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
1896
cce23a9ff495 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 1066
diff changeset
  2960
#endif // CC_INTERP
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2961
  __ mov(sender_sp, rsp);          // Pass sender_sp to next frame
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2962
  __ addptr(rsi, wordSize);        // Bump array pointer (sizes)
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2963
  __ addptr(rcx, wordSize);        // Bump array pointer (pcs)
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2964
  __ decrementl(rdx);              // Decrement counter
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2965
  __ jcc(Assembler::notZero, loop);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2966
  __ pushptr(Address(rcx, 0));     // Save final return address
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2967
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2968
  // Re-push self-frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2969
  __ enter();                 // Save old & set new rbp
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2970
  __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2971
                              // Prolog
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2972
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2973
  // Use rbp because the frames look interpreted now
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2974
  __ set_last_Java_frame(noreg, rbp, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2975
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2976
  // Call C code.  Need thread but NOT official VM entry
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2977
  // crud.  We cannot block on this call, no GC can happen.  Call should
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2978
  // restore return values to their stack-slots with the new SP.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2979
  // Thread is in rdi already.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2980
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2981
  // BasicType unpack_frames(JavaThread* thread, int exec_mode);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2982
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  2983
  __ mov(c_rarg0, r15_thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2984
  __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2985
  __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2986
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2987
  // Set an oopmap for the call site
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2988
  oop_maps->add_gc_map(__ pc() - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2989
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2990
  __ reset_last_Java_frame(true, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2991
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2992
  // Pop self-frame.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2993
  __ leave();                 // Epilog
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2994
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2995
  // Jump to interpreter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2996
  __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2997
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2998
  // Make sure all code is generated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2999
  masm->flush();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3000
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3001
  _uncommon_trap_blob =  UncommonTrapBlob::create(&buffer, oop_maps,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3002
                                                 SimpleRuntimeFrame::framesize >> 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3003
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3004
#endif // COMPILER2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3005
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3006
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3007
//------------------------------generate_handler_blob------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3008
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3009
// Generate a special Compile2Runtime blob that saves all registers,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3010
// and setup oopmap.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3011
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3012
static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3013
  assert(StubRoutines::forward_exception_entry() != NULL,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3014
         "must be generated before");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3015
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3016
  ResourceMark rm;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3017
  OopMapSet *oop_maps = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3018
  OopMap* map;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3019
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3020
  // Allocate space for the code.  Setup code generation tools.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3021
  CodeBuffer buffer("handler_blob", 2048, 1024);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3022
  MacroAssembler* masm = new MacroAssembler(&buffer);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3023
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3024
  address start   = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3025
  address call_pc = NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3026
  int frame_size_in_words;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3027
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3028
  // Make room for return address (or push it again)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3029
  if (!cause_return) {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3030
    __ push(rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3031
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3032
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3033
  // Save registers, fpu state, and flags
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3034
  map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3035
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3036
  // The following is basically a call_VM.  However, we need the precise
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3037
  // address of the call in order to generate an oopmap. Hence, we do all the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3038
  // work outselves.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3039
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3040
  __ set_last_Java_frame(noreg, noreg, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3041
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3042
  // The return address must always be correct so that frame constructor never
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3043
  // sees an invalid pc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3044
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3045
  if (!cause_return) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3046
    // overwrite the dummy value we pushed on entry
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3047
    __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3048
    __ movptr(Address(rbp, wordSize), c_rarg0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3049
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3050
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3051
  // Do the call
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3052
  __ mov(c_rarg0, r15_thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3053
  __ call(RuntimeAddress(call_ptr));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3054
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3055
  // Set an oopmap for the call site.  This oopmap will map all
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3056
  // oop-registers and debug-info registers as callee-saved.  This
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3057
  // will allow deoptimization at this safepoint to find all possible
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3058
  // debug-info recordings, as well as let GC find all oops.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3059
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3060
  oop_maps->add_gc_map( __ pc() - start, map);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3061
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3062
  Label noException;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3063
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3064
  __ reset_last_Java_frame(false, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3065
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3066
  __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3067
  __ jcc(Assembler::equal, noException);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3068
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3069
  // Exception pending
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3070
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3071
  RegisterSaver::restore_live_registers(masm);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3072
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3073
  __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3074
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3075
  // No exception case
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3076
  __ bind(noException);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3077
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3078
  // Normal exit, restore registers and exit.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3079
  RegisterSaver::restore_live_registers(masm);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3080
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3081
  __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3082
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3083
  // Make sure all code is generated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3084
  masm->flush();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3085
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3086
  // Fill-out other meta info
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3087
  return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3088
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3089
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3090
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3091
// generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3092
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3093
// Generate a stub that calls into vm to find out the proper destination
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3094
// of a java call. All the argument registers are live at this point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3095
// but since this is generic code we don't know what they are and the caller
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3096
// must do any gc of the args.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3097
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3098
static RuntimeStub* generate_resolve_blob(address destination, const char* name) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3099
  assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3100
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3101
  // allocate space for the code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3102
  ResourceMark rm;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3103
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3104
  CodeBuffer buffer(name, 1000, 512);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3105
  MacroAssembler* masm                = new MacroAssembler(&buffer);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3106
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3107
  int frame_size_in_words;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3108
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3109
  OopMapSet *oop_maps = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3110
  OopMap* map = NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3111
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3112
  int start = __ offset();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3113
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3114
  map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3115
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3116
  int frame_complete = __ offset();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3117
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3118
  __ set_last_Java_frame(noreg, noreg, NULL);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3119
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3120
  __ mov(c_rarg0, r15_thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3121
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3122
  __ call(RuntimeAddress(destination));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3123
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3124
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3125
  // Set an oopmap for the call site.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3126
  // We need this not only for callee-saved registers, but also for volatile
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3127
  // registers that the compiler might be keeping live across a safepoint.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3128
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3129
  oop_maps->add_gc_map( __ offset() - start, map);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3130
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3131
  // rax contains the address we are going to jump to assuming no exception got installed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3132
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3133
  // clear last_Java_sp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3134
  __ reset_last_Java_frame(false, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3135
  // check for pending exceptions
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3136
  Label pending;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3137
  __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3138
  __ jcc(Assembler::notEqual, pending);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3139
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3140
  // get the returned methodOop
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3141
  __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset()));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3142
  __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3143
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3144
  __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3145
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3146
  RegisterSaver::restore_live_registers(masm);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3147
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3148
  // We are back the the original state on entry and ready to go.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3149
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3150
  __ jmp(rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3151
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3152
  // Pending exception after the safepoint
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3153
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3154
  __ bind(pending);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3155
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3156
  RegisterSaver::restore_live_registers(masm);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3157
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3158
  // exception pending => remove activation and forward to exception handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3159
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3160
  __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3161
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3162
  __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3163
  __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3164
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3165
  // -------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3166
  // make sure all code is generated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3167
  masm->flush();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3168
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3169
  // return the  blob
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3170
  // frame_size_words or bytes??
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3171
  return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3172
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3173
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3174
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3175
void SharedRuntime::generate_stubs() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3176
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3177
  _wrong_method_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3178
                                        "wrong_method_stub");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3179
  _ic_miss_blob =      generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method_ic_miss),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3180
                                        "ic_miss_stub");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3181
  _resolve_opt_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_opt_virtual_call_C),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3182
                                        "resolve_opt_virtual_call");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3183
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3184
  _resolve_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_virtual_call_C),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3185
                                        "resolve_virtual_call");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3186
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3187
  _resolve_static_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_static_call_C),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3188
                                        "resolve_static_call");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3189
  _polling_page_safepoint_handler_blob =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3190
    generate_handler_blob(CAST_FROM_FN_PTR(address,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3191
                   SafepointSynchronize::handle_polling_page_exception), false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3192
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3193
  _polling_page_return_handler_blob =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3194
    generate_handler_blob(CAST_FROM_FN_PTR(address,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3195
                   SafepointSynchronize::handle_polling_page_exception), true);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3196
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3197
  generate_deopt_blob();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3198
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3199
#ifdef COMPILER2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3200
  generate_uncommon_trap_blob();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3201
#endif // COMPILER2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3202
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3203
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3204
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3205
#ifdef COMPILER2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3206
// This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3207
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3208
//------------------------------generate_exception_blob---------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3209
// creates exception blob at the end
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3210
// Using exception blob, this code is jumped from a compiled method.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3211
// (see emit_exception_handler in x86_64.ad file)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3212
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3213
// Given an exception pc at a call we call into the runtime for the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3214
// handler in this method. This handler might merely restore state
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3215
// (i.e. callee save registers) unwind the frame and jump to the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3216
// exception handler for the nmethod if there is no Java level handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3217
// for the nmethod.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3218
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3219
// This code is entered with a jmp.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3220
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3221
// Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3222
//   rax: exception oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3223
//   rdx: exception pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3224
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3225
// Results:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3226
//   rax: exception oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3227
//   rdx: exception pc in caller or ???
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3228
//   destination: exception handler of caller
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3229
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3230
// Note: the exception pc MUST be at a call (precise debug information)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3231
//       Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3232
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3233
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3234
void OptoRuntime::generate_exception_blob() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3235
  assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3236
  assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3237
  assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3238
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3239
  assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3240
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3241
  // Allocate space for the code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3242
  ResourceMark rm;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3243
  // Setup code generation tools
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3244
  CodeBuffer buffer("exception_blob", 2048, 1024);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3245
  MacroAssembler* masm = new MacroAssembler(&buffer);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3246
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3247
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3248
  address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3249
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3250
  // Exception pc is 'return address' for stack walker
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3251
  __ push(rdx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3252
  __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3253
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3254
  // Save callee-saved registers.  See x86_64.ad.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3255
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3256
  // rbp is an implicitly saved callee saved register (i.e. the calling
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3257
  // convention will save restore it in prolog/epilog) Other than that
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3258
  // there are no callee save registers now that adapter frames are gone.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3259
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3260
  __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3261
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3262
  // Store exception in Thread object. We cannot pass any arguments to the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3263
  // handle_exception call, since we do not want to make any assumption
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3264
  // about the size of the frame where the exception happened in.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3265
  // c_rarg0 is either rdi (Linux) or rcx (Windows).
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3266
  __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3267
  __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3268
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3269
  // This call does all the hard work.  It checks if an exception handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3270
  // exists in the method.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3271
  // If so, it returns the handler address.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3272
  // If not, it prepares for stack-unwinding, restoring the callee-save
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3273
  // registers of the frame being removed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3274
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3275
  // address OptoRuntime::handle_exception_C(JavaThread* thread)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3276
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3277
  __ set_last_Java_frame(noreg, noreg, NULL);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3278
  __ mov(c_rarg0, r15_thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3279
  __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3280
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3281
  // Set an oopmap for the call site.  This oopmap will only be used if we
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3282
  // are unwinding the stack.  Hence, all locations will be dead.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3283
  // Callee-saved registers will be the same as the frame above (i.e.,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3284
  // handle_exception_stub), since they were restored when we got the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3285
  // exception.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3286
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3287
  OopMapSet* oop_maps = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3288
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3289
  oop_maps->add_gc_map( __ pc()-start, new OopMap(SimpleRuntimeFrame::framesize, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3290
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3291
  __ reset_last_Java_frame(false, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3292
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3293
  // Restore callee-saved registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3294
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3295
  // rbp is an implicitly saved callee saved register (i.e. the calling
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3296
  // convention will save restore it in prolog/epilog) Other than that
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3297
  // there are no callee save registers no that adapter frames are gone.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3298
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3299
  __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3300
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3301
  __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3302
  __ pop(rdx);                  // No need for exception pc anymore
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3303
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3304
  // rax: exception handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3305
5252
58f23871a5b6 6941529: SharedRuntime::raw_exception_handler_for_return_address must reset thread MethodHandle flag
twisti
parents: 4735
diff changeset
  3306
  // Restore SP from BP if the exception PC is a MethodHandle call site.
58f23871a5b6 6941529: SharedRuntime::raw_exception_handler_for_return_address must reset thread MethodHandle flag
twisti
parents: 4735
diff changeset
  3307
  __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0);
4564
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
  3308
  __ cmovptr(Assembler::notEqual, rsp, rbp);
55dfb20908d0 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 3265
diff changeset
  3309
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3310
  // We have a handler in rax (could be deopt blob).
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3311
  __ mov(r8, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3312
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3313
  // Get the exception oop
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3314
  __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3315
  // Get the exception pc in case we are deoptimized
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 670
diff changeset
  3316
  __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3317
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3318
  __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3319
  __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3320
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3321
  // Clear the exception oop so GC no longer processes it as a root.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3322
  __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3323
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3324
  // rax: exception oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3325
  // r8:  exception handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3326
  // rdx: exception pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3327
  // Jump to handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3328
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3329
  __ jmp(r8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3330
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3331
  // Make sure all code is generated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3332
  masm->flush();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3333
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3334
  // Set exception blob
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3335
  _exception_blob =  ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3336
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3337
#endif // COMPILER2