author | eosterlund |
Wed, 09 Oct 2019 12:30:06 +0000 | |
changeset 58516 | d376d86b0a01 |
parent 58372 | 43c4fb8ba96b |
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permissions | -rw-r--r-- |
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/* |
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* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#ifndef SHARE_OPTO_MEMNODE_HPP |
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#define SHARE_OPTO_MEMNODE_HPP |
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#include "opto/multnode.hpp" |
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#include "opto/node.hpp" |
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#include "opto/opcodes.hpp" |
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#include "opto/type.hpp" |
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// Portions of code courtesy of Clifford Click |
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class MultiNode; |
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class PhaseCCP; |
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class PhaseTransform; |
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//------------------------------MemNode---------------------------------------- |
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// Load or Store, possibly throwing a NULL pointer exception |
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class MemNode : public Node { |
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private: |
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bool _unaligned_access; // Unaligned access from unsafe |
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bool _mismatched_access; // Mismatched access from unsafe: byte read in integer array for instance |
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bool _unsafe_access; // Access of unsafe origin. |
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uint8_t _barrier; // Bit field with barrier information |
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protected: |
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#ifdef ASSERT |
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const TypePtr* _adr_type; // What kind of memory is being addressed? |
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#endif |
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virtual uint size_of() const; |
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public: |
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enum { Control, // When is it safe to do this load? |
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Memory, // Chunk of memory is being loaded from |
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Address, // Actually address, derived from base |
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ValueIn, // Value to store |
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OopStore // Preceeding oop store, only in StoreCM |
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}; |
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typedef enum { unordered = 0, |
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acquire, // Load has to acquire or be succeeded by MemBarAcquire. |
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release, // Store has to release or be preceded by MemBarRelease. |
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seqcst, // LoadStore has to have both acquire and release semantics. |
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unset // The memory ordering is not set (used for testing) |
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} MemOrd; |
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protected: |
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MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at ) : |
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Node(c0,c1,c2), |
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_unaligned_access(false), |
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_mismatched_access(false), |
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_unsafe_access(false), |
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_barrier(0) { |
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init_class_id(Class_Mem); |
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debug_only(_adr_type=at; adr_type();) |
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} |
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MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 ) : |
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Node(c0,c1,c2,c3), |
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_unaligned_access(false), |
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_mismatched_access(false), |
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_unsafe_access(false), |
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_barrier(0) { |
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init_class_id(Class_Mem); |
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debug_only(_adr_type=at; adr_type();) |
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} |
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MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4) : |
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Node(c0,c1,c2,c3,c4), |
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_unaligned_access(false), |
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_mismatched_access(false), |
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_unsafe_access(false), |
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_barrier(0) { |
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init_class_id(Class_Mem); |
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debug_only(_adr_type=at; adr_type();) |
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} |
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virtual Node* find_previous_arraycopy(PhaseTransform* phase, Node* ld_alloc, Node*& mem, bool can_see_stored_value) const { return NULL; } |
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static bool check_if_adr_maybe_raw(Node* adr); |
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public: |
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// Helpers for the optimizer. Documented in memnode.cpp. |
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static bool detect_ptr_independence(Node* p1, AllocateNode* a1, |
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Node* p2, AllocateNode* a2, |
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PhaseTransform* phase); |
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static bool adr_phi_is_loop_invariant(Node* adr_phi, Node* cast); |
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static Node *optimize_simple_memory_chain(Node *mchain, const TypeOopPtr *t_oop, Node *load, PhaseGVN *phase); |
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static Node *optimize_memory_chain(Node *mchain, const TypePtr *t_adr, Node *load, PhaseGVN *phase); |
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// This one should probably be a phase-specific function: |
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static bool all_controls_dominate(Node* dom, Node* sub); |
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virtual const class TypePtr *adr_type() const; // returns bottom_type of address |
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// Shared code for Ideal methods: |
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Node *Ideal_common(PhaseGVN *phase, bool can_reshape); // Return -1 for short-circuit NULL. |
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// Helper function for adr_type() implementations. |
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static const TypePtr* calculate_adr_type(const Type* t, const TypePtr* cross_check = NULL); |
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// Raw access function, to allow copying of adr_type efficiently in |
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// product builds and retain the debug info for debug builds. |
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const TypePtr *raw_adr_type() const { |
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#ifdef ASSERT |
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return _adr_type; |
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#else |
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return 0; |
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#endif |
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} |
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// Map a load or store opcode to its corresponding store opcode. |
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// (Return -1 if unknown.) |
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virtual int store_Opcode() const { return -1; } |
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// What is the type of the value in memory? (T_VOID mean "unspecified".) |
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virtual BasicType memory_type() const = 0; |
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virtual int memory_size() const { |
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#ifdef ASSERT |
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return type2aelembytes(memory_type(), true); |
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#else |
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return type2aelembytes(memory_type()); |
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#endif |
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} |
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uint8_t barrier_data() { return _barrier; } |
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void set_barrier_data(uint8_t barrier_data) { _barrier = barrier_data; } |
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// Search through memory states which precede this node (load or store). |
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// Look for an exact match for the address, with no intervening |
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// aliased stores. |
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Node* find_previous_store(PhaseTransform* phase); |
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// Can this node (load or store) accurately see a stored value in |
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// the given memory state? (The state may or may not be in(Memory).) |
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Node* can_see_stored_value(Node* st, PhaseTransform* phase) const; |
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void set_unaligned_access() { _unaligned_access = true; } |
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bool is_unaligned_access() const { return _unaligned_access; } |
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void set_mismatched_access() { _mismatched_access = true; } |
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bool is_mismatched_access() const { return _mismatched_access; } |
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void set_unsafe_access() { _unsafe_access = true; } |
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bool is_unsafe_access() const { return _unsafe_access; } |
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#ifndef PRODUCT |
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static void dump_adr_type(const Node* mem, const TypePtr* adr_type, outputStream *st); |
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virtual void dump_spec(outputStream *st) const; |
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#endif |
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}; |
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//------------------------------LoadNode--------------------------------------- |
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// Load value; requires Memory and Address |
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class LoadNode : public MemNode { |
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public: |
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// Some loads (from unsafe) should be pinned: they don't depend only |
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// on the dominating test. The field _control_dependency below records |
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// whether that node depends only on the dominating test. |
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// Pinned and UnknownControl are similar, but differ in that Pinned |
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// loads are not allowed to float across safepoints, whereas UnknownControl |
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// loads are allowed to do that. Therefore, Pinned is stricter. |
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enum ControlDependency { |
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Pinned, |
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UnknownControl, |
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DependsOnlyOnTest |
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}; |
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private: |
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// LoadNode::hash() doesn't take the _control_dependency field |
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// into account: If the graph already has a non-pinned LoadNode and |
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// we add a pinned LoadNode with the same inputs, it's safe for GVN |
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// to replace the pinned LoadNode with the non-pinned LoadNode, |
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// otherwise it wouldn't be safe to have a non pinned LoadNode with |
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// those inputs in the first place. If the graph already has a |
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// pinned LoadNode and we add a non pinned LoadNode with the same |
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// inputs, it's safe (but suboptimal) for GVN to replace the |
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// non-pinned LoadNode by the pinned LoadNode. |
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ControlDependency _control_dependency; |
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// On platforms with weak memory ordering (e.g., PPC, Ia64) we distinguish |
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// loads that can be reordered, and such requiring acquire semantics to |
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197 |
// adhere to the Java specification. The required behaviour is stored in |
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198 |
// this field. |
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199 |
const MemOrd _mo; |
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200 |
|
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AllocateNode* is_new_object_mark_load(PhaseGVN *phase) const; |
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202 |
|
1 | 203 |
protected: |
54327 | 204 |
virtual bool cmp(const Node &n) const; |
1 | 205 |
virtual uint size_of() const; // Size is bigger |
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// Should LoadNode::Ideal() attempt to remove control edges? |
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virtual bool can_remove_control() const; |
1 | 208 |
const Type* const _type; // What kind of value is loaded? |
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209 |
|
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virtual Node* find_previous_arraycopy(PhaseTransform* phase, Node* ld_alloc, Node*& mem, bool can_see_stored_value) const; |
1 | 211 |
public: |
212 |
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LoadNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *rt, MemOrd mo, ControlDependency control_dependency) |
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: MemNode(c,mem,adr,at), _control_dependency(control_dependency), _mo(mo), _type(rt) { |
1 | 215 |
init_class_id(Class_Load); |
216 |
} |
|
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inline bool is_unordered() const { return !is_acquire(); } |
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inline bool is_acquire() const { |
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assert(_mo == unordered || _mo == acquire, "unexpected"); |
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return _mo == acquire; |
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221 |
} |
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inline bool is_unsigned() const { |
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int lop = Opcode(); |
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return (lop == Op_LoadUB) || (lop == Op_LoadUS); |
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225 |
} |
1 | 226 |
|
227 |
// Polymorphic factory method: |
|
34189 | 228 |
static Node* make(PhaseGVN& gvn, Node *c, Node *mem, Node *adr, |
229 |
const TypePtr* at, const Type *rt, BasicType bt, |
|
230 |
MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest, |
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bool unaligned = false, bool mismatched = false, bool unsafe = false); |
1 | 232 |
|
233 |
virtual uint hash() const; // Check the type |
|
234 |
||
235 |
// Handle algebraic identities here. If we have an identity, return the Node |
|
236 |
// we are equivalent to. We look for Load of a Store. |
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virtual Node* Identity(PhaseGVN* phase); |
1 | 238 |
|
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// If the load is from Field memory and the pointer is non-null, it might be possible to |
1 | 240 |
// zero out the control input. |
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// If the offset is constant and the base is an object allocation, |
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242 |
// try to hook me up to the exact initializing store. |
1 | 243 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
244 |
||
589 | 245 |
// Split instance field load through Phi. |
246 |
Node* split_through_phi(PhaseGVN *phase); |
|
247 |
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// Recover original value from boxed values |
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|
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Node *eliminate_autobox(PhaseGVN *phase); |
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250 |
|
1 | 251 |
// Compute a new Type for this node. Basically we just do the pre-check, |
252 |
// then call the virtual add() to set the type. |
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virtual const Type* Value(PhaseGVN* phase) const; |
1 | 254 |
|
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// Common methods for LoadKlass and LoadNKlass nodes. |
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const Type* klass_value_common(PhaseGVN* phase) const; |
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Node* klass_identity_common(PhaseGVN* phase); |
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258 |
|
1 | 259 |
virtual uint ideal_reg() const; |
260 |
virtual const Type *bottom_type() const; |
|
261 |
// Following method is copied from TypeNode: |
|
262 |
void set_type(const Type* t) { |
|
263 |
assert(t != NULL, "sanity"); |
|
264 |
debug_only(uint check_hash = (VerifyHashTableKeys && _hash_lock) ? hash() : NO_HASH); |
|
265 |
*(const Type**)&_type = t; // cast away const-ness |
|
266 |
// If this node is in the hash table, make sure it doesn't need a rehash. |
|
267 |
assert(check_hash == NO_HASH || check_hash == hash(), "type change must preserve hash code"); |
|
268 |
} |
|
269 |
const Type* type() const { assert(_type != NULL, "sanity"); return _type; }; |
|
270 |
||
271 |
// Do not match memory edge |
|
272 |
virtual uint match_edge(uint idx) const; |
|
273 |
||
274 |
// Map a load opcode to its corresponding store opcode. |
|
275 |
virtual int store_Opcode() const = 0; |
|
276 |
||
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|
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// Check if the load's memory input is a Phi node with the same control. |
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|
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bool is_instance_field_load_with_local_phi(Node* ctrl); |
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|
279 |
|
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Node* convert_to_unsigned_load(PhaseGVN& gvn); |
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Node* convert_to_signed_load(PhaseGVN& gvn); |
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282 |
|
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void pin() { _control_dependency = Pinned; } |
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bool has_unknown_control_dependency() const { return _control_dependency == UnknownControl; } |
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285 |
|
1 | 286 |
#ifndef PRODUCT |
287 |
virtual void dump_spec(outputStream *st) const; |
|
288 |
#endif |
|
5889 | 289 |
#ifdef ASSERT |
290 |
// Helper function to allow a raw load without control edge for some cases |
|
291 |
static bool is_immutable_value(Node* adr); |
|
292 |
#endif |
|
1 | 293 |
protected: |
294 |
const Type* load_array_final_field(const TypeKlassPtr *tkls, |
|
295 |
ciKlass* klass) const; |
|
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296 |
|
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|
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Node* can_see_arraycopy_value(Node* st, PhaseGVN* phase) const; |
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298 |
|
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|
299 |
// depends_only_on_test is almost always true, and needs to be almost always |
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|
300 |
// true to enable key hoisting & commoning optimizations. However, for the |
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|
301 |
// special case of RawPtr loads from TLS top & end, and other loads performed by |
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|
302 |
// GC barriers, the control edge carries the dependence preventing hoisting past |
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|
303 |
// a Safepoint instead of the memory edge. (An unfortunate consequence of having |
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|
304 |
// Safepoints not set Raw Memory; itself an unfortunate consequence of having Nodes |
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|
305 |
// which produce results (new raw memory state) inside of loops preventing all |
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|
306 |
// manner of other optimizations). Basically, it's ugly but so is the alternative. |
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|
307 |
// See comment in macro.cpp, around line 125 expand_allocate_common(). |
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|
308 |
virtual bool depends_only_on_test() const { |
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|
309 |
return adr_type() != TypeRawPtr::BOTTOM && _control_dependency == DependsOnlyOnTest; |
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|
310 |
} |
1 | 311 |
}; |
312 |
||
313 |
//------------------------------LoadBNode-------------------------------------- |
|
314 |
// Load a byte (8bits signed) from memory |
|
315 |
class LoadBNode : public LoadNode { |
|
316 |
public: |
|
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|
317 |
LoadBNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
318 |
: LoadNode(c, mem, adr, at, ti, mo, control_dependency) {} |
1 | 319 |
virtual int Opcode() const; |
320 |
virtual uint ideal_reg() const { return Op_RegI; } |
|
321 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
|
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322 |
virtual const Type* Value(PhaseGVN* phase) const; |
1 | 323 |
virtual int store_Opcode() const { return Op_StoreB; } |
324 |
virtual BasicType memory_type() const { return T_BYTE; } |
|
325 |
}; |
|
326 |
||
2150 | 327 |
//------------------------------LoadUBNode------------------------------------- |
328 |
// Load a unsigned byte (8bits unsigned) from memory |
|
329 |
class LoadUBNode : public LoadNode { |
|
330 |
public: |
|
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|
331 |
LoadUBNode(Node* c, Node* mem, Node* adr, const TypePtr* at, const TypeInt* ti, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
332 |
: LoadNode(c, mem, adr, at, ti, mo, control_dependency) {} |
2150 | 333 |
virtual int Opcode() const; |
334 |
virtual uint ideal_reg() const { return Op_RegI; } |
|
335 |
virtual Node* Ideal(PhaseGVN *phase, bool can_reshape); |
|
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|
336 |
virtual const Type* Value(PhaseGVN* phase) const; |
2150 | 337 |
virtual int store_Opcode() const { return Op_StoreB; } |
338 |
virtual BasicType memory_type() const { return T_BYTE; } |
|
339 |
}; |
|
340 |
||
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|
341 |
//------------------------------LoadUSNode------------------------------------- |
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|
342 |
// Load an unsigned short/char (16bits unsigned) from memory |
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|
343 |
class LoadUSNode : public LoadNode { |
1 | 344 |
public: |
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|
345 |
LoadUSNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
346 |
: LoadNode(c, mem, adr, at, ti, mo, control_dependency) {} |
1 | 347 |
virtual int Opcode() const; |
348 |
virtual uint ideal_reg() const { return Op_RegI; } |
|
349 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
|
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|
350 |
virtual const Type* Value(PhaseGVN* phase) const; |
1 | 351 |
virtual int store_Opcode() const { return Op_StoreC; } |
352 |
virtual BasicType memory_type() const { return T_CHAR; } |
|
353 |
}; |
|
354 |
||
11562 | 355 |
//------------------------------LoadSNode-------------------------------------- |
356 |
// Load a short (16bits signed) from memory |
|
357 |
class LoadSNode : public LoadNode { |
|
358 |
public: |
|
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|
359 |
LoadSNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
360 |
: LoadNode(c, mem, adr, at, ti, mo, control_dependency) {} |
11562 | 361 |
virtual int Opcode() const; |
362 |
virtual uint ideal_reg() const { return Op_RegI; } |
|
363 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
|
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|
364 |
virtual const Type* Value(PhaseGVN* phase) const; |
11562 | 365 |
virtual int store_Opcode() const { return Op_StoreC; } |
366 |
virtual BasicType memory_type() const { return T_SHORT; } |
|
367 |
}; |
|
368 |
||
1 | 369 |
//------------------------------LoadINode-------------------------------------- |
370 |
// Load an integer from memory |
|
371 |
class LoadINode : public LoadNode { |
|
372 |
public: |
|
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|
373 |
LoadINode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
374 |
: LoadNode(c, mem, adr, at, ti, mo, control_dependency) {} |
1 | 375 |
virtual int Opcode() const; |
376 |
virtual uint ideal_reg() const { return Op_RegI; } |
|
377 |
virtual int store_Opcode() const { return Op_StoreI; } |
|
378 |
virtual BasicType memory_type() const { return T_INT; } |
|
379 |
}; |
|
380 |
||
381 |
//------------------------------LoadRangeNode---------------------------------- |
|
382 |
// Load an array length from the array |
|
383 |
class LoadRangeNode : public LoadINode { |
|
384 |
public: |
|
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|
385 |
LoadRangeNode(Node *c, Node *mem, Node *adr, const TypeInt *ti = TypeInt::POS) |
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|
386 |
: LoadINode(c, mem, adr, TypeAryPtr::RANGE, ti, MemNode::unordered) {} |
1 | 387 |
virtual int Opcode() const; |
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|
388 |
virtual const Type* Value(PhaseGVN* phase) const; |
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|
389 |
virtual Node* Identity(PhaseGVN* phase); |
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|
390 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
1 | 391 |
}; |
392 |
||
393 |
//------------------------------LoadLNode-------------------------------------- |
|
394 |
// Load a long from memory |
|
395 |
class LoadLNode : public LoadNode { |
|
396 |
virtual uint hash() const { return LoadNode::hash() + _require_atomic_access; } |
|
54327 | 397 |
virtual bool cmp( const Node &n ) const { |
1 | 398 |
return _require_atomic_access == ((LoadLNode&)n)._require_atomic_access |
399 |
&& LoadNode::cmp(n); |
|
400 |
} |
|
401 |
virtual uint size_of() const { return sizeof(*this); } |
|
402 |
const bool _require_atomic_access; // is piecewise load forbidden? |
|
403 |
||
404 |
public: |
|
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|
405 |
LoadLNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeLong *tl, |
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|
406 |
MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest, bool require_atomic_access = false) |
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|
407 |
: LoadNode(c, mem, adr, at, tl, mo, control_dependency), _require_atomic_access(require_atomic_access) {} |
1 | 408 |
virtual int Opcode() const; |
409 |
virtual uint ideal_reg() const { return Op_RegL; } |
|
410 |
virtual int store_Opcode() const { return Op_StoreL; } |
|
411 |
virtual BasicType memory_type() const { return T_LONG; } |
|
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|
412 |
bool require_atomic_access() const { return _require_atomic_access; } |
25930 | 413 |
static LoadLNode* make_atomic(Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, |
34189 | 414 |
const Type* rt, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest, |
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|
415 |
bool unaligned = false, bool mismatched = false, bool unsafe = false); |
1 | 416 |
#ifndef PRODUCT |
417 |
virtual void dump_spec(outputStream *st) const { |
|
418 |
LoadNode::dump_spec(st); |
|
419 |
if (_require_atomic_access) st->print(" Atomic!"); |
|
420 |
} |
|
421 |
#endif |
|
422 |
}; |
|
423 |
||
424 |
//------------------------------LoadL_unalignedNode---------------------------- |
|
425 |
// Load a long from unaligned memory |
|
426 |
class LoadL_unalignedNode : public LoadLNode { |
|
427 |
public: |
|
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|
428 |
LoadL_unalignedNode(Node *c, Node *mem, Node *adr, const TypePtr* at, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
429 |
: LoadLNode(c, mem, adr, at, TypeLong::LONG, mo, control_dependency) {} |
1 | 430 |
virtual int Opcode() const; |
431 |
}; |
|
432 |
||
433 |
//------------------------------LoadFNode-------------------------------------- |
|
434 |
// Load a float (64 bits) from memory |
|
435 |
class LoadFNode : public LoadNode { |
|
436 |
public: |
|
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|
437 |
LoadFNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
438 |
: LoadNode(c, mem, adr, at, t, mo, control_dependency) {} |
1 | 439 |
virtual int Opcode() const; |
440 |
virtual uint ideal_reg() const { return Op_RegF; } |
|
441 |
virtual int store_Opcode() const { return Op_StoreF; } |
|
442 |
virtual BasicType memory_type() const { return T_FLOAT; } |
|
443 |
}; |
|
444 |
||
445 |
//------------------------------LoadDNode-------------------------------------- |
|
446 |
// Load a double (64 bits) from memory |
|
447 |
class LoadDNode : public LoadNode { |
|
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|
448 |
virtual uint hash() const { return LoadNode::hash() + _require_atomic_access; } |
54327 | 449 |
virtual bool cmp( const Node &n ) const { |
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|
450 |
return _require_atomic_access == ((LoadDNode&)n)._require_atomic_access |
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|
451 |
&& LoadNode::cmp(n); |
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|
452 |
} |
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|
453 |
virtual uint size_of() const { return sizeof(*this); } |
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|
454 |
const bool _require_atomic_access; // is piecewise load forbidden? |
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|
455 |
|
1 | 456 |
public: |
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|
457 |
LoadDNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t, |
31035
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|
458 |
MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest, bool require_atomic_access = false) |
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|
459 |
: LoadNode(c, mem, adr, at, t, mo, control_dependency), _require_atomic_access(require_atomic_access) {} |
1 | 460 |
virtual int Opcode() const; |
461 |
virtual uint ideal_reg() const { return Op_RegD; } |
|
462 |
virtual int store_Opcode() const { return Op_StoreD; } |
|
463 |
virtual BasicType memory_type() const { return T_DOUBLE; } |
|
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changeset
|
464 |
bool require_atomic_access() const { return _require_atomic_access; } |
25930 | 465 |
static LoadDNode* make_atomic(Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, |
34189 | 466 |
const Type* rt, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest, |
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|
467 |
bool unaligned = false, bool mismatched = false, bool unsafe = false); |
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|
468 |
#ifndef PRODUCT |
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|
469 |
virtual void dump_spec(outputStream *st) const { |
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changeset
|
470 |
LoadNode::dump_spec(st); |
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changeset
|
471 |
if (_require_atomic_access) st->print(" Atomic!"); |
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|
472 |
} |
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|
473 |
#endif |
1 | 474 |
}; |
475 |
||
476 |
//------------------------------LoadD_unalignedNode---------------------------- |
|
477 |
// Load a double from unaligned memory |
|
478 |
class LoadD_unalignedNode : public LoadDNode { |
|
479 |
public: |
|
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|
480 |
LoadD_unalignedNode(Node *c, Node *mem, Node *adr, const TypePtr* at, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
481 |
: LoadDNode(c, mem, adr, at, Type::DOUBLE, mo, control_dependency) {} |
1 | 482 |
virtual int Opcode() const; |
483 |
}; |
|
484 |
||
485 |
//------------------------------LoadPNode-------------------------------------- |
|
486 |
// Load a pointer from memory (either object or array) |
|
487 |
class LoadPNode : public LoadNode { |
|
488 |
public: |
|
31035
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|
489 |
LoadPNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const TypePtr* t, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
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|
490 |
: LoadNode(c, mem, adr, at, t, mo, control_dependency) {} |
1 | 491 |
virtual int Opcode() const; |
492 |
virtual uint ideal_reg() const { return Op_RegP; } |
|
493 |
virtual int store_Opcode() const { return Op_StoreP; } |
|
494 |
virtual BasicType memory_type() const { return T_ADDRESS; } |
|
495 |
}; |
|
496 |
||
360
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|
497 |
|
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|
498 |
//------------------------------LoadNNode-------------------------------------- |
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|
499 |
// Load a narrow oop from memory (either object or array) |
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|
500 |
class LoadNNode : public LoadNode { |
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|
501 |
public: |
31035
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changeset
|
502 |
LoadNNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const Type* t, MemOrd mo, ControlDependency control_dependency = DependsOnlyOnTest) |
0f0743952c41
8077504: Unsafe load can loose control dependency and cause crash
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changeset
|
503 |
: LoadNode(c, mem, adr, at, t, mo, control_dependency) {} |
360
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|
504 |
virtual int Opcode() const; |
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|
505 |
virtual uint ideal_reg() const { return Op_RegN; } |
21d113ecbf6a
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|
506 |
virtual int store_Opcode() const { return Op_StoreN; } |
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changeset
|
507 |
virtual BasicType memory_type() const { return T_NARROWOOP; } |
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changeset
|
508 |
}; |
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changeset
|
509 |
|
1 | 510 |
//------------------------------LoadKlassNode---------------------------------- |
511 |
// Load a Klass from an object |
|
512 |
class LoadKlassNode : public LoadPNode { |
|
27637
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changeset
|
513 |
protected: |
cf68c0af6882
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changeset
|
514 |
// In most cases, LoadKlassNode does not have the control input set. If the control |
cf68c0af6882
8057622: java/util/stream/test/org/openjdk/tests/java/util/stream/InfiniteStreamWithLimitOpTest: SEGV inside compiled code (sparc)
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changeset
|
515 |
// input is set, it must not be removed (by LoadNode::Ideal()). |
cf68c0af6882
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changeset
|
516 |
virtual bool can_remove_control() const; |
1 | 517 |
public: |
22845
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changeset
|
518 |
LoadKlassNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeKlassPtr *tk, MemOrd mo) |
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changeset
|
519 |
: LoadPNode(c, mem, adr, at, tk, mo) {} |
1 | 520 |
virtual int Opcode() const; |
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
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changeset
|
521 |
virtual const Type* Value(PhaseGVN* phase) const; |
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
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changeset
|
522 |
virtual Node* Identity(PhaseGVN* phase); |
1 | 523 |
virtual bool depends_only_on_test() const { return true; } |
590
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changeset
|
524 |
|
2954744d7bba
6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
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diff
changeset
|
525 |
// Polymorphic factory method: |
27637
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parents:
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changeset
|
526 |
static Node* make(PhaseGVN& gvn, Node* ctl, Node* mem, Node* adr, const TypePtr* at, |
cf68c0af6882
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changeset
|
527 |
const TypeKlassPtr* tk = TypeKlassPtr::OBJECT); |
1 | 528 |
}; |
529 |
||
590
2954744d7bba
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changeset
|
530 |
//------------------------------LoadNKlassNode--------------------------------- |
2954744d7bba
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changeset
|
531 |
// Load a narrow Klass from an object. |
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6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
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changeset
|
532 |
class LoadNKlassNode : public LoadNNode { |
2954744d7bba
6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
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diff
changeset
|
533 |
public: |
22845
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
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diff
changeset
|
534 |
LoadNKlassNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeNarrowKlass *tk, MemOrd mo) |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
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changeset
|
535 |
: LoadNNode(c, mem, adr, at, tk, mo) {} |
590
2954744d7bba
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589
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changeset
|
536 |
virtual int Opcode() const; |
2954744d7bba
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diff
changeset
|
537 |
virtual uint ideal_reg() const { return Op_RegN; } |
13969
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
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13886
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changeset
|
538 |
virtual int store_Opcode() const { return Op_StoreNKlass; } |
d2a189b83b87
7054512: Compress class pointers after perm gen removal
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changeset
|
539 |
virtual BasicType memory_type() const { return T_NARROWKLASS; } |
590
2954744d7bba
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kvn
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changeset
|
540 |
|
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
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34189
diff
changeset
|
541 |
virtual const Type* Value(PhaseGVN* phase) const; |
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
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changeset
|
542 |
virtual Node* Identity(PhaseGVN* phase); |
590
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changeset
|
543 |
virtual bool depends_only_on_test() const { return true; } |
2954744d7bba
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changeset
|
544 |
}; |
2954744d7bba
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kvn
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changeset
|
545 |
|
2954744d7bba
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changeset
|
546 |
|
1 | 547 |
//------------------------------StoreNode-------------------------------------- |
548 |
// Store value; requires Store, Address and Value |
|
549 |
class StoreNode : public MemNode { |
|
22845
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changeset
|
550 |
private: |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
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changeset
|
551 |
// On platforms with weak memory ordering (e.g., PPC, Ia64) we distinguish |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
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diff
changeset
|
552 |
// stores that can be reordered, and such requiring release semantics to |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
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17383
diff
changeset
|
553 |
// adhere to the Java specification. The required behaviour is stored in |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
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changeset
|
554 |
// this field. |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
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changeset
|
555 |
const MemOrd _mo; |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
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changeset
|
556 |
// Needed for proper cloning. |
d8812d0ff387
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|
557 |
virtual uint size_of() const { return sizeof(*this); } |
1 | 558 |
protected: |
54327 | 559 |
virtual bool cmp( const Node &n ) const; |
1 | 560 |
virtual bool depends_only_on_test() const { return false; } |
561 |
||
562 |
Node *Ideal_masked_input (PhaseGVN *phase, uint mask); |
|
563 |
Node *Ideal_sign_extended_input(PhaseGVN *phase, int num_bits); |
|
564 |
||
565 |
public: |
|
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|
566 |
// We must ensure that stores of object references will be visible |
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|
567 |
// only after the object's initialization. So the callers of this |
d8812d0ff387
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|
568 |
// procedure must indicate that the store requires `release' |
d8812d0ff387
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diff
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|
569 |
// semantics, if the stored value is an object reference that might |
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changeset
|
570 |
// point to a new object and may become externally visible. |
d8812d0ff387
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|
571 |
StoreNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo) |
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changeset
|
572 |
: MemNode(c, mem, adr, at, val), _mo(mo) { |
1 | 573 |
init_class_id(Class_Store); |
574 |
} |
|
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|
575 |
StoreNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store, MemOrd mo) |
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changeset
|
576 |
: MemNode(c, mem, adr, at, val, oop_store), _mo(mo) { |
1 | 577 |
init_class_id(Class_Store); |
578 |
} |
|
579 |
||
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|
580 |
inline bool is_unordered() const { return !is_release(); } |
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goetz
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diff
changeset
|
581 |
inline bool is_release() const { |
d8812d0ff387
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goetz
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17383
diff
changeset
|
582 |
assert((_mo == unordered || _mo == release), "unexpected"); |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
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diff
changeset
|
583 |
return _mo == release; |
d8812d0ff387
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goetz
parents:
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diff
changeset
|
584 |
} |
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goetz
parents:
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diff
changeset
|
585 |
|
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diff
changeset
|
586 |
// Conservatively release stores of object references in order to |
d8812d0ff387
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goetz
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diff
changeset
|
587 |
// ensure visibility of object initialization. |
d8812d0ff387
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goetz
parents:
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diff
changeset
|
588 |
static inline MemOrd release_if_reference(const BasicType t) { |
29180 | 589 |
#ifdef AARCH64 |
590 |
// AArch64 doesn't need a release store here because object |
|
591 |
// initialization contains the necessary barriers. |
|
592 |
return unordered; |
|
593 |
#else |
|
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changeset
|
594 |
const MemOrd mo = (t == T_ARRAY || |
d8812d0ff387
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parents:
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diff
changeset
|
595 |
t == T_ADDRESS || // Might be the address of an object reference (`boxing'). |
d8812d0ff387
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changeset
|
596 |
t == T_OBJECT) ? release : unordered; |
d8812d0ff387
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changeset
|
597 |
return mo; |
29180 | 598 |
#endif |
22845
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changeset
|
599 |
} |
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changeset
|
600 |
|
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changeset
|
601 |
// Polymorphic factory method |
d8812d0ff387
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|
602 |
// |
d8812d0ff387
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diff
changeset
|
603 |
// We must ensure that stores of object references will be visible |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
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diff
changeset
|
604 |
// only after the object's initialization. So the callers of this |
d8812d0ff387
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goetz
parents:
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diff
changeset
|
605 |
// procedure must indicate that the store requires `release' |
d8812d0ff387
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goetz
parents:
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changeset
|
606 |
// semantics, if the stored value is an object reference that might |
d8812d0ff387
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goetz
parents:
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diff
changeset
|
607 |
// point to a new object and may become externally visible. |
d8812d0ff387
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parents:
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diff
changeset
|
608 |
static StoreNode* make(PhaseGVN& gvn, Node *c, Node *mem, Node *adr, |
d8812d0ff387
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goetz
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diff
changeset
|
609 |
const TypePtr* at, Node *val, BasicType bt, MemOrd mo); |
1 | 610 |
|
611 |
virtual uint hash() const; // Check the type |
|
612 |
||
613 |
// If the store is to Field memory and the pointer is non-null, we can |
|
614 |
// zero out the control input. |
|
615 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
|
616 |
||
617 |
// Compute a new Type for this node. Basically we just do the pre-check, |
|
618 |
// then call the virtual add() to set the type. |
|
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
parents:
34189
diff
changeset
|
619 |
virtual const Type* Value(PhaseGVN* phase) const; |
1 | 620 |
|
621 |
// Check for identity function on memory (Load then Store at same address) |
|
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
parents:
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diff
changeset
|
622 |
virtual Node* Identity(PhaseGVN* phase); |
1 | 623 |
|
624 |
// Do not match memory edge |
|
625 |
virtual uint match_edge(uint idx) const; |
|
626 |
||
627 |
virtual const Type *bottom_type() const; // returns Type::MEMORY |
|
628 |
||
629 |
// Map a store opcode to its corresponding own opcode, trivially. |
|
630 |
virtual int store_Opcode() const { return Opcode(); } |
|
631 |
||
632 |
// have all possible loads of the value stored been optimized away? |
|
633 |
bool value_never_loaded(PhaseTransform *phase) const; |
|
51482
d7029542d67a
8209420: Track membars for volatile accesses so they can be properly optimized
roland
parents:
51333
diff
changeset
|
634 |
|
d7029542d67a
8209420: Track membars for volatile accesses so they can be properly optimized
roland
parents:
51333
diff
changeset
|
635 |
MemBarNode* trailing_membar() const; |
1 | 636 |
}; |
637 |
||
638 |
//------------------------------StoreBNode------------------------------------- |
|
639 |
// Store byte to memory |
|
640 |
class StoreBNode : public StoreNode { |
|
641 |
public: |
|
22845
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diff
changeset
|
642 |
StoreBNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo) |
d8812d0ff387
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goetz
parents:
17383
diff
changeset
|
643 |
: StoreNode(c, mem, adr, at, val, mo) {} |
1 | 644 |
virtual int Opcode() const; |
645 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
|
646 |
virtual BasicType memory_type() const { return T_BYTE; } |
|
647 |
}; |
|
648 |
||
649 |
//------------------------------StoreCNode------------------------------------- |
|
650 |
// Store char/short to memory |
|
651 |
class StoreCNode : public StoreNode { |
|
652 |
public: |
|
22845
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diff
changeset
|
653 |
StoreCNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo) |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
654 |
: StoreNode(c, mem, adr, at, val, mo) {} |
1 | 655 |
virtual int Opcode() const; |
656 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
|
657 |
virtual BasicType memory_type() const { return T_CHAR; } |
|
658 |
}; |
|
659 |
||
660 |
//------------------------------StoreINode------------------------------------- |
|
661 |
// Store int to memory |
|
662 |
class StoreINode : public StoreNode { |
|
663 |
public: |
|
22845
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goetz
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diff
changeset
|
664 |
StoreINode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo) |
d8812d0ff387
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goetz
parents:
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diff
changeset
|
665 |
: StoreNode(c, mem, adr, at, val, mo) {} |
1 | 666 |
virtual int Opcode() const; |
667 |
virtual BasicType memory_type() const { return T_INT; } |
|
668 |
}; |
|
669 |
||
670 |
//------------------------------StoreLNode------------------------------------- |
|
671 |
// Store long to memory |
|
672 |
class StoreLNode : public StoreNode { |
|
673 |
virtual uint hash() const { return StoreNode::hash() + _require_atomic_access; } |
|
54327 | 674 |
virtual bool cmp( const Node &n ) const { |
1 | 675 |
return _require_atomic_access == ((StoreLNode&)n)._require_atomic_access |
676 |
&& StoreNode::cmp(n); |
|
677 |
} |
|
678 |
virtual uint size_of() const { return sizeof(*this); } |
|
679 |
const bool _require_atomic_access; // is piecewise store forbidden? |
|
680 |
||
681 |
public: |
|
22845
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goetz
parents:
17383
diff
changeset
|
682 |
StoreLNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo, bool require_atomic_access = false) |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
683 |
: StoreNode(c, mem, adr, at, val, mo), _require_atomic_access(require_atomic_access) {} |
1 | 684 |
virtual int Opcode() const; |
685 |
virtual BasicType memory_type() const { return T_LONG; } |
|
24345
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
686 |
bool require_atomic_access() const { return _require_atomic_access; } |
25930 | 687 |
static StoreLNode* make_atomic(Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, Node* val, MemOrd mo); |
1 | 688 |
#ifndef PRODUCT |
689 |
virtual void dump_spec(outputStream *st) const { |
|
690 |
StoreNode::dump_spec(st); |
|
691 |
if (_require_atomic_access) st->print(" Atomic!"); |
|
692 |
} |
|
693 |
#endif |
|
694 |
}; |
|
695 |
||
696 |
//------------------------------StoreFNode------------------------------------- |
|
697 |
// Store float to memory |
|
698 |
class StoreFNode : public StoreNode { |
|
699 |
public: |
|
22845
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goetz
parents:
17383
diff
changeset
|
700 |
StoreFNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo) |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
701 |
: StoreNode(c, mem, adr, at, val, mo) {} |
1 | 702 |
virtual int Opcode() const; |
703 |
virtual BasicType memory_type() const { return T_FLOAT; } |
|
704 |
}; |
|
705 |
||
706 |
//------------------------------StoreDNode------------------------------------- |
|
707 |
// Store double to memory |
|
708 |
class StoreDNode : public StoreNode { |
|
24345
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
709 |
virtual uint hash() const { return StoreNode::hash() + _require_atomic_access; } |
54327 | 710 |
virtual bool cmp( const Node &n ) const { |
24345
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
711 |
return _require_atomic_access == ((StoreDNode&)n)._require_atomic_access |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
712 |
&& StoreNode::cmp(n); |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
713 |
} |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
714 |
virtual uint size_of() const { return sizeof(*this); } |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
715 |
const bool _require_atomic_access; // is piecewise store forbidden? |
1 | 716 |
public: |
24345
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
717 |
StoreDNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
718 |
MemOrd mo, bool require_atomic_access = false) |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
719 |
: StoreNode(c, mem, adr, at, val, mo), _require_atomic_access(require_atomic_access) {} |
1 | 720 |
virtual int Opcode() const; |
721 |
virtual BasicType memory_type() const { return T_DOUBLE; } |
|
24345
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
722 |
bool require_atomic_access() const { return _require_atomic_access; } |
25930 | 723 |
static StoreDNode* make_atomic(Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, Node* val, MemOrd mo); |
24345
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
724 |
#ifndef PRODUCT |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
725 |
virtual void dump_spec(outputStream *st) const { |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
726 |
StoreNode::dump_spec(st); |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
727 |
if (_require_atomic_access) st->print(" Atomic!"); |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
728 |
} |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
729 |
#endif |
616bc709c0e4
8036851: volatile double accesses are not explicitly atomic in C2
anoll
parents:
23528
diff
changeset
|
730 |
|
1 | 731 |
}; |
732 |
||
733 |
//------------------------------StorePNode------------------------------------- |
|
734 |
// Store pointer to memory |
|
735 |
class StorePNode : public StoreNode { |
|
736 |
public: |
|
22845
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
737 |
StorePNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo) |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
738 |
: StoreNode(c, mem, adr, at, val, mo) {} |
1 | 739 |
virtual int Opcode() const; |
740 |
virtual BasicType memory_type() const { return T_ADDRESS; } |
|
741 |
}; |
|
742 |
||
360
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
247
diff
changeset
|
743 |
//------------------------------StoreNNode------------------------------------- |
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
247
diff
changeset
|
744 |
// Store narrow oop to memory |
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
247
diff
changeset
|
745 |
class StoreNNode : public StoreNode { |
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
247
diff
changeset
|
746 |
public: |
22845
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
747 |
StoreNNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo) |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
748 |
: StoreNode(c, mem, adr, at, val, mo) {} |
360
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
247
diff
changeset
|
749 |
virtual int Opcode() const; |
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
247
diff
changeset
|
750 |
virtual BasicType memory_type() const { return T_NARROWOOP; } |
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
247
diff
changeset
|
751 |
}; |
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
247
diff
changeset
|
752 |
|
13969
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
parents:
13886
diff
changeset
|
753 |
//------------------------------StoreNKlassNode-------------------------------------- |
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
parents:
13886
diff
changeset
|
754 |
// Store narrow klass to memory |
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
parents:
13886
diff
changeset
|
755 |
class StoreNKlassNode : public StoreNNode { |
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
parents:
13886
diff
changeset
|
756 |
public: |
22845
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
757 |
StoreNKlassNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo) |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
758 |
: StoreNNode(c, mem, adr, at, val, mo) {} |
13969
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
parents:
13886
diff
changeset
|
759 |
virtual int Opcode() const; |
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
parents:
13886
diff
changeset
|
760 |
virtual BasicType memory_type() const { return T_NARROWKLASS; } |
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
parents:
13886
diff
changeset
|
761 |
}; |
d2a189b83b87
7054512: Compress class pointers after perm gen removal
roland
parents:
13886
diff
changeset
|
762 |
|
1 | 763 |
//------------------------------StoreCMNode----------------------------------- |
764 |
// Store card-mark byte to memory for CM |
|
765 |
// The last StoreCM before a SafePoint must be preserved and occur after its "oop" store |
|
766 |
// Preceeding equivalent StoreCMs may be eliminated. |
|
767 |
class StoreCMNode : public StoreNode { |
|
3904
007a45522a7f
6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents:
2348
diff
changeset
|
768 |
private: |
4746
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
769 |
virtual uint hash() const { return StoreNode::hash() + _oop_alias_idx; } |
54327 | 770 |
virtual bool cmp( const Node &n ) const { |
4746
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
771 |
return _oop_alias_idx == ((StoreCMNode&)n)._oop_alias_idx |
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
772 |
&& StoreNode::cmp(n); |
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
773 |
} |
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
774 |
virtual uint size_of() const { return sizeof(*this); } |
3904
007a45522a7f
6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents:
2348
diff
changeset
|
775 |
int _oop_alias_idx; // The alias_idx of OopStore |
4746
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
776 |
|
1 | 777 |
public: |
4746
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
778 |
StoreCMNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store, int oop_alias_idx ) : |
22845
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
779 |
StoreNode(c, mem, adr, at, val, oop_store, MemNode::release), |
4746
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
780 |
_oop_alias_idx(oop_alias_idx) { |
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
781 |
assert(_oop_alias_idx >= Compile::AliasIdxRaw || |
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
782 |
_oop_alias_idx == Compile::AliasIdxBot && Compile::current()->AliasLevel() == 0, |
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
783 |
"bad oop alias idx"); |
c1d5f1b38289
6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents:
4470
diff
changeset
|
784 |
} |
1 | 785 |
virtual int Opcode() const; |
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
parents:
34189
diff
changeset
|
786 |
virtual Node* Identity(PhaseGVN* phase); |
3904
007a45522a7f
6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents:
2348
diff
changeset
|
787 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
parents:
34189
diff
changeset
|
788 |
virtual const Type* Value(PhaseGVN* phase) const; |
1 | 789 |
virtual BasicType memory_type() const { return T_VOID; } // unspecific |
3904
007a45522a7f
6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents:
2348
diff
changeset
|
790 |
int oop_alias_idx() const { return _oop_alias_idx; } |
1 | 791 |
}; |
792 |
||
793 |
//------------------------------LoadPLockedNode--------------------------------- |
|
794 |
// Load-locked a pointer from memory (either object or array). |
|
795 |
// On Sparc & Intel this is implemented as a normal pointer load. |
|
796 |
// On PowerPC and friends it's a real load-locked. |
|
797 |
class LoadPLockedNode : public LoadPNode { |
|
798 |
public: |
|
22845
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
799 |
LoadPLockedNode(Node *c, Node *mem, Node *adr, MemOrd mo) |
d8812d0ff387
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents:
17383
diff
changeset
|
800 |
: LoadPNode(c, mem, adr, TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM, mo) {} |
1 | 801 |
virtual int Opcode() const; |
802 |
virtual int store_Opcode() const { return Op_StorePConditional; } |
|
803 |
virtual bool depends_only_on_test() const { return true; } |
|
804 |
}; |
|
805 |
||
806 |
//------------------------------SCMemProjNode--------------------------------------- |
|
807 |
// This class defines a projection of the memory state of a store conditional node. |
|
808 |
// These nodes return a value, but also update memory. |
|
809 |
class SCMemProjNode : public ProjNode { |
|
810 |
public: |
|
811 |
enum {SCMEMPROJCON = (uint)-2}; |
|
812 |
SCMemProjNode( Node *src) : ProjNode( src, SCMEMPROJCON) { } |
|
813 |
virtual int Opcode() const; |
|
814 |
virtual bool is_CFG() const { return false; } |
|
815 |
virtual const Type *bottom_type() const {return Type::MEMORY;} |
|
27697
ae60f551e5c8
8062258: compiler/debug/TraceIterativeGVN.java segfaults in trace_PhaseIterGVN
vlivanov
parents:
27637
diff
changeset
|
816 |
virtual const TypePtr *adr_type() const { |
ae60f551e5c8
8062258: compiler/debug/TraceIterativeGVN.java segfaults in trace_PhaseIterGVN
vlivanov
parents:
27637
diff
changeset
|
817 |
Node* ctrl = in(0); |
ae60f551e5c8
8062258: compiler/debug/TraceIterativeGVN.java segfaults in trace_PhaseIterGVN
vlivanov
parents:
27637
diff
changeset
|
818 |
if (ctrl == NULL) return NULL; // node is dead |
ae60f551e5c8
8062258: compiler/debug/TraceIterativeGVN.java segfaults in trace_PhaseIterGVN
vlivanov
parents:
27637
diff
changeset
|
819 |
return ctrl->in(MemNode::Memory)->adr_type(); |
ae60f551e5c8
8062258: compiler/debug/TraceIterativeGVN.java segfaults in trace_PhaseIterGVN
vlivanov
parents:
27637
diff
changeset
|
820 |
} |
1 | 821 |
virtual uint ideal_reg() const { return 0;} // memory projections don't have a register |
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
parents:
34189
diff
changeset
|
822 |
virtual const Type* Value(PhaseGVN* phase) const; |
1 | 823 |
#ifndef PRODUCT |
824 |
virtual void dump_spec(outputStream *st) const {}; |
|
825 |
#endif |
|
826 |
}; |
|
827 |
||
828 |
//------------------------------LoadStoreNode--------------------------- |
|
961
7fb3b13d4205
6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents:
670
diff
changeset
|
829 |
// Note: is_Mem() method returns 'true' for this class. |
1 | 830 |
class LoadStoreNode : public Node { |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
831 |
private: |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
832 |
const Type* const _type; // What kind of value is loaded? |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
833 |
const TypePtr* _adr_type; // What kind of memory is being addressed? |
58516
d376d86b0a01
8230565: ZGC: Redesign C2 load barrier to expand on the MachNode level
eosterlund
parents:
58372
diff
changeset
|
834 |
uint8_t _barrier; // Bit field with barrier information |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
835 |
virtual uint size_of() const; // Size is bigger |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
836 |
public: |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
837 |
LoadStoreNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* rt, uint required ); |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
838 |
virtual bool depends_only_on_test() const { return false; } |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
839 |
virtual uint match_edge(uint idx) const { return idx == MemNode::Address || idx == MemNode::ValueIn; } |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
840 |
|
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
841 |
virtual const Type *bottom_type() const { return _type; } |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
842 |
virtual uint ideal_reg() const; |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
843 |
virtual const class TypePtr *adr_type() const { return _adr_type; } // returns bottom_type of address |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
844 |
|
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
845 |
bool result_not_used() const; |
51482
d7029542d67a
8209420: Track membars for volatile accesses so they can be properly optimized
roland
parents:
51333
diff
changeset
|
846 |
MemBarNode* trailing_membar() const; |
58516
d376d86b0a01
8230565: ZGC: Redesign C2 load barrier to expand on the MachNode level
eosterlund
parents:
58372
diff
changeset
|
847 |
|
d376d86b0a01
8230565: ZGC: Redesign C2 load barrier to expand on the MachNode level
eosterlund
parents:
58372
diff
changeset
|
848 |
uint8_t barrier_data() { return _barrier; } |
d376d86b0a01
8230565: ZGC: Redesign C2 load barrier to expand on the MachNode level
eosterlund
parents:
58372
diff
changeset
|
849 |
void set_barrier_data(uint8_t barrier_data) { _barrier = barrier_data; } |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
850 |
}; |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
851 |
|
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
852 |
class LoadStoreConditionalNode : public LoadStoreNode { |
1 | 853 |
public: |
854 |
enum { |
|
855 |
ExpectedIn = MemNode::ValueIn+1 // One more input than MemNode |
|
856 |
}; |
|
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
857 |
LoadStoreConditionalNode(Node *c, Node *mem, Node *adr, Node *val, Node *ex); |
1 | 858 |
}; |
859 |
||
860 |
//------------------------------StorePConditionalNode--------------------------- |
|
861 |
// Conditionally store pointer to memory, if no change since prior |
|
862 |
// load-locked. Sets flags for success or failure of the store. |
|
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
863 |
class StorePConditionalNode : public LoadStoreConditionalNode { |
1 | 864 |
public: |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
865 |
StorePConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreConditionalNode(c, mem, adr, val, ll) { } |
1 | 866 |
virtual int Opcode() const; |
867 |
// Produces flags |
|
868 |
virtual uint ideal_reg() const { return Op_RegFlags; } |
|
869 |
}; |
|
870 |
||
1500
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
871 |
//------------------------------StoreIConditionalNode--------------------------- |
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
872 |
// Conditionally store int to memory, if no change since prior |
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
873 |
// load-locked. Sets flags for success or failure of the store. |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
874 |
class StoreIConditionalNode : public LoadStoreConditionalNode { |
1500
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
875 |
public: |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
876 |
StoreIConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ii ) : LoadStoreConditionalNode(c, mem, adr, val, ii) { } |
1500
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
877 |
virtual int Opcode() const; |
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
878 |
// Produces flags |
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
879 |
virtual uint ideal_reg() const { return Op_RegFlags; } |
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
880 |
}; |
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
881 |
|
1 | 882 |
//------------------------------StoreLConditionalNode--------------------------- |
883 |
// Conditionally store long to memory, if no change since prior |
|
884 |
// load-locked. Sets flags for success or failure of the store. |
|
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
885 |
class StoreLConditionalNode : public LoadStoreConditionalNode { |
1 | 886 |
public: |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
12957
diff
changeset
|
887 |
StoreLConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreConditionalNode(c, mem, adr, val, ll) { } |
1 | 888 |
virtual int Opcode() const; |
1500
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
889 |
// Produces flags |
bea9a90f3e8f
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
1398
diff
changeset
|
890 |
virtual uint ideal_reg() const { return Op_RegFlags; } |
1 | 891 |
}; |
892 |
||
36316
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
893 |
class CompareAndSwapNode : public LoadStoreConditionalNode { |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
894 |
private: |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
895 |
const MemNode::MemOrd _mem_ord; |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
896 |
public: |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
897 |
CompareAndSwapNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : LoadStoreConditionalNode(c, mem, adr, val, ex), _mem_ord(mem_ord) {} |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
898 |
MemNode::MemOrd order() const { |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
899 |
return _mem_ord; |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
900 |
} |
58516
d376d86b0a01
8230565: ZGC: Redesign C2 load barrier to expand on the MachNode level
eosterlund
parents:
58372
diff
changeset
|
901 |
virtual uint size_of() const { return sizeof(*this); } |
36316
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
902 |
}; |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
903 |
|
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
904 |
class CompareAndExchangeNode : public LoadStoreNode { |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
905 |
private: |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
906 |
const MemNode::MemOrd _mem_ord; |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
907 |
public: |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
908 |
enum { |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
909 |
ExpectedIn = MemNode::ValueIn+1 // One more input than MemNode |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
910 |
}; |
7a83de7aabca
8148146: Integrate new internal Unsafe entry points, and basic intrinsic support for VarHandles
shade
parents:
35551
diff
changeset
|
911 |
CompareAndExchangeNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord, const TypePtr* at, const Type* t) : |
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912 |
LoadStoreNode(c, mem, adr, val, at, t, 5), _mem_ord(mem_ord) { |
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|
913 |
init_req(ExpectedIn, ex ); |
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|
914 |
} |
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|
915 |
|
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|
916 |
MemNode::MemOrd order() const { |
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|
917 |
return _mem_ord; |
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|
918 |
} |
58516
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|
919 |
virtual uint size_of() const { return sizeof(*this); } |
36316
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|
920 |
}; |
1 | 921 |
|
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|
922 |
//------------------------------CompareAndSwapBNode--------------------------- |
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|
923 |
class CompareAndSwapBNode : public CompareAndSwapNode { |
1 | 924 |
public: |
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|
925 |
CompareAndSwapBNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
1 | 926 |
virtual int Opcode() const; |
927 |
}; |
|
928 |
||
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|
929 |
//------------------------------CompareAndSwapSNode--------------------------- |
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|
930 |
class CompareAndSwapSNode : public CompareAndSwapNode { |
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|
931 |
public: |
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|
932 |
CompareAndSwapSNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
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|
933 |
virtual int Opcode() const; |
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|
934 |
}; |
1 | 935 |
|
936 |
//------------------------------CompareAndSwapINode--------------------------- |
|
36316
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|
937 |
class CompareAndSwapINode : public CompareAndSwapNode { |
1 | 938 |
public: |
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|
939 |
CompareAndSwapINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
1 | 940 |
virtual int Opcode() const; |
941 |
}; |
|
942 |
||
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|
943 |
//------------------------------CompareAndSwapLNode--------------------------- |
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|
944 |
class CompareAndSwapLNode : public CompareAndSwapNode { |
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|
945 |
public: |
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|
946 |
CompareAndSwapLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
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|
947 |
virtual int Opcode() const; |
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|
948 |
}; |
1 | 949 |
|
950 |
//------------------------------CompareAndSwapPNode--------------------------- |
|
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|
951 |
class CompareAndSwapPNode : public CompareAndSwapNode { |
1 | 952 |
public: |
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|
953 |
CompareAndSwapPNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
1 | 954 |
virtual int Opcode() const; |
955 |
}; |
|
956 |
||
360
21d113ecbf6a
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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|
957 |
//------------------------------CompareAndSwapNNode--------------------------- |
36316
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|
958 |
class CompareAndSwapNNode : public CompareAndSwapNode { |
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|
959 |
public: |
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|
960 |
CompareAndSwapNNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
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|
961 |
virtual int Opcode() const; |
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|
962 |
}; |
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|
963 |
|
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|
964 |
//------------------------------WeakCompareAndSwapBNode--------------------------- |
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|
965 |
class WeakCompareAndSwapBNode : public CompareAndSwapNode { |
36316
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|
966 |
public: |
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|
967 |
WeakCompareAndSwapBNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
36316
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|
968 |
virtual int Opcode() const; |
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|
969 |
}; |
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|
970 |
|
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|
971 |
//------------------------------WeakCompareAndSwapSNode--------------------------- |
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|
972 |
class WeakCompareAndSwapSNode : public CompareAndSwapNode { |
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|
973 |
public: |
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|
974 |
WeakCompareAndSwapSNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
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|
975 |
virtual int Opcode() const; |
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|
976 |
}; |
36316
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|
977 |
|
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|
978 |
//------------------------------WeakCompareAndSwapINode--------------------------- |
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|
979 |
class WeakCompareAndSwapINode : public CompareAndSwapNode { |
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|
980 |
public: |
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|
981 |
WeakCompareAndSwapINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
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|
982 |
virtual int Opcode() const; |
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|
983 |
}; |
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|
984 |
|
39419
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|
985 |
//------------------------------WeakCompareAndSwapLNode--------------------------- |
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|
986 |
class WeakCompareAndSwapLNode : public CompareAndSwapNode { |
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|
987 |
public: |
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|
988 |
WeakCompareAndSwapLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
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|
989 |
virtual int Opcode() const; |
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|
990 |
}; |
36316
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|
991 |
|
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|
992 |
//------------------------------WeakCompareAndSwapPNode--------------------------- |
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|
993 |
class WeakCompareAndSwapPNode : public CompareAndSwapNode { |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
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|
994 |
public: |
36316
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|
995 |
WeakCompareAndSwapPNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
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|
996 |
virtual int Opcode() const; |
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|
997 |
}; |
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|
998 |
|
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|
999 |
//------------------------------WeakCompareAndSwapNNode--------------------------- |
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|
1000 |
class WeakCompareAndSwapNNode : public CompareAndSwapNode { |
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|
1001 |
public: |
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|
1002 |
WeakCompareAndSwapNNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : CompareAndSwapNode(c, mem, adr, val, ex, mem_ord) { } |
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|
1003 |
virtual int Opcode() const; |
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|
1004 |
}; |
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|
1005 |
|
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|
1006 |
//------------------------------CompareAndExchangeBNode--------------------------- |
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|
1007 |
class CompareAndExchangeBNode : public CompareAndExchangeNode { |
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|
1008 |
public: |
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|
1009 |
CompareAndExchangeBNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, const TypePtr* at, MemNode::MemOrd mem_ord) : CompareAndExchangeNode(c, mem, adr, val, ex, mem_ord, at, TypeInt::BYTE) { } |
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|
1010 |
virtual int Opcode() const; |
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|
1011 |
}; |
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|
1012 |
|
cc993a4ab581
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|
1013 |
|
cc993a4ab581
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|
1014 |
//------------------------------CompareAndExchangeSNode--------------------------- |
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|
1015 |
class CompareAndExchangeSNode : public CompareAndExchangeNode { |
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|
1016 |
public: |
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|
1017 |
CompareAndExchangeSNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, const TypePtr* at, MemNode::MemOrd mem_ord) : CompareAndExchangeNode(c, mem, adr, val, ex, mem_ord, at, TypeInt::SHORT) { } |
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|
1018 |
virtual int Opcode() const; |
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|
1019 |
}; |
cc993a4ab581
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changeset
|
1020 |
|
36316
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|
1021 |
//------------------------------CompareAndExchangeLNode--------------------------- |
7a83de7aabca
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changeset
|
1022 |
class CompareAndExchangeLNode : public CompareAndExchangeNode { |
7a83de7aabca
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changeset
|
1023 |
public: |
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|
1024 |
CompareAndExchangeLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, const TypePtr* at, MemNode::MemOrd mem_ord) : CompareAndExchangeNode(c, mem, adr, val, ex, mem_ord, at, TypeLong::LONG) { } |
7a83de7aabca
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|
1025 |
virtual int Opcode() const; |
7a83de7aabca
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changeset
|
1026 |
}; |
7a83de7aabca
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changeset
|
1027 |
|
7a83de7aabca
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changeset
|
1028 |
|
7a83de7aabca
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changeset
|
1029 |
//------------------------------CompareAndExchangeINode--------------------------- |
7a83de7aabca
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changeset
|
1030 |
class CompareAndExchangeINode : public CompareAndExchangeNode { |
7a83de7aabca
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changeset
|
1031 |
public: |
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changeset
|
1032 |
CompareAndExchangeINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, const TypePtr* at, MemNode::MemOrd mem_ord) : CompareAndExchangeNode(c, mem, adr, val, ex, mem_ord, at, TypeInt::INT) { } |
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|
1033 |
virtual int Opcode() const; |
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|
1034 |
}; |
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changeset
|
1035 |
|
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changeset
|
1036 |
|
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|
1037 |
//------------------------------CompareAndExchangePNode--------------------------- |
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|
1038 |
class CompareAndExchangePNode : public CompareAndExchangeNode { |
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|
1039 |
public: |
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|
1040 |
CompareAndExchangePNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, const TypePtr* at, const Type* t, MemNode::MemOrd mem_ord) : CompareAndExchangeNode(c, mem, adr, val, ex, mem_ord, at, t) { } |
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|
1041 |
virtual int Opcode() const; |
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|
1042 |
}; |
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|
1043 |
|
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|
1044 |
//------------------------------CompareAndExchangeNNode--------------------------- |
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|
1045 |
class CompareAndExchangeNNode : public CompareAndExchangeNode { |
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|
1046 |
public: |
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|
1047 |
CompareAndExchangeNNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, const TypePtr* at, const Type* t, MemNode::MemOrd mem_ord) : CompareAndExchangeNode(c, mem, adr, val, ex, mem_ord, at, t) { } |
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|
1048 |
virtual int Opcode() const; |
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|
1049 |
}; |
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|
1050 |
|
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|
1051 |
//------------------------------GetAndAddBNode--------------------------- |
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|
1052 |
class GetAndAddBNode : public LoadStoreNode { |
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|
1053 |
public: |
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|
1054 |
GetAndAddBNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::BYTE, 4) { } |
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|
1055 |
virtual int Opcode() const; |
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|
1056 |
}; |
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|
1057 |
|
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|
1058 |
//------------------------------GetAndAddSNode--------------------------- |
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|
1059 |
class GetAndAddSNode : public LoadStoreNode { |
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|
1060 |
public: |
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|
1061 |
GetAndAddSNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::SHORT, 4) { } |
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|
1062 |
virtual int Opcode() const; |
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|
1063 |
}; |
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changeset
|
1064 |
|
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|
1065 |
//------------------------------GetAndAddINode--------------------------- |
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|
1066 |
class GetAndAddINode : public LoadStoreNode { |
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|
1067 |
public: |
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|
1068 |
GetAndAddINode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::INT, 4) { } |
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|
1069 |
virtual int Opcode() const; |
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changeset
|
1070 |
}; |
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changeset
|
1071 |
|
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|
1072 |
//------------------------------GetAndAddLNode--------------------------- |
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|
1073 |
class GetAndAddLNode : public LoadStoreNode { |
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|
1074 |
public: |
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|
1075 |
GetAndAddLNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeLong::LONG, 4) { } |
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|
1076 |
virtual int Opcode() const; |
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|
1077 |
}; |
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changeset
|
1078 |
|
39419
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|
1079 |
//------------------------------GetAndSetBNode--------------------------- |
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|
1080 |
class GetAndSetBNode : public LoadStoreNode { |
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|
1081 |
public: |
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changeset
|
1082 |
GetAndSetBNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::BYTE, 4) { } |
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|
1083 |
virtual int Opcode() const; |
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|
1084 |
}; |
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changeset
|
1085 |
|
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|
1086 |
//------------------------------GetAndSetSNode--------------------------- |
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|
1087 |
class GetAndSetSNode : public LoadStoreNode { |
cc993a4ab581
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|
1088 |
public: |
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changeset
|
1089 |
GetAndSetSNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::SHORT, 4) { } |
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|
1090 |
virtual int Opcode() const; |
cc993a4ab581
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changeset
|
1091 |
}; |
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changeset
|
1092 |
|
8d82c4dfa722
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changeset
|
1093 |
//------------------------------GetAndSetINode--------------------------- |
8d82c4dfa722
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changeset
|
1094 |
class GetAndSetINode : public LoadStoreNode { |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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changeset
|
1095 |
public: |
8d82c4dfa722
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diff
changeset
|
1096 |
GetAndSetINode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::INT, 4) { } |
8d82c4dfa722
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changeset
|
1097 |
virtual int Opcode() const; |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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diff
changeset
|
1098 |
}; |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
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diff
changeset
|
1099 |
|
39419
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|
1100 |
//------------------------------GetAndSetLNode--------------------------- |
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|
1101 |
class GetAndSetLNode : public LoadStoreNode { |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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diff
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|
1102 |
public: |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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diff
changeset
|
1103 |
GetAndSetLNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeLong::LONG, 4) { } |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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|
1104 |
virtual int Opcode() const; |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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changeset
|
1105 |
}; |
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7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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diff
changeset
|
1106 |
|
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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changeset
|
1107 |
//------------------------------GetAndSetPNode--------------------------- |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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changeset
|
1108 |
class GetAndSetPNode : public LoadStoreNode { |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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diff
changeset
|
1109 |
public: |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
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diff
changeset
|
1110 |
GetAndSetPNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* t ) : LoadStoreNode(c, mem, adr, val, at, t, 4) { } |
8d82c4dfa722
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|
1111 |
virtual int Opcode() const; |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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diff
changeset
|
1112 |
}; |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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diff
changeset
|
1113 |
|
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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changeset
|
1114 |
//------------------------------GetAndSetNNode--------------------------- |
8d82c4dfa722
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changeset
|
1115 |
class GetAndSetNNode : public LoadStoreNode { |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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changeset
|
1116 |
public: |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
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diff
changeset
|
1117 |
GetAndSetNNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* t ) : LoadStoreNode(c, mem, adr, val, at, t, 4) { } |
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|
1118 |
virtual int Opcode() const; |
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|
1119 |
}; |
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|
1120 |
|
1 | 1121 |
//------------------------------ClearArray------------------------------------- |
1122 |
class ClearArrayNode: public Node { |
|
36554
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8146801: Allocating short arrays of non-constant size is slow
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changeset
|
1123 |
private: |
a7eb9ee4680c
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changeset
|
1124 |
bool _is_large; |
1 | 1125 |
public: |
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|
1126 |
ClearArrayNode( Node *ctrl, Node *arymem, Node *word_cnt, Node *base, bool is_large) |
a7eb9ee4680c
8146801: Allocating short arrays of non-constant size is slow
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|
1127 |
: Node(ctrl,arymem,word_cnt,base), _is_large(is_large) { |
4470
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|
1128 |
init_class_id(Class_ClearArray); |
1e6edcab3109
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|
1129 |
} |
1 | 1130 |
virtual int Opcode() const; |
1131 |
virtual const Type *bottom_type() const { return Type::MEMORY; } |
|
1132 |
// ClearArray modifies array elements, and so affects only the |
|
1133 |
// array memory addressed by the bottom_type of its base address. |
|
1134 |
virtual const class TypePtr *adr_type() const; |
|
35551
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8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
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34189
diff
changeset
|
1135 |
virtual Node* Identity(PhaseGVN* phase); |
1 | 1136 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
1137 |
virtual uint match_edge(uint idx) const; |
|
36554
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changeset
|
1138 |
bool is_large() const { return _is_large; } |
1 | 1139 |
|
1140 |
// Clear the given area of an object or array. |
|
1141 |
// The start offset must always be aligned mod BytesPerInt. |
|
1142 |
// The end offset must always be aligned mod BytesPerLong. |
|
1143 |
// Return the new memory. |
|
1144 |
static Node* clear_memory(Node* control, Node* mem, Node* dest, |
|
1145 |
intptr_t start_offset, |
|
1146 |
intptr_t end_offset, |
|
1147 |
PhaseGVN* phase); |
|
1148 |
static Node* clear_memory(Node* control, Node* mem, Node* dest, |
|
1149 |
intptr_t start_offset, |
|
1150 |
Node* end_offset, |
|
1151 |
PhaseGVN* phase); |
|
1152 |
static Node* clear_memory(Node* control, Node* mem, Node* dest, |
|
1153 |
Node* start_offset, |
|
1154 |
Node* end_offset, |
|
1155 |
PhaseGVN* phase); |
|
4470
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|
1156 |
// Return allocation input memory edge if it is different instance |
1e6edcab3109
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changeset
|
1157 |
// or itself if it is the one we are looking for. |
1e6edcab3109
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changeset
|
1158 |
static bool step_through(Node** np, uint instance_id, PhaseTransform* phase); |
1 | 1159 |
}; |
1160 |
||
1161 |
//------------------------------MemBar----------------------------------------- |
|
1162 |
// There are different flavors of Memory Barriers to match the Java Memory |
|
1163 |
// Model. Monitor-enter and volatile-load act as Aquires: no following ref |
|
1164 |
// can be moved to before them. We insert a MemBar-Acquire after a FastLock or |
|
1165 |
// volatile-load. Monitor-exit and volatile-store act as Release: no |
|
2131 | 1166 |
// preceding ref can be moved to after them. We insert a MemBar-Release |
1 | 1167 |
// before a FastUnlock or volatile-store. All volatiles need to be |
1168 |
// serialized, so we follow all volatile-stores with a MemBar-Volatile to |
|
2131 | 1169 |
// separate it from any following volatile-load. |
1 | 1170 |
class MemBarNode: public MultiNode { |
1171 |
virtual uint hash() const ; // { return NO_HASH; } |
|
54327 | 1172 |
virtual bool cmp( const Node &n ) const ; // Always fail, except on self |
1 | 1173 |
|
1174 |
virtual uint size_of() const { return sizeof(*this); } |
|
1175 |
// Memory type this node is serializing. Usually either rawptr or bottom. |
|
1176 |
const TypePtr* _adr_type; |
|
1177 |
||
51482
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|
1178 |
// How is this membar related to a nearby memory access? |
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|
1179 |
enum { |
d7029542d67a
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changeset
|
1180 |
Standalone, |
d7029542d67a
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diff
changeset
|
1181 |
TrailingLoad, |
d7029542d67a
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diff
changeset
|
1182 |
TrailingStore, |
d7029542d67a
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diff
changeset
|
1183 |
LeadingStore, |
d7029542d67a
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diff
changeset
|
1184 |
TrailingLoadStore, |
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changeset
|
1185 |
LeadingLoadStore |
d7029542d67a
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diff
changeset
|
1186 |
} _kind; |
d7029542d67a
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changeset
|
1187 |
|
d7029542d67a
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diff
changeset
|
1188 |
#ifdef ASSERT |
d7029542d67a
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parents:
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diff
changeset
|
1189 |
uint _pair_idx; |
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|
1190 |
#endif |
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|
1191 |
|
1 | 1192 |
public: |
1193 |
enum { |
|
1194 |
Precedent = TypeFunc::Parms // optional edge to force precedence |
|
1195 |
}; |
|
1196 |
MemBarNode(Compile* C, int alias_idx, Node* precedent); |
|
1197 |
virtual int Opcode() const = 0; |
|
1198 |
virtual const class TypePtr *adr_type() const { return _adr_type; } |
|
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
parents:
34189
diff
changeset
|
1199 |
virtual const Type* Value(PhaseGVN* phase) const; |
1 | 1200 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
1201 |
virtual uint match_edge(uint idx) const { return 0; } |
|
1202 |
virtual const Type *bottom_type() const { return TypeTuple::MEMBAR; } |
|
1203 |
virtual Node *match( const ProjNode *proj, const Matcher *m ); |
|
1204 |
// Factory method. Builds a wide or narrow membar. |
|
1205 |
// Optional 'precedent' becomes an extra edge if not null. |
|
1206 |
static MemBarNode* make(Compile* C, int opcode, |
|
1207 |
int alias_idx = Compile::AliasIdxBot, |
|
1208 |
Node* precedent = NULL); |
|
51482
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changeset
|
1209 |
|
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changeset
|
1210 |
MemBarNode* trailing_membar() const; |
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changeset
|
1211 |
MemBarNode* leading_membar() const; |
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changeset
|
1212 |
|
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changeset
|
1213 |
void set_trailing_load() { _kind = TrailingLoad; } |
d7029542d67a
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changeset
|
1214 |
bool trailing_load() const { return _kind == TrailingLoad; } |
d7029542d67a
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changeset
|
1215 |
bool trailing_store() const { return _kind == TrailingStore; } |
d7029542d67a
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changeset
|
1216 |
bool leading_store() const { return _kind == LeadingStore; } |
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changeset
|
1217 |
bool trailing_load_store() const { return _kind == TrailingLoadStore; } |
d7029542d67a
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changeset
|
1218 |
bool leading_load_store() const { return _kind == LeadingLoadStore; } |
d7029542d67a
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changeset
|
1219 |
bool trailing() const { return _kind == TrailingLoad || _kind == TrailingStore || _kind == TrailingLoadStore; } |
d7029542d67a
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changeset
|
1220 |
bool leading() const { return _kind == LeadingStore || _kind == LeadingLoadStore; } |
d7029542d67a
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changeset
|
1221 |
bool standalone() const { return _kind == Standalone; } |
d7029542d67a
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changeset
|
1222 |
|
d7029542d67a
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changeset
|
1223 |
static void set_store_pair(MemBarNode* leading, MemBarNode* trailing); |
d7029542d67a
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changeset
|
1224 |
static void set_load_store_pair(MemBarNode* leading, MemBarNode* trailing); |
d7029542d67a
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changeset
|
1225 |
|
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changeset
|
1226 |
void remove(PhaseIterGVN *igvn); |
1 | 1227 |
}; |
1228 |
||
1229 |
// "Acquire" - no following ref can move before (but earlier refs can |
|
1230 |
// follow, like an early Load stalled in cache). Requires multi-cpu |
|
10262
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changeset
|
1231 |
// visibility. Inserted after a volatile load. |
1 | 1232 |
class MemBarAcquireNode: public MemBarNode { |
1233 |
public: |
|
1234 |
MemBarAcquireNode(Compile* C, int alias_idx, Node* precedent) |
|
1235 |
: MemBarNode(C, alias_idx, precedent) {} |
|
1236 |
virtual int Opcode() const; |
|
1237 |
}; |
|
1238 |
||
22855
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1239 |
// "Acquire" - no following ref can move before (but earlier refs can |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1240 |
// follow, like an early Load stalled in cache). Requires multi-cpu |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
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diff
changeset
|
1241 |
// visibility. Inserted independ of any load, as required |
33606 | 1242 |
// for intrinsic Unsafe.loadFence(). |
22855
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
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diff
changeset
|
1243 |
class LoadFenceNode: public MemBarNode { |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
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diff
changeset
|
1244 |
public: |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1245 |
LoadFenceNode(Compile* C, int alias_idx, Node* precedent) |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
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diff
changeset
|
1246 |
: MemBarNode(C, alias_idx, precedent) {} |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1247 |
virtual int Opcode() const; |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
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diff
changeset
|
1248 |
}; |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1249 |
|
1 | 1250 |
// "Release" - no earlier ref can move after (but later refs can move |
1251 |
// up, like a speculative pipelined cache-hitting Load). Requires |
|
10262
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1252 |
// multi-cpu visibility. Inserted before a volatile store. |
1 | 1253 |
class MemBarReleaseNode: public MemBarNode { |
1254 |
public: |
|
1255 |
MemBarReleaseNode(Compile* C, int alias_idx, Node* precedent) |
|
1256 |
: MemBarNode(C, alias_idx, precedent) {} |
|
1257 |
virtual int Opcode() const; |
|
1258 |
}; |
|
1259 |
||
22855
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1260 |
// "Release" - no earlier ref can move after (but later refs can move |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1261 |
// up, like a speculative pipelined cache-hitting Load). Requires |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1262 |
// multi-cpu visibility. Inserted independent of any store, as required |
33606 | 1263 |
// for intrinsic Unsafe.storeFence(). |
22855
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1264 |
class StoreFenceNode: public MemBarNode { |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1265 |
public: |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1266 |
StoreFenceNode(Compile* C, int alias_idx, Node* precedent) |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1267 |
: MemBarNode(C, alias_idx, precedent) {} |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1268 |
virtual int Opcode() const; |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1269 |
}; |
d637fd28a6c3
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
22851
diff
changeset
|
1270 |
|
10262
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1271 |
// "Acquire" - no following ref can move before (but earlier refs can |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1272 |
// follow, like an early Load stalled in cache). Requires multi-cpu |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1273 |
// visibility. Inserted after a FastLock. |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1274 |
class MemBarAcquireLockNode: public MemBarNode { |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1275 |
public: |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1276 |
MemBarAcquireLockNode(Compile* C, int alias_idx, Node* precedent) |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1277 |
: MemBarNode(C, alias_idx, precedent) {} |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1278 |
virtual int Opcode() const; |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1279 |
}; |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1280 |
|
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1281 |
// "Release" - no earlier ref can move after (but later refs can move |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1282 |
// up, like a speculative pipelined cache-hitting Load). Requires |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1283 |
// multi-cpu visibility. Inserted before a FastUnLock. |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1284 |
class MemBarReleaseLockNode: public MemBarNode { |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1285 |
public: |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1286 |
MemBarReleaseLockNode(Compile* C, int alias_idx, Node* precedent) |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1287 |
: MemBarNode(C, alias_idx, precedent) {} |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1288 |
virtual int Opcode() const; |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1289 |
}; |
c5f62d314bee
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents:
8921
diff
changeset
|
1290 |
|
11431
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1291 |
class MemBarStoreStoreNode: public MemBarNode { |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1292 |
public: |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1293 |
MemBarStoreStoreNode(Compile* C, int alias_idx, Node* precedent) |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1294 |
: MemBarNode(C, alias_idx, precedent) { |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1295 |
init_class_id(Class_MemBarStoreStore); |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1296 |
} |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1297 |
virtual int Opcode() const; |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1298 |
}; |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1299 |
|
1 | 1300 |
// Ordering between a volatile store and a following volatile load. |
1301 |
// Requires multi-CPU visibility? |
|
1302 |
class MemBarVolatileNode: public MemBarNode { |
|
1303 |
public: |
|
1304 |
MemBarVolatileNode(Compile* C, int alias_idx, Node* precedent) |
|
1305 |
: MemBarNode(C, alias_idx, precedent) {} |
|
1306 |
virtual int Opcode() const; |
|
1307 |
}; |
|
1308 |
||
1309 |
// Ordering within the same CPU. Used to order unsafe memory references |
|
1310 |
// inside the compiler when we lack alias info. Not needed "outside" the |
|
1311 |
// compiler because the CPU does all the ordering for us. |
|
1312 |
class MemBarCPUOrderNode: public MemBarNode { |
|
1313 |
public: |
|
1314 |
MemBarCPUOrderNode(Compile* C, int alias_idx, Node* precedent) |
|
1315 |
: MemBarNode(C, alias_idx, precedent) {} |
|
1316 |
virtual int Opcode() const; |
|
1317 |
virtual uint ideal_reg() const { return 0; } // not matched in the AD file |
|
1318 |
}; |
|
1319 |
||
38017
55047d16f141
8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents:
36831
diff
changeset
|
1320 |
class OnSpinWaitNode: public MemBarNode { |
55047d16f141
8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents:
36831
diff
changeset
|
1321 |
public: |
55047d16f141
8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents:
36831
diff
changeset
|
1322 |
OnSpinWaitNode(Compile* C, int alias_idx, Node* precedent) |
55047d16f141
8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents:
36831
diff
changeset
|
1323 |
: MemBarNode(C, alias_idx, precedent) {} |
55047d16f141
8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents:
36831
diff
changeset
|
1324 |
virtual int Opcode() const; |
55047d16f141
8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents:
36831
diff
changeset
|
1325 |
}; |
55047d16f141
8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents:
36831
diff
changeset
|
1326 |
|
1 | 1327 |
// Isolation of object setup after an AllocateNode and before next safepoint. |
1328 |
// (See comment in memnode.cpp near InitializeNode::InitializeNode for semantics.) |
|
1329 |
class InitializeNode: public MemBarNode { |
|
1330 |
friend class AllocateNode; |
|
1331 |
||
10566
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1332 |
enum { |
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1333 |
Incomplete = 0, |
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1334 |
Complete = 1, |
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1335 |
WithArraycopy = 2 |
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1336 |
}; |
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1337 |
int _is_complete; |
1 | 1338 |
|
11431
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1339 |
bool _does_not_escape; |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1340 |
|
1 | 1341 |
public: |
1342 |
enum { |
|
1343 |
Control = TypeFunc::Control, |
|
1344 |
Memory = TypeFunc::Memory, // MergeMem for states affected by this op |
|
1345 |
RawAddress = TypeFunc::Parms+0, // the newly-allocated raw address |
|
1346 |
RawStores = TypeFunc::Parms+1 // zero or more stores (or TOP) |
|
1347 |
}; |
|
1348 |
||
1349 |
InitializeNode(Compile* C, int adr_type, Node* rawoop); |
|
1350 |
virtual int Opcode() const; |
|
1351 |
virtual uint size_of() const { return sizeof(*this); } |
|
1352 |
virtual uint ideal_reg() const { return 0; } // not matched in the AD file |
|
1353 |
virtual const RegMask &in_RegMask(uint) const; // mask for RawAddress |
|
1354 |
||
1355 |
// Manage incoming memory edges via a MergeMem on in(Memory): |
|
1356 |
Node* memory(uint alias_idx); |
|
1357 |
||
1358 |
// The raw memory edge coming directly from the Allocation. |
|
1359 |
// The contents of this memory are *always* all-zero-bits. |
|
1360 |
Node* zero_memory() { return memory(Compile::AliasIdxRaw); } |
|
1361 |
||
1362 |
// Return the corresponding allocation for this initialization (or null if none). |
|
1363 |
// (Note: Both InitializeNode::allocation and AllocateNode::initialization |
|
1364 |
// are defined in graphKit.cpp, which sets up the bidirectional relation.) |
|
1365 |
AllocateNode* allocation(); |
|
1366 |
||
1367 |
// Anything other than zeroing in this init? |
|
1368 |
bool is_non_zero(); |
|
1369 |
||
1370 |
// An InitializeNode must completed before macro expansion is done. |
|
1371 |
// Completion requires that the AllocateNode must be followed by |
|
1372 |
// initialization of the new memory to zero, then to any initializers. |
|
10566
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1373 |
bool is_complete() { return _is_complete != Incomplete; } |
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1374 |
bool is_complete_with_arraycopy() { return (_is_complete & WithArraycopy) != 0; } |
1 | 1375 |
|
1376 |
// Mark complete. (Must not yet be complete.) |
|
1377 |
void set_complete(PhaseGVN* phase); |
|
10566
630c177ec580
7081933: Use zeroing elimination optimization for large array
kvn
parents:
10267
diff
changeset
|
1378 |
void set_complete_with_arraycopy() { _is_complete = Complete | WithArraycopy; } |
1 | 1379 |
|
11431
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1380 |
bool does_not_escape() { return _does_not_escape; } |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1381 |
void set_does_not_escape() { _does_not_escape = true; } |
5ca3a19e559a
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents:
11191
diff
changeset
|
1382 |
|
1 | 1383 |
#ifdef ASSERT |
1384 |
// ensure all non-degenerate stores are ordered and non-overlapping |
|
1385 |
bool stores_are_sane(PhaseTransform* phase); |
|
1386 |
#endif //ASSERT |
|
1387 |
||
1388 |
// See if this store can be captured; return offset where it initializes. |
|
1389 |
// Return 0 if the store cannot be moved (any sort of problem). |
|
15813
6efd4c793e47
8007294: ReduceFieldZeroing doesn't check for dependent load and can lead to incorrect execution
roland
parents:
15242
diff
changeset
|
1390 |
intptr_t can_capture_store(StoreNode* st, PhaseTransform* phase, bool can_reshape); |
1 | 1391 |
|
1392 |
// Capture another store; reformat it to write my internal raw memory. |
|
1393 |
// Return the captured copy, else NULL if there is some sort of problem. |
|
15813
6efd4c793e47
8007294: ReduceFieldZeroing doesn't check for dependent load and can lead to incorrect execution
roland
parents:
15242
diff
changeset
|
1394 |
Node* capture_store(StoreNode* st, intptr_t start, PhaseTransform* phase, bool can_reshape); |
1 | 1395 |
|
1396 |
// Find captured store which corresponds to the range [start..start+size). |
|
1397 |
// Return my own memory projection (meaning the initial zero bits) |
|
1398 |
// if there is no such store. Return NULL if there is a problem. |
|
1399 |
Node* find_captured_store(intptr_t start, int size_in_bytes, PhaseTransform* phase); |
|
1400 |
||
1401 |
// Called when the associated AllocateNode is expanded into CFG. |
|
1402 |
Node* complete_stores(Node* rawctl, Node* rawmem, Node* rawptr, |
|
1403 |
intptr_t header_size, Node* size_in_bytes, |
|
1404 |
PhaseGVN* phase); |
|
1405 |
||
1406 |
private: |
|
1407 |
void remove_extra_zeroes(); |
|
1408 |
||
1409 |
// Find out where a captured store should be placed (or already is placed). |
|
1410 |
int captured_store_insertion_point(intptr_t start, int size_in_bytes, |
|
1411 |
PhaseTransform* phase); |
|
1412 |
||
1413 |
static intptr_t get_store_offset(Node* st, PhaseTransform* phase); |
|
1414 |
||
1415 |
Node* make_raw_address(intptr_t offset, PhaseTransform* phase); |
|
1416 |
||
17383 | 1417 |
bool detect_init_independence(Node* n, int& count); |
1 | 1418 |
|
1419 |
void coalesce_subword_stores(intptr_t header_size, Node* size_in_bytes, |
|
1420 |
PhaseGVN* phase); |
|
1421 |
||
1422 |
intptr_t find_next_fullword_store(uint i, PhaseGVN* phase); |
|
1423 |
}; |
|
1424 |
||
1425 |
//------------------------------MergeMem--------------------------------------- |
|
1426 |
// (See comment in memnode.cpp near MergeMemNode::MergeMemNode for semantics.) |
|
1427 |
class MergeMemNode: public Node { |
|
1428 |
virtual uint hash() const ; // { return NO_HASH; } |
|
54327 | 1429 |
virtual bool cmp( const Node &n ) const ; // Always fail, except on self |
1 | 1430 |
friend class MergeMemStream; |
1431 |
MergeMemNode(Node* def); // clients use MergeMemNode::make |
|
1432 |
||
1433 |
public: |
|
1434 |
// If the input is a whole memory state, clone it with all its slices intact. |
|
1435 |
// Otherwise, make a new memory state with just that base memory input. |
|
1436 |
// In either case, the result is a newly created MergeMem. |
|
25930 | 1437 |
static MergeMemNode* make(Node* base_memory); |
1 | 1438 |
|
1439 |
virtual int Opcode() const; |
|
35551
36ef3841fb34
8146629: Make phase->is_IterGVN() accessible from Node::Identity and Node::Value
thartmann
parents:
34189
diff
changeset
|
1440 |
virtual Node* Identity(PhaseGVN* phase); |
1 | 1441 |
virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
1442 |
virtual uint ideal_reg() const { return NotAMachineReg; } |
|
1443 |
virtual uint match_edge(uint idx) const { return 0; } |
|
1444 |
virtual const RegMask &out_RegMask() const; |
|
1445 |
virtual const Type *bottom_type() const { return Type::MEMORY; } |
|
1446 |
virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; } |
|
1447 |
// sparse accessors |
|
1448 |
// Fetch the previously stored "set_memory_at", or else the base memory. |
|
1449 |
// (Caller should clone it if it is a phi-nest.) |
|
1450 |
Node* memory_at(uint alias_idx) const; |
|
1451 |
// set the memory, regardless of its previous value |
|
1452 |
void set_memory_at(uint alias_idx, Node* n); |
|
1453 |
// the "base" is the memory that provides the non-finite support |
|
1454 |
Node* base_memory() const { return in(Compile::AliasIdxBot); } |
|
1455 |
// warning: setting the base can implicitly set any of the other slices too |
|
1456 |
void set_base_memory(Node* def); |
|
1457 |
// sentinel value which denotes a copy of the base memory: |
|
1458 |
Node* empty_memory() const { return in(Compile::AliasIdxTop); } |
|
1459 |
static Node* make_empty_memory(); // where the sentinel comes from |
|
1460 |
bool is_empty_memory(Node* n) const { assert((n == empty_memory()) == n->is_top(), "sanity"); return n->is_top(); } |
|
1461 |
// hook for the iterator, to perform any necessary setup |
|
1462 |
void iteration_setup(const MergeMemNode* other = NULL); |
|
1463 |
// push sentinels until I am at least as long as the other (semantic no-op) |
|
1464 |
void grow_to_match(const MergeMemNode* other); |
|
1465 |
bool verify_sparse() const PRODUCT_RETURN0; |
|
1466 |
#ifndef PRODUCT |
|
1467 |
virtual void dump_spec(outputStream *st) const; |
|
1468 |
#endif |
|
1469 |
}; |
|
1470 |
||
1471 |
class MergeMemStream : public StackObj { |
|
1472 |
private: |
|
1473 |
MergeMemNode* _mm; |
|
1474 |
const MergeMemNode* _mm2; // optional second guy, contributes non-empty iterations |
|
1475 |
Node* _mm_base; // loop-invariant base memory of _mm |
|
1476 |
int _idx; |
|
1477 |
int _cnt; |
|
1478 |
Node* _mem; |
|
1479 |
Node* _mem2; |
|
1480 |
int _cnt2; |
|
1481 |
||
1482 |
void init(MergeMemNode* mm, const MergeMemNode* mm2 = NULL) { |
|
1483 |
// subsume_node will break sparseness at times, whenever a memory slice |
|
1484 |
// folds down to a copy of the base ("fat") memory. In such a case, |
|
1485 |
// the raw edge will update to base, although it should be top. |
|
1486 |
// This iterator will recognize either top or base_memory as an |
|
1487 |
// "empty" slice. See is_empty, is_empty2, and next below. |
|
1488 |
// |
|
1489 |
// The sparseness property is repaired in MergeMemNode::Ideal. |
|
1490 |
// As long as access to a MergeMem goes through this iterator |
|
1491 |
// or the memory_at accessor, flaws in the sparseness will |
|
1492 |
// never be observed. |
|
1493 |
// |
|
1494 |
// Also, iteration_setup repairs sparseness. |
|
1495 |
assert(mm->verify_sparse(), "please, no dups of base"); |
|
1496 |
assert(mm2==NULL || mm2->verify_sparse(), "please, no dups of base"); |
|
1497 |
||
1498 |
_mm = mm; |
|
1499 |
_mm_base = mm->base_memory(); |
|
1500 |
_mm2 = mm2; |
|
1501 |
_cnt = mm->req(); |
|
1502 |
_idx = Compile::AliasIdxBot-1; // start at the base memory |
|
1503 |
_mem = NULL; |
|
1504 |
_mem2 = NULL; |
|
1505 |
} |
|
1506 |
||
1507 |
#ifdef ASSERT |
|
1508 |
Node* check_memory() const { |
|
1509 |
if (at_base_memory()) |
|
1510 |
return _mm->base_memory(); |
|
1511 |
else if ((uint)_idx < _mm->req() && !_mm->in(_idx)->is_top()) |
|
1512 |
return _mm->memory_at(_idx); |
|
1513 |
else |
|
1514 |
return _mm_base; |
|
1515 |
} |
|
1516 |
Node* check_memory2() const { |
|
1517 |
return at_base_memory()? _mm2->base_memory(): _mm2->memory_at(_idx); |
|
1518 |
} |
|
1519 |
#endif |
|
1520 |
||
1521 |
static bool match_memory(Node* mem, const MergeMemNode* mm, int idx) PRODUCT_RETURN0; |
|
1522 |
void assert_synch() const { |
|
1523 |
assert(!_mem || _idx >= _cnt || match_memory(_mem, _mm, _idx), |
|
1524 |
"no side-effects except through the stream"); |
|
1525 |
} |
|
1526 |
||
1527 |
public: |
|
1528 |
||
1529 |
// expected usages: |
|
1530 |
// for (MergeMemStream mms(mem->is_MergeMem()); next_non_empty(); ) { ... } |
|
1531 |
// for (MergeMemStream mms(mem1, mem2); next_non_empty2(); ) { ... } |
|
1532 |
||
1533 |
// iterate over one merge |
|
1534 |
MergeMemStream(MergeMemNode* mm) { |
|
1535 |
mm->iteration_setup(); |
|
1536 |
init(mm); |
|
1537 |
debug_only(_cnt2 = 999); |
|
1538 |
} |
|
1539 |
// iterate in parallel over two merges |
|
1540 |
// only iterates through non-empty elements of mm2 |
|
1541 |
MergeMemStream(MergeMemNode* mm, const MergeMemNode* mm2) { |
|
1542 |
assert(mm2, "second argument must be a MergeMem also"); |
|
1543 |
((MergeMemNode*)mm2)->iteration_setup(); // update hidden state |
|
1544 |
mm->iteration_setup(mm2); |
|
1545 |
init(mm, mm2); |
|
1546 |
_cnt2 = mm2->req(); |
|
1547 |
} |
|
1548 |
#ifdef ASSERT |
|
1549 |
~MergeMemStream() { |
|
1550 |
assert_synch(); |
|
1551 |
} |
|
1552 |
#endif |
|
1553 |
||
1554 |
MergeMemNode* all_memory() const { |
|
1555 |
return _mm; |
|
1556 |
} |
|
1557 |
Node* base_memory() const { |
|
1558 |
assert(_mm_base == _mm->base_memory(), "no update to base memory, please"); |
|
1559 |
return _mm_base; |
|
1560 |
} |
|
1561 |
const MergeMemNode* all_memory2() const { |
|
1562 |
assert(_mm2 != NULL, ""); |
|
1563 |
return _mm2; |
|
1564 |
} |
|
1565 |
bool at_base_memory() const { |
|
1566 |
return _idx == Compile::AliasIdxBot; |
|
1567 |
} |
|
1568 |
int alias_idx() const { |
|
1569 |
assert(_mem, "must call next 1st"); |
|
1570 |
return _idx; |
|
1571 |
} |
|
1572 |
||
1573 |
const TypePtr* adr_type() const { |
|
1574 |
return Compile::current()->get_adr_type(alias_idx()); |
|
1575 |
} |
|
1576 |
||
1577 |
const TypePtr* adr_type(Compile* C) const { |
|
1578 |
return C->get_adr_type(alias_idx()); |
|
1579 |
} |
|
1580 |
bool is_empty() const { |
|
1581 |
assert(_mem, "must call next 1st"); |
|
1582 |
assert(_mem->is_top() == (_mem==_mm->empty_memory()), "correct sentinel"); |
|
1583 |
return _mem->is_top(); |
|
1584 |
} |
|
1585 |
bool is_empty2() const { |
|
1586 |
assert(_mem2, "must call next 1st"); |
|
1587 |
assert(_mem2->is_top() == (_mem2==_mm2->empty_memory()), "correct sentinel"); |
|
1588 |
return _mem2->is_top(); |
|
1589 |
} |
|
1590 |
Node* memory() const { |
|
1591 |
assert(!is_empty(), "must not be empty"); |
|
1592 |
assert_synch(); |
|
1593 |
return _mem; |
|
1594 |
} |
|
1595 |
// get the current memory, regardless of empty or non-empty status |
|
1596 |
Node* force_memory() const { |
|
1597 |
assert(!is_empty() || !at_base_memory(), ""); |
|
1598 |
// Use _mm_base to defend against updates to _mem->base_memory(). |
|
1599 |
Node *mem = _mem->is_top() ? _mm_base : _mem; |
|
1600 |
assert(mem == check_memory(), ""); |
|
1601 |
return mem; |
|
1602 |
} |
|
1603 |
Node* memory2() const { |
|
1604 |
assert(_mem2 == check_memory2(), ""); |
|
1605 |
return _mem2; |
|
1606 |
} |
|
1607 |
void set_memory(Node* mem) { |
|
1608 |
if (at_base_memory()) { |
|
1609 |
// Note that this does not change the invariant _mm_base. |
|
1610 |
_mm->set_base_memory(mem); |
|
1611 |
} else { |
|
1612 |
_mm->set_memory_at(_idx, mem); |
|
1613 |
} |
|
1614 |
_mem = mem; |
|
1615 |
assert_synch(); |
|
1616 |
} |
|
1617 |
||
1618 |
// Recover from a side effect to the MergeMemNode. |
|
1619 |
void set_memory() { |
|
1620 |
_mem = _mm->in(_idx); |
|
1621 |
} |
|
1622 |
||
1623 |
bool next() { return next(false); } |
|
1624 |
bool next2() { return next(true); } |
|
1625 |
||
1626 |
bool next_non_empty() { return next_non_empty(false); } |
|
1627 |
bool next_non_empty2() { return next_non_empty(true); } |
|
1628 |
// next_non_empty2 can yield states where is_empty() is true |
|
1629 |
||
1630 |
private: |
|
1631 |
// find the next item, which might be empty |
|
1632 |
bool next(bool have_mm2) { |
|
1633 |
assert((_mm2 != NULL) == have_mm2, "use other next"); |
|
1634 |
assert_synch(); |
|
1635 |
if (++_idx < _cnt) { |
|
1636 |
// Note: This iterator allows _mm to be non-sparse. |
|
1637 |
// It behaves the same whether _mem is top or base_memory. |
|
1638 |
_mem = _mm->in(_idx); |
|
1639 |
if (have_mm2) |
|
1640 |
_mem2 = _mm2->in((_idx < _cnt2) ? _idx : Compile::AliasIdxTop); |
|
1641 |
return true; |
|
1642 |
} |
|
1643 |
return false; |
|
1644 |
} |
|
1645 |
||
1646 |
// find the next non-empty item |
|
1647 |
bool next_non_empty(bool have_mm2) { |
|
1648 |
while (next(have_mm2)) { |
|
1649 |
if (!is_empty()) { |
|
1650 |
// make sure _mem2 is filled in sensibly |
|
1651 |
if (have_mm2 && _mem2->is_top()) _mem2 = _mm2->base_memory(); |
|
1652 |
return true; |
|
1653 |
} else if (have_mm2 && !is_empty2()) { |
|
1654 |
return true; // is_empty() == true |
|
1655 |
} |
|
1656 |
} |
|
1657 |
return false; |
|
1658 |
} |
|
1659 |
}; |
|
1660 |
||
57804 | 1661 |
// cachewb node for guaranteeing writeback of the cache line at a |
1662 |
// given address to (non-volatile) RAM |
|
1663 |
class CacheWBNode : public Node { |
|
1664 |
public: |
|
1665 |
CacheWBNode(Node *ctrl, Node *mem, Node *addr) : Node(ctrl, mem, addr) {} |
|
1666 |
virtual int Opcode() const; |
|
1667 |
virtual uint ideal_reg() const { return NotAMachineReg; } |
|
1668 |
virtual uint match_edge(uint idx) const { return (idx == 2); } |
|
1669 |
virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; } |
|
1670 |
virtual const Type *bottom_type() const { return Type::MEMORY; } |
|
1671 |
}; |
|
1672 |
||
1673 |
// cachewb pre sync node for ensuring that writebacks are serialised |
|
1674 |
// relative to preceding or following stores |
|
1675 |
class CacheWBPreSyncNode : public Node { |
|
1676 |
public: |
|
1677 |
CacheWBPreSyncNode(Node *ctrl, Node *mem) : Node(ctrl, mem) {} |
|
1678 |
virtual int Opcode() const; |
|
1679 |
virtual uint ideal_reg() const { return NotAMachineReg; } |
|
1680 |
virtual uint match_edge(uint idx) const { return false; } |
|
1681 |
virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; } |
|
1682 |
virtual const Type *bottom_type() const { return Type::MEMORY; } |
|
1683 |
}; |
|
1684 |
||
1685 |
// cachewb pre sync node for ensuring that writebacks are serialised |
|
1686 |
// relative to preceding or following stores |
|
1687 |
class CacheWBPostSyncNode : public Node { |
|
1688 |
public: |
|
1689 |
CacheWBPostSyncNode(Node *ctrl, Node *mem) : Node(ctrl, mem) {} |
|
1690 |
virtual int Opcode() const; |
|
1691 |
virtual uint ideal_reg() const { return NotAMachineReg; } |
|
1692 |
virtual uint match_edge(uint idx) const { return false; } |
|
1693 |
virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; } |
|
1694 |
virtual const Type *bottom_type() const { return Type::MEMORY; } |
|
1695 |
}; |
|
1696 |
||
1 | 1697 |
//------------------------------Prefetch--------------------------------------- |
1698 |
||
10267 | 1699 |
// Allocation prefetch which may fault, TLAB size have to be adjusted. |
1700 |
class PrefetchAllocationNode : public Node { |
|
1701 |
public: |
|
1702 |
PrefetchAllocationNode(Node *mem, Node *adr) : Node(0,mem,adr) {} |
|
1703 |
virtual int Opcode() const; |
|
1704 |
virtual uint ideal_reg() const { return NotAMachineReg; } |
|
1705 |
virtual uint match_edge(uint idx) const { return idx==2; } |
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5251
f86f7a86d761
6940726: Use BIS instruction for allocation prefetch on Sparc
kvn
parents:
4746
diff
changeset
|
1706 |
virtual const Type *bottom_type() const { return ( AllocatePrefetchStyle == 3 ) ? Type::MEMORY : Type::ABIO; } |
1 | 1707 |
}; |
7397 | 1708 |
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53244
9807daeb47c4
8216167: Update include guards to reflect correct directories
coleenp
parents:
51482
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changeset
|
1709 |
#endif // SHARE_OPTO_MEMNODE_HPP |