jdk-sandbox: hotspot/src/os_cpu/linux_x86/vm/orderAccess_linux

1 489c9b5090e2 Initial load duke parents: diff changeset	1	/*
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	2	* Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
1 489c9b5090e2 Initial load duke parents: diff changeset	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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489c9b5090e2 Initial load duke parents: diff changeset	6	* under the terms of the GNU General Public License version 2 only, as
489c9b5090e2 Initial load duke parents: diff changeset	7	* published by the Free Software Foundation.
489c9b5090e2 Initial load duke parents: diff changeset	8	*
489c9b5090e2 Initial load duke parents: diff changeset	9	* This code is distributed in the hope that it will be useful, but WITHOUT
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489c9b5090e2 Initial load duke parents: diff changeset	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
489c9b5090e2 Initial load duke parents: diff changeset	12	* version 2 for more details (a copy is included in the LICENSE file that
489c9b5090e2 Initial load duke parents: diff changeset	13	* accompanied this code).
489c9b5090e2 Initial load duke parents: diff changeset	14	*
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489c9b5090e2 Initial load duke parents: diff changeset	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
489c9b5090e2 Initial load duke parents: diff changeset	18	*
5547 f4b087cbb361 6941466: Oracle rebranding changes for Hotspot repositories trims parents: 3261 diff changeset	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
f4b087cbb361 6941466: Oracle rebranding changes for Hotspot repositories trims parents: 3261 diff changeset	20	* or visit www.oracle.com if you need additional information or have any
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1 489c9b5090e2 Initial load duke parents: diff changeset	22	*
489c9b5090e2 Initial load duke parents: diff changeset	23	*/
489c9b5090e2 Initial load duke parents: diff changeset	24
7397 5b173b4ca846 6989984: Use standard include model for Hospot stefank parents: 6253 diff changeset	25	#ifndef OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_INLINE_HPP
5b173b4ca846 6989984: Use standard include model for Hospot stefank parents: 6253 diff changeset	26	#define OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_INLINE_HPP
5b173b4ca846 6989984: Use standard include model for Hospot stefank parents: 6253 diff changeset	27
15855 2ac9ebea17f3 8008959: Fix non-PCH build on Linux, Windows and MacOS X simonis parents: 9409 diff changeset	28	#include "runtime/atomic.inline.hpp"
7397 5b173b4ca846 6989984: Use standard include model for Hospot stefank parents: 6253 diff changeset	29	#include "runtime/orderAccess.hpp"
15855 2ac9ebea17f3 8008959: Fix non-PCH build on Linux, Windows and MacOS X simonis parents: 9409 diff changeset	30	#include "runtime/os.hpp"
7397 5b173b4ca846 6989984: Use standard include model for Hospot stefank parents: 6253 diff changeset	31
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	32	// Compiler version last used for testing: gcc 4.8.2
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	33	// Please update this information when this file changes
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	34
1 489c9b5090e2 Initial load duke parents: diff changeset	35	// Implementation of class OrderAccess.
489c9b5090e2 Initial load duke parents: diff changeset	36
27632 39084a677e72 8061964: Insufficient compiler barriers for GCC in OrderAccess functions mgerdin parents: 25715 diff changeset	37	// A compiler barrier, forcing the C++ compiler to invalidate all memory assumptions
39084a677e72 8061964: Insufficient compiler barriers for GCC in OrderAccess functions mgerdin parents: 25715 diff changeset	38	static inline void compiler_barrier() {
39084a677e72 8061964: Insufficient compiler barriers for GCC in OrderAccess functions mgerdin parents: 25715 diff changeset	39	__asm__ volatile ("" : : : "memory");
39084a677e72 8061964: Insufficient compiler barriers for GCC in OrderAccess functions mgerdin parents: 25715 diff changeset	40	}
39084a677e72 8061964: Insufficient compiler barriers for GCC in OrderAccess functions mgerdin parents: 25715 diff changeset	41
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	42	inline void OrderAccess::loadload() { compiler_barrier(); }
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	43	inline void OrderAccess::storestore() { compiler_barrier(); }
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	44	inline void OrderAccess::loadstore() { compiler_barrier(); }
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	45	inline void OrderAccess::storeload() { fence(); }
1 489c9b5090e2 Initial load duke parents: diff changeset	46
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	47	inline void OrderAccess::acquire() { compiler_barrier(); }
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	48	inline void OrderAccess::release() { compiler_barrier(); }
1 489c9b5090e2 Initial load duke parents: diff changeset	49
489c9b5090e2 Initial load duke parents: diff changeset	50	inline void OrderAccess::fence() {
489c9b5090e2 Initial load duke parents: diff changeset	51	if (os::is_MP()) {
2338 a8660a1b709b 6822204: volatile fences should prefer lock:addl to actual mfence instructions never parents: 1 diff changeset	52	// always use locked addl since mfence is sometimes expensive
1 489c9b5090e2 Initial load duke parents: diff changeset	53	#ifdef AMD64
2338 a8660a1b709b 6822204: volatile fences should prefer lock:addl to actual mfence instructions never parents: 1 diff changeset	54	__asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
1 489c9b5090e2 Initial load duke parents: diff changeset	55	#else
489c9b5090e2 Initial load duke parents: diff changeset	56	__asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
2338 a8660a1b709b 6822204: volatile fences should prefer lock:addl to actual mfence instructions never parents: 1 diff changeset	57	#endif
1 489c9b5090e2 Initial load duke parents: diff changeset	58	}
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	59	compiler_barrier();
1 489c9b5090e2 Initial load duke parents: diff changeset	60	}
489c9b5090e2 Initial load duke parents: diff changeset	61
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	62	template<>
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	63	inline void OrderAccess::specialized_release_store_fence<jbyte> (volatile jbyte* p, jbyte v) {
1 489c9b5090e2 Initial load duke parents: diff changeset	64	__asm__ volatile ( "xchgb (%2),%0"
9409 5bd770036284 7031385: incorrect register allocation in release_store_fence on linux x86 dsamersoff parents: 7885 diff changeset	65	: "=q" (v)
1 489c9b5090e2 Initial load duke parents: diff changeset	66	: "0" (v), "r" (p)
489c9b5090e2 Initial load duke parents: diff changeset	67	: "memory");
489c9b5090e2 Initial load duke parents: diff changeset	68	}
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	69	template<>
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	70	inline void OrderAccess::specialized_release_store_fence<jshort>(volatile jshort* p, jshort v) {
1 489c9b5090e2 Initial load duke parents: diff changeset	71	__asm__ volatile ( "xchgw (%2),%0"
489c9b5090e2 Initial load duke parents: diff changeset	72	: "=r" (v)
489c9b5090e2 Initial load duke parents: diff changeset	73	: "0" (v), "r" (p)
489c9b5090e2 Initial load duke parents: diff changeset	74	: "memory");
489c9b5090e2 Initial load duke parents: diff changeset	75	}
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	76	template<>
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	77	inline void OrderAccess::specialized_release_store_fence<jint> (volatile jint* p, jint v) {
1 489c9b5090e2 Initial load duke parents: diff changeset	78	__asm__ volatile ( "xchgl (%2),%0"
489c9b5090e2 Initial load duke parents: diff changeset	79	: "=r" (v)
489c9b5090e2 Initial load duke parents: diff changeset	80	: "0" (v), "r" (p)
489c9b5090e2 Initial load duke parents: diff changeset	81	: "memory");
489c9b5090e2 Initial load duke parents: diff changeset	82	}
489c9b5090e2 Initial load duke parents: diff changeset	83
489c9b5090e2 Initial load duke parents: diff changeset	84	#ifdef AMD64
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	85	template<>
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	86	inline void OrderAccess::specialized_release_store_fence<jlong> (volatile jlong* p, jlong v) {
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	87	__asm__ volatile ( "xchgq (%2), %0"
1 489c9b5090e2 Initial load duke parents: diff changeset	88	: "=r" (v)
489c9b5090e2 Initial load duke parents: diff changeset	89	: "0" (v), "r" (p)
489c9b5090e2 Initial load duke parents: diff changeset	90	: "memory");
489c9b5090e2 Initial load duke parents: diff changeset	91	}
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	92	#endif // AMD64
1 489c9b5090e2 Initial load duke parents: diff changeset	93
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	94	template<>
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	95	inline void OrderAccess::specialized_release_store_fence<jfloat> (volatile jfloat* p, jfloat v) {
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	96	release_store_fence((volatile jint*)p, jint_cast(v));
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	97	}
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	98	template<>
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	99	inline void OrderAccess::specialized_release_store_fence<jdouble>(volatile jdouble* p, jdouble v) {
cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	100	release_store_fence((volatile jlong*)p, jlong_cast(v));
1 489c9b5090e2 Initial load duke parents: diff changeset	101	}
489c9b5090e2 Initial load duke parents: diff changeset	102
29456 cc1c5203e60d 7143664: Clean up OrderAccess implementations and usage dholmes parents: 27632 diff changeset	103	#define VM_HAS_GENERALIZED_ORDER_ACCESS 1
7397 5b173b4ca846 6989984: Use standard include model for Hospot stefank parents: 6253 diff changeset	104
5b173b4ca846 6989984: Use standard include model for Hospot stefank parents: 6253 diff changeset	105	#endif // OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_INLINE_HPP

author	dholmes
	Tue, 03 Mar 2015 19:20:26 -0500
changeset 29456	cc1c5203e60d
parent 27632	39084a677e72
child 40655	9f644073d3a0
permissions	-rw-r--r--