/*

 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.

 * Copyright 2012, 2014 SAP AG. All rights reserved.

 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

 *

 * This code is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License version 2 only, as

 * published by the Free Software Foundation.

 *

 * This code is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

 * version 2 for more details (a copy is included in the LICENSE file that

 * accompanied this code).

 *

 * You should have received a copy of the GNU General Public License version

 * 2 along with this work; if not, write to the Free Software Foundation,

 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

 *

 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

 * or visit www.oracle.com if you need additional information or have any

 * questions.

 *

 */

#include "precompiled.hpp"

#include "asm/assembler.hpp"

#include "asm/macroAssembler.inline.hpp"

#include "interp_masm_ppc_64.hpp"

#include "interpreter/interpreterRuntime.hpp"

#include "prims/jvmtiThreadState.hpp"

#ifdef PRODUCT

#define BLOCK_COMMENT(str) // nothing

#else

#define BLOCK_COMMENT(str) block_comment(str)

#endif

void InterpreterMacroAssembler::null_check_throw(Register a, int offset, Register temp_reg) {

#ifdef CC_INTERP

  address exception_entry = StubRoutines::throw_NullPointerException_at_call_entry();

#else

  address exception_entry = Interpreter::throw_NullPointerException_entry();

#endif

  MacroAssembler::null_check_throw(a, offset, temp_reg, exception_entry);

}

void InterpreterMacroAssembler::branch_to_entry(address entry, Register Rscratch) {

  assert(entry, "Entry must have been generated by now");

  if (is_within_range_of_b(entry, pc())) {

    b(entry);

  } else {

    load_const_optimized(Rscratch, entry, R0);

    mtctr(Rscratch);

    bctr();

  }

}

#ifndef CC_INTERP

void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {

  Register bytecode = R12_scratch2;

  if (bcp_incr != 0) {

    lbzu(bytecode, bcp_incr, R14_bcp);

  } else {

    lbz(bytecode, 0, R14_bcp);

  }

  dispatch_Lbyte_code(state, bytecode, Interpreter::dispatch_table(state));

}

void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {

  // Load current bytecode.

  Register bytecode = R12_scratch2;

  lbz(bytecode, 0, R14_bcp);

  dispatch_Lbyte_code(state, bytecode, table);

}

// Dispatch code executed in the prolog of a bytecode which does not do it's

// own dispatch. The dispatch address is computed and placed in R24_dispatch_addr.

void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {

  Register bytecode = R12_scratch2;

  lbz(bytecode, bcp_incr, R14_bcp);

  load_dispatch_table(R24_dispatch_addr, Interpreter::dispatch_table(state));

  sldi(bytecode, bytecode, LogBytesPerWord);

  ldx(R24_dispatch_addr, R24_dispatch_addr, bytecode);

}

// Dispatch code executed in the epilog of a bytecode which does not do it's

// own dispatch. The dispatch address in R24_dispatch_addr is used for the

// dispatch.

void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {

  mtctr(R24_dispatch_addr);

  addi(R14_bcp, R14_bcp, bcp_incr);

  bctr();

}

void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {

  assert(scratch_reg != R0, "can't use R0 as scratch_reg here");

  if (JvmtiExport::can_pop_frame()) {

    Label L;

    // Check the "pending popframe condition" flag in the current thread.

    lwz(scratch_reg, in_bytes(JavaThread::popframe_condition_offset()), R16_thread);

    // Initiate popframe handling only if it is not already being

    // processed. If the flag has the popframe_processing bit set, it

    // means that this code is called *during* popframe handling - we

    // don't want to reenter.

    andi_(R0, scratch_reg, JavaThread::popframe_pending_bit);

    beq(CCR0, L);

    andi_(R0, scratch_reg, JavaThread::popframe_processing_bit);

    bne(CCR0, L);

    // Call the Interpreter::remove_activation_preserving_args_entry()

    // func to get the address of the same-named entrypoint in the

    // generated interpreter code.

    call_c(CAST_FROM_FN_PTR(FunctionDescriptor*,

                            Interpreter::remove_activation_preserving_args_entry),

           relocInfo::none);

    // Jump to Interpreter::_remove_activation_preserving_args_entry.

    mtctr(R3_RET);

    bctr();

    align(32, 12);

    bind(L);

  }

}

void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {

  const Register Rthr_state_addr = scratch_reg;

  if (JvmtiExport::can_force_early_return()) {

    Label Lno_early_ret;

    ld(Rthr_state_addr, in_bytes(JavaThread::jvmti_thread_state_offset()), R16_thread);

    cmpdi(CCR0, Rthr_state_addr, 0);

    beq(CCR0, Lno_early_ret);

    lwz(R0, in_bytes(JvmtiThreadState::earlyret_state_offset()), Rthr_state_addr);

    cmpwi(CCR0, R0, JvmtiThreadState::earlyret_pending);

    bne(CCR0, Lno_early_ret);

    // Jump to Interpreter::_earlyret_entry.

    lwz(R3_ARG1, in_bytes(JvmtiThreadState::earlyret_tos_offset()), Rthr_state_addr);

    call_VM_leaf(CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry));

    mtlr(R3_RET);

    blr();

    align(32, 12);

    bind(Lno_early_ret);

  }

}

void InterpreterMacroAssembler::load_earlyret_value(TosState state, Register Rscratch1) {

  const Register RjvmtiState = Rscratch1;

  const Register Rscratch2   = R0;

  ld(RjvmtiState, in_bytes(JavaThread::jvmti_thread_state_offset()), R16_thread);

  li(Rscratch2, 0);

  switch (state) {

    case atos: ld(R17_tos, in_bytes(JvmtiThreadState::earlyret_oop_offset()), RjvmtiState);

               std(Rscratch2, in_bytes(JvmtiThreadState::earlyret_oop_offset()), RjvmtiState);

               break;

    case ltos: ld(R17_tos, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);

               break;

    case btos: // fall through

    case ctos: // fall through

    case stos: // fall through

    case itos: lwz(R17_tos, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);

               break;

    case ftos: lfs(F15_ftos, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);

               break;

    case dtos: lfd(F15_ftos, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);

               break;

    case vtos: break;

    default  : ShouldNotReachHere();

  }

  // Clean up tos value in the jvmti thread state.

  std(Rscratch2, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);

  // Set tos state field to illegal value.

  li(Rscratch2, ilgl);

  stw(Rscratch2, in_bytes(JvmtiThreadState::earlyret_tos_offset()), RjvmtiState);

}

// Common code to dispatch and dispatch_only.

// Dispatch value in Lbyte_code and increment Lbcp.

void InterpreterMacroAssembler::load_dispatch_table(Register dst, address* table) {

  address table_base = (address)Interpreter::dispatch_table((TosState)0);

  intptr_t table_offs = (intptr_t)table - (intptr_t)table_base;

  if (is_simm16(table_offs)) {

    addi(dst, R25_templateTableBase, (int)table_offs);

  } else {

    load_const_optimized(dst, table, R0);

  }

}

void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, Register bytecode, address* table, bool verify) {

  if (verify) {

    unimplemented("dispatch_Lbyte_code: verify"); // See Sparc Implementation to implement this

  }

#ifdef FAST_DISPATCH

  unimplemented("dispatch_Lbyte_code FAST_DISPATCH");

#else

  assert_different_registers(bytecode, R11_scratch1);

  // Calc dispatch table address.

  load_dispatch_table(R11_scratch1, table);

  sldi(R12_scratch2, bytecode, LogBytesPerWord);

  ldx(R11_scratch1, R11_scratch1, R12_scratch2);

  // Jump off!

  mtctr(R11_scratch1);

  bctr();

#endif

}

void InterpreterMacroAssembler::load_receiver(Register Rparam_count, Register Rrecv_dst) {

  sldi(Rrecv_dst, Rparam_count, Interpreter::logStackElementSize);

  ldx(Rrecv_dst, Rrecv_dst, R15_esp);

}

// helpers for expression stack

void InterpreterMacroAssembler::pop_i(Register r) {

  lwzu(r, Interpreter::stackElementSize, R15_esp);

}

void InterpreterMacroAssembler::pop_ptr(Register r) {

  ldu(r, Interpreter::stackElementSize, R15_esp);

}

void InterpreterMacroAssembler::pop_l(Register r) {

  ld(r, Interpreter::stackElementSize, R15_esp);

  addi(R15_esp, R15_esp, 2 * Interpreter::stackElementSize);

}

void InterpreterMacroAssembler::pop_f(FloatRegister f) {

  lfsu(f, Interpreter::stackElementSize, R15_esp);

}

void InterpreterMacroAssembler::pop_d(FloatRegister f) {

  lfd(f, Interpreter::stackElementSize, R15_esp);

  addi(R15_esp, R15_esp, 2 * Interpreter::stackElementSize);

}

void InterpreterMacroAssembler::push_i(Register r) {

  stw(r, 0, R15_esp);

  addi(R15_esp, R15_esp, - Interpreter::stackElementSize );

}

void InterpreterMacroAssembler::push_ptr(Register r) {

  std(r, 0, R15_esp);

  addi(R15_esp, R15_esp, - Interpreter::stackElementSize );

}

void InterpreterMacroAssembler::push_l(Register r) {

  std(r, - Interpreter::stackElementSize, R15_esp);

  addi(R15_esp, R15_esp, - 2 * Interpreter::stackElementSize );

}

void InterpreterMacroAssembler::push_f(FloatRegister f) {

  stfs(f, 0, R15_esp);

  addi(R15_esp, R15_esp, - Interpreter::stackElementSize );

}

void InterpreterMacroAssembler::push_d(FloatRegister f)   {

  stfd(f, - Interpreter::stackElementSize, R15_esp);

  addi(R15_esp, R15_esp, - 2 * Interpreter::stackElementSize );

}

void InterpreterMacroAssembler::push_2ptrs(Register first, Register second) {

  std(first, 0, R15_esp);

  std(second, -Interpreter::stackElementSize, R15_esp);

  addi(R15_esp, R15_esp, - 2 * Interpreter::stackElementSize );

}

void InterpreterMacroAssembler::push_l_pop_d(Register l, FloatRegister d) {

  std(l, 0, R15_esp);

  lfd(d, 0, R15_esp);

}

void InterpreterMacroAssembler::push_d_pop_l(FloatRegister d, Register l) {

  stfd(d, 0, R15_esp);

  ld(l, 0, R15_esp);

}

void InterpreterMacroAssembler::push(TosState state) {

  switch (state) {

    case atos: push_ptr();                break;

    case btos:

    case ctos:

    case stos:

    case itos: push_i();                  break;

    case ltos: push_l();                  break;

    case ftos: push_f();                  break;

    case dtos: push_d();                  break;

    case vtos: /* nothing to do */        break;

    default  : ShouldNotReachHere();

  }

}

void InterpreterMacroAssembler::pop(TosState state) {

  switch (state) {

    case atos: pop_ptr();            break;

    case btos:

    case ctos:

    case stos:

    case itos: pop_i();              break;

    case ltos: pop_l();              break;

    case ftos: pop_f();              break;

    case dtos: pop_d();              break;

    case vtos: /* nothing to do */   break;

    default  : ShouldNotReachHere();

  }

  verify_oop(R17_tos, state);

}

void InterpreterMacroAssembler::empty_expression_stack() {

  addi(R15_esp, R26_monitor, - Interpreter::stackElementSize);

}

void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(int         bcp_offset,

                                                          Register    Rdst,

                                                          signedOrNot is_signed) {

  // Read Java big endian format.

  if (is_signed == Signed) {

    lha(Rdst, bcp_offset, R14_bcp);

  } else {

    lhz(Rdst, bcp_offset, R14_bcp);

  }

#endif

}

void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(int         bcp_offset,

                                                          Register    Rdst,

                                                          signedOrNot is_signed) {

  // Read Java big endian format.

  if (bcp_offset & 3) { // Offset unaligned?

    load_const_optimized(Rdst, bcp_offset);

    if (is_signed == Signed) {

      lwax(Rdst, R14_bcp, Rdst);

    } else {

      lwzx(Rdst, R14_bcp, Rdst);

    }

  } else {

    if (is_signed == Signed) {

      lwa(Rdst, bcp_offset, R14_bcp);

    } else {

      lwz(Rdst, bcp_offset, R14_bcp);

    }

  }

}

// Load the constant pool cache index from the bytecode stream.

//

// Kills / writes:

//   - Rdst, Rscratch

void InterpreterMacroAssembler::get_cache_index_at_bcp(Register Rdst, int bcp_offset, size_t index_size) {

  assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");

  if (index_size == sizeof(u2)) {

  } else if (index_size == sizeof(u4)) {

    assert(ConstantPool::decode_invokedynamic_index(~123) == 123, "else change next line");

    nand(Rdst, Rdst, Rdst); // convert to plain index

  } else if (index_size == sizeof(u1)) {

    lbz(Rdst, bcp_offset, R14_bcp);

  } else {

    ShouldNotReachHere();

  }

  // Rdst now contains cp cache index.

}

void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, int bcp_offset, size_t index_size) {

  get_cache_index_at_bcp(cache, bcp_offset, index_size);

  sldi(cache, cache, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord));

  add(cache, R27_constPoolCache, cache);

}

// Load object from cpool->resolved_references(index).

void InterpreterMacroAssembler::load_resolved_reference_at_index(Register result, Register index) {

  assert_different_registers(result, index);

  get_constant_pool(result);

  // Convert from field index to resolved_references() index and from

  // word index to byte offset. Since this is a java object, it can be compressed.

  Register tmp = index;  // reuse

  sldi(tmp, index, LogBytesPerHeapOop);

  // Load pointer for resolved_references[] objArray.

  ld(result, ConstantPool::resolved_references_offset_in_bytes(), result);

  // JNIHandles::resolve(result)

  ld(result, 0, result);

#ifdef ASSERT

  Label index_ok;

  lwa(R0, arrayOopDesc::length_offset_in_bytes(), result);

  sldi(R0, R0, LogBytesPerHeapOop);

  cmpd(CCR0, tmp, R0);

  blt(CCR0, index_ok);

  stop("resolved reference index out of bounds", 0x09256);

  bind(index_ok);

#endif

  // Add in the index.

  add(result, tmp, result);

  load_heap_oop(result, arrayOopDesc::base_offset_in_bytes(T_OBJECT), result);

}

// Generate a subtype check: branch to ok_is_subtype if sub_klass is

// a subtype of super_klass. Blows registers Rsub_klass, tmp1, tmp2.

void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass, Register Rsuper_klass, Register Rtmp1,

                                                  Register Rtmp2, Register Rtmp3, Label &ok_is_subtype) {

  // Profile the not-null value's klass.

  profile_typecheck(Rsub_klass, Rtmp1, Rtmp2);

  check_klass_subtype(Rsub_klass, Rsuper_klass, Rtmp1, Rtmp2, ok_is_subtype);

  profile_typecheck_failed(Rtmp1, Rtmp2);

}

void InterpreterMacroAssembler::generate_stack_overflow_check_with_compare_and_throw(Register Rmem_frame_size, Register Rscratch1) {

  Label done;

  sub(Rmem_frame_size, R1_SP, Rmem_frame_size);

  ld(Rscratch1, thread_(stack_overflow_limit));

  cmpld(CCR0/*is_stack_overflow*/, Rmem_frame_size, Rscratch1);

  bgt(CCR0/*is_stack_overflow*/, done);

  // Load target address of the runtime stub.

  assert(StubRoutines::throw_StackOverflowError_entry() != NULL, "generated in wrong order");

  load_const_optimized(Rscratch1, (StubRoutines::throw_StackOverflowError_entry()), R0);

  mtctr(Rscratch1);

  // Restore caller_sp.