/*

 * Copyright 1997-2008 Sun Microsystems, Inc.  All Rights Reserved.

 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

 *

 * This code is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License version 2 only, as

 * published by the Free Software Foundation.

 *

 * This code is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

 * version 2 for more details (a copy is included in the LICENSE file that

 * accompanied this code).

 *

 * You should have received a copy of the GNU General Public License version

 * 2 along with this work; if not, write to the Free Software Foundation,

 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

 *

 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,

 * CA 95054 USA or visit www.sun.com if you need additional information or

 * have any questions.

 *

 */

#include "incls/_precompiled.incl"

#include "incls/_interp_masm_x86_32.cpp.incl"

// Implementation of InterpreterMacroAssembler

#ifdef CC_INTERP

void InterpreterMacroAssembler::get_method(Register reg) {

  movptr(reg, Address(rbp, -(sizeof(BytecodeInterpreter) + 2 * wordSize)));

  movptr(reg, Address(reg, byte_offset_of(BytecodeInterpreter, _method)));

}

#endif // CC_INTERP

#ifndef CC_INTERP

void InterpreterMacroAssembler::call_VM_leaf_base(

  address entry_point,

  int     number_of_arguments

) {

  // interpreter specific

  //

  // Note: No need to save/restore bcp & locals (rsi & rdi) pointer

  //       since these are callee saved registers and no blocking/

  //       GC can happen in leaf calls.

  // Further Note: DO NOT save/restore bcp/locals. If a caller has

  // already saved them so that it can use rsi/rdi as temporaries

  // then a save/restore here will DESTROY the copy the caller

  // saved! There used to be a save_bcp() that only happened in

  // the ASSERT path (no restore_bcp). Which caused bizarre failures

  // when jvm built with ASSERTs.

#ifdef ASSERT

  { Label L;

    cmpptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD);

    jcc(Assembler::equal, L);

    stop("InterpreterMacroAssembler::call_VM_leaf_base: last_sp != NULL");

    bind(L);

  }

#endif

  // super call

  MacroAssembler::call_VM_leaf_base(entry_point, number_of_arguments);

  // interpreter specific

  // Used to ASSERT that rsi/rdi were equal to frame's bcp/locals

  // but since they may not have been saved (and we don't want to

  // save them here (see note above) the assert is invalid.

}

void InterpreterMacroAssembler::call_VM_base(

  Register oop_result,

  Register java_thread,

  Register last_java_sp,

  address  entry_point,

  int      number_of_arguments,

  bool     check_exceptions

) {

#ifdef ASSERT

  { Label L;

    cmpptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD);

    jcc(Assembler::equal, L);

    stop("InterpreterMacroAssembler::call_VM_base: last_sp != NULL");

    bind(L);

  }

#endif /* ASSERT */

  // interpreter specific

  //

  // Note: Could avoid restoring locals ptr (callee saved) - however doesn't

  //       really make a difference for these runtime calls, since they are

  //       slow anyway. Btw., bcp must be saved/restored since it may change

  //       due to GC.

  assert(java_thread == noreg , "not expecting a precomputed java thread");

  save_bcp();

  // super call

  MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exceptions);

  // interpreter specific

  restore_bcp();

  restore_locals();

}

void InterpreterMacroAssembler::check_and_handle_popframe(Register java_thread) {

  if (JvmtiExport::can_pop_frame()) {

    Label L;

    // Initiate popframe handling only if it is not already being processed.  If the flag

    // has the popframe_processing bit set, it means that this code is called *during* popframe

    // handling - we don't want to reenter.

    Register pop_cond = java_thread;  // Not clear if any other register is available...

    movl(pop_cond, Address(java_thread, JavaThread::popframe_condition_offset()));

    testl(pop_cond, JavaThread::popframe_pending_bit);

    jcc(Assembler::zero, L);

    testl(pop_cond, JavaThread::popframe_processing_bit);

    jcc(Assembler::notZero, L);

    // Call Interpreter::remove_activation_preserving_args_entry() to get the

    // address of the same-named entrypoint in the generated interpreter code.

    call_VM_leaf(CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));

    jmp(rax);

    bind(L);

    get_thread(java_thread);

  }

}

void InterpreterMacroAssembler::load_earlyret_value(TosState state) {

  get_thread(rcx);

  movl(rcx, Address(rcx, JavaThread::jvmti_thread_state_offset()));

  const Address tos_addr (rcx, JvmtiThreadState::earlyret_tos_offset());

  const Address oop_addr (rcx, JvmtiThreadState::earlyret_oop_offset());

  const Address val_addr (rcx, JvmtiThreadState::earlyret_value_offset());

  const Address val_addr1(rcx, JvmtiThreadState::earlyret_value_offset()

                             + in_ByteSize(wordSize));

  switch (state) {

    case atos: movptr(rax, oop_addr);

               verify_oop(rax, state);                break;

    case ltos:

               movl(rdx, val_addr1);               // fall through

    case btos:                                     // fall through

    case ctos:                                     // fall through

    case stos:                                     // fall through

    case itos: movl(rax, val_addr);                   break;

    case ftos: fld_s(val_addr);                       break;

    case dtos: fld_d(val_addr);                       break;

    case vtos: /* nothing to do */                    break;

    default  : ShouldNotReachHere();

  }

  // Clean up tos value in the thread object

  movl(tos_addr,  (int32_t) ilgl);

  NOT_LP64(movl(val_addr1, (int32_t)NULL_WORD));

}

void InterpreterMacroAssembler::check_and_handle_earlyret(Register java_thread) {

  if (JvmtiExport::can_force_early_return()) {

    Label L;

    Register tmp = java_thread;

    movptr(tmp, Address(tmp, JavaThread::jvmti_thread_state_offset()));

    testptr(tmp, tmp);

    jcc(Assembler::zero, L); // if (thread->jvmti_thread_state() == NULL) exit;

    // Initiate earlyret handling only if it is not already being processed.

    // If the flag has the earlyret_processing bit set, it means that this code

    // is called *during* earlyret handling - we don't want to reenter.

    movl(tmp, Address(tmp, JvmtiThreadState::earlyret_state_offset()));

    cmpl(tmp, JvmtiThreadState::earlyret_pending);

    jcc(Assembler::notEqual, L);

    // Call Interpreter::remove_activation_early_entry() to get the address of the

    // same-named entrypoint in the generated interpreter code.

    get_thread(java_thread);

    movptr(tmp, Address(java_thread, JavaThread::jvmti_thread_state_offset()));

    pushl(Address(tmp, JvmtiThreadState::earlyret_tos_offset()));

    call_VM_leaf(CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), 1);

    jmp(rax);

    bind(L);

    get_thread(java_thread);

  }

}

void InterpreterMacroAssembler::get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset) {

  assert(bcp_offset >= 0, "bcp is still pointing to start of bytecode");

  movl(reg, Address(rsi, bcp_offset));

  bswapl(reg);

  shrl(reg, 16);

}

void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset) {

  assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");

  assert(cache != index, "must use different registers");

  load_unsigned_word(index, Address(rsi, bcp_offset));

  movptr(cache, Address(rbp, frame::interpreter_frame_cache_offset * wordSize));

  assert(sizeof(ConstantPoolCacheEntry) == 4*wordSize, "adjust code below");

  shlptr(index, 2); // convert from field index to ConstantPoolCacheEntry index

}

void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset) {

  assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");

  assert(cache != tmp, "must use different register");

  load_unsigned_word(tmp, Address(rsi, bcp_offset));

  assert(sizeof(ConstantPoolCacheEntry) == 4*wordSize, "adjust code below");

                               // convert from field index to ConstantPoolCacheEntry index

                               // and from word offset to byte offset

  shll(tmp, 2 + LogBytesPerWord);

  movptr(cache, Address(rbp, frame::interpreter_frame_cache_offset * wordSize));

                               // skip past the header

  addptr(cache, in_bytes(constantPoolCacheOopDesc::base_offset()));

  addptr(cache, tmp);            // construct pointer to cache entry

}

  // Generate a subtype check: branch to ok_is_subtype if sub_klass is

  // a subtype of super_klass.  EAX holds the super_klass.  Blows ECX.

  // Resets EDI to locals.  Register sub_klass cannot be any of the above.

void InterpreterMacroAssembler::gen_subtype_check( Register Rsub_klass, Label &ok_is_subtype ) {

  assert( Rsub_klass != rax, "rax, holds superklass" );

  assert( Rsub_klass != rcx, "rcx holds 2ndary super array length" );

  assert( Rsub_klass != rdi, "rdi holds 2ndary super array scan ptr" );

  Label not_subtype, loop;

  // Profile the not-null value's klass.

  profile_typecheck(rcx, Rsub_klass, rdi); // blows rcx, rdi

  // Load the super-klass's check offset into ECX

  movl( rcx, Address(rax, sizeof(oopDesc) + Klass::super_check_offset_offset_in_bytes() ) );

  // Load from the sub-klass's super-class display list, or a 1-word cache of

  // the secondary superclass list, or a failing value with a sentinel offset

  // if the super-klass is an interface or exceptionally deep in the Java

  // hierarchy and we have to scan the secondary superclass list the hard way.

  // See if we get an immediate positive hit

  cmpptr( rax, Address(Rsub_klass,rcx,Address::times_1) );

  jcc( Assembler::equal,ok_is_subtype );

  // Check for immediate negative hit

  cmpl( rcx, sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() );

  jcc( Assembler::notEqual, not_subtype );

  // Check for self

  cmpptr( Rsub_klass, rax );

  jcc( Assembler::equal, ok_is_subtype );

  // Now do a linear scan of the secondary super-klass chain.

  movptr( rdi, Address(Rsub_klass, sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes()) );

  // EDI holds the objArrayOop of secondary supers.

  movl( rcx, Address(rdi, arrayOopDesc::length_offset_in_bytes()));// Load the array length

  // Skip to start of data; also clear Z flag incase ECX is zero

  addptr( rdi, arrayOopDesc::base_offset_in_bytes(T_OBJECT) );

  // Scan ECX words at [EDI] for occurance of EAX

  // Set NZ/Z based on last compare

  repne_scan();

  restore_locals();           // Restore EDI; Must not blow flags

  // Not equal?

  jcc( Assembler::notEqual, not_subtype );

  // Must be equal but missed in cache.  Update cache.

  movptr( Address(Rsub_klass, sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes()), rax );

  jmp( ok_is_subtype );

  bind(not_subtype);

  profile_typecheck_failed(rcx); // blows rcx

}

void InterpreterMacroAssembler::f2ieee() {

  if (IEEEPrecision) {

    fstp_s(Address(rsp, 0));

    fld_s(Address(rsp, 0));

  }

}

void InterpreterMacroAssembler::d2ieee() {

  if (IEEEPrecision) {

    fstp_d(Address(rsp, 0));

    fld_d(Address(rsp, 0));

  }

}

// Java Expression Stack

#ifdef ASSERT

void InterpreterMacroAssembler::verify_stack_tag(frame::Tag t) {

  if (TaggedStackInterpreter) {

    Label okay;

    cmpptr(Address(rsp, wordSize), (int32_t)t);

    jcc(Assembler::equal, okay);

    // Also compare if the stack value is zero, then the tag might

    // not have been set coming from deopt.

    cmpptr(Address(rsp, 0), 0);

    jcc(Assembler::equal, okay);

    stop("Java Expression stack tag value is bad");

    bind(okay);

  }

}

#endif // ASSERT

void InterpreterMacroAssembler::pop_ptr(Register r) {

  debug_only(verify_stack_tag(frame::TagReference));

  pop(r);

  if (TaggedStackInterpreter) addptr(rsp, 1 * wordSize);

}

void InterpreterMacroAssembler::pop_ptr(Register r, Register tag) {

  pop(r);

  // Tag may not be reference for jsr, can be returnAddress

  if (TaggedStackInterpreter) pop(tag);

}

void InterpreterMacroAssembler::pop_i(Register r) {

  debug_only(verify_stack_tag(frame::TagValue));

  pop(r);

  if (TaggedStackInterpreter) addptr(rsp, 1 * wordSize);

}

void InterpreterMacroAssembler::pop_l(Register lo, Register hi) {

  debug_only(verify_stack_tag(frame::TagValue));

  pop(lo);

  if (TaggedStackInterpreter) addptr(rsp, 1 * wordSize);

  debug_only(verify_stack_tag(frame::TagValue));

  pop(hi);

  if (TaggedStackInterpreter) addptr(rsp, 1 * wordSize);

}

void InterpreterMacroAssembler::pop_f() {

  debug_only(verify_stack_tag(frame::TagValue));

  fld_s(Address(rsp, 0));

  addptr(rsp, 1 * wordSize);

  if (TaggedStackInterpreter) addptr(rsp, 1 * wordSize);

}

void InterpreterMacroAssembler::pop_d() {

  // Write double to stack contiguously and load into ST0

  pop_dtos_to_rsp();

  fld_d(Address(rsp, 0));

  addptr(rsp, 2 * wordSize);

}

// Pop the top of the java expression stack to execution stack (which

// happens to be the same place).

void InterpreterMacroAssembler::pop_dtos_to_rsp() {

  if (TaggedStackInterpreter) {

    // Pop double value into scratch registers

    debug_only(verify_stack_tag(frame::TagValue));

    pop(rax);

    addptr(rsp, 1* wordSize);

    debug_only(verify_stack_tag(frame::TagValue));

    pop(rdx);

    addptr(rsp, 1* wordSize);

    push(rdx);

    push(rax);

  }

}

void InterpreterMacroAssembler::pop_ftos_to_rsp() {

  if (TaggedStackInterpreter) {

    debug_only(verify_stack_tag(frame::TagValue));

    pop(rax);

    addptr(rsp, 1 * wordSize);

    push(rax);  // ftos is at rsp

  }

}

void InterpreterMacroAssembler::pop(TosState state) {

  switch (state) {

    case atos: pop_ptr(rax);                                 break;

    case btos:                                               // fall through

    case ctos:                                               // fall through

    case stos:                                               // fall through

    case itos: pop_i(rax);                                   break;

    case ltos: pop_l(rax, rdx);                              break;

    case ftos: pop_f();                                      break;

    case dtos: pop_d();                                      break;

    case vtos: /* nothing to do */                           break;

    default  : ShouldNotReachHere();

  }

  verify_oop(rax, state);

}

void InterpreterMacroAssembler::push_ptr(Register r) {

  if (TaggedStackInterpreter) push(frame::TagReference);

  push(r);

}

void InterpreterMacroAssembler::push_ptr(Register r, Register tag) {

  if (TaggedStackInterpreter) push(tag);  // tag first

  push(r);

}

void InterpreterMacroAssembler::push_i(Register r) {

  if (TaggedStackInterpreter) push(frame::TagValue);

  push(r);

}

void InterpreterMacroAssembler::push_l(Register lo, Register hi) {

  if (TaggedStackInterpreter) push(frame::TagValue);

  push(hi);

  if (TaggedStackInterpreter) push(frame::TagValue);

  push(lo);

}

void InterpreterMacroAssembler::push_f() {

  if (TaggedStackInterpreter) push(frame::TagValue);

  // Do not schedule for no AGI! Never write beyond rsp!

  subptr(rsp, 1 * wordSize);

  fstp_s(Address(rsp, 0));

}

void InterpreterMacroAssembler::push_d(Register r) {

  if (TaggedStackInterpreter) {

    // Double values are stored as:

    //   tag

    //   high

    //   tag

    //   low

    push(frame::TagValue);

    subptr(rsp, 3 * wordSize);

    fstp_d(Address(rsp, 0));

    // move high word up to slot n-1

    movl(r, Address(rsp, 1*wordSize));

    movl(Address(rsp, 2*wordSize), r);

    // move tag

    movl(Address(rsp, 1*wordSize), frame::TagValue);

  } else {

    // Do not schedule for no AGI! Never write beyond rsp!

    subptr(rsp, 2 * wordSize);

    fstp_d(Address(rsp, 0));

  }

}

void InterpreterMacroAssembler::push(TosState state) {

  verify_oop(rax, state);

  switch (state) {

    case atos: push_ptr(rax); break;

    case btos:                                               // fall through

    case ctos:                                               // fall through

    case stos:                                               // fall through

    case itos: push_i(rax);                                    break;

    case ltos: push_l(rax, rdx);                               break;

    case ftos: push_f();                                       break;

    case dtos: push_d(rax);                                    break;

    case vtos: /* nothing to do */                             break;

    default  : ShouldNotReachHere();

  }

}

// Tagged stack helpers for swap and dup

void InterpreterMacroAssembler::load_ptr_and_tag(int n, Register val,

                                                 Register tag) {

  movptr(val, Address(rsp, Interpreter::expr_offset_in_bytes(n)));

  if (TaggedStackInterpreter) {

    movptr(tag, Address(rsp, Interpreter::expr_tag_offset_in_bytes(n)));

  }

}

void InterpreterMacroAssembler::store_ptr_and_tag(int n, Register val,

                                                  Register tag) {

  movptr(Address(rsp, Interpreter::expr_offset_in_bytes(n)), val);

  if (TaggedStackInterpreter) {

    movptr(Address(rsp, Interpreter::expr_tag_offset_in_bytes(n)), tag);

  }

}

// Tagged local support

void InterpreterMacroAssembler::tag_local(frame::Tag tag, int n) {

  if (TaggedStackInterpreter) {

    if (tag == frame::TagCategory2) {

      movptr(Address(rdi, Interpreter::local_tag_offset_in_bytes(n+1)), (int32_t)frame::TagValue);

      movptr(Address(rdi, Interpreter::local_tag_offset_in_bytes(n)), (int32_t)frame::TagValue);

    } else {

      movptr(Address(rdi, Interpreter::local_tag_offset_in_bytes(n)), (int32_t)tag);

    }

  }

}

void InterpreterMacroAssembler::tag_local(frame::Tag tag, Register idx) {

  if (TaggedStackInterpreter) {

    if (tag == frame::TagCategory2) {

      movptr(Address(rdi, idx, Interpreter::stackElementScale(),

                  Interpreter::local_tag_offset_in_bytes(1)), (int32_t)frame::TagValue);

      movptr(Address(rdi, idx, Interpreter::stackElementScale(),

                    Interpreter::local_tag_offset_in_bytes(0)), (int32_t)frame::TagValue);

    } else {

      movptr(Address(rdi, idx, Interpreter::stackElementScale(),

                               Interpreter::local_tag_offset_in_bytes(0)), (int32_t)tag);

    }

  }

}

void InterpreterMacroAssembler::tag_local(Register tag, Register idx) {

  if (TaggedStackInterpreter) {

    // can only be TagValue or TagReference

    movptr(Address(rdi, idx, Interpreter::stackElementScale(),

                           Interpreter::local_tag_offset_in_bytes(0)), tag);

  }

}

void InterpreterMacroAssembler::tag_local(Register tag, int n) {

  if (TaggedStackInterpreter) {

    // can only be TagValue or TagReference

    movptr(Address(rdi, Interpreter::local_tag_offset_in_bytes(n)), tag);

  }

}

#ifdef ASSERT

void InterpreterMacroAssembler::verify_local_tag(frame::Tag tag, int n) {

  if (TaggedStackInterpreter) {

     frame::Tag t = tag;

    if (tag == frame::TagCategory2) {

      Label nbl;