hotspot/src/os_cpu/bsd_zero/vm/atomic_bsd_zero.hpp
author eosterlund
Wed, 23 Aug 2017 14:01:17 +0200
changeset 46958 a13bd8c6b7a2
parent 46523 cbcc0ebaa044
child 46993 dd0f91c85ffc
permissions -rw-r--r--
8186166: Generalize Atomic::cmpxchg with templates Reviewed-by: dholmes, coleenp Contributed-by: kim.barrett@oracle.com
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/*
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 * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
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 * Copyright 2007, 2008, 2011, 2015, Red Hat, Inc.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef OS_CPU_BSD_ZERO_VM_ATOMIC_BSD_ZERO_HPP
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#define OS_CPU_BSD_ZERO_VM_ATOMIC_BSD_ZERO_HPP
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#include "runtime/os.hpp"
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// Implementation of class atomic
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#ifdef M68K
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/*
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 * __m68k_cmpxchg
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 *
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 * Atomically store newval in *ptr if *ptr is equal to oldval for user space.
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 * Returns newval on success and oldval if no exchange happened.
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 * This implementation is processor specific and works on
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 * 68020 68030 68040 and 68060.
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 *
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 * It will not work on ColdFire, 68000 and 68010 since they lack the CAS
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 * instruction.
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 * Using a kernelhelper would be better for arch complete implementation.
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 *
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 */
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static inline int __m68k_cmpxchg(int oldval, int newval, volatile int *ptr) {
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  int ret;
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  __asm __volatile ("cas%.l %0,%2,%1"
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                   : "=d" (ret), "+m" (*(ptr))
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                   : "d" (newval), "0" (oldval));
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  return ret;
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}
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/* Perform an atomic compare and swap: if the current value of `*PTR'
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   is OLDVAL, then write NEWVAL into `*PTR'.  Return the contents of
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   `*PTR' before the operation.*/
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static inline int m68k_compare_and_swap(int newval,
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                                        volatile int *ptr,
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                                        int oldval) {
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  for (;;) {
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      int prev = *ptr;
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      if (prev != oldval)
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        return prev;
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      if (__m68k_cmpxchg (prev, newval, ptr) == newval)
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        // Success.
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        return prev;
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      // We failed even though prev == oldval.  Try again.
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    }
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}
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/* Atomically add an int to memory.  */
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static inline int m68k_add_and_fetch(volatile int *ptr, int add_value) {
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  for (;;) {
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      // Loop until success.
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      int prev = *ptr;
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      if (__m68k_cmpxchg (prev, prev + add_value, ptr) == prev + add_value)
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        return prev + add_value;
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    }
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}
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/* Atomically write VALUE into `*PTR' and returns the previous
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   contents of `*PTR'.  */
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static inline int m68k_lock_test_and_set(volatile int *ptr, int newval) {
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  for (;;) {
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      // Loop until success.
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      int prev = *ptr;
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      if (__m68k_cmpxchg (prev, newval, ptr) == prev)
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        return prev;
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    }
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}
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#endif // M68K
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#ifdef ARM
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/*
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 * __kernel_cmpxchg
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 *
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 * Atomically store newval in *ptr if *ptr is equal to oldval for user space.
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 * Return zero if *ptr was changed or non-zero if no exchange happened.
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 * The C flag is also set if *ptr was changed to allow for assembly
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 * optimization in the calling code.
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 *
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 */
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typedef int (__kernel_cmpxchg_t)(int oldval, int newval, volatile int *ptr);
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#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0xffff0fc0)
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/* Perform an atomic compare and swap: if the current value of `*PTR'
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   is OLDVAL, then write NEWVAL into `*PTR'.  Return the contents of
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   `*PTR' before the operation.*/
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static inline int arm_compare_and_swap(int newval,
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                                       volatile int *ptr,
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                                       int oldval) {
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  for (;;) {
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      int prev = *ptr;
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      if (prev != oldval)
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        return prev;
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      if (__kernel_cmpxchg (prev, newval, ptr) == 0)
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        // Success.
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        return prev;
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      // We failed even though prev == oldval.  Try again.
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    }
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}
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/* Atomically add an int to memory.  */
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static inline int arm_add_and_fetch(volatile int *ptr, int add_value) {
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  for (;;) {
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      // Loop until a __kernel_cmpxchg succeeds.
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      int prev = *ptr;
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      if (__kernel_cmpxchg (prev, prev + add_value, ptr) == 0)
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        return prev + add_value;
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    }
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}
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/* Atomically write VALUE into `*PTR' and returns the previous
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   contents of `*PTR'.  */
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static inline int arm_lock_test_and_set(volatile int *ptr, int newval) {
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  for (;;) {
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      // Loop until a __kernel_cmpxchg succeeds.
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      int prev = *ptr;
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      if (__kernel_cmpxchg (prev, newval, ptr) == 0)
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        return prev;
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    }
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}
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#endif // ARM
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inline void Atomic::store(jint store_value, volatile jint* dest) {
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#if !defined(ARM) && !defined(M68K)
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  __sync_synchronize();
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#endif
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  *dest = store_value;
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}
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inline void Atomic::store_ptr(intptr_t store_value, intptr_t* dest) {
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#if !defined(ARM) && !defined(M68K)
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  __sync_synchronize();
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#endif
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  *dest = store_value;
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}
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inline jint Atomic::add(jint add_value, volatile jint* dest) {
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#ifdef ARM
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  return arm_add_and_fetch(dest, add_value);
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#else
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#ifdef M68K
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  return m68k_add_and_fetch(dest, add_value);
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#else
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  return __sync_add_and_fetch(dest, add_value);
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#endif // M68K
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#endif // ARM
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}
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inline intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest) {
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#ifdef ARM
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  return arm_add_and_fetch(dest, add_value);
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#else
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#ifdef M68K
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  return m68k_add_and_fetch(dest, add_value);
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#else
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  return __sync_add_and_fetch(dest, add_value);
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#endif // M68K
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#endif // ARM
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}
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inline void* Atomic::add_ptr(intptr_t add_value, volatile void* dest) {
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  return (void *) add_ptr(add_value, (volatile intptr_t *) dest);
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}
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inline void Atomic::inc(volatile jint* dest) {
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  add(1, dest);
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}
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inline void Atomic::inc_ptr(volatile intptr_t* dest) {
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  add_ptr(1, dest);
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}
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inline void Atomic::inc_ptr(volatile void* dest) {
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  add_ptr(1, dest);
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}
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inline void Atomic::dec(volatile jint* dest) {
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  add(-1, dest);
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}
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inline void Atomic::dec_ptr(volatile intptr_t* dest) {
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  add_ptr(-1, dest);
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}
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inline void Atomic::dec_ptr(volatile void* dest) {
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  add_ptr(-1, dest);
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}
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inline jint Atomic::xchg(jint exchange_value, volatile jint* dest) {
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#ifdef ARM
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  return arm_lock_test_and_set(dest, exchange_value);
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#else
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#ifdef M68K
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  return m68k_lock_test_and_set(dest, exchange_value);
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#else
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  // __sync_lock_test_and_set is a bizarrely named atomic exchange
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  // operation.  Note that some platforms only support this with the
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  // limitation that the only valid value to store is the immediate
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  // constant 1.  There is a test for this in JNI_CreateJavaVM().
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  jint result = __sync_lock_test_and_set (dest, exchange_value);
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  // All atomic operations are expected to be full memory barriers
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  // (see atomic.hpp). However, __sync_lock_test_and_set is not
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  // a full memory barrier, but an acquire barrier. Hence, this added
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  // barrier.
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  __sync_synchronize();
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  return result;
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#endif // M68K
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#endif // ARM
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}
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inline intptr_t Atomic::xchg_ptr(intptr_t exchange_value,
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                                 volatile intptr_t* dest) {
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#ifdef ARM
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  return arm_lock_test_and_set(dest, exchange_value);
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#else
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#ifdef M68K
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  return m68k_lock_test_and_set(dest, exchange_value);
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#else
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  intptr_t result = __sync_lock_test_and_set (dest, exchange_value);
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  __sync_synchronize();
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  return result;
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#endif // M68K
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#endif // ARM
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}
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inline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) {
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  return (void *) xchg_ptr((intptr_t) exchange_value,
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                           (volatile intptr_t*) dest);
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}
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// No direct support for cmpxchg of bytes; emulate using int.
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template<>
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struct Atomic::PlatformCmpxchg<1> : Atomic::CmpxchgByteUsingInt {};
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template<>
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template<typename T>
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inline T Atomic::PlatformCmpxchg<4>::operator()(T exchange_value,
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                                                T volatile* dest,
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                                                T compare_value,
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                                                cmpxchg_memory_order order) const {
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  STATIC_CAST(4 == sizeof(T));
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#ifdef ARM
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  return cmpxchg_using_helper<int>(arm_compare_and_swap, exchange_value, dest, compare_value);
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#else
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#ifdef M68K
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  return cmpxchg_using_helper<int>(m68k_compare_and_swap, exchange_value, dest, compare_value);
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#else
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  return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
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#endif // M68K
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#endif // ARM
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}
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template<>
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template<typename T>
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inline T Atomic::PlatformCmpxchg<8>::operator()(T exchange_value,
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                                                T volatile* dest,
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                                                T compare_value,
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                                                cmpxchg_memory_order order) const {
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  STATIC_CAST(8 == sizeof(T));
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  return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
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}
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inline jlong Atomic::load(const volatile jlong* src) {
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  volatile jlong dest;
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  os::atomic_copy64(src, &dest);
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  return dest;
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}
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inline void Atomic::store(jlong store_value, jlong* dest) {
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  os::atomic_copy64((volatile jlong*)&store_value, (volatile jlong*)dest);
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}
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inline void Atomic::store(jlong store_value, volatile jlong* dest) {
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  os::atomic_copy64((volatile jlong*)&store_value, dest);
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}
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#endif // OS_CPU_BSD_ZERO_VM_ATOMIC_BSD_ZERO_HPP