src/hotspot/cpu/aarch64/vm_version_aarch64.hpp
author chegar
Thu, 17 Oct 2019 20:53:35 +0100
branchdatagramsocketimpl-branch
changeset 58678 9cf78a70fa4f
parent 54582 783ddd361177
child 58679 9c3209ff7550
permissions -rw-r--r--
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/*
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 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
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 * Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef CPU_AARCH64_VM_VERSION_AARCH64_HPP
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#define CPU_AARCH64_VM_VERSION_AARCH64_HPP
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#include "runtime/globals_extension.hpp"
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#include "runtime/vm_version.hpp"
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#include "utilities/sizes.hpp"
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class VM_Version : public Abstract_VM_Version {
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  friend class JVMCIVMStructs;
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protected:
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  static int _cpu;
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  static int _model;
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  static int _model2;
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  static int _variant;
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  static int _revision;
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  static int _stepping;
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  static bool _dcpop;
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  struct PsrInfo {
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    uint32_t dczid_el0;
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    uint32_t ctr_el0;
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  };
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  static PsrInfo _psr_info;
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  static void get_processor_features();
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public:
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  // Initialization
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  static void initialize();
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  // Asserts
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  static void assert_is_initialized() {
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  }
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  static bool expensive_load(int ld_size, int scale) {
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    if (cpu_family() == CPU_ARM) {
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      // Half-word load with index shift by 1 (aka scale is 2) has
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      // extra cycle latency, e.g. ldrsh w0, [x1,w2,sxtw #1].
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      if (ld_size == 2 && scale == 2) {
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        return true;
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      }
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    }
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    return false;
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  }
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  // The CPU implementer codes can be found in
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  // ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile
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  // https://developer.arm.com/docs/ddi0487/latest
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  enum Family {
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    CPU_AMPERE    = 0xC0,
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    CPU_ARM       = 'A',
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    CPU_BROADCOM  = 'B',
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    CPU_CAVIUM    = 'C',
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    CPU_DEC       = 'D',
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    CPU_HISILICON = 'H',
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    CPU_INFINEON  = 'I',
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    CPU_MOTOROLA  = 'M',
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    CPU_NVIDIA    = 'N',
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    CPU_AMCC      = 'P',
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    CPU_QUALCOM   = 'Q',
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    CPU_MARVELL   = 'V',
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    CPU_INTEL     = 'i',
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  };
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  enum Feature_Flag {
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    CPU_FP           = (1<<0),
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    CPU_ASIMD        = (1<<1),
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    CPU_EVTSTRM      = (1<<2),
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    CPU_AES          = (1<<3),
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    CPU_PMULL        = (1<<4),
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    CPU_SHA1         = (1<<5),
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    CPU_SHA2         = (1<<6),
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    CPU_CRC32        = (1<<7),
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    CPU_LSE          = (1<<8),
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    CPU_STXR_PREFETCH= (1 << 29),
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    CPU_A53MAC       = (1 << 30),
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    CPU_DMB_ATOMICS  = (1 << 31),
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  };
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  static int cpu_family()                     { return _cpu; }
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  static int cpu_model()                      { return _model; }
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  static int cpu_model2()                     { return _model2; }
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  static int cpu_variant()                    { return _variant; }
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  static int cpu_revision()                   { return _revision; }
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  static bool supports_dcpop()                { return _dcpop; }
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  static ByteSize dczid_el0_offset() { return byte_offset_of(PsrInfo, dczid_el0); }
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  static ByteSize ctr_el0_offset()   { return byte_offset_of(PsrInfo, ctr_el0); }
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  static bool is_zva_enabled() {
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    // Check the DZP bit (bit 4) of dczid_el0 is zero
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    // and block size (bit 0~3) is not zero.
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    return ((_psr_info.dczid_el0 & 0x10) == 0 &&
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            (_psr_info.dczid_el0 & 0xf) != 0);
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  }
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  static int zva_length() {
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    assert(is_zva_enabled(), "ZVA not available");
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    return 4 << (_psr_info.dczid_el0 & 0xf);
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  }
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  static int icache_line_size() {
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    return (1 << (_psr_info.ctr_el0 & 0x0f)) * 4;
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  }
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  static int dcache_line_size() {
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    return (1 << ((_psr_info.ctr_el0 >> 16) & 0x0f)) * 4;
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  }
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  static bool supports_fast_class_init_checks() { return true; }
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};
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#endif // CPU_AARCH64_VM_VERSION_AARCH64_HPP