src/hotspot/cpu/sparc/frame_sparc.hpp
author coleenp
Thu, 10 Jan 2019 15:13:51 -0500
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8216167: Update include guards to reflect correct directories Summary: Use script and some manual fixup to fix directores names in include guards. Reviewed-by: lfoltan, eosterlund, kbarrett
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/*
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 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef CPU_SPARC_FRAME_SPARC_HPP
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#define CPU_SPARC_FRAME_SPARC_HPP
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#include "runtime/synchronizer.hpp"
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// A frame represents a physical stack frame (an activation).  Frames can be
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// C or Java frames, and the Java frames can be interpreted or compiled.
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// In contrast, vframes represent source-level activations, so that one physical frame
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// can correspond to multiple source level frames because of inlining.
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// A frame is comprised of {pc, sp, younger_sp}
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// Layout of asm interpreter frame:
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//
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//  0xfffffff
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//  ......
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// [last  extra incoming arg,  (local # Nargs > 6 ? Nargs-1 : undef)]
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// .. Note: incoming args are copied to local frame area upon entry
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// [first extra incoming arg,  (local # Nargs > 6 ? 6       : undef)]
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// [6 words for C-arg storage (unused)] Are this and next one really needed?
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// [C-aggregate-word (unused)] Yes, if want extra params to be  in same place as C convention
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// [16 words for register saving]                                    <--- FP
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// [interpreter_frame_vm_locals ] (see below)
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//              Note: Llocals is always double-word aligned
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// [first local i.e. local # 0]        <-- Llocals
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// ...
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// [last local, i.e. local # Nlocals-1]
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// [monitors                 ]
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// ....
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// [monitors                 ]    <-- Lmonitors (same as Llocals + 6*4 if none)
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//                                    (must be double-word aligned because
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//                                     monitor element size is constrained to
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//                                     doubleword)
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//
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//                                <-- Lesp (points 1 past TOS)
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// [bottom word used for stack ]
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// ...
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// [top word used for stack]    (first word of stack is double-word aligned)
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// [space for outgoing args (conservatively allocated as max_stack - 6 + interpreter_frame_extra_outgoing_argument_words)]
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// [6 words for C-arg storage]
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// [C-aggregate-word (unused)]
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// [16 words for register saving]                                    <--- SP
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// ...
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// 0x0000000
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//
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// The in registers and local registers are preserved in a block at SP.
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//
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// The first six in registers (I0..I5) hold the first six locals.
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// The locals are used as follows:
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//    Lesp         first free element of expression stack
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//                 (which grows towards __higher__ addresses)
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//    Lbcp         is set to address of bytecode to execute
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//                 It may at times (during GC) be an index instead.
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//    Lmethod      the method being interpreted
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//    Llocals      the base pointer for accessing the locals array
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//                 (lower-numbered locals have lower addresses)
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//    Lmonitors    the base pointer for accessing active monitors
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//    Lcache       a saved pointer to the method's constant pool cache
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//
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//
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// When calling out to another method,
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// G5_method is set to method to call, G5_inline_cache_klass may be set,
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// parameters are put in O registers, and also extra parameters
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// must be cleverly copied from the top of stack to the outgoing param area in the frame,
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// All frames:
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  enum {
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    // normal return address is 2 words past PC
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    pc_return_offset                             = 2 * BytesPerInstWord,
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    // size of each block, in order of increasing address:
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    register_save_words                          = 16,
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    callee_aggregate_return_pointer_words        =  0,
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    callee_register_argument_save_area_words     =  6,
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    // memory_parameter_words                    = <arbitrary>,
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    // offset of each block, in order of increasing address:
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    // (note: callee_register_argument_save_area_words == Assembler::n_register_parameters)
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    register_save_words_sp_offset                = 0,
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    callee_aggregate_return_pointer_sp_offset    = register_save_words_sp_offset + register_save_words,
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    callee_register_argument_save_area_sp_offset = callee_aggregate_return_pointer_sp_offset + callee_aggregate_return_pointer_words,
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    memory_parameter_word_sp_offset              = callee_register_argument_save_area_sp_offset + callee_register_argument_save_area_words,
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    varargs_offset                               = memory_parameter_word_sp_offset
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  };
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  intptr_t*  _younger_sp;                 // optional SP of callee (used to locate O7)
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  int        _sp_adjustment_by_callee;   // adjustment in words to SP by callee for making locals contiguous
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  // Note:  On SPARC, unlike Intel, the saved PC for a stack frame
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  // is stored at a __variable__ distance from that frame's SP.
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  // (In fact, it may be in the register save area of the callee frame,
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  // but that fact need not bother us.)  Thus, we must store the
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  // address of that saved PC explicitly.  On the other hand, SPARC
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  // stores the FP for a frame at a fixed offset from the frame's SP,
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  // so there is no need for a separate "frame::_fp" field.
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  // Accessors
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  intptr_t* younger_sp() const {
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    assert(_younger_sp != NULL, "frame must possess a younger_sp");
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    return _younger_sp;
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  }
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  int callee_sp_adjustment() const { return _sp_adjustment_by_callee; }
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  void set_sp_adjustment_by_callee(int number_of_words) { _sp_adjustment_by_callee = number_of_words; }
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  // Constructors
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  // This constructor relies on the fact that the creator of a frame
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  // has flushed register windows which the frame will refer to, and
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  // that those register windows will not be reloaded until the frame is
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  // done reading and writing the stack.  Moreover, if the "younger_sp"
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  // argument points into the register save area of the next younger
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  // frame (though it need not), the register window for that next
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  // younger frame must also stay flushed.  (The caller is responsible
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  // for ensuring this.)
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  frame(intptr_t* sp, intptr_t* younger_sp, bool younger_frame_adjusted_stack = false);
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  // make a deficient frame which doesn't know where its PC is:
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  enum unpatchable_t { unpatchable };
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  frame(intptr_t* sp, unpatchable_t, address pc = NULL, CodeBlob* cb = NULL);
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  void init(intptr_t* sp, address pc, CodeBlob* cb);
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  // Walk from sp outward looking for old_sp, and return old_sp's predecessor
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  // (i.e. return the sp from the frame where old_sp is the fp).
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  // Register windows are assumed to be flushed for the stack in question.
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  static intptr_t* next_younger_sp_or_null(intptr_t* old_sp, intptr_t* sp);
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  // Return true if sp is a younger sp in the stack described by valid_sp.
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  static bool is_valid_stack_pointer(intptr_t* valid_sp, intptr_t* sp);
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  // accessors for the instance variables
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  intptr_t*   fp() const { return (intptr_t*) ((intptr_t)(sp()[FP->sp_offset_in_saved_window()]) + STACK_BIAS ); }
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  // All frames
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  intptr_t*  fp_addr_at(int index) const   { return &fp()[index];    }
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  intptr_t*  sp_addr_at(int index) const   { return &sp()[index];    }
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  intptr_t   fp_at(     int index) const   { return *fp_addr_at(index); }
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  intptr_t   sp_at(     int index) const   { return *sp_addr_at(index); }
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  inline address* I7_addr() const;
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  inline address* O7_addr() const;
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  inline address* I0_addr() const;
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  inline address* O0_addr() const;
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  intptr_t*  younger_sp_addr_at(int index) const   { return &younger_sp()[index];    }
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  // access to SPARC arguments and argument registers
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  // Assumes reg is an in/local register
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  intptr_t*     register_addr(Register reg) const {
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    return sp_addr_at(reg->sp_offset_in_saved_window());
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  }
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  // Assumes reg is an out register
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  intptr_t*     out_register_addr(Register reg) const {
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    return younger_sp_addr_at(reg->after_save()->sp_offset_in_saved_window());
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  }
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  // Interpreter frames
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  // Asm interpreter
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  enum interpreter_frame_vm_locals {
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       // 2 words, also used to save float regs across  calls to C
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       interpreter_frame_d_scratch_fp_offset          = -2,
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       interpreter_frame_l_scratch_fp_offset          = -4,
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       interpreter_frame_mirror_offset                = -5, // keep interpreted method alive
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       interpreter_frame_oop_temp_offset              = -6, // for native calls only
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       interpreter_frame_vm_locals_fp_offset          = -6, // should be same as above, and should be zero mod 8
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       interpreter_frame_vm_local_words = -interpreter_frame_vm_locals_fp_offset,
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       // interpreter frame set-up needs to save 2 extra words in outgoing param area
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       // for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_
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       interpreter_frame_extra_outgoing_argument_words = 2
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  };
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  enum compiler_frame_fixed_locals {
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       compiler_frame_vm_locals_fp_offset          = -2
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  };
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  ConstantPoolCache** interpreter_frame_cpoolcache_addr() const;
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  // where Lmonitors is saved:
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  inline BasicObjectLock** interpreter_frame_monitors_addr() const;
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  inline intptr_t** interpreter_frame_esp_addr() const;
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  inline void interpreter_frame_set_tos_address(intptr_t* x);
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  // monitors:
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  // next two fns read and write Lmonitors value,
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 private:
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  BasicObjectLock* interpreter_frame_monitors() const;
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  void interpreter_frame_set_monitors(BasicObjectLock* monitors);
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  static jint interpreter_frame_expression_stack_direction() { return -1; }
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#endif // CPU_SPARC_FRAME_SPARC_HPP