src/hotspot/cpu/aarch64/c1_LinearScan_aarch64.hpp
author coleenp
Thu, 10 Jan 2019 15:13:51 -0500
changeset 53244 9807daeb47c4
parent 47216 71c04702a3d5
permissions -rw-r--r--
8216167: Update include guards to reflect correct directories Summary: Use script and some manual fixup to fix directores names in include guards. Reviewed-by: lfoltan, eosterlund, kbarrett
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/*
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 * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
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 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef CPU_AARCH64_C1_LINEARSCAN_AARCH64_HPP
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#define CPU_AARCH64_C1_LINEARSCAN_AARCH64_HPP
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inline bool LinearScan::is_processed_reg_num(int reg_num) {
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  return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map;
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}
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inline int LinearScan::num_physical_regs(BasicType type) {
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  return 1;
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}
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inline bool LinearScan::requires_adjacent_regs(BasicType type) {
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  return false;
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}
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inline bool LinearScan::is_caller_save(int assigned_reg) {
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  assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers");
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  if (assigned_reg < pd_first_callee_saved_reg)
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    return true;
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  if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg)
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    return true;
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  if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg)
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    return true;
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  return false;
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}
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inline void LinearScan::pd_add_temps(LIR_Op* op) {
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  // FIXME ??
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}
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// Implementation of LinearScanWalker
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inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {
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  if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) {
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    assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only");
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    _first_reg = pd_first_callee_saved_reg;
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    _last_reg = pd_last_callee_saved_reg;
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    return true;
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  } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || cur->type() == T_ADDRESS || cur->type() == T_METADATA) {
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    _first_reg = pd_first_cpu_reg;
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    _last_reg = pd_last_allocatable_cpu_reg;
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    return true;
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  }
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  return false;
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}
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#endif // CPU_AARCH64_C1_LINEARSCAN_AARCH64_HPP