hotspot/src/share/vm/opto/ifg.cpp
author morris
Tue, 01 Apr 2014 09:05:20 -0700
changeset 23528 8f1a7f5e8066
parent 22915 231c85af5482
child 24424 2658d7834c6e
permissions -rw-r--r--
8001532: C2 node files refactoring Summary: Split C2 node files into cast, convert, countbits, intrinsic, move, narrowptr and opaquenode classes Reviewed-by: kvn, morris
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/*
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 * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "compiler/oopMap.hpp"
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#include "memory/allocation.inline.hpp"
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#include "opto/addnode.hpp"
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#include "opto/block.hpp"
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#include "opto/callnode.hpp"
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#include "opto/cfgnode.hpp"
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#include "opto/chaitin.hpp"
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#include "opto/coalesce.hpp"
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#include "opto/indexSet.hpp"
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#include "opto/machnode.hpp"
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#include "opto/memnode.hpp"
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#include "opto/opcodes.hpp"
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PhaseIFG::PhaseIFG( Arena *arena ) : Phase(Interference_Graph), _arena(arena) {
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}
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void PhaseIFG::init( uint maxlrg ) {
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  _maxlrg = maxlrg;
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  _yanked = new (_arena) VectorSet(_arena);
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  _is_square = false;
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  // Make uninitialized adjacency lists
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  _adjs = (IndexSet*)_arena->Amalloc(sizeof(IndexSet)*maxlrg);
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  // Also make empty live range structures
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  _lrgs = (LRG *)_arena->Amalloc( maxlrg * sizeof(LRG) );
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  memset(_lrgs,0,sizeof(LRG)*maxlrg);
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  // Init all to empty
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  for( uint i = 0; i < maxlrg; i++ ) {
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    _adjs[i].initialize(maxlrg);
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    _lrgs[i].Set_All();
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  }
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}
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// Add edge between vertices a & b.  These are sorted (triangular matrix),
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// then the smaller number is inserted in the larger numbered array.
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int PhaseIFG::add_edge( uint a, uint b ) {
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  lrgs(a).invalid_degree();
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  lrgs(b).invalid_degree();
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  // Sort a and b, so that a is bigger
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  assert( !_is_square, "only on triangular" );
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  if( a < b ) { uint tmp = a; a = b; b = tmp; }
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  return _adjs[a].insert( b );
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}
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// Add an edge between 'a' and everything in the vector.
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void PhaseIFG::add_vector( uint a, IndexSet *vec ) {
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  // IFG is triangular, so do the inserts where 'a' < 'b'.
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  assert( !_is_square, "only on triangular" );
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  IndexSet *adjs_a = &_adjs[a];
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  if( !vec->count() ) return;
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  IndexSetIterator elements(vec);
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  uint neighbor;
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  while ((neighbor = elements.next()) != 0) {
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    add_edge( a, neighbor );
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  }
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}
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// Is there an edge between a and b?
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int PhaseIFG::test_edge( uint a, uint b ) const {
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  // Sort a and b, so that a is larger
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  assert( !_is_square, "only on triangular" );
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  if( a < b ) { uint tmp = a; a = b; b = tmp; }
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  return _adjs[a].member(b);
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}
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// Convert triangular matrix to square matrix
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void PhaseIFG::SquareUp() {
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  assert( !_is_square, "only on triangular" );
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  // Simple transpose
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  for( uint i = 0; i < _maxlrg; i++ ) {
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    IndexSetIterator elements(&_adjs[i]);
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    uint datum;
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    while ((datum = elements.next()) != 0) {
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      _adjs[datum].insert( i );
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    }
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  }
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  _is_square = true;
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}
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// Compute effective degree in bulk
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void PhaseIFG::Compute_Effective_Degree() {
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  assert( _is_square, "only on square" );
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  for( uint i = 0; i < _maxlrg; i++ )
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    lrgs(i).set_degree(effective_degree(i));
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}
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int PhaseIFG::test_edge_sq( uint a, uint b ) const {
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  assert( _is_square, "only on square" );
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  // Swap, so that 'a' has the lesser count.  Then binary search is on
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  // the smaller of a's list and b's list.
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  if( neighbor_cnt(a) > neighbor_cnt(b) ) { uint tmp = a; a = b; b = tmp; }
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  //return _adjs[a].unordered_member(b);
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  return _adjs[a].member(b);
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}
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// Union edges of B into A
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void PhaseIFG::Union( uint a, uint b ) {
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  assert( _is_square, "only on square" );
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  IndexSet *A = &_adjs[a];
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  IndexSetIterator b_elements(&_adjs[b]);
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  uint datum;
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  while ((datum = b_elements.next()) != 0) {
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    if(A->insert(datum)) {
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      _adjs[datum].insert(a);
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      lrgs(a).invalid_degree();
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      lrgs(datum).invalid_degree();
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    }
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  }
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}
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// Yank a Node and all connected edges from the IFG.  Return a
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// list of neighbors (edges) yanked.
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IndexSet *PhaseIFG::remove_node( uint a ) {
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  assert( _is_square, "only on square" );
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  assert( !_yanked->test(a), "" );
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  _yanked->set(a);
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  // I remove the LRG from all neighbors.
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  IndexSetIterator elements(&_adjs[a]);
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  LRG &lrg_a = lrgs(a);
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  uint datum;
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  while ((datum = elements.next()) != 0) {
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    _adjs[datum].remove(a);
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    lrgs(datum).inc_degree( -lrg_a.compute_degree(lrgs(datum)) );
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  }
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  return neighbors(a);
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}
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// Re-insert a yanked Node.
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void PhaseIFG::re_insert( uint a ) {
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  assert( _is_square, "only on square" );
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  assert( _yanked->test(a), "" );
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  (*_yanked) >>= a;
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  IndexSetIterator elements(&_adjs[a]);
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  uint datum;
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  while ((datum = elements.next()) != 0) {
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    _adjs[datum].insert(a);
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    lrgs(datum).invalid_degree();
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  }
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}
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// Compute the degree between 2 live ranges.  If both live ranges are
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// aligned-adjacent powers-of-2 then we use the MAX size.  If either is
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// mis-aligned (or for Fat-Projections, not-adjacent) then we have to
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// MULTIPLY the sizes.  Inspect Brigg's thesis on register pairs to see why
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// this is so.
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int LRG::compute_degree( LRG &l ) const {
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  int tmp;
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  int num_regs = _num_regs;
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  int nregs = l.num_regs();
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  tmp =  (_fat_proj || l._fat_proj)     // either is a fat-proj?
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    ? (num_regs * nregs)                // then use product
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    : MAX2(num_regs,nregs);             // else use max
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  return tmp;
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}
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// Compute effective degree for this live range.  If both live ranges are
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// aligned-adjacent powers-of-2 then we use the MAX size.  If either is
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// mis-aligned (or for Fat-Projections, not-adjacent) then we have to
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// MULTIPLY the sizes.  Inspect Brigg's thesis on register pairs to see why
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// this is so.
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int PhaseIFG::effective_degree( uint lidx ) const {
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  int eff = 0;
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  int num_regs = lrgs(lidx).num_regs();
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  int fat_proj = lrgs(lidx)._fat_proj;
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  IndexSet *s = neighbors(lidx);
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  IndexSetIterator elements(s);
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  uint nidx;
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  while((nidx = elements.next()) != 0) {
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    LRG &lrgn = lrgs(nidx);
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    int nregs = lrgn.num_regs();
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    eff += (fat_proj || lrgn._fat_proj) // either is a fat-proj?
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      ? (num_regs * nregs)              // then use product
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      : MAX2(num_regs,nregs);           // else use max
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  }
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  return eff;
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}
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#ifndef PRODUCT
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void PhaseIFG::dump() const {
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  tty->print_cr("-- Interference Graph --%s--",
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                _is_square ? "square" : "triangular" );
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  if( _is_square ) {
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    for( uint i = 0; i < _maxlrg; i++ ) {
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      tty->print( (*_yanked)[i] ? "XX " : "  ");
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      tty->print("L%d: { ",i);
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      IndexSetIterator elements(&_adjs[i]);
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      uint datum;
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      while ((datum = elements.next()) != 0) {
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        tty->print("L%d ", datum);
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      }
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      tty->print_cr("}");
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    }
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    return;
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  }
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  // Triangular
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  for( uint i = 0; i < _maxlrg; i++ ) {
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    uint j;
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    tty->print( (*_yanked)[i] ? "XX " : "  ");
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    tty->print("L%d: { ",i);
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    for( j = _maxlrg; j > i; j-- )
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      if( test_edge(j - 1,i) ) {
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        tty->print("L%d ",j - 1);
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      }
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    tty->print("| ");
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    IndexSetIterator elements(&_adjs[i]);
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    uint datum;
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    while ((datum = elements.next()) != 0) {
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      tty->print("L%d ", datum);
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    }
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    tty->print("}\n");
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  }
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  tty->print("\n");
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}
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void PhaseIFG::stats() const {
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  ResourceMark rm;
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  int *h_cnt = NEW_RESOURCE_ARRAY(int,_maxlrg*2);
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  memset( h_cnt, 0, sizeof(int)*_maxlrg*2 );
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  uint i;
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  for( i = 0; i < _maxlrg; i++ ) {
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    h_cnt[neighbor_cnt(i)]++;
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  }
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  tty->print_cr("--Histogram of counts--");
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  for( i = 0; i < _maxlrg*2; i++ )
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    if( h_cnt[i] )
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      tty->print("%d/%d ",i,h_cnt[i]);
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  tty->print_cr("");
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}
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void PhaseIFG::verify( const PhaseChaitin *pc ) const {
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  // IFG is square, sorted and no need for Find
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  for( uint i = 0; i < _maxlrg; i++ ) {
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    assert(!((*_yanked)[i]) || !neighbor_cnt(i), "Is removed completely" );
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    IndexSet *set = &_adjs[i];
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    IndexSetIterator elements(set);
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    uint idx;
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    uint last = 0;
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    while ((idx = elements.next()) != 0) {
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      assert(idx != i, "Must have empty diagonal");
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      assert(pc->_lrg_map.find_const(idx) == idx, "Must not need Find");
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      assert(_adjs[idx].member(i), "IFG not square");
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      assert(!(*_yanked)[idx], "No yanked neighbors");
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      assert(last < idx, "not sorted increasing");
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      last = idx;
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    }
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    assert(!lrgs(i)._degree_valid || effective_degree(i) == lrgs(i).degree(), "degree is valid but wrong");
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  }
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}
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#endif
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/*
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 * Interfere this register with everything currently live.
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 * Check for interference by checking overlap of regmasks.
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 * Only interfere if acceptable register masks overlap.
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 */
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void PhaseChaitin::interfere_with_live(uint lid, IndexSet* liveout) {
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  LRG& lrg = lrgs(lid);
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  const RegMask& rm = lrg.mask();
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  IndexSetIterator elements(liveout);
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  uint interfering_lid = elements.next();
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  while (interfering_lid != 0) {
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    LRG& interfering_lrg = lrgs(interfering_lid);
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    if (rm.overlap(interfering_lrg.mask())) {
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      _ifg->add_edge(lid, interfering_lid);
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    }
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    interfering_lid = elements.next();
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  }
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}
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// Actually build the interference graph.  Uses virtual registers only, no
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// physical register masks.  This allows me to be very aggressive when
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// coalescing copies.  Some of this aggressiveness will have to be undone
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// later, but I'd rather get all the copies I can now (since unremoved copies
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// at this point can end up in bad places).  Copies I re-insert later I have
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// more opportunity to insert them in low-frequency locations.
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void PhaseChaitin::build_ifg_virtual( ) {
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  // For all blocks (in any order) do...
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  for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
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    Block* block = _cfg.get_block(i);
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    IndexSet* liveout = _live->live(block);
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    // The IFG is built by a single reverse pass over each basic block.
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    // Starting with the known live-out set, we remove things that get
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    // defined and add things that become live (essentially executing one
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    // pass of a standard LIVE analysis). Just before a Node defines a value
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    // (and removes it from the live-ness set) that value is certainly live.
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    // The defined value interferes with everything currently live.  The
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    // value is then removed from the live-ness set and it's inputs are
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    // added to the live-ness set.
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    for (uint j = block->end_idx() + 1; j > 1; j--) {
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      Node* n = block->get_node(j - 1);
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      // Get value being defined
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      uint r = _lrg_map.live_range_id(n);
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      // Some special values do not allocate
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      if (r) {
1
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        // Remove from live-out set
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        liveout->remove(r);
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   334
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        // Copies do not define a new value and so do not interfere.
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        // Remove the copies source from the liveout set before interfering.
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        uint idx = n->is_Copy();
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        if (idx != 0) {
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          liveout->remove(_lrg_map.live_range_id(n->in(idx)));
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        }
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        // Interfere with everything live
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        interfere_with_live(r, liveout);
1
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      }
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      // Make all inputs live
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   347
      if (!n->is_Phi()) {      // Phi function uses come from prior block
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        for(uint k = 1; k < n->req(); k++) {
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          liveout->insert(_lrg_map.live_range_id(n->in(k)));
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        }
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      }
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      // 2-address instructions always have the defined value live
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      // on entry to the instruction, even though it is being defined
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      // by the instruction.  We pretend a virtual copy sits just prior
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   356
      // to the instruction and kills the src-def'd register.
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      // In other words, for 2-address instructions the defined value
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      // interferes with all inputs.
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      uint idx;
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      if( n->is_Mach() && (idx = n->as_Mach()->two_adr()) ) {
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   361
        const MachNode *mach = n->as_Mach();
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        // Sometimes my 2-address ADDs are commuted in a bad way.
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   363
        // We generally want the USE-DEF register to refer to the
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   364
        // loop-varying quantity, to avoid a copy.
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   365
        uint op = mach->ideal_Opcode();
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        // Check that mach->num_opnds() == 3 to ensure instruction is
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   367
        // not subsuming constants, effectively excludes addI_cin_imm
489c9b5090e2 Initial load
duke
parents:
diff changeset
   368
        // Can NOT swap for instructions like addI_cin_imm since it
489c9b5090e2 Initial load
duke
parents:
diff changeset
   369
        // is adding zero to yhi + carry and the second ideal-input
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
        // points to the result of adding low-halves.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
        // Checking req() and num_opnds() does NOT distinguish addI_cout from addI_cout_imm
489c9b5090e2 Initial load
duke
parents:
diff changeset
   372
        if( (op == Op_AddI && mach->req() == 3 && mach->num_opnds() == 3) &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   373
            n->in(1)->bottom_type()->base() == Type::Int &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   374
            // See if the ADD is involved in a tight data loop the wrong way
489c9b5090e2 Initial load
duke
parents:
diff changeset
   375
            n->in(2)->is_Phi() &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
   376
            n->in(2)->in(2) == n ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   377
          Node *tmp = n->in(1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   378
          n->set_req( 1, n->in(2) );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   379
          n->set_req( 2, tmp );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   380
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   381
        // Defined value interferes with all inputs
17013
22a05c7f3314 8011621: live_ranges_in_separate_class.patch
neliasso
parents: 16618
diff changeset
   382
        uint lidx = _lrg_map.live_range_id(n->in(idx));
22a05c7f3314 8011621: live_ranges_in_separate_class.patch
neliasso
parents: 16618
diff changeset
   383
        for (uint k = 1; k < n->req(); k++) {
22a05c7f3314 8011621: live_ranges_in_separate_class.patch
neliasso
parents: 16618
diff changeset
   384
          uint kidx = _lrg_map.live_range_id(n->in(k));
22a05c7f3314 8011621: live_ranges_in_separate_class.patch
neliasso
parents: 16618
diff changeset
   385
          if (kidx != lidx) {
22a05c7f3314 8011621: live_ranges_in_separate_class.patch
neliasso
parents: 16618
diff changeset
   386
            _ifg->add_edge(r, kidx);
22a05c7f3314 8011621: live_ranges_in_separate_class.patch
neliasso
parents: 16618
diff changeset
   387
          }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
    } // End of forall instructions in block
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
  } // End of forall blocks
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   393
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   394
#ifdef ASSERT
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   395
uint PhaseChaitin::count_int_pressure(IndexSet* liveout) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
  IndexSetIterator elements(liveout);
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   397
  uint lidx = elements.next();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
  uint cnt = 0;
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   399
  while (lidx != 0) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   400
    LRG& lrg = lrgs(lidx);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   401
    if (lrg.mask_is_nonempty_and_up() &&
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   402
        !lrg.is_float_or_vector() &&
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   403
        lrg.mask().overlap(*Matcher::idealreg2regmask[Op_RegI])) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   404
      cnt += lrg.reg_pressure();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   405
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   406
    lidx = elements.next();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   407
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   408
  return cnt;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   409
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   411
uint PhaseChaitin::count_float_pressure(IndexSet* liveout) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   412
  IndexSetIterator elements(liveout);
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   413
  uint lidx = elements.next();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
  uint cnt = 0;
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   415
  while (lidx != 0) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   416
    LRG& lrg = lrgs(lidx);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   417
    if (lrg.mask_is_nonempty_and_up() && lrg.is_float_or_vector()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   418
      cnt += lrg.reg_pressure();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   419
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   420
    lidx = elements.next();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   421
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   422
  return cnt;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   423
}
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   424
#endif
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   426
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   427
 * Adjust register pressure down by 1.  Capture last hi-to-low transition,
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   428
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   429
void PhaseChaitin::lower_pressure(Block* b, uint location, LRG& lrg, IndexSet* liveout, Pressure& int_pressure, Pressure& float_pressure) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   430
  if (lrg.mask_is_nonempty_and_up()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   431
    if (lrg.is_float_or_vector()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   432
      float_pressure.lower(lrg, location);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   433
    } else {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   434
      // Do not count the SP and flag registers
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   435
      const RegMask& r = lrg.mask();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   436
      if (r.overlap(*Matcher::idealreg2regmask[Op_RegI])) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   437
        int_pressure.lower(lrg, location);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   438
      }
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   439
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   440
  }
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   441
  assert(int_pressure.current_pressure() == count_int_pressure(liveout), "the int pressure is incorrect");
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   442
  assert(float_pressure.current_pressure() == count_float_pressure(liveout), "the float pressure is incorrect");
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   443
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   444
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   445
/* Go to the first non-phi index in a block */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   446
static uint first_nonphi_index(Block* b) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   447
  uint i;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   448
  uint end_idx = b->end_idx();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   449
  for (i = 1; i < end_idx; i++) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   450
    Node* n = b->get_node(i);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   451
    if (!n->is_Phi()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   452
      break;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   453
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   454
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   455
  return i;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   456
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   457
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   458
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   459
 * Spills could be inserted before a CreateEx node which should be the first
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   460
 * instruction in a block after Phi nodes. If so, move the CreateEx node up.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   461
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   462
static void move_exception_node_up(Block* b, uint first_inst, uint last_inst) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   463
  for (uint i = first_inst; i < last_inst; i++) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   464
    Node* ex = b->get_node(i);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   465
    if (ex->is_SpillCopy()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   466
      continue;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   467
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   468
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   469
    if (i > first_inst &&
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   470
        ex->is_Mach() && ex->as_Mach()->ideal_Opcode() == Op_CreateEx) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   471
      b->remove_node(i);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   472
      b->insert_node(ex, first_inst);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   473
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   474
    // Stop once a CreateEx or any other node is found
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   475
    break;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   476
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   477
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   478
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   479
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   480
 * When new live ranges are live, we raise the register pressure
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   481
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   482
void PhaseChaitin::raise_pressure(Block* b, LRG& lrg, Pressure& int_pressure, Pressure& float_pressure) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   483
  if (lrg.mask_is_nonempty_and_up()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   484
    if (lrg.is_float_or_vector()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   485
      float_pressure.raise(lrg);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   486
    } else {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   487
      // Do not count the SP and flag registers
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   488
      const RegMask& rm = lrg.mask();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   489
      if (rm.overlap(*Matcher::idealreg2regmask[Op_RegI])) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   490
        int_pressure.raise(lrg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   496
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   497
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   498
 * Computes the initial register pressure of a block, looking at all live
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   499
 * ranges in the liveout. The register pressure is computed for both float
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   500
 * and int/pointer registers.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   501
 * Live ranges in the liveout are presumed live for the whole block.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   502
 * We add the cost for the whole block to the area of the live ranges initially.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   503
 * If a live range gets killed in the block, we'll subtract the unused part of
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   504
 * the block from the area.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   505
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   506
void PhaseChaitin::compute_initial_block_pressure(Block* b, IndexSet* liveout, Pressure& int_pressure, Pressure& float_pressure, double cost) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   507
  IndexSetIterator elements(liveout);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   508
  uint lid = elements.next();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   509
  while (lid != 0) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   510
    LRG& lrg = lrgs(lid);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   511
    lrg._area += cost;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   512
    raise_pressure(b, lrg, int_pressure, float_pressure);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   513
    lid = elements.next();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   514
  }
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   515
  assert(int_pressure.current_pressure() == count_int_pressure(liveout), "the int pressure is incorrect");
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   516
  assert(float_pressure.current_pressure() == count_float_pressure(liveout), "the float pressure is incorrect");
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   517
}
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   519
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   520
 * Remove dead node if it's not used.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   521
 * We only remove projection nodes if the node "defining" the projection is
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   522
 * dead, for example on x86, if we have a dead Add node we remove its
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   523
 * RFLAGS node.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   524
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   525
bool PhaseChaitin::remove_node_if_not_used(Block* b, uint location, Node* n, uint lid, IndexSet* liveout) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   526
  Node* def = n->in(0);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   527
  if (!n->is_Proj() ||
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   528
      (_lrg_map.live_range_id(def) && !liveout->member(_lrg_map.live_range_id(def)))) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   529
    b->remove_node(location);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   530
    LRG& lrg = lrgs(lid);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   531
    if (lrg._def == n) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   532
      lrg._def = 0;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   533
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   534
    n->disconnect_inputs(NULL, C);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   535
    _cfg.unmap_node_from_block(n);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   536
    n->replace_by(C->top());
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   537
    return true;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   538
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   539
  return false;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   540
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   541
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   542
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   543
 * When encountering a fat projection, we might go from a low to high to low
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   544
 * (since the fat proj only lives at this instruction) going backwards in the
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   545
 * block. If we find a low to high transition, we record it.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   546
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   547
void PhaseChaitin::check_for_high_pressure_transition_at_fatproj(uint& block_reg_pressure, uint location, LRG& lrg, Pressure& pressure, const int op_regtype) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   548
  RegMask mask_tmp = lrg.mask();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   549
  mask_tmp.AND(*Matcher::idealreg2regmask[op_regtype]);
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   550
  pressure.check_pressure_at_fatproj(location, mask_tmp);
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   551
}
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   553
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   554
 * Insure high score for immediate-use spill copies so they get a color.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   555
 * All single-use MachSpillCopy(s) that immediately precede their
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   556
 * use must color early.  If a longer live range steals their
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   557
 * color, the spill copy will split and may push another spill copy
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   558
 * further away resulting in an infinite spill-split-retry cycle.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   559
 * Assigning a zero area results in a high score() and a good
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   560
 * location in the simplify list.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   561
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   562
void PhaseChaitin::assign_high_score_to_immediate_copies(Block* b, Node* n, LRG& lrg, uint next_inst, uint last_inst) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   563
  if (n->is_SpillCopy() &&
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   564
      lrg.is_singledef() && // A multi defined live range can still split
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   565
      n->outcnt() == 1 &&   // and use must be in this block
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   566
      _cfg.get_block_for_node(n->unique_out()) == b) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   567
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   568
    Node* single_use = n->unique_out();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   569
    assert(b->find_node(single_use) >= next_inst, "Use must be later in block");
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   570
    // Use can be earlier in block if it is a Phi, but then I should be a MultiDef
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   571
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   572
    // Find first non SpillCopy 'm' that follows the current instruction
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   573
    // (current_inst - 1) is index for current instruction 'n'
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   574
    Node* m = n;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   575
    for (uint i = next_inst; i <= last_inst && m->is_SpillCopy(); ++i) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   576
      m = b->get_node(i);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   577
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   578
    if (m == single_use) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   579
      lrg._area = 0.0;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   580
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   581
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   582
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   583
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   584
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   585
 * Copies do not define a new value and so do not interfere.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   586
 * Remove the copies source from the liveout set before interfering.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   587
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   588
void PhaseChaitin::remove_interference_from_copy(Block* b, uint location, uint lid_copy, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   589
  if (liveout->remove(lid_copy)) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   590
    LRG& lrg_copy = lrgs(lid_copy);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   591
    lrg_copy._area -= cost;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   592
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   593
    // Lower register pressure since copy and definition can share the same register
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   594
    lower_pressure(b, location, lrg_copy, liveout, int_pressure, float_pressure);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   595
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   596
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   597
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   598
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   599
 * The defined value must go in a particular register. Remove that register from
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   600
 * all conflicting parties and avoid the interference.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   601
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   602
void PhaseChaitin::remove_bound_register_from_interfering_live_ranges(LRG& lrg, IndexSet* liveout, uint& must_spill) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   603
  // Check for common case
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   604
  const RegMask& rm = lrg.mask();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   605
  int r_size = lrg.num_regs();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   606
  // Smear odd bits
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   607
  IndexSetIterator elements(liveout);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   608
  uint l = elements.next();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   609
  while (l != 0) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   610
    LRG& interfering_lrg = lrgs(l);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   611
    // If 'l' must spill already, do not further hack his bits.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   612
    // He'll get some interferences and be forced to spill later.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   613
    if (interfering_lrg._must_spill) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   614
      l = elements.next();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   615
      continue;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   616
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   617
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   618
    // Remove bound register(s) from 'l's choices
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   619
    RegMask old = interfering_lrg.mask();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   620
    uint old_size = interfering_lrg.mask_size();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   621
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   622
    // Remove the bits from LRG 'rm' from LRG 'l' so 'l' no
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   623
    // longer interferes with 'rm'.  If 'l' requires aligned
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   624
    // adjacent pairs, subtract out bit pairs.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   625
    assert(!interfering_lrg._is_vector || !interfering_lrg._fat_proj, "sanity");
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   626
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   627
    if (interfering_lrg.num_regs() > 1 && !interfering_lrg._fat_proj) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   628
      RegMask r2mask = rm;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   629
      // Leave only aligned set of bits.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   630
      r2mask.smear_to_sets(interfering_lrg.num_regs());
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   631
      // It includes vector case.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   632
      interfering_lrg.SUBTRACT(r2mask);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   633
      interfering_lrg.compute_set_mask_size();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   634
    } else if (r_size != 1) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   635
      // fat proj
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   636
      interfering_lrg.SUBTRACT(rm);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   637
      interfering_lrg.compute_set_mask_size();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   638
    } else {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   639
      // Common case: size 1 bound removal
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   640
      OptoReg::Name r_reg = rm.find_first_elem();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   641
      if (interfering_lrg.mask().Member(r_reg)) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   642
        interfering_lrg.Remove(r_reg);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   643
        interfering_lrg.set_mask_size(interfering_lrg.mask().is_AllStack() ? LRG::AllStack_size : old_size - 1);
19330
49d6711171e6 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 19279
diff changeset
   644
      }
49d6711171e6 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 19279
diff changeset
   645
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   646
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   647
    // If 'l' goes completely dry, it must spill.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   648
    if (interfering_lrg.not_free()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   649
      // Give 'l' some kind of reasonable mask, so it picks up
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   650
      // interferences (and will spill later).
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   651
      interfering_lrg.set_mask(old);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   652
      interfering_lrg.set_mask_size(old_size);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   653
      must_spill++;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   654
      interfering_lrg._must_spill = 1;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   655
      interfering_lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   656
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   657
    l = elements.next();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   658
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   659
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   660
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   661
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   662
 * Start loop at 1 (skip control edge) for most Nodes. SCMemProj's might be the
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   663
 * sole use of a StoreLConditional. While StoreLConditionals set memory (the
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   664
 * SCMemProj use) they also def flags; if that flag def is unused the allocator
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   665
 * sees a flag-setting instruction with no use of the flags and assumes it's
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   666
 * dead.  This keeps the (useless) flag-setting behavior alive while also
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   667
 * keeping the (useful) memory update effect.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   668
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   669
void PhaseChaitin::add_input_to_liveout(Block* b, Node* n, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   670
  JVMState* jvms = n->jvms();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   671
  uint debug_start = jvms ? jvms->debug_start() : 999999;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   672
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   673
  for (uint k = ((n->Opcode() == Op_SCMemProj) ? 0:1); k < n->req(); k++) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   674
    Node* def = n->in(k);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   675
    uint lid = _lrg_map.live_range_id(def);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   676
    if (!lid) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   677
      continue;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   678
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   679
    LRG& lrg = lrgs(lid);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   680
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   681
    // No use-side cost for spilling debug info
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   682
    if (k < debug_start) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   683
      // A USE costs twice block frequency (once for the Load, once
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   684
      // for a Load-delay).  Rematerialized uses only cost once.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   685
      lrg._cost += (def->rematerialize() ? b->_freq : (b->_freq * 2));
2030
39d55e4534b4 6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
kvn
parents: 1412
diff changeset
   686
    }
39d55e4534b4 6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
kvn
parents: 1412
diff changeset
   687
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   688
    if (liveout->insert(lid)) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   689
      // Newly live things assumed live from here to top of block
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   690
      lrg._area += cost;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   691
      raise_pressure(b, lrg, int_pressure, float_pressure);
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   692
      assert(int_pressure.current_pressure() == count_int_pressure(liveout), "the int pressure is incorrect");
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   693
      assert(float_pressure.current_pressure() == count_float_pressure(liveout), "the float pressure is incorrect");
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   694
    }
22915
231c85af5482 8033260: assert(lrg._area >= 0.0) failed: negative spill area
adlertz
parents: 22912
diff changeset
   695
    assert(lrg._area >= 0.0, "negative spill area" );
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   696
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   697
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   698
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   699
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   700
 * If we run off the top of the block with high pressure just record that the
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   701
 * whole block is high pressure. (Even though we might have a transition
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   702
 * later down in the block)
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   703
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   704
void PhaseChaitin::check_for_high_pressure_block(Pressure& pressure) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   705
  // current pressure now means the pressure before the first instruction in the block
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   706
  // (since we have stepped through all instructions backwards)
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   707
  if (pressure.current_pressure() > pressure.high_pressure_limit()) {
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   708
    pressure.set_high_pressure_index_to_block_start();
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   709
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   710
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   711
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   712
/*
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   713
 * Compute high pressure indice; avoid landing in the middle of projnodes
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   714
 * and set the high pressure index for the block
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   715
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   716
void PhaseChaitin::adjust_high_pressure_index(Block* b, uint& block_hrp_index, Pressure& pressure) {
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   717
  uint i = pressure.high_pressure_index();
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   718
  if (i < b->number_of_nodes() && i < b->end_idx() + 1) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   719
    Node* cur = b->get_node(i);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   720
    while (cur->is_Proj() || (cur->is_MachNullCheck()) || cur->is_Catch()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   721
      cur = b->get_node(--i);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   722
    }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   723
  }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   724
  block_hrp_index = i;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   725
}
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   726
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   727
/* Build an interference graph:
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   728
 *   That is, if 2 live ranges are simultaneously alive but in their acceptable
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   729
 *   register sets do not overlap, then they do not interfere. The IFG is built
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   730
 *   by a single reverse pass over each basic block. Starting with the known
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   731
 *   live-out set, we remove things that get defined and add things that become
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   732
 *   live (essentially executing one pass of a standard LIVE analysis). Just
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   733
 *   before a Node defines a value (and removes it from the live-ness set) that
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   734
 *   value is certainly live. The defined value interferes with everything
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   735
 *   currently live. The value is then removed from the live-ness set and it's
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   736
 *   inputs are added to the live-ness set.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   737
 * Compute register pressure for each block:
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   738
 *   We store the biggest register pressure for each block and also the first
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   739
 *   low to high register pressure transition within the block (if any).
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   740
 */
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   741
uint PhaseChaitin::build_ifg_physical( ResourceArea *a ) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   742
  NOT_PRODUCT(Compile::TracePhase t3("buildIFG", &_t_buildIFGphysical, TimeCompiler);)
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   743
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   744
  uint must_spill = 0;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   745
  for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   746
    Block* block = _cfg.get_block(i);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   747
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   748
    // Clone (rather than smash in place) the liveout info, so it is alive
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   749
    // for the "collect_gc_info" phase later.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   750
    IndexSet liveout(_live->live(block));
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   751
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   752
    uint first_inst = first_nonphi_index(block);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   753
    uint last_inst = block->end_idx();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   754
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   755
    move_exception_node_up(block, first_inst, last_inst);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   756
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   757
    Pressure int_pressure(last_inst + 1, INTPRESSURE);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   758
    Pressure float_pressure(last_inst + 1, FLOATPRESSURE);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   759
    block->_reg_pressure = 0;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   760
    block->_freg_pressure = 0;
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   761
2030
39d55e4534b4 6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
kvn
parents: 1412
diff changeset
   762
    int inst_count = last_inst - first_inst;
19330
49d6711171e6 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 19279
diff changeset
   763
    double cost = (inst_count <= 0) ? 0.0 : block->_freq * double(inst_count);
22915
231c85af5482 8033260: assert(lrg._area >= 0.0) failed: negative spill area
adlertz
parents: 22912
diff changeset
   764
    assert(cost >= 0.0, "negative spill cost" );
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   765
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   766
    compute_initial_block_pressure(block, &liveout, int_pressure, float_pressure, cost);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   768
    for (uint location = last_inst; location > 0; location--) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   769
      Node* n = block->get_node(location);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   770
      uint lid = _lrg_map.live_range_id(n);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   772
      if(lid) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   773
        LRG& lrg = lrgs(lid);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   774
489c9b5090e2 Initial load
duke
parents:
diff changeset
   775
        // A DEF normally costs block frequency; rematerialized values are
489c9b5090e2 Initial load
duke
parents:
diff changeset
   776
        // removed from the DEF sight, so LOWER costs here.
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   777
        lrg._cost += n->rematerialize() ? 0 : block->_freq;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   778
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   779
        if (!liveout.member(lid) && n->Opcode() != Op_SafePoint) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   780
          if (remove_node_if_not_used(block, location, n, lid, &liveout)) {
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   781
            float_pressure.lower_high_pressure_index();
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   782
            int_pressure.lower_high_pressure_index();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   783
            continue;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   784
          }
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   785
          if (lrg._fat_proj) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   786
            check_for_high_pressure_transition_at_fatproj(block->_reg_pressure, location, lrg, int_pressure, Op_RegI);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   787
            check_for_high_pressure_transition_at_fatproj(block->_freg_pressure, location, lrg, float_pressure, Op_RegD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   788
          }
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   789
        } else {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   790
          // A live range ends at its definition, remove the remaining area.
22915
231c85af5482 8033260: assert(lrg._area >= 0.0) failed: negative spill area
adlertz
parents: 22912
diff changeset
   791
          // If the cost is +Inf (which might happen in extreme cases), the lrg area will also be +Inf,
231c85af5482 8033260: assert(lrg._area >= 0.0) failed: negative spill area
adlertz
parents: 22912
diff changeset
   792
          // and +Inf - +Inf = NaN. So let's not do that subtraction.
231c85af5482 8033260: assert(lrg._area >= 0.0) failed: negative spill area
adlertz
parents: 22912
diff changeset
   793
          if (g_isfinite(cost)) {
231c85af5482 8033260: assert(lrg._area >= 0.0) failed: negative spill area
adlertz
parents: 22912
diff changeset
   794
            lrg._area -= cost;
231c85af5482 8033260: assert(lrg._area >= 0.0) failed: negative spill area
adlertz
parents: 22912
diff changeset
   795
          }
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   796
          assert(lrg._area >= 0.0, "negative spill area" );
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   797
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   798
          assign_high_score_to_immediate_copies(block, n, lrg, location + 1, last_inst);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   799
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   800
          if (liveout.remove(lid)) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   801
            lower_pressure(block, location, lrg, &liveout, int_pressure, float_pressure);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   802
          }
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   803
          uint copy_idx = n->is_Copy();
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   804
          if (copy_idx) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   805
            uint lid_copy = _lrg_map.live_range_id(n->in(copy_idx));
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   806
            remove_interference_from_copy(block, location, lid_copy, &liveout, cost, int_pressure, float_pressure);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   807
          }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   808
        }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   809
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   810
        // Since rematerializable DEFs are not bound but the live range is,
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   811
        // some uses must be bound. If we spill live range 'r', it can
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   812
        // rematerialize at each use site according to its bindings.
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   813
        if (lrg.is_bound() && !n->rematerialize() && lrg.mask().is_NotEmpty()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   814
          remove_bound_register_from_interfering_live_ranges(lrg, &liveout, must_spill);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   815
        }
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   816
        interfere_with_live(lid, &liveout);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   817
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   818
1401
e5fdc8521d1f 6750588: assert(lrg._area >= 0,"negative spill area") running NSK stmp0101 test
rasbold
parents: 1057
diff changeset
   819
      // Area remaining in the block
e5fdc8521d1f 6750588: assert(lrg._area >= 0,"negative spill area") running NSK stmp0101 test
rasbold
parents: 1057
diff changeset
   820
      inst_count--;
19330
49d6711171e6 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 19279
diff changeset
   821
      cost = (inst_count <= 0) ? 0.0 : block->_freq * double(inst_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   822
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   823
      if (!n->is_Phi()) {
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   824
        add_input_to_liveout(block, n, &liveout, cost, int_pressure, float_pressure);
19330
49d6711171e6 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 19279
diff changeset
   825
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   826
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   827
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   828
    check_for_high_pressure_block(int_pressure);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   829
    check_for_high_pressure_block(float_pressure);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   830
    adjust_high_pressure_index(block, block->_ihrp_index, int_pressure);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   831
    adjust_high_pressure_index(block, block->_fhrp_index, float_pressure);
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   832
    // set the final_pressure as the register pressure for the block
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   833
    block->_reg_pressure = int_pressure.final_pressure();
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   834
    block->_freg_pressure = float_pressure.final_pressure();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   835
489c9b5090e2 Initial load
duke
parents:
diff changeset
   836
#ifndef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   837
    // Gather Register Pressure Statistics
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   838
    if (PrintOptoStatistics) {
22912
a8c042dca573 8032894: Remove dead code in Pressure::lower
adlertz
parents: 22804
diff changeset
   839
      if (block->_reg_pressure > int_pressure.high_pressure_limit() || block->_freg_pressure > float_pressure.high_pressure_limit()) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   840
        _high_pressure++;
19330
49d6711171e6 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 19279
diff changeset
   841
      } else {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   842
        _low_pressure++;
19330
49d6711171e6 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 19279
diff changeset
   843
      }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   844
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   845
#endif
22804
401135897b65 8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents: 22234
diff changeset
   846
  }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   847
489c9b5090e2 Initial load
duke
parents:
diff changeset
   848
  return must_spill;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   849
}