author | eosterlund |
Mon, 19 Mar 2018 07:38:18 +0100 | |
changeset 49455 | 848864ed9b17 |
parent 49388 | ec9091426557 |
child 49752 | 93d84f667d12 |
permissions | -rw-r--r-- |
29184 | 1 |
/* |
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eosterlund
parents:
49032
diff
changeset
|
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* Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved. |
29184 | 3 |
* Copyright (c) 2014, Red Hat Inc. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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||
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#include "precompiled.hpp" |
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27 |
#include "asm/assembler.hpp" |
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28 |
#include "c1/c1_CodeStubs.hpp" |
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#include "c1/c1_Defs.hpp" |
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#include "c1/c1_MacroAssembler.hpp" |
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#include "c1/c1_Runtime1.hpp" |
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#include "compiler/disassembler.hpp" |
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diff
changeset
|
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#include "gc/shared/cardTable.hpp" |
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|
34 |
#include "gc/shared/cardTableBarrierSet.hpp" |
29184 | 35 |
#include "interpreter/interpreter.hpp" |
36 |
#include "nativeInst_aarch64.hpp" |
|
37 |
#include "oops/compiledICHolder.hpp" |
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38 |
#include "oops/oop.inline.hpp" |
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39 |
#include "prims/jvmtiExport.hpp" |
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#include "register_aarch64.hpp" |
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41 |
#include "runtime/sharedRuntime.hpp" |
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42 |
#include "runtime/signature.hpp" |
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43 |
#include "runtime/vframe.hpp" |
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44 |
#include "runtime/vframeArray.hpp" |
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45 |
#include "vmreg_aarch64.inline.hpp" |
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46 |
#if INCLUDE_ALL_GCS |
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edb65305d3ac
8195148: Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet
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parents:
49164
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changeset
|
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#include "gc/g1/g1BarrierSet.hpp" |
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#include "gc/g1/g1CardTable.hpp" |
29184 | 49 |
#endif |
50 |
||
51 |
||
52 |
// Implementation of StubAssembler |
|
53 |
||
54 |
int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) { |
|
55 |
// setup registers |
|
56 |
assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different"); |
|
57 |
assert(oop_result1 != rthread && metadata_result != rthread, "registers must be different"); |
|
58 |
assert(args_size >= 0, "illegal args_size"); |
|
59 |
bool align_stack = false; |
|
60 |
||
61 |
mov(c_rarg0, rthread); |
|
62 |
set_num_rt_args(0); // Nothing on stack |
|
63 |
||
64 |
Label retaddr; |
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65 |
set_last_Java_frame(sp, rfp, retaddr, rscratch1); |
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66 |
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67 |
// do the call |
|
68 |
lea(rscratch1, RuntimeAddress(entry)); |
|
69 |
blrt(rscratch1, args_size + 1, 8, 1); |
|
70 |
bind(retaddr); |
|
71 |
int call_offset = offset(); |
|
72 |
// verify callee-saved register |
|
73 |
#ifdef ASSERT |
|
74 |
push(r0, sp); |
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75 |
{ Label L; |
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76 |
get_thread(r0); |
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77 |
cmp(rthread, r0); |
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78 |
br(Assembler::EQ, L); |
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79 |
stop("StubAssembler::call_RT: rthread not callee saved?"); |
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80 |
bind(L); |
|
81 |
} |
|
82 |
pop(r0, sp); |
|
83 |
#endif |
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40643 | 84 |
reset_last_Java_frame(true); |
29184 | 85 |
maybe_isb(); |
86 |
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87 |
// check for pending exceptions |
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88 |
{ Label L; |
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89 |
// check for pending exceptions (java_thread is set upon return) |
|
90 |
ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); |
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91 |
cbz(rscratch1, L); |
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// exception pending => remove activation and forward to exception handler |
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// make sure that the vm_results are cleared |
|
94 |
if (oop_result1->is_valid()) { |
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95 |
str(zr, Address(rthread, JavaThread::vm_result_offset())); |
|
96 |
} |
|
97 |
if (metadata_result->is_valid()) { |
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98 |
str(zr, Address(rthread, JavaThread::vm_result_2_offset())); |
|
99 |
} |
|
100 |
if (frame_size() == no_frame_size) { |
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101 |
leave(); |
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102 |
far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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103 |
} else if (_stub_id == Runtime1::forward_exception_id) { |
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should_not_reach_here(); |
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105 |
} else { |
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106 |
far_jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); |
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107 |
} |
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108 |
bind(L); |
|
109 |
} |
|
110 |
// get oop results if there are any and reset the values in the thread |
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111 |
if (oop_result1->is_valid()) { |
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112 |
get_vm_result(oop_result1, rthread); |
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113 |
} |
|
114 |
if (metadata_result->is_valid()) { |
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115 |
get_vm_result_2(metadata_result, rthread); |
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116 |
} |
|
117 |
return call_offset; |
|
118 |
} |
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119 |
||
120 |
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121 |
int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) { |
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122 |
mov(c_rarg1, arg1); |
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123 |
return call_RT(oop_result1, metadata_result, entry, 1); |
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124 |
} |
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125 |
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126 |
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127 |
int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) { |
|
128 |
if (c_rarg1 == arg2) { |
|
129 |
if (c_rarg2 == arg1) { |
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130 |
mov(rscratch1, arg1); |
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131 |
mov(arg1, arg2); |
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132 |
mov(arg2, rscratch1); |
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133 |
} else { |
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mov(c_rarg2, arg2); |
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135 |
mov(c_rarg1, arg1); |
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136 |
} |
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137 |
} else { |
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138 |
mov(c_rarg1, arg1); |
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139 |
mov(c_rarg2, arg2); |
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140 |
} |
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141 |
return call_RT(oop_result1, metadata_result, entry, 2); |
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142 |
} |
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143 |
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144 |
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145 |
int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) { |
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146 |
// if there is any conflict use the stack |
|
147 |
if (arg1 == c_rarg2 || arg1 == c_rarg3 || |
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148 |
arg2 == c_rarg1 || arg1 == c_rarg3 || |
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arg3 == c_rarg1 || arg1 == c_rarg2) { |
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150 |
stp(arg3, arg2, Address(pre(sp, 2 * wordSize))); |
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151 |
stp(arg1, zr, Address(pre(sp, -2 * wordSize))); |
|
152 |
ldp(c_rarg1, zr, Address(post(sp, 2 * wordSize))); |
|
153 |
ldp(c_rarg3, c_rarg2, Address(post(sp, 2 * wordSize))); |
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154 |
} else { |
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155 |
mov(c_rarg1, arg1); |
|
156 |
mov(c_rarg2, arg2); |
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157 |
mov(c_rarg3, arg3); |
|
158 |
} |
|
159 |
return call_RT(oop_result1, metadata_result, entry, 3); |
|
160 |
} |
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161 |
||
162 |
// Implementation of StubFrame |
|
163 |
||
164 |
class StubFrame: public StackObj { |
|
165 |
private: |
|
166 |
StubAssembler* _sasm; |
|
167 |
||
168 |
public: |
|
169 |
StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); |
|
170 |
void load_argument(int offset_in_words, Register reg); |
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171 |
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172 |
~StubFrame(); |
|
173 |
};; |
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174 |
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175 |
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176 |
#define __ _sasm-> |
|
177 |
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178 |
StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { |
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179 |
_sasm = sasm; |
|
180 |
__ set_info(name, must_gc_arguments); |
|
181 |
__ enter(); |
|
182 |
} |
|
183 |
||
184 |
// load parameters that were stored with LIR_Assembler::store_parameter |
|
185 |
// Note: offsets for store_parameter and load_argument must match |
|
186 |
void StubFrame::load_argument(int offset_in_words, Register reg) { |
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187 |
// rbp, + 0: link |
|
188 |
// + 1: return address |
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189 |
// + 2: argument with offset 0 |
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190 |
// + 3: argument with offset 1 |
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191 |
// + 4: ... |
|
192 |
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193 |
__ ldr(reg, Address(rfp, (offset_in_words + 2) * BytesPerWord)); |
|
194 |
} |
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195 |
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196 |
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197 |
StubFrame::~StubFrame() { |
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198 |
__ leave(); |
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199 |
__ ret(lr); |
|
200 |
} |
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201 |
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202 |
#undef __ |
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203 |
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204 |
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205 |
// Implementation of Runtime1 |
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206 |
||
207 |
#define __ sasm-> |
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208 |
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209 |
const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; |
|
210 |
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211 |
// Stack layout for saving/restoring all the registers needed during a runtime |
|
212 |
// call (this includes deoptimization) |
|
213 |
// Note: note that users of this frame may well have arguments to some runtime |
|
214 |
// while these values are on the stack. These positions neglect those arguments |
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215 |
// but the code in save_live_registers will take the argument count into |
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216 |
// account. |
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217 |
// |
|
218 |
||
219 |
enum reg_save_layout { |
|
220 |
reg_save_frame_size = 32 /* float */ + 32 /* integer */ |
|
221 |
}; |
|
222 |
||
223 |
// Save off registers which might be killed by calls into the runtime. |
|
224 |
// Tries to smart of about FP registers. In particular we separate |
|
225 |
// saving and describing the FPU registers for deoptimization since we |
|
226 |
// have to save the FPU registers twice if we describe them. The |
|
227 |
// deopt blob is the only thing which needs to describe FPU registers. |
|
228 |
// In all other cases it should be sufficient to simply save their |
|
229 |
// current value. |
|
230 |
||
231 |
static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs]; |
|
232 |
static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs]; |
|
233 |
static int reg_save_size_in_words; |
|
234 |
static int frame_size_in_bytes = -1; |
|
235 |
||
236 |
static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) { |
|
237 |
int frame_size_in_bytes = reg_save_frame_size * BytesPerWord; |
|
238 |
sasm->set_frame_size(frame_size_in_bytes / BytesPerWord); |
|
239 |
int frame_size_in_slots = frame_size_in_bytes / sizeof(jint); |
|
240 |
OopMap* oop_map = new OopMap(frame_size_in_slots, 0); |
|
241 |
||
242 |
for (int i = 0; i < FrameMap::nof_cpu_regs; i++) { |
|
243 |
Register r = as_Register(i); |
|
244 |
if (i <= 18 && i != rscratch1->encoding() && i != rscratch2->encoding()) { |
|
245 |
int sp_offset = cpu_reg_save_offsets[i]; |
|
246 |
oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), |
|
247 |
r->as_VMReg()); |
|
248 |
} |
|
249 |
} |
|
250 |
||
251 |
if (save_fpu_registers) { |
|
252 |
for (int i = 0; i < FrameMap::nof_fpu_regs; i++) { |
|
253 |
FloatRegister r = as_FloatRegister(i); |
|
254 |
{ |
|
255 |
int sp_offset = fpu_reg_save_offsets[i]; |
|
256 |
oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), |
|
257 |
r->as_VMReg()); |
|
258 |
} |
|
259 |
} |
|
260 |
} |
|
261 |
return oop_map; |
|
262 |
} |
|
263 |
||
264 |
static OopMap* save_live_registers(StubAssembler* sasm, |
|
265 |
bool save_fpu_registers = true) { |
|
266 |
__ block_comment("save_live_registers"); |
|
267 |
||
268 |
__ push(RegSet::range(r0, r29), sp); // integer registers except lr & sp |
|
269 |
||
270 |
if (save_fpu_registers) { |
|
271 |
for (int i = 30; i >= 0; i -= 2) |
|
272 |
__ stpd(as_FloatRegister(i), as_FloatRegister(i+1), |
|
273 |
Address(__ pre(sp, -2 * wordSize))); |
|
274 |
} else { |
|
275 |
__ add(sp, sp, -32 * wordSize); |
|
276 |
} |
|
277 |
||
278 |
return generate_oop_map(sasm, save_fpu_registers); |
|
279 |
} |
|
280 |
||
281 |
static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) { |
|
282 |
if (restore_fpu_registers) { |
|
283 |
for (int i = 0; i < 32; i += 2) |
|
284 |
__ ldpd(as_FloatRegister(i), as_FloatRegister(i+1), |
|
285 |
Address(__ post(sp, 2 * wordSize))); |
|
286 |
} else { |
|
287 |
__ add(sp, sp, 32 * wordSize); |
|
288 |
} |
|
289 |
||
290 |
__ pop(RegSet::range(r0, r29), sp); |
|
291 |
} |
|
292 |
||
293 |
static void restore_live_registers_except_r0(StubAssembler* sasm, bool restore_fpu_registers = true) { |
|
294 |
||
295 |
if (restore_fpu_registers) { |
|
296 |
for (int i = 0; i < 32; i += 2) |
|
297 |
__ ldpd(as_FloatRegister(i), as_FloatRegister(i+1), |
|
298 |
Address(__ post(sp, 2 * wordSize))); |
|
299 |
} else { |
|
300 |
__ add(sp, sp, 32 * wordSize); |
|
301 |
} |
|
302 |
||
303 |
__ ldp(zr, r1, Address(__ post(sp, 16))); |
|
304 |
__ pop(RegSet::range(r2, r29), sp); |
|
305 |
} |
|
306 |
||
307 |
||
308 |
||
309 |
void Runtime1::initialize_pd() { |
|
310 |
int i; |
|
311 |
int sp_offset = 0; |
|
312 |
||
313 |
// all float registers are saved explicitly |
|
314 |
assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here"); |
|
315 |
for (i = 0; i < FrameMap::nof_fpu_regs; i++) { |
|
316 |
fpu_reg_save_offsets[i] = sp_offset; |
|
317 |
sp_offset += 2; // SP offsets are in halfwords |
|
318 |
} |
|
319 |
||
320 |
for (i = 0; i < FrameMap::nof_cpu_regs; i++) { |
|
321 |
Register r = as_Register(i); |
|
322 |
cpu_reg_save_offsets[i] = sp_offset; |
|
323 |
sp_offset += 2; // SP offsets are in halfwords |
|
324 |
} |
|
325 |
} |
|
326 |
||
327 |
||
328 |
// target: the entry point of the method that creates and posts the exception oop |
|
329 |
// has_argument: true if the exception needs an argument (passed in rscratch1) |
|
330 |
||
331 |
OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { |
|
332 |
// make a frame and preserve the caller's caller-save registers |
|
333 |
OopMap* oop_map = save_live_registers(sasm); |
|
334 |
int call_offset; |
|
335 |
if (!has_argument) { |
|
336 |
call_offset = __ call_RT(noreg, noreg, target); |
|
337 |
} else { |
|
338 |
call_offset = __ call_RT(noreg, noreg, target, rscratch1); |
|
339 |
} |
|
340 |
OopMapSet* oop_maps = new OopMapSet(); |
|
341 |
oop_maps->add_gc_map(call_offset, oop_map); |
|
342 |
||
343 |
__ should_not_reach_here(); |
|
344 |
return oop_maps; |
|
345 |
} |
|
346 |
||
347 |
||
348 |
OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) { |
|
349 |
__ block_comment("generate_handle_exception"); |
|
350 |
||
351 |
// incoming parameters |
|
352 |
const Register exception_oop = r0; |
|
353 |
const Register exception_pc = r3; |
|
354 |
// other registers used in this stub |
|
355 |
||
356 |
// Save registers, if required. |
|
357 |
OopMapSet* oop_maps = new OopMapSet(); |
|
358 |
OopMap* oop_map = NULL; |
|
359 |
switch (id) { |
|
360 |
case forward_exception_id: |
|
361 |
// We're handling an exception in the context of a compiled frame. |
|
362 |
// The registers have been saved in the standard places. Perform |
|
363 |
// an exception lookup in the caller and dispatch to the handler |
|
364 |
// if found. Otherwise unwind and dispatch to the callers |
|
365 |
// exception handler. |
|
366 |
oop_map = generate_oop_map(sasm, 1 /*thread*/); |
|
367 |
||
368 |
// load and clear pending exception oop into r0 |
|
369 |
__ ldr(exception_oop, Address(rthread, Thread::pending_exception_offset())); |
|
370 |
__ str(zr, Address(rthread, Thread::pending_exception_offset())); |
|
371 |
||
372 |
// load issuing PC (the return address for this stub) into r3 |
|
373 |
__ ldr(exception_pc, Address(rfp, 1*BytesPerWord)); |
|
374 |
||
375 |
// make sure that the vm_results are cleared (may be unnecessary) |
|
376 |
__ str(zr, Address(rthread, JavaThread::vm_result_offset())); |
|
377 |
__ str(zr, Address(rthread, JavaThread::vm_result_2_offset())); |
|
378 |
break; |
|
379 |
case handle_exception_nofpu_id: |
|
380 |
case handle_exception_id: |
|
381 |
// At this point all registers MAY be live. |
|
29189 | 382 |
oop_map = save_live_registers(sasm, id != handle_exception_nofpu_id); |
29184 | 383 |
break; |
384 |
case handle_exception_from_callee_id: { |
|
385 |
// At this point all registers except exception oop (r0) and |
|
386 |
// exception pc (lr) are dead. |
|
387 |
const int frame_size = 2 /*fp, return address*/; |
|
388 |
oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); |
|
389 |
sasm->set_frame_size(frame_size); |
|
390 |
break; |
|
391 |
} |
|
392 |
default: |
|
393 |
__ should_not_reach_here(); |
|
394 |
break; |
|
395 |
} |
|
396 |
||
397 |
// verify that only r0 and r3 are valid at this time |
|
398 |
__ invalidate_registers(false, true, true, false, true, true); |
|
399 |
// verify that r0 contains a valid exception |
|
400 |
__ verify_not_null_oop(exception_oop); |
|
401 |
||
402 |
#ifdef ASSERT |
|
403 |
// check that fields in JavaThread for exception oop and issuing pc are |
|
404 |
// empty before writing to them |
|
405 |
Label oop_empty; |
|
406 |
__ ldr(rscratch1, Address(rthread, JavaThread::exception_oop_offset())); |
|
407 |
__ cbz(rscratch1, oop_empty); |
|
408 |
__ stop("exception oop already set"); |
|
409 |
__ bind(oop_empty); |
|
410 |
||
411 |
Label pc_empty; |
|
412 |
__ ldr(rscratch1, Address(rthread, JavaThread::exception_pc_offset())); |
|
413 |
__ cbz(rscratch1, pc_empty); |
|
414 |
__ stop("exception pc already set"); |
|
415 |
__ bind(pc_empty); |
|
416 |
#endif |
|
417 |
||
418 |
// save exception oop and issuing pc into JavaThread |
|
419 |
// (exception handler will load it from here) |
|
420 |
__ str(exception_oop, Address(rthread, JavaThread::exception_oop_offset())); |
|
421 |
__ str(exception_pc, Address(rthread, JavaThread::exception_pc_offset())); |
|
422 |
||
423 |
// patch throwing pc into return address (has bci & oop map) |
|
424 |
__ str(exception_pc, Address(rfp, 1*BytesPerWord)); |
|
425 |
||
426 |
// compute the exception handler. |
|
427 |
// the exception oop and the throwing pc are read from the fields in JavaThread |
|
428 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); |
|
429 |
oop_maps->add_gc_map(call_offset, oop_map); |
|
430 |
||
431 |
// r0: handler address |
|
432 |
// will be the deopt blob if nmethod was deoptimized while we looked up |
|
433 |
// handler regardless of whether handler existed in the nmethod. |
|
434 |
||
435 |
// only r0 is valid at this time, all other registers have been destroyed by the runtime call |
|
436 |
__ invalidate_registers(false, true, true, true, true, true); |
|
437 |
||
438 |
// patch the return address, this stub will directly return to the exception handler |
|
439 |
__ str(r0, Address(rfp, 1*BytesPerWord)); |
|
440 |
||
441 |
switch (id) { |
|
442 |
case forward_exception_id: |
|
443 |
case handle_exception_nofpu_id: |
|
444 |
case handle_exception_id: |
|
445 |
// Restore the registers that were saved at the beginning. |
|
29189 | 446 |
restore_live_registers(sasm, id != handle_exception_nofpu_id); |
29184 | 447 |
break; |
448 |
case handle_exception_from_callee_id: |
|
30552
ff209a4a81b5
8079564: Use FP register as proper frame pointer in JIT compiled code on aarch64
enevill
parents:
29189
diff
changeset
|
449 |
// Pop the return address. |
29184 | 450 |
__ leave(); |
451 |
__ ret(lr); // jump to exception handler |
|
452 |
break; |
|
453 |
default: ShouldNotReachHere(); |
|
454 |
} |
|
455 |
||
456 |
return oop_maps; |
|
457 |
} |
|
458 |
||
459 |
||
460 |
void Runtime1::generate_unwind_exception(StubAssembler *sasm) { |
|
461 |
// incoming parameters |
|
462 |
const Register exception_oop = r0; |
|
463 |
// callee-saved copy of exception_oop during runtime call |
|
464 |
const Register exception_oop_callee_saved = r19; |
|
465 |
// other registers used in this stub |
|
466 |
const Register exception_pc = r3; |
|
467 |
const Register handler_addr = r1; |
|
468 |
||
469 |
// verify that only r0, is valid at this time |
|
470 |
__ invalidate_registers(false, true, true, true, true, true); |
|
471 |
||
472 |
#ifdef ASSERT |
|
473 |
// check that fields in JavaThread for exception oop and issuing pc are empty |
|
474 |
Label oop_empty; |
|
475 |
__ ldr(rscratch1, Address(rthread, JavaThread::exception_oop_offset())); |
|
476 |
__ cbz(rscratch1, oop_empty); |
|
477 |
__ stop("exception oop must be empty"); |
|
478 |
__ bind(oop_empty); |
|
479 |
||
480 |
Label pc_empty; |
|
481 |
__ ldr(rscratch1, Address(rthread, JavaThread::exception_pc_offset())); |
|
482 |
__ cbz(rscratch1, pc_empty); |
|
483 |
__ stop("exception pc must be empty"); |
|
484 |
__ bind(pc_empty); |
|
485 |
#endif |
|
486 |
||
487 |
// Save our return address because |
|
488 |
// exception_handler_for_return_address will destroy it. We also |
|
489 |
// save exception_oop |
|
490 |
__ stp(lr, exception_oop, Address(__ pre(sp, -2 * wordSize))); |
|
491 |
||
492 |
// search the exception handler address of the caller (using the return address) |
|
493 |
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, lr); |
|
494 |
// r0: exception handler address of the caller |
|
495 |
||
496 |
// Only R0 is valid at this time; all other registers have been |
|
497 |
// destroyed by the call. |
|
498 |
__ invalidate_registers(false, true, true, true, false, true); |
|
499 |
||
500 |
// move result of call into correct register |
|
501 |
__ mov(handler_addr, r0); |
|
502 |
||
503 |
// get throwing pc (= return address). |
|
504 |
// lr has been destroyed by the call |
|
505 |
__ ldp(lr, exception_oop, Address(__ post(sp, 2 * wordSize))); |
|
506 |
__ mov(r3, lr); |
|
507 |
||
508 |
__ verify_not_null_oop(exception_oop); |
|
509 |
||
510 |
// continue at exception handler (return address removed) |
|
511 |
// note: do *not* remove arguments when unwinding the |
|
512 |
// activation since the caller assumes having |
|
513 |
// all arguments on the stack when entering the |
|
514 |
// runtime to determine the exception handler |
|
515 |
// (GC happens at call site with arguments!) |
|
516 |
// r0: exception oop |
|
517 |
// r3: throwing pc |
|
518 |
// r1: exception handler |
|
519 |
__ br(handler_addr); |
|
520 |
} |
|
521 |
||
522 |
||
523 |
||
524 |
OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { |
|
525 |
// use the maximum number of runtime-arguments here because it is difficult to |
|
526 |
// distinguish each RT-Call. |
|
527 |
// Note: This number affects also the RT-Call in generate_handle_exception because |
|
528 |
// the oop-map is shared for all calls. |
|
529 |
DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); |
|
530 |
assert(deopt_blob != NULL, "deoptimization blob must have been created"); |
|
531 |
||
532 |
OopMap* oop_map = save_live_registers(sasm); |
|
533 |
||
534 |
__ mov(c_rarg0, rthread); |
|
535 |
Label retaddr; |
|
536 |
__ set_last_Java_frame(sp, rfp, retaddr, rscratch1); |
|
537 |
// do the call |
|
538 |
__ lea(rscratch1, RuntimeAddress(target)); |
|
539 |
__ blrt(rscratch1, 1, 0, 1); |
|
540 |
__ bind(retaddr); |
|
541 |
OopMapSet* oop_maps = new OopMapSet(); |
|
542 |
oop_maps->add_gc_map(__ offset(), oop_map); |
|
543 |
// verify callee-saved register |
|
544 |
#ifdef ASSERT |
|
545 |
{ Label L; |
|
546 |
__ get_thread(rscratch1); |
|
547 |
__ cmp(rthread, rscratch1); |
|
548 |
__ br(Assembler::EQ, L); |
|
549 |
__ stop("StubAssembler::call_RT: rthread not callee saved?"); |
|
550 |
__ bind(L); |
|
551 |
} |
|
552 |
#endif |
|
40643 | 553 |
__ reset_last_Java_frame(true); |
29184 | 554 |
__ maybe_isb(); |
555 |
||
556 |
// check for pending exceptions |
|
557 |
{ Label L; |
|
558 |
__ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); |
|
559 |
__ cbz(rscratch1, L); |
|
560 |
// exception pending => remove activation and forward to exception handler |
|
561 |
||
562 |
{ Label L1; |
|
563 |
__ cbnz(r0, L1); // have we deoptimized? |
|
564 |
__ far_jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); |
|
565 |
__ bind(L1); |
|
566 |
} |
|
567 |
||
568 |
// the deopt blob expects exceptions in the special fields of |
|
569 |
// JavaThread, so copy and clear pending exception. |
|
570 |
||
571 |
// load and clear pending exception |
|
572 |
__ ldr(r0, Address(rthread, Thread::pending_exception_offset())); |
|
573 |
__ str(zr, Address(rthread, Thread::pending_exception_offset())); |
|
574 |
||
575 |
// check that there is really a valid exception |
|
576 |
__ verify_not_null_oop(r0); |
|
577 |
||
578 |
// load throwing pc: this is the return address of the stub |
|
579 |
__ mov(r3, lr); |
|
580 |
||
581 |
#ifdef ASSERT |
|
582 |
// check that fields in JavaThread for exception oop and issuing pc are empty |
|
583 |
Label oop_empty; |
|
584 |
__ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); |
|
585 |
__ cbz(rscratch1, oop_empty); |
|
586 |
__ stop("exception oop must be empty"); |
|
587 |
__ bind(oop_empty); |
|
588 |
||
589 |
Label pc_empty; |
|
590 |
__ ldr(rscratch1, Address(rthread, JavaThread::exception_pc_offset())); |
|
591 |
__ cbz(rscratch1, pc_empty); |
|
592 |
__ stop("exception pc must be empty"); |
|
593 |
__ bind(pc_empty); |
|
594 |
#endif |
|
595 |
||
596 |
// store exception oop and throwing pc to JavaThread |
|
597 |
__ str(r0, Address(rthread, JavaThread::exception_oop_offset())); |
|
598 |
__ str(r3, Address(rthread, JavaThread::exception_pc_offset())); |
|
599 |
||
600 |
restore_live_registers(sasm); |
|
601 |
||
602 |
__ leave(); |
|
603 |
||
604 |
// Forward the exception directly to deopt blob. We can blow no |
|
605 |
// registers and must leave throwing pc on the stack. A patch may |
|
606 |
// have values live in registers so the entry point with the |
|
607 |
// exception in tls. |
|
608 |
__ far_jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); |
|
609 |
||
610 |
__ bind(L); |
|
611 |
} |
|
612 |
||
613 |
||
614 |
// Runtime will return true if the nmethod has been deoptimized during |
|
615 |
// the patching process. In that case we must do a deopt reexecute instead. |
|
616 |
||
617 |
Label reexecuteEntry, cont; |
|
618 |
||
619 |
__ cbz(r0, cont); // have we deoptimized? |
|
620 |
||
621 |
// Will reexecute. Proper return address is already on the stack we just restore |
|
622 |
// registers, pop all of our frame but the return address and jump to the deopt blob |
|
623 |
restore_live_registers(sasm); |
|
624 |
__ leave(); |
|
625 |
__ far_jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); |
|
626 |
||
627 |
__ bind(cont); |
|
628 |
restore_live_registers(sasm); |
|
629 |
__ leave(); |
|
630 |
__ ret(lr); |
|
631 |
||
632 |
return oop_maps; |
|
633 |
} |
|
634 |
||
635 |
||
636 |
OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { |
|
637 |
||
638 |
const Register exception_oop = r0; |
|
639 |
const Register exception_pc = r3; |
|
640 |
||
641 |
// for better readability |
|
642 |
const bool must_gc_arguments = true; |
|
643 |
const bool dont_gc_arguments = false; |
|
644 |
||
645 |
// default value; overwritten for some optimized stubs that are called from methods that do not use the fpu |
|
646 |
bool save_fpu_registers = true; |
|
647 |
||
648 |
// stub code & info for the different stubs |
|
649 |
OopMapSet* oop_maps = NULL; |
|
650 |
OopMap* oop_map = NULL; |
|
651 |
switch (id) { |
|
652 |
{ |
|
653 |
case forward_exception_id: |
|
654 |
{ |
|
655 |
oop_maps = generate_handle_exception(id, sasm); |
|
656 |
__ leave(); |
|
657 |
__ ret(lr); |
|
658 |
} |
|
659 |
break; |
|
660 |
||
661 |
case throw_div0_exception_id: |
|
662 |
{ StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); |
|
663 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); |
|
664 |
} |
|
665 |
break; |
|
666 |
||
667 |
case throw_null_pointer_exception_id: |
|
668 |
{ StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); |
|
669 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); |
|
670 |
} |
|
671 |
break; |
|
672 |
||
673 |
case new_instance_id: |
|
674 |
case fast_new_instance_id: |
|
675 |
case fast_new_instance_init_check_id: |
|
676 |
{ |
|
677 |
Register klass = r3; // Incoming |
|
678 |
Register obj = r0; // Result |
|
679 |
||
680 |
if (id == new_instance_id) { |
|
681 |
__ set_info("new_instance", dont_gc_arguments); |
|
682 |
} else if (id == fast_new_instance_id) { |
|
683 |
__ set_info("fast new_instance", dont_gc_arguments); |
|
684 |
} else { |
|
685 |
assert(id == fast_new_instance_init_check_id, "bad StubID"); |
|
686 |
__ set_info("fast new_instance init check", dont_gc_arguments); |
|
687 |
} |
|
688 |
||
689 |
if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && |
|
49010
9010e596f391
8194084: Obsolete FastTLABRefill and remove the related code
jcbeyler
parents:
47216
diff
changeset
|
690 |
UseTLAB && Universe::heap()->supports_inline_contig_alloc()) { |
29184 | 691 |
Label slow_path; |
692 |
Register obj_size = r2; |
|
693 |
Register t1 = r19; |
|
694 |
Register t2 = r4; |
|
695 |
assert_different_registers(klass, obj, obj_size, t1, t2); |
|
696 |
||
49032
c1353f585fc3
8198439: Fix aarch64 code for handling generate_code_for after FastTLABFill obsolete code
jcbeyler
parents:
49018
diff
changeset
|
697 |
__ stp(r19, zr, Address(__ pre(sp, -2 * wordSize))); |
c1353f585fc3
8198439: Fix aarch64 code for handling generate_code_for after FastTLABFill obsolete code
jcbeyler
parents:
49018
diff
changeset
|
698 |
|
29184 | 699 |
if (id == fast_new_instance_init_check_id) { |
700 |
// make sure the klass is initialized |
|
701 |
__ ldrb(rscratch1, Address(klass, InstanceKlass::init_state_offset())); |
|
702 |
__ cmpw(rscratch1, InstanceKlass::fully_initialized); |
|
703 |
__ br(Assembler::NE, slow_path); |
|
704 |
} |
|
705 |
||
706 |
#ifdef ASSERT |
|
707 |
// assert object can be fast path allocated |
|
708 |
{ |
|
709 |
Label ok, not_ok; |
|
710 |
__ ldrw(obj_size, Address(klass, Klass::layout_helper_offset())); |
|
711 |
__ cmp(obj_size, 0u); |
|
712 |
__ br(Assembler::LE, not_ok); // make sure it's an instance (LH > 0) |
|
713 |
__ tstw(obj_size, Klass::_lh_instance_slow_path_bit); |
|
714 |
__ br(Assembler::EQ, ok); |
|
715 |
__ bind(not_ok); |
|
716 |
__ stop("assert(can be fast path allocated)"); |
|
717 |
__ should_not_reach_here(); |
|
718 |
__ bind(ok); |
|
719 |
} |
|
720 |
#endif // ASSERT |
|
721 |
||
722 |
// get the instance size (size is postive so movl is fine for 64bit) |
|
723 |
__ ldrw(obj_size, Address(klass, Klass::layout_helper_offset())); |
|
724 |
||
725 |
__ eden_allocate(obj, obj_size, 0, t1, slow_path); |
|
726 |
__ incr_allocated_bytes(rthread, obj_size, 0, rscratch1); |
|
727 |
||
42871
c89e1f0a084e
8169177: AArch64: SIGSEGV when "-XX:+ZeroTLAB" is specified along with GC options
aph
parents:
40643
diff
changeset
|
728 |
__ initialize_object(obj, klass, obj_size, 0, t1, t2, /* is_tlab_allocated */ false); |
29184 | 729 |
__ verify_oop(obj); |
49032
c1353f585fc3
8198439: Fix aarch64 code for handling generate_code_for after FastTLABFill obsolete code
jcbeyler
parents:
49018
diff
changeset
|
730 |
__ ldp(r19, zr, Address(__ post(sp, 2 * wordSize))); |
29184 | 731 |
__ ret(lr); |
732 |
||
733 |
__ bind(slow_path); |
|
49032
c1353f585fc3
8198439: Fix aarch64 code for handling generate_code_for after FastTLABFill obsolete code
jcbeyler
parents:
49018
diff
changeset
|
734 |
__ ldp(r19, zr, Address(__ post(sp, 2 * wordSize))); |
29184 | 735 |
} |
736 |
||
737 |
__ enter(); |
|
738 |
OopMap* map = save_live_registers(sasm); |
|
739 |
int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); |
|
740 |
oop_maps = new OopMapSet(); |
|
741 |
oop_maps->add_gc_map(call_offset, map); |
|
742 |
restore_live_registers_except_r0(sasm); |
|
743 |
__ verify_oop(obj); |
|
744 |
__ leave(); |
|
745 |
__ ret(lr); |
|
746 |
||
747 |
// r0,: new instance |
|
748 |
} |
|
749 |
||
750 |
break; |
|
751 |
||
752 |
case counter_overflow_id: |
|
753 |
{ |
|
754 |
Register bci = r0, method = r1; |
|
755 |
__ enter(); |
|
756 |
OopMap* map = save_live_registers(sasm); |
|
757 |
// Retrieve bci |
|
758 |
__ ldrw(bci, Address(rfp, 2*BytesPerWord)); |
|
759 |
// And a pointer to the Method* |
|
760 |
__ ldr(method, Address(rfp, 3*BytesPerWord)); |
|
761 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); |
|
762 |
oop_maps = new OopMapSet(); |
|
763 |
oop_maps->add_gc_map(call_offset, map); |
|
764 |
restore_live_registers(sasm); |
|
765 |
__ leave(); |
|
766 |
__ ret(lr); |
|
767 |
} |
|
768 |
break; |
|
769 |
||
770 |
case new_type_array_id: |
|
771 |
case new_object_array_id: |
|
772 |
{ |
|
773 |
Register length = r19; // Incoming |
|
774 |
Register klass = r3; // Incoming |
|
775 |
Register obj = r0; // Result |
|
776 |
||
777 |
if (id == new_type_array_id) { |
|
778 |
__ set_info("new_type_array", dont_gc_arguments); |
|
779 |
} else { |
|
780 |
__ set_info("new_object_array", dont_gc_arguments); |
|
781 |
} |
|
782 |
||
783 |
#ifdef ASSERT |
|
784 |
// assert object type is really an array of the proper kind |
|
785 |
{ |
|
786 |
Label ok; |
|
787 |
Register t0 = obj; |
|
788 |
__ ldrw(t0, Address(klass, Klass::layout_helper_offset())); |
|
789 |
__ asrw(t0, t0, Klass::_lh_array_tag_shift); |
|
790 |
int tag = ((id == new_type_array_id) |
|
791 |
? Klass::_lh_array_tag_type_value |
|
792 |
: Klass::_lh_array_tag_obj_value); |
|
793 |
__ mov(rscratch1, tag); |
|
794 |
__ cmpw(t0, rscratch1); |
|
795 |
__ br(Assembler::EQ, ok); |
|
796 |
__ stop("assert(is an array klass)"); |
|
797 |
__ should_not_reach_here(); |
|
798 |
__ bind(ok); |
|
799 |
} |
|
800 |
#endif // ASSERT |
|
801 |
||
49010
9010e596f391
8194084: Obsolete FastTLABRefill and remove the related code
jcbeyler
parents:
47216
diff
changeset
|
802 |
if (UseTLAB && Universe::heap()->supports_inline_contig_alloc()) { |
29184 | 803 |
Register arr_size = r4; |
804 |
Register t1 = r2; |
|
805 |
Register t2 = r5; |
|
806 |
Label slow_path; |
|
807 |
assert_different_registers(length, klass, obj, arr_size, t1, t2); |
|
808 |
||
809 |
// check that array length is small enough for fast path. |
|
810 |
__ mov(rscratch1, C1_MacroAssembler::max_array_allocation_length); |
|
811 |
__ cmpw(length, rscratch1); |
|
812 |
__ br(Assembler::HI, slow_path); |
|
813 |
||
814 |
// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) |
|
815 |
// since size is positive ldrw does right thing on 64bit |
|
816 |
__ ldrw(t1, Address(klass, Klass::layout_helper_offset())); |
|
49010
9010e596f391
8194084: Obsolete FastTLABRefill and remove the related code
jcbeyler
parents:
47216
diff
changeset
|
817 |
// since size is positive movw does right thing on 64bit |
29184 | 818 |
__ movw(arr_size, length); |
819 |
__ lslvw(arr_size, length, t1); |
|
820 |
__ ubfx(t1, t1, Klass::_lh_header_size_shift, |
|
821 |
exact_log2(Klass::_lh_header_size_mask + 1)); |
|
822 |
__ add(arr_size, arr_size, t1); |
|
823 |
__ add(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up |
|
824 |
__ andr(arr_size, arr_size, ~MinObjAlignmentInBytesMask); |
|
825 |
||
826 |
__ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size |
|
49018
f7caa2aecc86
8198341: Build failures after 8194084 (Obsolete FastTLABRefill and remove the related code)
shade
parents:
49010
diff
changeset
|
827 |
__ incr_allocated_bytes(rthread, arr_size, 0, rscratch1); |
29184 | 828 |
|
829 |
__ initialize_header(obj, klass, length, t1, t2); |
|
830 |
__ ldrb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte))); |
|
831 |
assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); |
|
832 |
assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); |
|
833 |
__ andr(t1, t1, Klass::_lh_header_size_mask); |
|
834 |
__ sub(arr_size, arr_size, t1); // body length |
|
835 |
__ add(t1, t1, obj); // body start |
|
836 |
__ initialize_body(t1, arr_size, 0, t2); |
|
837 |
__ verify_oop(obj); |
|
838 |
||
839 |
__ ret(lr); |
|
840 |
||
841 |
__ bind(slow_path); |
|
842 |
} |
|
843 |
||
844 |
__ enter(); |
|
845 |
OopMap* map = save_live_registers(sasm); |
|
846 |
int call_offset; |
|
847 |
if (id == new_type_array_id) { |
|
848 |
call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); |
|
849 |
} else { |
|
850 |
call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); |
|
851 |
} |
|
852 |
||
853 |
oop_maps = new OopMapSet(); |
|
854 |
oop_maps->add_gc_map(call_offset, map); |
|
855 |
restore_live_registers_except_r0(sasm); |
|
856 |
||
857 |
__ verify_oop(obj); |
|
858 |
__ leave(); |
|
859 |
__ ret(lr); |
|
860 |
||
861 |
// r0: new array |
|
862 |
} |
|
863 |
break; |
|
864 |
||
865 |
case new_multi_array_id: |
|
866 |
{ StubFrame f(sasm, "new_multi_array", dont_gc_arguments); |
|
867 |
// r0,: klass |
|
868 |
// r19,: rank |
|
869 |
// r2: address of 1st dimension |
|
870 |
OopMap* map = save_live_registers(sasm); |
|
871 |
__ mov(c_rarg1, r0); |
|
872 |
__ mov(c_rarg3, r2); |
|
873 |
__ mov(c_rarg2, r19); |
|
874 |
int call_offset = __ call_RT(r0, noreg, CAST_FROM_FN_PTR(address, new_multi_array), r1, r2, r3); |
|
875 |
||
876 |
oop_maps = new OopMapSet(); |
|
877 |
oop_maps->add_gc_map(call_offset, map); |
|
878 |
restore_live_registers_except_r0(sasm); |
|
879 |
||
880 |
// r0,: new multi array |
|
881 |
__ verify_oop(r0); |
|
882 |
} |
|
883 |
break; |
|
884 |
||
885 |
case register_finalizer_id: |
|
886 |
{ |
|
887 |
__ set_info("register_finalizer", dont_gc_arguments); |
|
888 |
||
889 |
// This is called via call_runtime so the arguments |
|
890 |
// will be place in C abi locations |
|
891 |
||
892 |
__ verify_oop(c_rarg0); |
|
893 |
||
894 |
// load the klass and check the has finalizer flag |
|
895 |
Label register_finalizer; |
|
896 |
Register t = r5; |
|
897 |
__ load_klass(t, r0); |
|
898 |
__ ldrw(t, Address(t, Klass::access_flags_offset())); |
|
39255
c7281e9142ef
8149418: AArch64: replace tst+br with tbz instruction when tst's constant operand is 2 power
fyang
parents:
35579
diff
changeset
|
899 |
__ tbnz(t, exact_log2(JVM_ACC_HAS_FINALIZER), register_finalizer); |
29184 | 900 |
__ ret(lr); |
901 |
||
902 |
__ bind(register_finalizer); |
|
903 |
__ enter(); |
|
904 |
OopMap* oop_map = save_live_registers(sasm); |
|
905 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), r0); |
|
906 |
oop_maps = new OopMapSet(); |
|
907 |
oop_maps->add_gc_map(call_offset, oop_map); |
|
908 |
||
909 |
// Now restore all the live registers |
|
910 |
restore_live_registers(sasm); |
|
911 |
||
912 |
__ leave(); |
|
913 |
__ ret(lr); |
|
914 |
} |
|
915 |
break; |
|
916 |
||
917 |
case throw_class_cast_exception_id: |
|
918 |
{ StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); |
|
919 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); |
|
920 |
} |
|
921 |
break; |
|
922 |
||
923 |
case throw_incompatible_class_change_error_id: |
|
924 |
{ StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); |
|
925 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); |
|
926 |
} |
|
927 |
break; |
|
928 |
||
929 |
case slow_subtype_check_id: |
|
930 |
{ |
|
931 |
// Typical calling sequence: |
|
932 |
// __ push(klass_RInfo); // object klass or other subclass |
|
933 |
// __ push(sup_k_RInfo); // array element klass or other superclass |
|
934 |
// __ bl(slow_subtype_check); |
|
935 |
// Note that the subclass is pushed first, and is therefore deepest. |
|
936 |
enum layout { |
|
937 |
r0_off, r0_off_hi, |
|
938 |
r2_off, r2_off_hi, |
|
939 |
r4_off, r4_off_hi, |
|
940 |
r5_off, r5_off_hi, |
|
941 |
sup_k_off, sup_k_off_hi, |
|
942 |
klass_off, klass_off_hi, |
|
943 |
framesize, |
|
944 |
result_off = sup_k_off |
|
945 |
}; |
|
946 |
||
947 |
__ set_info("slow_subtype_check", dont_gc_arguments); |
|
948 |
__ push(RegSet::of(r0, r2, r4, r5), sp); |
|
949 |
||
950 |
// This is called by pushing args and not with C abi |
|
951 |
// __ ldr(r4, Address(sp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass |
|
952 |
// __ ldr(r0, Address(sp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass |
|
953 |
||
954 |
__ ldp(r4, r0, Address(sp, (sup_k_off) * VMRegImpl::stack_slot_size)); |
|
955 |
||
956 |
Label miss; |
|
957 |
__ check_klass_subtype_slow_path(r4, r0, r2, r5, NULL, &miss); |
|
958 |
||
959 |
// fallthrough on success: |
|
960 |
__ mov(rscratch1, 1); |
|
961 |
__ str(rscratch1, Address(sp, (result_off) * VMRegImpl::stack_slot_size)); // result |
|
962 |
__ pop(RegSet::of(r0, r2, r4, r5), sp); |
|
963 |
__ ret(lr); |
|
964 |
||
965 |
__ bind(miss); |
|
966 |
__ str(zr, Address(sp, (result_off) * VMRegImpl::stack_slot_size)); // result |
|
967 |
__ pop(RegSet::of(r0, r2, r4, r5), sp); |
|
968 |
__ ret(lr); |
|
969 |
} |
|
970 |
break; |
|
971 |
||
972 |
case monitorenter_nofpu_id: |
|
973 |
save_fpu_registers = false; |
|
974 |
// fall through |
|
975 |
case monitorenter_id: |
|
976 |
{ |
|
977 |
StubFrame f(sasm, "monitorenter", dont_gc_arguments); |
|
978 |
OopMap* map = save_live_registers(sasm, save_fpu_registers); |
|
979 |
||
980 |
// Called with store_parameter and not C abi |
|
981 |
||
982 |
f.load_argument(1, r0); // r0,: object |
|
983 |
f.load_argument(0, r1); // r1,: lock address |
|
984 |
||
985 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), r0, r1); |
|
986 |
||
987 |
oop_maps = new OopMapSet(); |
|
988 |
oop_maps->add_gc_map(call_offset, map); |
|
989 |
restore_live_registers(sasm, save_fpu_registers); |
|
990 |
} |
|
991 |
break; |
|
992 |
||
993 |
case monitorexit_nofpu_id: |
|
994 |
save_fpu_registers = false; |
|
995 |
// fall through |
|
996 |
case monitorexit_id: |
|
997 |
{ |
|
998 |
StubFrame f(sasm, "monitorexit", dont_gc_arguments); |
|
999 |
OopMap* map = save_live_registers(sasm, save_fpu_registers); |
|
1000 |
||
1001 |
// Called with store_parameter and not C abi |
|
1002 |
||
1003 |
f.load_argument(0, r0); // r0,: lock address |
|
1004 |
||
1005 |
// note: really a leaf routine but must setup last java sp |
|
1006 |
// => use call_RT for now (speed can be improved by |
|
1007 |
// doing last java sp setup manually) |
|
1008 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), r0); |
|
1009 |
||
1010 |
oop_maps = new OopMapSet(); |
|
1011 |
oop_maps->add_gc_map(call_offset, map); |
|
1012 |
restore_live_registers(sasm, save_fpu_registers); |
|
1013 |
} |
|
1014 |
break; |
|
1015 |
||
1016 |
case deoptimize_id: |
|
1017 |
{ |
|
1018 |
StubFrame f(sasm, "deoptimize", dont_gc_arguments); |
|
1019 |
OopMap* oop_map = save_live_registers(sasm); |
|
35560 | 1020 |
f.load_argument(0, c_rarg1); |
1021 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), c_rarg1); |
|
1022 |
||
29184 | 1023 |
oop_maps = new OopMapSet(); |
1024 |
oop_maps->add_gc_map(call_offset, oop_map); |
|
1025 |
restore_live_registers(sasm); |
|
1026 |
DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); |
|
1027 |
assert(deopt_blob != NULL, "deoptimization blob must have been created"); |
|
1028 |
__ leave(); |
|
1029 |
__ far_jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); |
|
1030 |
} |
|
1031 |
break; |
|
1032 |
||
1033 |
case throw_range_check_failed_id: |
|
1034 |
{ StubFrame f(sasm, "range_check_failed", dont_gc_arguments); |
|
1035 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); |
|
1036 |
} |
|
1037 |
break; |
|
1038 |
||
1039 |
case unwind_exception_id: |
|
1040 |
{ __ set_info("unwind_exception", dont_gc_arguments); |
|
1041 |
// note: no stubframe since we are about to leave the current |
|
1042 |
// activation and we are calling a leaf VM function only. |
|
1043 |
generate_unwind_exception(sasm); |
|
1044 |
} |
|
1045 |
break; |
|
1046 |
||
1047 |
case access_field_patching_id: |
|
1048 |
{ StubFrame f(sasm, "access_field_patching", dont_gc_arguments); |
|
1049 |
// we should set up register map |
|
1050 |
oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); |
|
1051 |
} |
|
1052 |
break; |
|
1053 |
||
1054 |
case load_klass_patching_id: |
|
1055 |
{ StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); |
|
1056 |
// we should set up register map |
|
1057 |
oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); |
|
1058 |
} |
|
1059 |
break; |
|
1060 |
||
1061 |
case load_mirror_patching_id: |
|
1062 |
{ StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments); |
|
1063 |
// we should set up register map |
|
1064 |
oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching)); |
|
1065 |
} |
|
1066 |
break; |
|
1067 |
||
1068 |
case load_appendix_patching_id: |
|
1069 |
{ StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments); |
|
1070 |
// we should set up register map |
|
1071 |
oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching)); |
|
1072 |
} |
|
1073 |
break; |
|
1074 |
||
1075 |
case handle_exception_nofpu_id: |
|
1076 |
case handle_exception_id: |
|
1077 |
{ StubFrame f(sasm, "handle_exception", dont_gc_arguments); |
|
1078 |
oop_maps = generate_handle_exception(id, sasm); |
|
1079 |
} |
|
1080 |
break; |
|
1081 |
||
1082 |
case handle_exception_from_callee_id: |
|
1083 |
{ StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); |
|
1084 |
oop_maps = generate_handle_exception(id, sasm); |
|
1085 |
} |
|
1086 |
break; |
|
1087 |
||
1088 |
case throw_index_exception_id: |
|
1089 |
{ StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); |
|
1090 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); |
|
1091 |
} |
|
1092 |
break; |
|
1093 |
||
1094 |
case throw_array_store_exception_id: |
|
1095 |
{ StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); |
|
1096 |
// tos + 0: link |
|
1097 |
// + 1: return address |
|
1098 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true); |
|
1099 |
} |
|
1100 |
break; |
|
1101 |
||
1102 |
#if INCLUDE_ALL_GCS |
|
1103 |
||
1104 |
case g1_pre_barrier_slow_id: |
|
1105 |
{ |
|
1106 |
StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); |
|
1107 |
// arg0 : previous value of memory |
|
1108 |
||
1109 |
BarrierSet* bs = Universe::heap()->barrier_set(); |
|
49347
edb65305d3ac
8195148: Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet
eosterlund
parents:
49164
diff
changeset
|
1110 |
if (bs->kind() != BarrierSet::G1BarrierSet) { |
29184 | 1111 |
__ mov(r0, (int)id); |
1112 |
__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), r0); |
|
1113 |
__ should_not_reach_here(); |
|
1114 |
break; |
|
1115 |
} |
|
1116 |
||
1117 |
const Register pre_val = r0; |
|
1118 |
const Register thread = rthread; |
|
1119 |
const Register tmp = rscratch1; |
|
1120 |
||
1121 |
Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
|
34148
6efbc7ffd767
8143014: Access PtrQueue member offsets through derived classes
kbarrett
parents:
30777
diff
changeset
|
1122 |
SATBMarkQueue::byte_offset_of_active())); |
29184 | 1123 |
|
1124 |
Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
|
34148
6efbc7ffd767
8143014: Access PtrQueue member offsets through derived classes
kbarrett
parents:
30777
diff
changeset
|
1125 |
SATBMarkQueue::byte_offset_of_index())); |
29184 | 1126 |
Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
34148
6efbc7ffd767
8143014: Access PtrQueue member offsets through derived classes
kbarrett
parents:
30777
diff
changeset
|
1127 |
SATBMarkQueue::byte_offset_of_buf())); |
29184 | 1128 |
|
1129 |
Label done; |
|
1130 |
Label runtime; |
|
1131 |
||
43449
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1132 |
// Is marking still active? |
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1133 |
if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { |
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1134 |
__ ldrw(tmp, in_progress); |
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1135 |
} else { |
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1136 |
assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); |
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1137 |
__ ldrb(tmp, in_progress); |
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1138 |
} |
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1139 |
__ cbzw(tmp, done); |
21041ea7c0fe
8140588: Internal Error: gc/g1/ptrQueue.hpp:126 assert(_index == _sz) failed: invariant: queues are empty when activated
aharlap
parents:
42871
diff
changeset
|
1140 |
|
29184 | 1141 |
// Can we store original value in the thread's buffer? |
1142 |
__ ldr(tmp, queue_index); |
|
1143 |
__ cbz(tmp, runtime); |
|
1144 |
||
1145 |
__ sub(tmp, tmp, wordSize); |
|
1146 |
__ str(tmp, queue_index); |
|
1147 |
__ ldr(rscratch2, buffer); |
|
1148 |
__ add(tmp, tmp, rscratch2); |
|
1149 |
f.load_argument(0, rscratch2); |
|
1150 |
__ str(rscratch2, Address(tmp, 0)); |
|
1151 |
__ b(done); |
|
1152 |
||
1153 |
__ bind(runtime); |
|
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1154 |
__ push_call_clobbered_registers(); |
29184 | 1155 |
f.load_argument(0, pre_val); |
1156 |
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread); |
|
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1157 |
__ pop_call_clobbered_registers(); |
29184 | 1158 |
__ bind(done); |
1159 |
} |
|
1160 |
break; |
|
1161 |
case g1_post_barrier_slow_id: |
|
1162 |
{ |
|
1163 |
StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); |
|
1164 |
||
49388
ec9091426557
8199511: Do not generate g1_{pre|post}_barrier_slow_id without CardTable-enabled barrier set
shade
parents:
49347
diff
changeset
|
1165 |
BarrierSet* bs = Universe::heap()->barrier_set(); |
ec9091426557
8199511: Do not generate g1_{pre|post}_barrier_slow_id without CardTable-enabled barrier set
shade
parents:
49347
diff
changeset
|
1166 |
if (bs->kind() != BarrierSet::G1BarrierSet) { |
ec9091426557
8199511: Do not generate g1_{pre|post}_barrier_slow_id without CardTable-enabled barrier set
shade
parents:
49347
diff
changeset
|
1167 |
__ mov(r0, (int)id); |
ec9091426557
8199511: Do not generate g1_{pre|post}_barrier_slow_id without CardTable-enabled barrier set
shade
parents:
49347
diff
changeset
|
1168 |
__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), r0); |
ec9091426557
8199511: Do not generate g1_{pre|post}_barrier_slow_id without CardTable-enabled barrier set
shade
parents:
49347
diff
changeset
|
1169 |
__ should_not_reach_here(); |
ec9091426557
8199511: Do not generate g1_{pre|post}_barrier_slow_id without CardTable-enabled barrier set
shade
parents:
49347
diff
changeset
|
1170 |
break; |
ec9091426557
8199511: Do not generate g1_{pre|post}_barrier_slow_id without CardTable-enabled barrier set
shade
parents:
49347
diff
changeset
|
1171 |
} |
ec9091426557
8199511: Do not generate g1_{pre|post}_barrier_slow_id without CardTable-enabled barrier set
shade
parents:
49347
diff
changeset
|
1172 |
|
29184 | 1173 |
// arg0: store_address |
1174 |
Address store_addr(rfp, 2*BytesPerWord); |
|
1175 |
||
1176 |
Label done; |
|
1177 |
Label runtime; |
|
1178 |
||
1179 |
// At this point we know new_value is non-NULL and the new_value crosses regions. |
|
1180 |
// Must check to see if card is already dirty |
|
1181 |
||
1182 |
const Register thread = rthread; |
|
1183 |
||
1184 |
Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + |
|
34148
6efbc7ffd767
8143014: Access PtrQueue member offsets through derived classes
kbarrett
parents:
30777
diff
changeset
|
1185 |
DirtyCardQueue::byte_offset_of_index())); |
29184 | 1186 |
Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + |
34148
6efbc7ffd767
8143014: Access PtrQueue member offsets through derived classes
kbarrett
parents:
30777
diff
changeset
|
1187 |
DirtyCardQueue::byte_offset_of_buf())); |
29184 | 1188 |
|
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1189 |
const Register card_offset = rscratch2; |
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1190 |
// LR is free here, so we can use it to hold the byte_map_base. |
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1191 |
const Register byte_map_base = lr; |
29184 | 1192 |
|
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1193 |
assert_different_registers(card_offset, byte_map_base, rscratch1); |
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1194 |
|
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1195 |
f.load_argument(0, card_offset); |
49164
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
49032
diff
changeset
|
1196 |
__ lsr(card_offset, card_offset, CardTable::card_shift); |
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1197 |
__ load_byte_map_base(byte_map_base); |
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1198 |
__ ldrb(rscratch1, Address(byte_map_base, card_offset)); |
49164
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
49032
diff
changeset
|
1199 |
__ cmpw(rscratch1, (int)G1CardTable::g1_young_card_val()); |
29184 | 1200 |
__ br(Assembler::EQ, done); |
1201 |
||
49164
7e958a8ebcd3
8195142: Refactor out card table from CardTableModRefBS to flatten the BarrierSet hierarchy
eosterlund
parents:
49032
diff
changeset
|
1202 |
assert((int)CardTable::dirty_card_val() == 0, "must be 0"); |
29184 | 1203 |
|
1204 |
__ membar(Assembler::StoreLoad); |
|
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1205 |
__ ldrb(rscratch1, Address(byte_map_base, card_offset)); |
29184 | 1206 |
__ cbzw(rscratch1, done); |
1207 |
||
1208 |
// storing region crossing non-NULL, card is clean. |
|
1209 |
// dirty card and log. |
|
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1210 |
__ strb(zr, Address(byte_map_base, card_offset)); |
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1211 |
|
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1212 |
// Convert card offset into an address in card_addr |
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1213 |
Register card_addr = card_offset; |
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1214 |
__ add(card_addr, byte_map_base, card_addr); |
29184 | 1215 |
|
1216 |
__ ldr(rscratch1, queue_index); |
|
1217 |
__ cbz(rscratch1, runtime); |
|
1218 |
__ sub(rscratch1, rscratch1, wordSize); |
|
1219 |
__ str(rscratch1, queue_index); |
|
1220 |
||
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1221 |
// Reuse LR to hold buffer_addr |
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1222 |
const Register buffer_addr = lr; |
29184 | 1223 |
|
1224 |
__ ldr(buffer_addr, buffer); |
|
1225 |
__ str(card_addr, Address(buffer_addr, rscratch1)); |
|
1226 |
__ b(done); |
|
1227 |
||
1228 |
__ bind(runtime); |
|
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1229 |
__ push_call_clobbered_registers(); |
29184 | 1230 |
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
35579
d21d5a0db03f
8146709: AArch64: Incorrect use of ADRP for byte_map_base
aph
parents:
35560
diff
changeset
|
1231 |
__ pop_call_clobbered_registers(); |
29184 | 1232 |
__ bind(done); |
1233 |
||
1234 |
} |
|
1235 |
break; |
|
1236 |
#endif |
|
1237 |
||
1238 |
case predicate_failed_trap_id: |
|
1239 |
{ |
|
1240 |
StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments); |
|
1241 |
||
1242 |
OopMap* map = save_live_registers(sasm); |
|
1243 |
||
1244 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap)); |
|
1245 |
oop_maps = new OopMapSet(); |
|
1246 |
oop_maps->add_gc_map(call_offset, map); |
|
1247 |
restore_live_registers(sasm); |
|
1248 |
__ leave(); |
|
1249 |
DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); |
|
1250 |
assert(deopt_blob != NULL, "deoptimization blob must have been created"); |
|
1251 |
||
1252 |
__ far_jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); |
|
1253 |
} |
|
1254 |
break; |
|
1255 |
||
1256 |
||
1257 |
default: |
|
1258 |
{ StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); |
|
1259 |
__ mov(r0, (int)id); |
|
1260 |
__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), r0); |
|
1261 |
__ should_not_reach_here(); |
|
1262 |
} |
|
1263 |
break; |
|
1264 |
} |
|
1265 |
} |
|
1266 |
return oop_maps; |
|
1267 |
} |
|
1268 |
||
1269 |
#undef __ |
|
1270 |
||
1271 |
const char *Runtime1::pd_name_for_address(address entry) { Unimplemented(); return 0; } |