/*

 * Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved.

 *

 * This code is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License version 2 only, as

 * published by the Free Software Foundation.

 *

 * This code is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

 * version 2 for more details (a copy is included in the LICENSE file that

 * accompanied this code).

 *

 * You should have received a copy of the GNU General Public License version

 * 2 along with this work; if not, write to the Free Software Foundation,

 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

 *

 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

 * or visit www.oracle.com if you need additional information or have any

 * questions.

 *

 */

#include "precompiled.hpp"

#include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"

#include "gc/shenandoah/shenandoahForwarding.hpp"

#include "gc/shenandoah/shenandoahHeap.inline.hpp"

#include "gc/shenandoah/shenandoahHeapRegion.hpp"

#include "gc/shenandoah/shenandoahHeuristics.hpp"

#include "gc/shenandoah/shenandoahRuntime.hpp"

#include "gc/shenandoah/shenandoahThreadLocalData.hpp"

#include "interpreter/interpreter.hpp"

#include "interpreter/interp_masm.hpp"

#include "runtime/sharedRuntime.hpp"

#include "runtime/thread.hpp"

#include "utilities/macros.hpp"

#ifdef COMPILER1

#include "c1/c1_LIRAssembler.hpp"

#include "c1/c1_MacroAssembler.hpp"

#include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"

#endif

#define __ masm->

address ShenandoahBarrierSetAssembler::_shenandoah_lrb = NULL;

void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,

                                                       Register src, Register dst, Register count) {

  bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;

  if (is_reference_type(type)) {

    if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) {

#ifdef _LP64

      Register thread = r15_thread;

#else

      Register thread = rax;

      if (thread == src || thread == dst || thread == count) {

        thread = rbx;

      }

      if (thread == src || thread == dst || thread == count) {

        thread = rcx;

      }

      if (thread == src || thread == dst || thread == count) {

        thread = rdx;

      }

      __ push(thread);

      __ get_thread(thread);

#endif

      assert_different_registers(src, dst, count, thread);

      Label done;

      // Short-circuit if count == 0.

      __ testptr(count, count);

      __ jcc(Assembler::zero, done);

      // Avoid runtime call when not marking.

      Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));

      int flags = ShenandoahHeap::HAS_FORWARDED;

      if (!dest_uninitialized) {

        flags |= ShenandoahHeap::MARKING;

      }

      __ testb(gc_state, flags);

      __ jcc(Assembler::zero, done);

      __ pusha();                      // push registers

#ifdef _LP64

      assert(src == rdi, "expected");

      assert(dst == rsi, "expected");

      assert(count == rdx, "expected");

      if (UseCompressedOops) {

        if (dest_uninitialized) {

          __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_duinit_narrow_oop_entry), src, dst, count);

        } else {

          __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_narrow_oop_entry), src, dst, count);

        }

      } else

#endif

      {

        if (dest_uninitialized) {

          __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_duinit_oop_entry), src, dst, count);

        } else {

          __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_oop_entry), src, dst, count);

        }

      }

      __ popa();

      __ bind(done);

      NOT_LP64(__ pop(thread);)

    }

  }

}

void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm,

                                                                 Register obj,

                                                                 Register pre_val,

                                                                 Register thread,

                                                                 Register tmp,

                                                                 bool tosca_live,

                                                                 bool expand_call) {

  if (ShenandoahSATBBarrier) {

    satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, tosca_live, expand_call);

  }

}

void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,

                                                           Register obj,

                                                           Register pre_val,

                                                           Register thread,

                                                           Register tmp,

                                                           bool tosca_live,

                                                           bool expand_call) {

  // If expand_call is true then we expand the call_VM_leaf macro

  // directly to skip generating the check by

  // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.

#ifdef _LP64

  assert(thread == r15_thread, "must be");

#endif // _LP64

  Label done;

  Label runtime;

  assert(pre_val != noreg, "check this code");

  if (obj != noreg) {

    assert_different_registers(obj, pre_val, tmp);

    assert(pre_val != rax, "check this code");

  }

  Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));

  Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));

  Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));

  Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));

  __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);

  __ jcc(Assembler::zero, done);

  // Do we need to load the previous value?

  if (obj != noreg) {

    __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);

  }

  // Is the previous value null?

  __ cmpptr(pre_val, (int32_t) NULL_WORD);

  __ jcc(Assembler::equal, done);

  // Can we store original value in the thread's buffer?

  // Is index == 0?

  // (The index field is typed as size_t.)

  __ movptr(tmp, index);                   // tmp := *index_adr

  __ cmpptr(tmp, 0);                       // tmp == 0?

  __ jcc(Assembler::equal, runtime);       // If yes, goto runtime

  __ subptr(tmp, wordSize);                // tmp := tmp - wordSize

  __ movptr(index, tmp);                   // *index_adr := tmp

  __ addptr(tmp, buffer);                  // tmp := tmp + *buffer_adr

  // Record the previous value

  __ movptr(Address(tmp, 0), pre_val);

  __ jmp(done);

  __ bind(runtime);

  // save the live input values

  if(tosca_live) __ push(rax);

  if (obj != noreg && obj != rax)

    __ push(obj);

  if (pre_val != rax)

    __ push(pre_val);

  // Calling the runtime using the regular call_VM_leaf mechanism generates

  // code (generated by InterpreterMacroAssember::call_VM_leaf_base)

  // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL.

  //

  // If we care generating the pre-barrier without a frame (e.g. in the

  // intrinsified Reference.get() routine) then ebp might be pointing to

  // the caller frame and so this check will most likely fail at runtime.

  //

  // Expanding the call directly bypasses the generation of the check.

  // So when we do not have have a full interpreter frame on the stack

  // expand_call should be passed true.

  NOT_LP64( __ push(thread); )

#ifdef _LP64

  // We move pre_val into c_rarg0 early, in order to avoid smashing it, should

  // pre_val be c_rarg1 (where the call prologue would copy thread argument).

  // Note: this should not accidentally smash thread, because thread is always r15.

  assert(thread != c_rarg0, "smashed arg");

  if (c_rarg0 != pre_val) {

    __ mov(c_rarg0, pre_val);

  }

#endif

  if (expand_call) {

    LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )

#ifdef _LP64

    if (c_rarg1 != thread) {

      __ mov(c_rarg1, thread);

    }

    // Already moved pre_val into c_rarg0 above

#else

    __ push(thread);

    __ push(pre_val);

#endif

    __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), 2);

  } else {

    __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), LP64_ONLY(c_rarg0) NOT_LP64(pre_val), thread);

  }

  NOT_LP64( __ pop(thread); )

  // save the live input values

  if (pre_val != rax)

    __ pop(pre_val);

  if (obj != noreg && obj != rax)

    __ pop(obj);

  if(tosca_live) __ pop(rax);

  __ bind(done);

}

void ShenandoahBarrierSetAssembler::load_reference_barrier_not_null(MacroAssembler* masm, Register dst, Address src) {

  assert(ShenandoahLoadRefBarrier, "Should be enabled");

  Label done;

#ifdef _LP64

  Register thread = r15_thread;

#else

  Register thread = rcx;

  if (thread == dst) {

    thread = rbx;

  }

  __ push(thread);

  __ get_thread(thread);

#endif

  Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));

  __ testb(gc_state, ShenandoahHeap::HAS_FORWARDED);

  __ jccb(Assembler::zero, done);

  // Use rsi for src address

  const Register src_addr = rsi;

  // Setup address parameter first, if it does not clobber oop in dst

  bool need_addr_setup = (src_addr != dst);

  if (need_addr_setup) {

    __ push(src_addr);

    __ lea(src_addr, src);

    if (dst != rax) {

      // Move obj into rax and save rax

      __ push(rax);

      __ movptr(rax, dst);

    }

  } else {

    // dst == rsi

    __ push(rax);

    __ movptr(rax, dst);

    // we can clobber it, since it is outgoing register

    __ lea(src_addr, src);

  }

  __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahBarrierSetAssembler::shenandoah_lrb())));

  if (need_addr_setup) {

    if (dst != rax) {

      __ movptr(dst, rax);

      __ pop(rax);

    }

    __ pop(src_addr);

  } else {

    __ movptr(dst, rax);

    __ pop(rax);

  }

  __ bind(done);

#ifndef _LP64

    __ pop(thread);

#endif

}

void ShenandoahBarrierSetAssembler::load_reference_barrier_native(MacroAssembler* masm, Register dst, Address src) {

  if (!ShenandoahLoadRefBarrier) {

    return;

  }

  Label done;

  Label not_null;

  Label slow_path;

  __ block_comment("load_reference_barrier_native { ");

  // null check

  __ testptr(dst, dst);

  __ jcc(Assembler::notZero, not_null);

  __ jmp(done);

  __ bind(not_null);

#ifdef _LP64

  Register thread = r15_thread;

#else

  Register thread = rcx;

  if (thread == dst) {

    thread = rbx;

  }

  __ push(thread);

  __ get_thread(thread);

#endif

  assert_different_registers(dst, thread);

  Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));

  __ testb(gc_state, ShenandoahHeap::EVACUATION);

#ifndef _LP64

  __ pop(thread);

#endif

  __ jccb(Assembler::notZero, slow_path);

  __ jmp(done);

  __ bind(slow_path);

  if (dst != rax) {

    __ push(rax);

  }

  __ push(rcx);

  __ push(rdx);

  __ push(rdi);

  __ push(rsi);

#ifdef _LP64

  __ push(r8);

  __ push(r9);

  __ push(r10);

  __ push(r11);

  __ push(r12);

  __ push(r13);

  __ push(r14);

  __ push(r15);

#endif

  assert_different_registers(dst, rsi);

  __ lea(rsi, src);

  __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_native), dst, rsi);

#ifdef _LP64

  __ pop(r15);

  __ pop(r14);

  __ pop(r13);

  __ pop(r12);

  __ pop(r11);

  __ pop(r10);

  __ pop(r9);

  __ pop(r8);

#endif

  __ pop(rsi);

  __ pop(rdi);

  __ pop(rdx);

  __ pop(rcx);

  if (dst != rax) {

    __ movptr(dst, rax);

    __ pop(rax);

  }

  __ bind(done);

  __ block_comment("load_reference_barrier_native { ");

}

void ShenandoahBarrierSetAssembler::storeval_barrier(MacroAssembler* masm, Register dst, Register tmp) {

  if (ShenandoahStoreValEnqueueBarrier) {

    storeval_barrier_impl(masm, dst, tmp);

  }

}

void ShenandoahBarrierSetAssembler::storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp) {

  assert(ShenandoahStoreValEnqueueBarrier, "should be enabled");

  if (dst == noreg) return;

  if (ShenandoahStoreValEnqueueBarrier) {

    // The set of registers to be saved+restored is the same as in the write-barrier above.

    // Those are the commonly used registers in the interpreter.

    __ pusha();

    // __ push_callee_saved_registers();

    __ subptr(rsp, 2 * Interpreter::stackElementSize);

    __ movdbl(Address(rsp, 0), xmm0);

#ifdef _LP64

    Register thread = r15_thread;

#else

    Register thread = rcx;

    if (thread == dst || thread == tmp) {

      thread = rdi;

    }

    if (thread == dst || thread == tmp) {

      thread = rbx;

    }

    __ get_thread(thread);

#endif

    assert_different_registers(dst, tmp, thread);

    satb_write_barrier_pre(masm, noreg, dst, thread, tmp, true, false);

    __ movdbl(xmm0, Address(rsp, 0));

    __ addptr(rsp, 2 * Interpreter::stackElementSize);

    //__ pop_callee_saved_registers();

    __ popa();

  }

}

void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address src) {

  if (ShenandoahLoadRefBarrier) {

    Label done;

    __ testptr(dst, dst);

    __ jcc(Assembler::zero, done);

    load_reference_barrier_not_null(masm, dst, src);

    __ bind(done);

  }

}

void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,

             Register dst, Address src, Register tmp1, Register tmp_thread) {

    if (dst == src.base() || dst == src.index()) {

      // Use tmp1 for dst if possible, as it is not used in BarrierAssembler::load_at()

      if (tmp1->is_valid() && tmp1 != src.base() && tmp1 != src.index()) {

        dst = tmp1;

        use_tmp1_for_dst = true;

      } else {

        dst = rdi;

        __ push(dst);

      }

    }

      load_reference_barrier_native(masm, dst, src);

    } else {

      load_reference_barrier(masm, dst, src);

    }

    if (dst != result_dst) {

      __ movptr(result_dst, dst);

      if (!use_tmp1_for_dst) {

        __ pop(dst);

      }