author | lucy |
Mon, 18 Nov 2019 17:11:06 +0100 | |
changeset 59122 | 5d73255c2d52 |
parent 54919 | 21925121a917 |
permissions | -rw-r--r-- |
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/* |
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* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#include "precompiled.hpp" |
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#include "jvm.h" |
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#include "asm/macroAssembler.inline.hpp" |
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#include "memory/resourceArea.hpp" |
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#include "runtime/java.hpp" |
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#include "runtime/os.inline.hpp" |
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#include "runtime/stubCodeGenerator.hpp" |
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#include "runtime/vm_version.hpp" |
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int VM_Version::_stored_pc_adjustment = 4; |
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int VM_Version::_arm_arch = 5; |
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bool VM_Version::_is_initialized = false; |
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int VM_Version::_kuser_helper_version = 0; |
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extern "C" { |
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typedef int (*get_cpu_info_t)(); |
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typedef bool (*check_vfp_t)(double *d); |
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typedef bool (*check_simd_t)(); |
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typedef bool (*check_mp_ext_t)(int *addr); |
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} |
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#define __ _masm-> |
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class VM_Version_StubGenerator: public StubCodeGenerator { |
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public: |
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VM_Version_StubGenerator(CodeBuffer *c) : StubCodeGenerator(c) {} |
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address generate_get_cpu_info() { |
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StubCodeMark mark(this, "VM_Version", "get_cpu_info"); |
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address start = __ pc(); |
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__ mov(R0, PC); |
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__ push(PC); |
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__ pop(R1); |
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__ sub(R0, R1, R0); |
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// return the result in R0 |
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__ bx(LR); |
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return start; |
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}; |
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address generate_check_vfp() { |
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StubCodeMark mark(this, "VM_Version", "check_vfp"); |
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address start = __ pc(); |
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__ fstd(D0, Address(R0)); |
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__ mov(R0, 1); |
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__ bx(LR); |
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return start; |
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}; |
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address generate_check_vfp3_32() { |
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StubCodeMark mark(this, "VM_Version", "check_vfp3_32"); |
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address start = __ pc(); |
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__ fstd(D16, Address(R0)); |
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__ mov(R0, 1); |
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__ bx(LR); |
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return start; |
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}; |
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address generate_check_simd() { |
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StubCodeMark mark(this, "VM_Version", "check_simd"); |
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address start = __ pc(); |
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__ vcnt(Stemp, Stemp); |
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__ mov(R0, 1); |
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__ bx(LR); |
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return start; |
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}; |
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address generate_check_mp_ext() { |
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StubCodeMark mark(this, "VM_Version", "check_mp_ext"); |
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address start = __ pc(); |
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// PLDW is available with Multiprocessing Extensions only |
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__ pldw(Address(R0)); |
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// Return true if instruction caused no signals |
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__ mov(R0, 1); |
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// JVM_handle_linux_signal moves PC here if SIGILL happens |
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__ bx(LR); |
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return start; |
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}; |
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}; |
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#undef __ |
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extern "C" address check_vfp3_32_fault_instr; |
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extern "C" address check_vfp_fault_instr; |
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extern "C" address check_simd_fault_instr; |
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extern "C" address check_mp_ext_fault_instr; |
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void VM_Version::early_initialize() { |
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// Make sure that _arm_arch is initialized so that any calls to OrderAccess will |
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// use proper dmb instruction |
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get_os_cpu_info(); |
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_kuser_helper_version = *(int*)KUSER_HELPER_VERSION_ADDR; |
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// armv7 has the ldrexd instruction that can be used to implement cx8 |
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// armv5 with linux >= 3.1 can use kernel helper routine |
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_supports_cx8 = (supports_ldrexd() || supports_kuser_cmpxchg64()); |
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} |
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void VM_Version::initialize() { |
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ResourceMark rm; |
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// Making this stub must be FIRST use of assembler |
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const int stub_size = 128; |
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BufferBlob* stub_blob = BufferBlob::create("get_cpu_info", stub_size); |
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if (stub_blob == NULL) { |
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vm_exit_during_initialization("Unable to allocate get_cpu_info stub"); |
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} |
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CodeBuffer c(stub_blob); |
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VM_Version_StubGenerator g(&c); |
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address get_cpu_info_pc = g.generate_get_cpu_info(); |
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get_cpu_info_t get_cpu_info = CAST_TO_FN_PTR(get_cpu_info_t, get_cpu_info_pc); |
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int pc_adjustment = get_cpu_info(); |
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VM_Version::_stored_pc_adjustment = pc_adjustment; |
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#ifndef __SOFTFP__ |
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address check_vfp_pc = g.generate_check_vfp(); |
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check_vfp_t check_vfp = CAST_TO_FN_PTR(check_vfp_t, check_vfp_pc); |
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check_vfp_fault_instr = (address)check_vfp; |
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double dummy; |
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if (check_vfp(&dummy)) { |
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_features |= vfp_m; |
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} |
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#ifdef COMPILER2 |
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if (has_vfp()) { |
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address check_vfp3_32_pc = g.generate_check_vfp3_32(); |
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check_vfp_t check_vfp3_32 = CAST_TO_FN_PTR(check_vfp_t, check_vfp3_32_pc); |
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check_vfp3_32_fault_instr = (address)check_vfp3_32; |
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double dummy; |
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if (check_vfp3_32(&dummy)) { |
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_features |= vfp3_32_m; |
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} |
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address check_simd_pc =g.generate_check_simd(); |
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check_simd_t check_simd = CAST_TO_FN_PTR(check_simd_t, check_simd_pc); |
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check_simd_fault_instr = (address)check_simd; |
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if (check_simd()) { |
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_features |= simd_m; |
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} |
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} |
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#endif |
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#endif |
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address check_mp_ext_pc = g.generate_check_mp_ext(); |
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check_mp_ext_t check_mp_ext = CAST_TO_FN_PTR(check_mp_ext_t, check_mp_ext_pc); |
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check_mp_ext_fault_instr = (address)check_mp_ext; |
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int dummy_local_variable; |
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if (check_mp_ext(&dummy_local_variable)) { |
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_features |= mp_ext_m; |
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} |
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if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
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warning("AES intrinsics are not available on this CPU"); |
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FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
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} |
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if (UseAES && !FLAG_IS_DEFAULT(UseAES)) { |
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warning("AES instructions are not available on this CPU"); |
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FLAG_SET_DEFAULT(UseAES, false); |
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} |
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if (UseAESCTRIntrinsics) { |
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warning("AES/CTR intrinsics are not available on this CPU"); |
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); |
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} |
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if (UseFMA) { |
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warning("FMA instructions are not available on this CPU"); |
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FLAG_SET_DEFAULT(UseFMA, false); |
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} |
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if (UseSHA) { |
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warning("SHA instructions are not available on this CPU"); |
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FLAG_SET_DEFAULT(UseSHA, false); |
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} |
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if (UseSHA1Intrinsics) { |
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warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU."); |
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FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); |
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} |
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if (UseSHA256Intrinsics) { |
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warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU."); |
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FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); |
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} |
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if (UseSHA512Intrinsics) { |
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warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU."); |
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FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); |
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} |
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if (UseCRC32Intrinsics) { |
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if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) |
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warning("CRC32 intrinsics are not available on this CPU"); |
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FLAG_SET_DEFAULT(UseCRC32Intrinsics, false); |
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} |
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if (UseCRC32CIntrinsics) { |
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if (!FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) |
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warning("CRC32C intrinsics are not available on this CPU"); |
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FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false); |
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} |
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if (UseAdler32Intrinsics) { |
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warning("Adler32 intrinsics are not available on this CPU"); |
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FLAG_SET_DEFAULT(UseAdler32Intrinsics, false); |
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} |
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if (UseVectorizedMismatchIntrinsic) { |
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warning("vectorizedMismatch intrinsic is not available on this CPU."); |
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FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false); |
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} |
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#ifdef COMPILER2 |
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// C2 is only supported on v7+ VFP at this time |
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if (_arm_arch < 7 || !has_vfp()) { |
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vm_exit_during_initialization("Server VM is only supported on ARMv7+ VFP"); |
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} |
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#endif |
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261 |
// ARM doesn't have special instructions for these but ldrex/ldrexd |
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// enable shorter instruction sequences that the ones based on cas. |
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_supports_atomic_getset4 = supports_ldrex(); |
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_supports_atomic_getadd4 = supports_ldrex(); |
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_supports_atomic_getset8 = supports_ldrexd(); |
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_supports_atomic_getadd8 = supports_ldrexd(); |
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268 |
#ifdef COMPILER2 |
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assert(_supports_cx8 && _supports_atomic_getset4 && _supports_atomic_getadd4 |
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&& _supports_atomic_getset8 && _supports_atomic_getadd8, "C2: atomic operations must be supported"); |
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#endif |
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char buf[512]; |
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jio_snprintf(buf, sizeof(buf), "(ARMv%d)%s%s%s%s", |
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_arm_arch, |
275 |
(has_vfp() ? ", vfp" : ""), |
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(has_vfp3_32() ? ", vfp3-32" : ""), |
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(has_simd() ? ", simd" : ""), |
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(has_multiprocessing_extensions() ? ", mp_ext" : "")); |
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// buf is started with ", " or is empty |
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_features_string = os::strdup(buf); |
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283 |
if (has_simd()) { |
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284 |
if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { |
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FLAG_SET_DEFAULT(UsePopCountInstruction, true); |
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} |
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} else { |
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FLAG_SET_DEFAULT(UsePopCountInstruction, false); |
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} |
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if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) { |
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FLAG_SET_DEFAULT(AllocatePrefetchDistance, 128); |
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} |
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#ifdef COMPILER2 |
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296 |
FLAG_SET_DEFAULT(UseFPUForSpilling, true); |
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297 |
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298 |
if (FLAG_IS_DEFAULT(MaxVectorSize)) { |
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299 |
// FLAG_SET_DEFAULT(MaxVectorSize, has_simd() ? 16 : 8); |
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300 |
// SIMD/NEON can use 16, but default is 8 because currently |
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// larger than 8 will disable instruction scheduling |
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FLAG_SET_DEFAULT(MaxVectorSize, 8); |
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} else { |
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int max_vector_size = has_simd() ? 16 : 8; |
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if (MaxVectorSize > max_vector_size) { |
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warning("MaxVectorSize must be at most %i on this platform", max_vector_size); |
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FLAG_SET_DEFAULT(MaxVectorSize, max_vector_size); |
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308 |
} |
42664 | 309 |
} |
310 |
#endif |
|
311 |
||
312 |
if (FLAG_IS_DEFAULT(Tier4CompileThreshold)) { |
|
313 |
Tier4CompileThreshold = 10000; |
|
314 |
} |
|
315 |
if (FLAG_IS_DEFAULT(Tier3InvocationThreshold)) { |
|
316 |
Tier3InvocationThreshold = 1000; |
|
317 |
} |
|
318 |
if (FLAG_IS_DEFAULT(Tier3CompileThreshold)) { |
|
319 |
Tier3CompileThreshold = 5000; |
|
320 |
} |
|
321 |
if (FLAG_IS_DEFAULT(Tier3MinInvocationThreshold)) { |
|
322 |
Tier3MinInvocationThreshold = 500; |
|
323 |
} |
|
324 |
||
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UNSUPPORTED_OPTION(TypeProfileLevel); |
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UNSUPPORTED_OPTION(CriticalJNINatives); |
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|
42664 | 328 |
FLAG_SET_DEFAULT(TypeProfileLevel, 0); // unsupported |
329 |
||
330 |
// This machine does not allow unaligned memory accesses |
|
331 |
if (UseUnalignedAccesses) { |
|
332 |
if (!FLAG_IS_DEFAULT(UseUnalignedAccesses)) |
|
333 |
warning("Unaligned memory access is not available on this CPU"); |
|
334 |
FLAG_SET_DEFAULT(UseUnalignedAccesses, false); |
|
335 |
} |
|
336 |
||
337 |
_is_initialized = true; |
|
338 |
} |
|
339 |
||
340 |
bool VM_Version::use_biased_locking() { |
|
341 |
get_os_cpu_info(); |
|
342 |
// The cost of CAS on uniprocessor ARM v6 and later is low compared to the |
|
343 |
// overhead related to slightly longer Biased Locking execution path. |
|
344 |
// Testing shows no improvement when running with Biased Locking enabled |
|
345 |
// on an ARMv6 and higher uniprocessor systems. The situation is different on |
|
346 |
// ARMv5 and MP systems. |
|
347 |
// |
|
348 |
// Therefore the Biased Locking is enabled on ARMv5 and ARM MP only. |
|
349 |
// |
|
350 |
return (!os::is_MP() && (arm_arch() > 5)) ? false : true; |
|
351 |
} |