author | stefank |
Tue, 23 Nov 2010 13:22:55 -0800 | |
changeset 7397 | 5b173b4ca846 |
parent 5547 | f4b087cbb361 |
child 14294 | 130e947dfbe6 |
permissions | -rw-r--r-- |
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/* |
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* Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. |
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* Copyright 2007 Red Hat, Inc. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#ifndef CPU_ZERO_VM_REGISTER_ZERO_HPP |
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#define CPU_ZERO_VM_REGISTER_ZERO_HPP |
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#include "asm/register.hpp" |
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#include "vm_version_zero.hpp" |
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class VMRegImpl; |
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typedef VMRegImpl* VMReg; |
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// Use Register as shortcut |
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class RegisterImpl; |
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typedef RegisterImpl* Register; |
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inline Register as_Register(int encoding) { |
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return (Register)(intptr_t) encoding; |
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} |
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// The implementation of integer registers for the zero architecture |
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class RegisterImpl : public AbstractRegisterImpl { |
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public: |
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enum { |
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number_of_registers = 0 |
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}; |
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// construction |
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inline friend Register as_Register(int encoding); |
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VMReg as_VMReg(); |
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// derived registers, offsets, and addresses |
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Register successor() const { |
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return as_Register(encoding() + 1); |
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} |
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// accessors |
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int encoding() const { |
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assert(is_valid(), "invalid register"); |
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return (intptr_t)this; |
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} |
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bool is_valid() const { |
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return 0 <= (intptr_t) this && (intptr_t)this < number_of_registers; |
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} |
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const char* name() const; |
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}; |
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// Use FloatRegister as shortcut |
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class FloatRegisterImpl; |
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typedef FloatRegisterImpl* FloatRegister; |
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inline FloatRegister as_FloatRegister(int encoding) { |
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return (FloatRegister)(intptr_t) encoding; |
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} |
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// The implementation of floating point registers for the zero architecture |
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class FloatRegisterImpl : public AbstractRegisterImpl { |
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public: |
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enum { |
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number_of_registers = 0 |
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}; |
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// construction |
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inline friend FloatRegister as_FloatRegister(int encoding); |
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VMReg as_VMReg(); |
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// derived registers, offsets, and addresses |
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FloatRegister successor() const { |
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return as_FloatRegister(encoding() + 1); |
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} |
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// accessors |
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int encoding() const { |
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assert(is_valid(), "invalid register"); |
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return (intptr_t)this; |
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} |
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bool is_valid() const { |
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return 0 <= (intptr_t) this && (intptr_t)this < number_of_registers; |
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} |
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const char* name() const; |
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}; |
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class ConcreteRegisterImpl : public AbstractRegisterImpl { |
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public: |
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enum { |
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number_of_registers = RegisterImpl::number_of_registers + |
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FloatRegisterImpl::number_of_registers |
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}; |
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static const int max_gpr; |
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static const int max_fpr; |
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}; |
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CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1)); |
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#endif // CPU_ZERO_VM_REGISTER_ZERO_HPP |