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/*
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* Copyright 1999-2006 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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* CA 95054 USA or visit www.sun.com if you need additional information or
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* have any questions.
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*
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*/
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// On i486 the frame looks as follows:
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//
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// +-----------------------------+---------+----------------------------------------+----------------+-----------
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// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling .
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// +-----------------------------+---------+----------------------------------------+----------------+-----------
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//
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// The FPU registers are mapped with their offset from TOS; therefore the
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// status of FPU stack must be updated during code emission.
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public:
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static const int pd_c_runtime_reserved_arg_size;
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enum {
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nof_xmm_regs = pd_nof_xmm_regs_frame_map,
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nof_caller_save_xmm_regs = pd_nof_caller_save_xmm_regs_frame_map,
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first_available_sp_in_frame = 0,
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frame_pad_in_bytes = 8,
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nof_reg_args = 2
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};
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private:
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static LIR_Opr _caller_save_xmm_regs [nof_caller_save_xmm_regs];
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static XMMRegister _xmm_regs[nof_xmm_regs];
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public:
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static LIR_Opr receiver_opr;
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static LIR_Opr rsi_opr;
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static LIR_Opr rdi_opr;
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static LIR_Opr rbx_opr;
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static LIR_Opr rax_opr;
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static LIR_Opr rdx_opr;
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static LIR_Opr rcx_opr;
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static LIR_Opr rsp_opr;
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static LIR_Opr rbp_opr;
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static LIR_Opr rsi_oop_opr;
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static LIR_Opr rdi_oop_opr;
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static LIR_Opr rbx_oop_opr;
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static LIR_Opr rax_oop_opr;
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static LIR_Opr rdx_oop_opr;
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static LIR_Opr rcx_oop_opr;
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static LIR_Opr rax_rdx_long_opr;
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static LIR_Opr rbx_rcx_long_opr;
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static LIR_Opr fpu0_float_opr;
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static LIR_Opr fpu0_double_opr;
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static LIR_Opr xmm0_float_opr;
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static LIR_Opr xmm0_double_opr;
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static LIR_Opr as_long_opr(Register r, Register r2) {
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return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));
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}
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// VMReg name for spilled physical FPU stack slot n
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static VMReg fpu_regname (int n);
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static XMMRegister nr2xmmreg(int rnr);
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static bool is_caller_save_register (LIR_Opr opr) { return true; }
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static bool is_caller_save_register (Register r) { return true; }
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static LIR_Opr caller_save_xmm_reg_at(int i) {
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assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds");
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return _caller_save_xmm_regs[i];
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}
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