1 /*

     2  * Copyright 1999-2006 Sun Microsystems, Inc.  All Rights Reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,

    20  * CA 95054 USA or visit www.sun.com if you need additional information or

    21  * have any questions.

    22  *

    23  */

    24 

    25 //  On i486 the frame looks as follows:

    26 //

    27 //  +-----------------------------+---------+----------------------------------------+----------------+-----------

    28 //  | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling .

    29 //  +-----------------------------+---------+----------------------------------------+----------------+-----------

    30 //

    31 //  The FPU registers are mapped with their offset from TOS; therefore the

    32 //  status of FPU stack must be updated during code emission.

    33 

    34  public:

    35   static const int pd_c_runtime_reserved_arg_size;

    36 

    37   enum {

    38     nof_xmm_regs = pd_nof_xmm_regs_frame_map,

    39     nof_caller_save_xmm_regs = pd_nof_caller_save_xmm_regs_frame_map,

    40     first_available_sp_in_frame = 0,

    41     frame_pad_in_bytes = 8,

    42     nof_reg_args = 2

    43   };

    44 

    45  private:

    46   static LIR_Opr      _caller_save_xmm_regs [nof_caller_save_xmm_regs];

    47 

    48   static XMMRegister _xmm_regs[nof_xmm_regs];

    49 

    50  public:

    51   static LIR_Opr receiver_opr;

    52 

    53   static LIR_Opr rsi_opr;

    54   static LIR_Opr rdi_opr;

    55   static LIR_Opr rbx_opr;

    56   static LIR_Opr rax_opr;

    57   static LIR_Opr rdx_opr;

    58   static LIR_Opr rcx_opr;

    59   static LIR_Opr rsp_opr;

    60   static LIR_Opr rbp_opr;

    61 

    62   static LIR_Opr rsi_oop_opr;

    63   static LIR_Opr rdi_oop_opr;

    64   static LIR_Opr rbx_oop_opr;

    65   static LIR_Opr rax_oop_opr;

    66   static LIR_Opr rdx_oop_opr;

    67   static LIR_Opr rcx_oop_opr;

    68 

    69   static LIR_Opr rax_rdx_long_opr;

    70   static LIR_Opr rbx_rcx_long_opr;

    71   static LIR_Opr fpu0_float_opr;

    72   static LIR_Opr fpu0_double_opr;

    73   static LIR_Opr xmm0_float_opr;

    74   static LIR_Opr xmm0_double_opr;

    75 

    76   static LIR_Opr as_long_opr(Register r, Register r2) {

    77     return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));

    78   }

    79 

    80   // VMReg name for spilled physical FPU stack slot n

    81   static VMReg fpu_regname (int n);

    82 

    83   static XMMRegister nr2xmmreg(int rnr);

    84 

    85   static bool is_caller_save_register (LIR_Opr opr) { return true; }

    86   static bool is_caller_save_register (Register r) { return true; }

    87 

    88   static LIR_Opr caller_save_xmm_reg_at(int i) {

    89     assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds");

    90     return _caller_save_xmm_regs[i];

    91   }