author | kvn |
Mon, 10 Jul 2017 14:28:40 -0700 | |
changeset 45806 | 36707109c109 |
parent 45804 | 41b19cb98a96 |
child 45871 | 878e21603932 |
permissions | -rw-r--r-- |
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/* |
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* Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#ifndef CPU_X86_VM_GLOBALS_X86_HPP |
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#define CPU_X86_VM_GLOBALS_X86_HPP |
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#include "utilities/globalDefinitions.hpp" |
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#include "utilities/macros.hpp" |
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// Sets the default values for platform dependent flags used by the runtime system. |
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// (see globals.hpp) |
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define_pd_global(bool, ShareVtableStubs, true); |
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define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this |
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define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks |
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define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86. |
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define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast |
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define_pd_global(uintx, CodeCacheSegmentSize, 64 TIERED_ONLY(+64)); // Tiered compilation has large code-entry alignment. |
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// See 4827828 for this change. There is no globals_core_i486.hpp. I can't |
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// assign a different value for C2 without touching a number of files. Use |
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// #ifdef to minimize the change as it's late in Mantis. -- FIXME. |
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// c1 doesn't have this problem because the fix to 4858033 assures us |
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// the the vep is aligned at CodeEntryAlignment whereas c2 only aligns |
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// the uep and the vep doesn't get real alignment but just slops on by |
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// only assured that the entry instruction meets the 5 byte size requirement. |
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#if defined(COMPILER2) || INCLUDE_JVMCI |
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define_pd_global(intx, CodeEntryAlignment, 32); |
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#else |
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define_pd_global(intx, CodeEntryAlignment, 16); |
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#endif // COMPILER2 |
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define_pd_global(intx, OptoLoopAlignment, 16); |
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define_pd_global(intx, InlineFrequencyCount, 100); |
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define_pd_global(intx, InlineSmallCode, 1000); |
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#define DEFAULT_STACK_YELLOW_PAGES (NOT_WINDOWS(2) WINDOWS_ONLY(3)) |
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#define DEFAULT_STACK_RED_PAGES (1) |
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#define DEFAULT_STACK_RESERVED_PAGES (NOT_WINDOWS(1) WINDOWS_ONLY(0)) |
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#define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES |
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#define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES |
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#define MIN_STACK_RESERVED_PAGES (0) |
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#ifdef _LP64 |
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// Java_java_net_SocketOutputStream_socketWrite0() uses a 64k buffer on the |
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// stack if compiled for unix and LP64. To pass stack overflow tests we need |
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// 20 shadow pages. |
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#define DEFAULT_STACK_SHADOW_PAGES (NOT_WIN64(20) WIN64_ONLY(7) DEBUG_ONLY(+2)) |
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// For those clients that do not use write socket, we allow |
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// the min range value to be below that of the default |
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#define MIN_STACK_SHADOW_PAGES (NOT_WIN64(10) WIN64_ONLY(7) DEBUG_ONLY(+2)) |
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#else |
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#define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5)) |
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#define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES |
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#endif // _LP64 |
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define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES); |
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define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES); |
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define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES); |
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define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES); |
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define_pd_global(bool, RewriteBytecodes, true); |
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define_pd_global(bool, RewriteFrequentPairs, true); |
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#ifdef _ALLBSD_SOURCE |
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define_pd_global(bool, UseMembar, true); |
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#else |
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define_pd_global(bool, UseMembar, false); |
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#endif |
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// GC Ergo Flags |
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define_pd_global(size_t, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread |
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define_pd_global(uintx, TypeProfileLevel, 111); |
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define_pd_global(bool, CompactStrings, true); |
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define_pd_global(bool, PreserveFramePointer, false); |
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define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong); |
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#define ARCH_FLAGS(develop, \ |
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product, \ |
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diagnostic, \ |
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experimental, \ |
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notproduct, \ |
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range, \ |
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constraint, \ |
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writeable) \ |
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\ |
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develop(bool, IEEEPrecision, true, \ |
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"Enables IEEE precision (for INTEL only)") \ |
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\ |
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product(bool, UseStoreImmI16, true, \ |
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"Use store immediate 16-bits value instruction on x86") \ |
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\ |
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product(intx, UseAVX, 2, \ |
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"Highest supported AVX instructions set on x86/x64") \ |
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range(0, 99) \ |
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\ |
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product(bool, UseCLMUL, false, \ |
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"Control whether CLMUL instructions can be used on x86/x64") \ |
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\ |
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diagnostic(bool, UseIncDec, true, \ |
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"Use INC, DEC instructions on x86") \ |
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\ |
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product(bool, UseNewLongLShift, false, \ |
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"Use optimized bitwise shift left") \ |
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\ |
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product(bool, UseAddressNop, false, \ |
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"Use '0F 1F [addr]' NOP instructions on x86 cpus") \ |
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\ |
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product(bool, UseXmmLoadAndClearUpper, true, \ |
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"Load low part of XMM register and clear upper part") \ |
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\ |
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product(bool, UseXmmRegToRegMoveAll, false, \ |
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"Copy all XMM register bits when moving value between registers") \ |
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\ |
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product(bool, UseXmmI2D, false, \ |
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"Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \ |
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\ |
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product(bool, UseXmmI2F, false, \ |
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"Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \ |
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\ |
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product(bool, UseUnalignedLoadStores, false, \ |
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"Use SSE2 MOVDQU instruction for Arraycopy") \ |
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\ |
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product(bool, UseFastStosb, false, \ |
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"Use fast-string operation for zeroing: rep stosb") \ |
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/* Use Restricted Transactional Memory for lock eliding */ \ |
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product(bool, UseRTMLocking, false, \ |
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"Enable RTM lock eliding for inflated locks in compiled code") \ |
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\ |
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experimental(bool, UseRTMForStackLocks, false, \ |
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"Enable RTM lock eliding for stack locks in compiled code") \ |
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\ |
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product(bool, UseRTMDeopt, false, \ |
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"Perform deopt and recompilation based on RTM abort ratio") \ |
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\ |
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product(uintx, RTMRetryCount, 5, \ |
|
164 |
"Number of RTM retries on lock abort or busy") \ |
|
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165 |
range(0, max_uintx) \ |
23491 | 166 |
\ |
167 |
experimental(intx, RTMSpinLoopCount, 100, \ |
|
168 |
"Spin count for lock to become free before RTM retry") \ |
|
169 |
\ |
|
170 |
experimental(intx, RTMAbortThreshold, 1000, \ |
|
171 |
"Calculate abort ratio after this number of aborts") \ |
|
172 |
\ |
|
173 |
experimental(intx, RTMLockingThreshold, 10000, \ |
|
174 |
"Lock count at which to do RTM lock eliding without " \ |
|
175 |
"abort ratio calculation") \ |
|
176 |
\ |
|
177 |
experimental(intx, RTMAbortRatio, 50, \ |
|
178 |
"Lock abort ratio at which to stop use RTM lock eliding") \ |
|
179 |
\ |
|
180 |
experimental(intx, RTMTotalCountIncrRate, 64, \ |
|
181 |
"Increment total RTM attempted lock count once every n times") \ |
|
182 |
\ |
|
183 |
experimental(intx, RTMLockingCalculationDelay, 0, \ |
|
184 |
"Number of milliseconds to wait before start calculating aborts " \ |
|
185 |
"for RTM locking") \ |
|
186 |
\ |
|
23847
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8038939: Some options related to RTM locking optimization works inconsistently
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|
187 |
experimental(bool, UseRTMXendForLockBusy, true, \ |
23491 | 188 |
"Use RTM Xend instead of Xabort when lock busy") \ |
189 |
\ |
|
13521
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changeset
|
190 |
/* assembler */ \ |
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changeset
|
191 |
product(bool, UseCountLeadingZerosInstruction, false, \ |
97a23be06f4e
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|
192 |
"Use count leading zeros instruction") \ |
23220
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8031321: Support Intel bit manipulation instructions
iveresov
parents:
22856
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changeset
|
193 |
\ |
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diff
changeset
|
194 |
product(bool, UseCountTrailingZerosInstruction, false, \ |
fc827339dc37
8031321: Support Intel bit manipulation instructions
iveresov
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diff
changeset
|
195 |
"Use count trailing zeros instruction") \ |
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diff
changeset
|
196 |
\ |
35581
dd47cf4734f2
8145336: PPC64: fix string intrinsics after CompactStrings change
simonis
parents:
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diff
changeset
|
197 |
product(bool, UseSSE42Intrinsics, false, \ |
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|
198 |
"SSE4.2 versions of intrinsics") \ |
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|
199 |
\ |
23220
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8031321: Support Intel bit manipulation instructions
iveresov
parents:
22856
diff
changeset
|
200 |
product(bool, UseBMI1Instructions, false, \ |
26434
09ad55e5f486
8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents:
23847
diff
changeset
|
201 |
"Use BMI1 instructions") \ |
09ad55e5f486
8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents:
23847
diff
changeset
|
202 |
\ |
09ad55e5f486
8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents:
23847
diff
changeset
|
203 |
product(bool, UseBMI2Instructions, false, \ |
35540
e001ad24dcdb
8143353: update for x86 sin and cos in the math lib
vdeshpande
parents:
35135
diff
changeset
|
204 |
"Use BMI2 instructions") \ |
e001ad24dcdb
8143353: update for x86 sin and cos in the math lib
vdeshpande
parents:
35135
diff
changeset
|
205 |
\ |
38018
1dc6c6f21231
8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents:
36554
diff
changeset
|
206 |
diagnostic(bool, UseLibmIntrinsic, true, \ |
1dc6c6f21231
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changeset
|
207 |
"Use Libm Intrinsics") |
7397 | 208 |
#endif // CPU_X86_VM_GLOBALS_X86_HPP |