author | kvn |
Tue, 02 Nov 2010 09:00:37 -0700 | |
changeset 7115 | 32300e243300 |
parent 5547 | f4b087cbb361 |
child 7397 | 5b173b4ca846 |
permissions | -rw-r--r-- |
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/* |
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* Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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class VM_Version: public Abstract_VM_Version { |
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protected: |
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enum Feature_Flag { |
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v8_instructions = 0, |
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hardware_mul32 = 1, |
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hardware_div32 = 2, |
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hardware_fsmuld = 3, |
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hardware_popc = 4, |
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v9_instructions = 5, |
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vis1_instructions = 6, |
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vis2_instructions = 7, |
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sun4v_instructions = 8, |
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blk_init_instructions = 9, |
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fmaf_instructions = 10 |
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}; |
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enum Feature_Flag_Set { |
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unknown_m = 0, |
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all_features_m = -1, |
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v8_instructions_m = 1 << v8_instructions, |
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hardware_mul32_m = 1 << hardware_mul32, |
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hardware_div32_m = 1 << hardware_div32, |
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hardware_fsmuld_m = 1 << hardware_fsmuld, |
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hardware_popc_m = 1 << hardware_popc, |
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v9_instructions_m = 1 << v9_instructions, |
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vis1_instructions_m = 1 << vis1_instructions, |
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vis2_instructions_m = 1 << vis2_instructions, |
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sun4v_m = 1 << sun4v_instructions, |
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blk_init_instructions_m = 1 << blk_init_instructions, |
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fmaf_instructions_m = 1 << fmaf_instructions, |
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generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m, |
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generic_v9_m = generic_v8_m | v9_instructions_m, |
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ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m, |
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// Temporary until we have something more accurate |
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niagara1_unique_m = sun4v_m, |
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niagara1_m = generic_v9_m | niagara1_unique_m |
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}; |
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static int _features; |
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static const char* _features_str; |
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static void print_features(); |
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static int determine_features(); |
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static int platform_features(int features); |
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static bool is_niagara1(int features) { return (features & sun4v_m) != 0; } |
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static bool is_sparc64(int features) { return (features & fmaf_instructions_m) != 0; } |
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static int maximum_niagara1_processor_count() { return 32; } |
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// Returns true if the platform is in the niagara line and |
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// newer than the niagara1. |
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static bool is_niagara1_plus(); |
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public: |
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// Initialization |
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static void initialize(); |
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// Instruction support |
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static bool has_v8() { return (_features & v8_instructions_m) != 0; } |
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static bool has_v9() { return (_features & v9_instructions_m) != 0; } |
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static bool has_hardware_mul32() { return (_features & hardware_mul32_m) != 0; } |
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static bool has_hardware_div32() { return (_features & hardware_div32_m) != 0; } |
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static bool has_hardware_fsmuld() { return (_features & hardware_fsmuld_m) != 0; } |
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static bool has_hardware_popc() { return (_features & hardware_popc_m) != 0; } |
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static bool has_vis1() { return (_features & vis1_instructions_m) != 0; } |
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static bool has_vis2() { return (_features & vis2_instructions_m) != 0; } |
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static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; } |
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static bool supports_compare_and_exchange() |
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{ return has_v9(); } |
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static bool is_ultra3() { return (_features & ultra3_m) == ultra3_m; } |
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static bool is_sun4v() { return (_features & sun4v_m) != 0; } |
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static bool is_niagara1() { return is_niagara1(_features); } |
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static bool is_sparc64() { return is_sparc64(_features); } |
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static bool has_fast_fxtof() { return has_v9() && !is_ultra3(); } |
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static bool has_fast_idiv() { return is_niagara1_plus() || is_sparc64(); } |
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static const char* cpu_features() { return _features_str; } |
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static intx L1_data_cache_line_size() { |
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return 64; // default prefetch block size on sparc |
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} |
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// Prefetch |
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static intx prefetch_copy_interval_in_bytes() { |
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intx interval = PrefetchCopyIntervalInBytes; |
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return interval >= 0 ? interval : (has_v9() ? 512 : 0); |
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} |
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static intx prefetch_scan_interval_in_bytes() { |
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intx interval = PrefetchScanIntervalInBytes; |
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return interval >= 0 ? interval : (has_v9() ? 512 : 0); |
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} |
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static intx prefetch_fields_ahead() { |
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intx count = PrefetchFieldsAhead; |
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return count >= 0 ? count : (is_ultra3() ? 1 : 0); |
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} |
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static intx allocate_prefetch_distance() { |
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// This method should be called before allocate_prefetch_style(). |
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intx count = AllocatePrefetchDistance; |
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if (count < 0) { // default is not defined ? |
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count = 512; |
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} |
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return count; |
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} |
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static intx allocate_prefetch_style() { |
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assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive"); |
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// Return 0 if AllocatePrefetchDistance was not defined. |
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return AllocatePrefetchDistance > 0 ? AllocatePrefetchStyle : 0; |
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} |
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// Legacy |
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static bool v8_instructions_work() { return has_v8() && !has_v9(); } |
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static bool v9_instructions_work() { return has_v9(); } |
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// Assembler testing |
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static void allow_all(); |
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static void revert(); |
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// Override the Abstract_VM_Version implementation. |
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static uint page_size_count() { return is_sun4v() ? 4 : 2; } |
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// Calculates the number of parallel threads |
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static unsigned int calc_parallel_worker_threads(); |
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}; |